| .nvim/svlangserver | ||
| screenshots | ||
| tests | ||
| the-bomb@6d88fb2756 | ||
| .gitignore | ||
| .gitmodules | ||
| aastructs.sv | ||
| alu.sv | ||
| chip8.qpf | ||
| chip8.qsf | ||
| chip8.sv | ||
| chip8.sv.bak | ||
| cpu.sv | ||
| cpu.sv.bak | ||
| downclocker.sv | ||
| fontset.bin | ||
| gen_rom.py | ||
| gpu.sv | ||
| make_cdf.sh | ||
| makefile | ||
| memory.sv | ||
| README.md | ||
| yayacemu.cpp | ||
Yet another yet another Chip-8 emulator (yayacemu)
Because one just wasn't enough.
A Chip-8 emulator (interpreter) written in SystemVerilog with I/O simulated with C++ also depends on SDL2.
Building & Testing
In order to run yayacemu, you must have sdl2, verilator, and make installed.
Once you have the dependencies installed, you can build the emulator with:
make build
You can build start the emulator with:
make run ROM_FILE=[PATH_TO_YOUR_ROM]
Running
If you have a binary, you can run it with the following:
yayacemu [PATH_TO_YOUR_ROM]
Todo
- Graphics
- Corax+ Required Instructions
- Proper Flag Handling
- Working Input
- More Instructions
- Tetris Working Running
- Pass Quirks Test
- Add beeper (instead of sound, screen becomes red)
- Add all Instructions
- Implement a real (synthesizeable, pseudorandom) random module
- Code cleanup
- Deploying to an FPGA with a real screen, keypad, and beeper
Screenshots
