alu works on fpga
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alu.sv
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alu.sv
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@ -33,7 +33,7 @@ module alu(
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result_int <= in.operand_a + in.operand_b;
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result <= result_int[7:0];
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overflow <= result_int[8];
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if (cnt == 2) begin
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if (cnt >= 2) begin
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$display("%b %b + %b %b ya", result, in.operand_a, in.operand_b, result_int);
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done <= 1;
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end
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