yayacemu/chip8.qsf

#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		st7920_driver_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Intel recommends that you do not modify this file. This
#    file is updated automatically by the Quartus Prime software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEBA6U23I7
set_global_assignment -name TOP_LEVEL_ENTITY chip8 
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 23.1STD.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:27:46  FEBRUARY 02, 2024"
set_global_assignment -name LAST_QUARTUS_VERSION "23.1std.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name SYSTEMVERILOG_FILE "./the-bomb/st7920_serial_driver.sv"
set_global_assignment -name SYSTEMVERILOG_FILE chip8.sv
set_global_assignment -name SYSTEMVERILOG_FILE cpu.sv
set_global_assignment -name SYSTEMVERILOG_FILE alu.sv
set_global_assignment -name SYSTEMVERILOG_FILE aastructs.sv
set_global_assignment -name SYSTEMVERILOG_FILE downclocker.sv
set_global_assignment -name SDC_FILE chip8.sdc
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_location_assignment PIN_V11 -to fpga_clk


set_location_assignment PIN_D8 -to lcd_clk
set_location_assignment PIN_V12 -to lcd_cs
set_location_assignment PIN_W12 -to lcd_data
set_location_assignment PIN_AE26 -to led[5]
set_location_assignment PIN_AF26 -to led[4]
set_location_assignment PIN_V15 -to led[3]
set_location_assignment PIN_V16 -to led[2]
set_location_assignment PIN_AA24 -to led[1]
set_location_assignment PIN_W15 -to led[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to led
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id eda_simulation
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_clock
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_cs
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data
set_location_assignment PIN_W20 -to rst_in


set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top