23 lines
461 B
Systemverilog
23 lines
461 B
Systemverilog
module gpu (
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input wire sys_clk,
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input wire sys_rst_n_ms,
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input wire [7:0] vram[0:1023],
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output logic lcd_clk, // This goes to the E pin
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output logic lcd_data, // This goes to the R/W pin
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output logic [5:0] led
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);
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import "DPI-C" function void init_screen();
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import "DPI-C" function void draw_screen(logic [7:0] vram[0:1023]);
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initial begin
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init_screen();
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end
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always_comb begin
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draw_screen(vram);
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end
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endmodule
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