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128 changed files with 39530 additions and 530 deletions
566
cpu.sv
566
cpu.sv
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@ -1,317 +1,317 @@
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module cpu (
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input wire system_ready,
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output bit [7:0] memory[0:4095],
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input wire clk_in,
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input wire keyboard[15:0],
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input wire [7:0] random_number,
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input wire [7:0] rd_memory_data,
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output int cycle_counter,
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output wire [15:0] program_counter,
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output wire [7:0] vram[0:1023],
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output wire [7:0] sound_timer
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output logic [11:0] rd_memory_address,
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output logic [11:0] wr_memory_address,
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output logic [7:0] wr_memory_data,
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output logic wr_go,
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output logic lcd_clk,
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output logic lcd_data,
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output logic [5:0] led
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);
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bit halt;
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int watch_key;
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logic [7:0] vram [0:1023];
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logic [15:0] stack[0:15];
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logic [15:0] index_reg;
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logic [3:0] stack_pointer;
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logic [7:0] registers[0:15];
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logic [15:0] opcode;
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logic [7:0] delay_timer;
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`ifdef DUMMY_GPU
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gpu gpu(
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`endif
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`ifndef DUMMY_GPU
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st7920_serial_driver gpu(
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`endif
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clk_in,
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1'b1,
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vram,
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lcd_clk,
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lcd_data,
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led
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);
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logic [15:0] scratch;
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logic [15:0] scratch2;
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logic [7:0] scratch_8;
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logic [7:0] scratch_82;
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logic [31:0] x_cord;
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logic [31:0] y_cord;
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logic [7:0] size;
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logic screen_pixel;
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logic [7:0] sprite_pixel;
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task write_pixels;
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input [31:0] x;
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input [31:0] y;
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int i;
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begin
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// bottom left
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i = (y*128*2) + x*2 +127;
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begin
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// bottom left
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`define BLP ((y*128*2) + x*2 +127)
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if (vram[`BLP/8][7-(`BLP%8)] == 1) begin
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registers[15] <= 1;
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end
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vram[`BLP/8][7-(`BLP%8)] <= 1;
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if (vram[i/8][7-(i%8)] == 1) begin
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registers[15] = 1;
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end
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// bottom right
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`define BRP ((y*128*2) + x*2 +128)
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vram[`BRP/8][7-(`BRP%8)] <= 1;
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vram[i/8][7-(i%8)] ^= 1;
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// top left
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`define TLP ((y*128*2) + x*2-1)
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vram[`TLP/8][7-(`TLP%8)] <= 1;
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// bottom right
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i = (y*128*2) + x*2 +128;
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vram[i/8][7-(i%8)] ^= 1;
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// top left
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i = (y*128*2) + x*2-1;
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vram[i/8][7-(i%8)] ^= 1;
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// top right
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i = (y*128*2) + x*2;
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vram[i/8][7-(i%8)] ^= 1;
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end
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// top right
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`define TRP ((y*128*2) + x*2)
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vram[`TRP/8][7-(`TRP%8)] <= 1;
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end
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endtask
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always_ff @(negedge clk_in) begin
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if (system_ready) begin
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opcode = {memory[program_counter+0], memory[program_counter+1]};
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$display("HW : opcode is 0x%h (%b)", opcode, opcode);
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$display("HW : PC %0d 0x%h", program_counter, program_counter);
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logic [15:0] program_counter;
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if (cycle_counter % 20 == 0) begin
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if (delay_timer > 0) delay_timer--;
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if (sound_timer > 0) sound_timer--;
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logic [7:0] registers[0:15];
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logic [15:0] index_reg;
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logic [15:0] stack[0:15];
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logic [3:0] stack_pointer;
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logic [15:0] opcode;
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logic [7:0] sound_timer;
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logic [7:0] delay_timer;
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typedef enum {ST_FETCH_HI, ST_FETCH_LO, ST_FETCH_LO2, ST_DECODE, ST_EXEC, ST_DRAW, ST_FETCH_MEM, ST_WB, ST_CLEANUP, ST_HALT} cpu_state;
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cpu_state state;
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typedef enum {INIT, DRAW} draw_stage;
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typedef enum {CLS, LD, DRW, JP} cpu_opcode;
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typedef enum {REG, IDX_REG, BYTE, MEM, SPRITE_MEM} data_type;
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struct {
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draw_stage stage;
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logic [4:0] r;
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logic [4:0] c;
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logic [7:0] x;
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logic [7:0] y;
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} draw_state;
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struct {
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cpu_opcode op;
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data_type src;
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data_type dst;
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logic [3:0] dst_reg;
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logic [3:0] src_reg;
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logic [11:0] src_byte;
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logic [(8*16)-1:0] src_sprite;
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logic [11:0] src_sprite_addr;
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logic [3:0] src_sprite_vx;
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logic [3:0] src_sprite_vy;
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logic [7:0] src_sprite_x;
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logic [7:0] src_sprite_y;
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logic [4:0] src_sprite_sz;
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logic [4:0] src_sprite_idx;
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logic [11:0] src_addr;
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logic [11:0] dst_addr;
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} instr;
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initial begin
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state = ST_FETCH_HI;
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cycle_counter = 0;
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program_counter = 'h200;
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wr_go = 0;
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for (int i = 0; i < 2048; i++) begin
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vram[i] = 0;
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end
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end
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casez (opcode)
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'h00E0: begin
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$display("HW : INSTR CLS");
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for (int i = 0; i < 2048; i++) begin
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vram[i] = 0;
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always_ff @(posedge clk_in) begin
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case (state)
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ST_FETCH_HI: begin
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rd_memory_address <= program_counter[11:0];
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program_counter <= program_counter + 1;
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state <= ST_FETCH_LO;
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end
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end
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'h00EE: begin
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$display("HW : INSTR RET");
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stack_pointer--;
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program_counter = stack[stack_pointer];
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end
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'h0???: $display("HW : INSTR SYS addr (Treating as NOP)");
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'h1???: begin
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$display("HW : INSTR JP addr");
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program_counter = (opcode & 'h0FFF) - 2;
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end
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'h2???: begin
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$display("HW : INSTR CALL addr");
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stack[stack_pointer] = program_counter;
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stack_pointer++;
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program_counter = (opcode & 'h0FFF) - 2;
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end
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'h3???: begin
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$display("HW : INSTR SE Vx, byte");
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scratch = (opcode & 'h00FF);
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if (scratch[7:0] == registers[(opcode&'h0F00)>>8]) begin
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program_counter += 2;
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ST_FETCH_LO: begin
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rd_memory_address <= program_counter[11:0];
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program_counter <= program_counter - 1;
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opcode <= { rd_memory_data, 8'h00 };
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$display("CPU : Opcode HI is %h", rd_memory_data);
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state <= ST_FETCH_LO2;
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end
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end
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'h4???: begin
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$display("HW : INSTR SNE Vx, byte");
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scratch = (opcode & 'h00FF);
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if (scratch[7:0] != registers[(opcode&'h0F00)>>8]) begin
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program_counter += 2;
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ST_FETCH_LO2: begin
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opcode <= { opcode[15:8], rd_memory_data};
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$display("CPU : Opcode LO is %h", rd_memory_data);
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state <= ST_DECODE;
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end
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end
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'h5??0: begin
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$display("HW : INSTR SE Vx, Vy");
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if (registers[(opcode&'h00F0)>>4] == registers[(opcode&'h0F00)>>8]) begin
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program_counter += 2;
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ST_DECODE: begin
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casez (opcode)
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16'h00E0: begin
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instr.op <= CLS;
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state <= ST_CLEANUP;
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program_counter <= program_counter + 2;
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end
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16'h1???: begin
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instr.op <= JP;
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instr.src_byte <= opcode[11:0];
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state <= ST_EXEC;
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end
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16'h6???: begin
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$display("Instruction is LD Vx, Byte");
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instr.op <= LD;
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instr.src <= BYTE;
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instr.src_byte <= {4'h00, opcode[7:0]};
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instr.dst <= REG;
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instr.dst_reg <= opcode[11:8];
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state <= ST_EXEC;
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end
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16'hA???: begin
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$display("Instruction is LD I, Byte");
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instr.op <= LD;
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instr.src <= BYTE;
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instr.src_byte <= opcode[11:0];
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instr.dst <= IDX_REG;
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state <= ST_EXEC;
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end
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16'hD???: begin
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instr.op <= DRW;
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instr.src <= SPRITE_MEM;
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instr.src_sprite_sz <= {1'b0, opcode[3:0]};
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instr.src_sprite_addr <= index_reg[11:0];
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instr.src_sprite_vx <= opcode[11:8];
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instr.src_sprite_vy <= opcode[7:4];
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instr.src_sprite_idx <= 0;
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state <= ST_FETCH_MEM;
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end
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default: begin
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$display("ILLEGAL INSTRUCTION %h at PC 0x%h (%0d)", opcode, program_counter, program_counter);
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$fatal();
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end
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endcase
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end
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end
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'h6???: begin
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$display("HW : INSTR LD Vx, byte");
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scratch = (opcode & 'h00FF);
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registers[(opcode&'h0F00)>>8] = scratch[7:0];
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end
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'h7???: begin
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$display("HW : INSTR ADD Vx, byte");
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scratch = (opcode & 'h00FF);
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registers[(opcode&'h0F00)>>8] += scratch[7:0];
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end
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'h8??0: begin
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$display("HW : INSTR LD Vx, Vy");
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registers[(opcode&'h0F00)>>8] = registers[(opcode&'h00F0)>>4];
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end
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'h8??1: begin
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$display("HW : INSTR OR Vx, Vy");
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registers[(opcode&'h0F00)>>8] |= registers[(opcode&'h00F0)>>4];
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registers[15] = 0;
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end
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'h8??2: begin
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$display("HW : INSTR AND Vx, Vy");
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registers[(opcode&'h0F00)>>8] &= registers[(opcode&'h00F0)>>4];
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registers[15] = 0;
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end
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'h8??3: begin
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$display("HW : INSTR XOR Vx, Vy");
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registers[(opcode&'h0F00)>>8] ^= registers[(opcode&'h00F0)>>4];
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registers[15] = 0;
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end
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'h8??4: begin
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$display("HW : INSTR ADD Vx, Vy");
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scratch_8 = registers[(opcode&'h0F00)>>8];
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registers[(opcode&'h0F00)>>8] += registers[(opcode&'h00F0)>>4];
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registers[15] = {7'b0000000, scratch_8 > registers[(opcode&'h0F00)>>8]};
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end
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'h8??5: begin
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$display("HW : INSTR SUB Vx, Vy");
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scratch_8 = registers[(opcode&'h0F00)>>8];
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registers[(opcode&'h0F00)>>8] -= registers[(opcode&'h00F0)>>4];
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registers[15] = {7'b0000000, scratch_8 >= registers[(opcode&'h0F00)>>8]};
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end
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'h8??6: begin
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$display("HW : INSTR SHR Vx {, Vy}");
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scratch_8 = registers[(opcode&'h0F00)>>8];
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registers[(opcode&'h0F00)>>8] = registers[(opcode&'h00F0)>>4] >> 1;
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registers[15] = {7'b0000000, ((scratch_8 & 8'h01) == 8'h01)};
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end
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'h8??7: begin
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$display("HW : INSTR SUBN Vx, Vy");
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scratch_8 = registers[(opcode&'h00F0)>>4];
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scratch_82 = registers[(opcode&'h0F00)>>8];
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registers[(opcode & 'h0F00) >> 8] = registers[(opcode & 'h00F0) >> 4] - registers[(opcode & 'h0F00) >> 8];
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registers[15] = {7'b0000000, (scratch_8 >= scratch_82)};
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end
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'h8??E: begin
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$display("HW : INSTR SHL Vx {, Vy}");
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scratch_8 = registers[(opcode&'h0F00)>>8];
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registers[(opcode&'h0F00)>>8] = registers[(opcode&'h00F0)>>4] << 1;
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registers[15] = {7'b0000000, (scratch_8[7])};
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end
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'h9??0: begin
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$display("HW : INSTR SNE Vx, Vy");
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if (registers[(opcode&'h00F0)>>4] != registers[(opcode&'h0F00)>>8]) begin
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program_counter += 2;
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end
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end
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'hA???: begin
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$display("HW : INSTR LD I, addr");
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index_reg = (opcode & 'h0FFF);
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end
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'hb???: begin
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$display("HW : INSTR JP V0, addr");
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program_counter = {8'h00, registers[0]} + (opcode & 'h0FFF) - 2;
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end
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'hc???: begin
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$display("HW : RND Vx, addr");
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// TODO: use a real RNG module, this is not synthesizeable
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scratch = {8'h00, random_number} % 16'h0100;
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scratch2 = (opcode & 'h00FF);
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registers[(opcode&'h0F00)>>8] = scratch[7:0] & scratch2[7:0];
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end
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'hD???: begin
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$display("HW : INSTR DRW Vx, Vy, nibble");
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if (cycle_counter % 20 != 0) begin
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halt = 1;
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end else begin
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halt = 0;
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x_cord = {24'h000000, registers[(opcode&'h0F00)>>8]};
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y_cord = {24'h000000, registers[(opcode&'h00F0)>>4]};
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x_cord %= 64;
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y_cord %= 32;
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scratch = (opcode & 'h000F);
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size = scratch[7:0];
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registers[15] = 0;
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for (int r = 0; r < size; r++) begin
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for (int c = 0; c < 8; c++) begin
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if (r + y_cord >= 32 || x_cord + c >= 64) continue;
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sprite_pixel = memory[{16'h0000, index_reg}+r] & ('h80 >> c);
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if (|sprite_pixel) begin
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write_pixels(x_cord + c, r+y_cord);
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end
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ST_FETCH_MEM: begin
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if (instr.src == MEM) begin
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if (rd_memory_address == instr.src_addr) begin
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instr.src_byte <= { 4'h0, rd_memory_data};
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instr.src <= BYTE;
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state <= ST_EXEC;
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end else begin
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rd_memory_address <= instr.src_addr;
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end
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end
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end
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end
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end
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'hE?9E: begin
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$display("HW : INSTR SKP Vx");
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scratch_8 = registers[(opcode&'h0F00)>>8];
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if (keyboard[scratch_8[3:0]] == 1) begin
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program_counter += 2;
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end
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end
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'hE?A1: begin
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$display("HW : INSTR SNE Vx");
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scratch_8 = registers[(opcode&'h0F00)>>8];
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if (keyboard[scratch_8[3:0]] != 1) begin
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program_counter += 2;
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end
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end
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'hF?07: begin
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$display("HW : INSTR LD Vx, DT");
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registers[(opcode&'h0F00)>>8] = delay_timer;
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end
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'hF?0A: begin
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$display("HW : INSTR LD Vx, K");
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halt = 1;
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for (int i = 0; i < 16; i++) begin
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if (watch_key == 255) begin
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if (keyboard[i]) begin
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watch_key = i;
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if (instr.src == SPRITE_MEM) begin
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if (instr.src_sprite_idx == 0) begin
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rd_memory_address <= instr.src_sprite_addr + {7'b0000000, instr.src_sprite_idx};
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instr.src_sprite_idx <= instr.src_sprite_idx + 1;
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end else if (instr.src_sprite_idx <= instr.src_sprite_sz) begin
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rd_memory_address <= instr.src_sprite_addr + {7'b0000000, instr.src_sprite_idx};
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instr.src_sprite_idx <= instr.src_sprite_idx + 1;
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for (int l = 0; l < 8; l++)
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instr.src_sprite[(instr.src_sprite_idx)*8+l] <= rd_memory_data[7-l];
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$display("%b", rd_memory_data);
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||||
end else begin
|
||||
instr.src_sprite_x <= registers[instr.src_sprite_vx] % 8'd64;
|
||||
instr.src_sprite_y <= registers[instr.src_sprite_vy] % 8'd32;
|
||||
state <= ST_DRAW;
|
||||
draw_state.stage <= INIT;
|
||||
end
|
||||
end
|
||||
end else begin
|
||||
if (!keyboard[watch_key]) begin
|
||||
halt = 0;
|
||||
watch_key = 255;
|
||||
end
|
||||
|
||||
ST_HALT: begin end
|
||||
|
||||
ST_DRAW: begin
|
||||
if (draw_state.stage == INIT) begin
|
||||
draw_state.x <= instr.src_sprite_x;
|
||||
draw_state.y <= instr.src_sprite_y;
|
||||
|
||||
draw_state.r <= 0;
|
||||
draw_state.c <= 0;
|
||||
|
||||
draw_state.stage <= DRAW;
|
||||
registers[15] <= 0;
|
||||
end else begin
|
||||
if (draw_state.r == instr.src_sprite_sz + 1) begin
|
||||
$display("sprite is %0d big at coord %d %d sprite=%b idx=%0d", instr.src_sprite_sz, instr.src_sprite_x, instr.src_sprite_y, instr.src_sprite, instr.src_sprite_addr);
|
||||
state <= ST_CLEANUP;
|
||||
program_counter <= program_counter + 2;
|
||||
end else begin
|
||||
if (draw_state.c == 5'd8) begin
|
||||
draw_state.c <= 0;
|
||||
draw_state.r <= draw_state.r + 1;
|
||||
end else begin
|
||||
/* verilator lint_off WIDTHEXPAND */
|
||||
if (draw_state.r + instr.src_sprite_y < 32 && draw_state.c + instr.src_sprite_x < 64) begin
|
||||
`define DRAW_PX ((draw_state.r + instr.src_sprite_y)*64 + (draw_state.c + instr.src_sprite_x))
|
||||
|
||||
/* verilator lint_off WIDTHEXPAND */
|
||||
if (instr.src_sprite[(draw_state.r*8) + draw_state.c]) begin
|
||||
write_pixels(draw_state.c + instr.src_sprite_x, draw_state.r + instr.src_sprite_y);
|
||||
end
|
||||
end
|
||||
draw_state.c <= draw_state.c + 1;
|
||||
end
|
||||
end
|
||||
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
'hF?15: begin
|
||||
$display("HW : INSTR LD DT, Vx");
|
||||
delay_timer = registers[(opcode&'h0F00)>>8];
|
||||
end
|
||||
'hF?18: begin
|
||||
$display("HW : INSTR LD ST, Vx");
|
||||
sound_timer = registers[(opcode&'h0F00)>>8];
|
||||
end
|
||||
'hF?1E: begin
|
||||
$display("HW : INSTR ADD I, Vx");
|
||||
index_reg = index_reg + {8'h00, registers[(opcode&'h0F00)>>8]};
|
||||
end
|
||||
'hF?29: begin
|
||||
$display("HW : INSTR LDL F, Vx");
|
||||
index_reg = registers[(opcode&'h0F00)>>8] * 5;
|
||||
end
|
||||
'hF?33: begin
|
||||
$display("HW : INSTR LD B, Vx");
|
||||
scratch = {8'h00, registers[(opcode&'h0F00)>>8]};
|
||||
scratch2 = scratch % 10;
|
||||
memory[index_reg+2] = scratch2[7:0];
|
||||
scratch /= 10;
|
||||
scratch2 = scratch % 10;
|
||||
memory[index_reg+1] = scratch2[7:0];
|
||||
scratch /= 10;
|
||||
scratch2 = scratch % 10;
|
||||
memory[index_reg+0] = scratch2[7:0];
|
||||
end
|
||||
'hF?55: begin
|
||||
$display("HW : INSTR LD [I], Vx");
|
||||
scratch = (opcode & 'h0F00) >> 8;
|
||||
for (bit [7:0] i8 = 0; i8 <= scratch[7:0]; i8++) begin
|
||||
scratch2 = index_reg + {8'h00, i8};
|
||||
memory[scratch2[11:0]] = registers[i8[3:0]];
|
||||
|
||||
ST_EXEC: begin
|
||||
$display("CPU : IN EXEC");
|
||||
case (instr.op)
|
||||
LD: begin
|
||||
if (instr.src == REG) begin
|
||||
instr.src_byte <= { 4'h0, registers[instr.src_reg] };
|
||||
instr.src <= BYTE;
|
||||
end
|
||||
end
|
||||
JP: begin
|
||||
program_counter <= {4'h00, instr.src_byte};
|
||||
state <= ST_CLEANUP;
|
||||
end
|
||||
endcase
|
||||
|
||||
case (instr.op)
|
||||
LD,
|
||||
DRW,
|
||||
CLS: begin
|
||||
|
||||
program_counter <= program_counter + 2;
|
||||
state <= ST_WB;
|
||||
end
|
||||
endcase
|
||||
end
|
||||
index_reg++;
|
||||
end
|
||||
'hF?65: begin
|
||||
$display("HW : INSTR LD Vx, [I]");
|
||||
scratch = (opcode & 'h0F00) >> 8;
|
||||
for (bit [7:0] i8 = 0; i8 <= scratch[7:0]; i8++) begin
|
||||
scratch2 = index_reg + {8'h00, i8};
|
||||
registers[i8[3:0]] = memory[scratch2[11:0]];
|
||||
|
||||
ST_WB: begin
|
||||
$display("CPU : IN WB");
|
||||
if (instr.src != BYTE)
|
||||
$fatal();
|
||||
|
||||
case (instr.dst)
|
||||
MEM: begin
|
||||
wr_memory_address <= instr.dst_addr;
|
||||
wr_memory_data <= instr.src_byte[7:0];
|
||||
wr_go <= 1'b1;
|
||||
$display("writing back byte %b to %h", instr.src_byte, instr.dst_addr);
|
||||
end
|
||||
REG: registers[instr.dst_reg] <= instr.src_byte[7:0];
|
||||
IDX_REG: index_reg <= {4'h0, instr.src_byte};
|
||||
endcase
|
||||
|
||||
state <= ST_CLEANUP;
|
||||
end
|
||||
|
||||
ST_CLEANUP: begin
|
||||
wr_go <= 0;
|
||||
state <= ST_FETCH_HI;
|
||||
end
|
||||
index_reg++;
|
||||
end
|
||||
default: $display("HW : ILLEGAL INSTRUCTION");
|
||||
endcase
|
||||
|
||||
if (!halt) program_counter += 2;
|
||||
|
||||
cycle_counter++;
|
||||
end
|
||||
cycle_counter <= cycle_counter + 1;
|
||||
end
|
||||
endmodule
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue