diff --git a/.gitignore b/.gitignore
index 697cf4f..cbac427 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1,6 @@
obj_dir/
+db/
+incremental_db/
+output_files/
+c5_pin_model_dump.txt
+rom.bin
diff --git a/c5_pin_model_dump.txt b/c5_pin_model_dump.txt
deleted file mode 100644
index 31bb72c..0000000
--- a/c5_pin_model_dump.txt
+++ /dev/null
@@ -1,118 +0,0 @@
-io_4iomodule_c5_index: 55gpio_index: 2
-io_4iomodule_c5_index: 54gpio_index: 465
-io_4iomodule_c5_index: 33gpio_index: 6
-io_4iomodule_c5_index: 51gpio_index: 461
-io_4iomodule_c5_index: 27gpio_index: 10
-io_4iomodule_c5_index: 57gpio_index: 457
-io_4iomodule_c5_index: 34gpio_index: 14
-io_4iomodule_c5_index: 28gpio_index: 453
-io_4iomodule_c5_index: 26gpio_index: 19
-io_4iomodule_c5_index: 47gpio_index: 449
-io_4iomodule_c5_index: 29gpio_index: 22
-io_4iomodule_c5_index: 3gpio_index: 445
-io_4iomodule_c5_index: 16gpio_index: 27
-io_4iomodule_c5_index: 6gpio_index: 441
-io_4iomodule_c5_index: 50gpio_index: 30
-io_4iomodule_c5_index: 35gpio_index: 437
-io_4iomodule_c5_index: 7gpio_index: 35
-io_4iomodule_c5_index: 53gpio_index: 433
-io_4iomodule_c5_index: 12gpio_index: 38
-io_4iomodule_c5_index: 1gpio_index: 429
-io_4iomodule_c5_index: 22gpio_index: 43
-io_4iomodule_c5_index: 8gpio_index: 425
-io_4iomodule_c5_index: 20gpio_index: 46
-io_4iomodule_c5_index: 30gpio_index: 421
-io_4iomodule_c5_index: 2gpio_index: 51
-io_4iomodule_c5_index: 31gpio_index: 417
-io_4iomodule_c5_index: 39gpio_index: 54
-io_4iomodule_c5_index: 18gpio_index: 413
-io_4iomodule_c5_index: 10gpio_index: 59
-io_4iomodule_c5_index: 42gpio_index: 409
-io_4iomodule_c5_index: 5gpio_index: 62
-io_4iomodule_c5_index: 24gpio_index: 405
-io_4iomodule_c5_index: 37gpio_index: 67
-io_4iomodule_c5_index: 13gpio_index: 401
-io_4iomodule_c5_index: 0gpio_index: 70
-io_4iomodule_c5_index: 44gpio_index: 397
-io_4iomodule_c5_index: 38gpio_index: 75
-io_4iomodule_c5_index: 52gpio_index: 393
-io_4iomodule_c5_index: 32gpio_index: 78
-io_4iomodule_c5_index: 56gpio_index: 389
-io_4iomodule_a_index: 13gpio_index: 385
-io_4iomodule_c5_index: 4gpio_index: 83
-io_4iomodule_c5_index: 23gpio_index: 86
-io_4iomodule_a_index: 15gpio_index: 381
-io_4iomodule_a_index: 8gpio_index: 377
-io_4iomodule_c5_index: 46gpio_index: 91
-io_4iomodule_a_index: 5gpio_index: 373
-io_4iomodule_a_index: 11gpio_index: 369
-io_4iomodule_c5_index: 41gpio_index: 94
-io_4iomodule_a_index: 3gpio_index: 365
-io_4iomodule_c5_index: 25gpio_index: 99
-io_4iomodule_a_index: 7gpio_index: 361
-io_4iomodule_c5_index: 9gpio_index: 102
-io_4iomodule_a_index: 0gpio_index: 357
-io_4iomodule_c5_index: 14gpio_index: 107
-io_4iomodule_a_index: 12gpio_index: 353
-io_4iomodule_c5_index: 45gpio_index: 110
-io_4iomodule_c5_index: 17gpio_index: 115
-io_4iomodule_a_index: 4gpio_index: 349
-io_4iomodule_c5_index: 36gpio_index: 118
-io_4iomodule_a_index: 10gpio_index: 345
-io_4iomodule_a_index: 16gpio_index: 341
-io_4iomodule_c5_index: 15gpio_index: 123
-io_4iomodule_a_index: 14gpio_index: 337
-io_4iomodule_c5_index: 43gpio_index: 126
-io_4iomodule_c5_index: 19gpio_index: 131
-io_4iomodule_a_index: 1gpio_index: 333
-io_4iomodule_c5_index: 59gpio_index: 134
-io_4iomodule_a_index: 2gpio_index: 329
-io_4iomodule_a_index: 9gpio_index: 325
-io_4iomodule_c5_index: 48gpio_index: 139
-io_4iomodule_a_index: 6gpio_index: 321
-io_4iomodule_a_index: 17gpio_index: 317
-io_4iomodule_c5_index: 40gpio_index: 142
-io_4iomodule_c5_index: 11gpio_index: 147
-io_4iomodule_c5_index: 58gpio_index: 150
-io_4iomodule_c5_index: 21gpio_index: 155
-io_4iomodule_c5_index: 49gpio_index: 158
-io_4iomodule_h_c5_index: 0gpio_index: 161
-io_4iomodule_h_c5_index: 6gpio_index: 165
-io_4iomodule_h_c5_index: 10gpio_index: 169
-io_4iomodule_h_c5_index: 3gpio_index: 173
-io_4iomodule_h_c5_index: 8gpio_index: 176
-io_4iomodule_h_c5_index: 11gpio_index: 180
-io_4iomodule_h_c5_index: 7gpio_index: 184
-io_4iomodule_h_c5_index: 5gpio_index: 188
-io_4iomodule_h_c5_index: 1gpio_index: 192
-io_4iomodule_h_c5_index: 2gpio_index: 196
-io_4iomodule_h_c5_index: 9gpio_index: 200
-io_4iomodule_h_c5_index: 4gpio_index: 204
-io_4iomodule_h_index: 15gpio_index: 208
-io_4iomodule_h_index: 1gpio_index: 212
-io_4iomodule_h_index: 3gpio_index: 216
-io_4iomodule_h_index: 2gpio_index: 220
-io_4iomodule_h_index: 11gpio_index: 224
-io_4iomodule_vref_h_index: 1gpio_index: 228
-io_4iomodule_h_index: 20gpio_index: 231
-io_4iomodule_h_index: 8gpio_index: 235
-io_4iomodule_h_index: 6gpio_index: 239
-io_4iomodule_h_index: 10gpio_index: 243
-io_4iomodule_h_index: 23gpio_index: 247
-io_4iomodule_h_index: 7gpio_index: 251
-io_4iomodule_h_index: 22gpio_index: 255
-io_4iomodule_h_index: 5gpio_index: 259
-io_4iomodule_h_index: 24gpio_index: 263
-io_4iomodule_h_index: 0gpio_index: 267
-io_4iomodule_h_index: 13gpio_index: 271
-io_4iomodule_h_index: 21gpio_index: 275
-io_4iomodule_h_index: 16gpio_index: 279
-io_4iomodule_vref_h_index: 0gpio_index: 283
-io_4iomodule_h_index: 12gpio_index: 286
-io_4iomodule_h_index: 4gpio_index: 290
-io_4iomodule_h_index: 19gpio_index: 294
-io_4iomodule_h_index: 18gpio_index: 298
-io_4iomodule_h_index: 17gpio_index: 302
-io_4iomodule_h_index: 25gpio_index: 306
-io_4iomodule_h_index: 14gpio_index: 310
-io_4iomodule_h_index: 9gpio_index: 314
diff --git a/db/.cmp.kpt b/db/.cmp.kpt
deleted file mode 100644
index a3a4a1c..0000000
Binary files a/db/.cmp.kpt and /dev/null differ
diff --git a/db/abs_divider_jbg.tdf b/db/abs_divider_jbg.tdf
deleted file mode 100644
index 631d32a..0000000
--- a/db/abs_divider_jbg.tdf
+++ /dev/null
@@ -1,89 +0,0 @@
---abs_divider DEN_REPRESENTATION="SIGNED" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 NUM_REPRESENTATION="SIGNED" SKIP_BITS=0 WIDTH_D=4 WIDTH_N=32 denominator numerator quotient remainder
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION alt_u_div_mve (denominator[3..0], numerator[31..0])
-RETURNS ( quotient[31..0], remainder[3..0]);
-FUNCTION lpm_abs_jn9 (data[3..0])
-RETURNS ( overflow, result[3..0]);
-FUNCTION lpm_abs_4p9 (data[31..0])
-RETURNS ( result[31..0]);
-
---synthesis_resources = lut 221
-SUBDESIGN abs_divider_jbg
-(
- denominator[3..0] : input;
- numerator[31..0] : input;
- quotient[31..0] : output;
- remainder[3..0] : output;
-)
-VARIABLE
- divider : alt_u_div_mve;
- my_abs_den : lpm_abs_jn9;
- my_abs_num : lpm_abs_4p9;
- compl_add_quot_result_int[32..0] : WIRE;
- compl_add_quot_cin : WIRE;
- compl_add_quot_dataa[31..0] : WIRE;
- compl_add_quot_datab[31..0] : WIRE;
- compl_add_quot_result[31..0] : WIRE;
- compl_add_rem_result_int[4..0] : WIRE;
- compl_add_rem_cin : WIRE;
- compl_add_rem_dataa[3..0] : WIRE;
- compl_add_rem_datab[3..0] : WIRE;
- compl_add_rem_result[3..0] : WIRE;
- diff_signs : WIRE;
- gnd_wire : WIRE;
- neg_quot[31..0] : WIRE;
- neg_rem[3..0] : WIRE;
- norm_den[3..0] : WIRE;
- norm_num[31..0] : WIRE;
- num_sign : WIRE;
- protect_quotient[31..0] : WIRE;
- protect_remainder[3..0] : WIRE;
- vcc_wire : WIRE;
-
-BEGIN
- divider.denominator[] = norm_den[];
- divider.numerator[] = norm_num[];
- my_abs_den.data[] = denominator[];
- my_abs_num.data[] = numerator[];
- compl_add_quot_result_int[] = (compl_add_quot_dataa[], compl_add_quot_cin) + (compl_add_quot_datab[], compl_add_quot_cin);
- compl_add_quot_result[] = compl_add_quot_result_int[32..1];
- compl_add_quot_cin = vcc_wire;
- compl_add_quot_dataa[] = (! protect_quotient[]);
- compl_add_quot_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire);
- compl_add_rem_result_int[] = (compl_add_rem_dataa[], compl_add_rem_cin) + (compl_add_rem_datab[], compl_add_rem_cin);
- compl_add_rem_result[] = compl_add_rem_result_int[4..1];
- compl_add_rem_cin = vcc_wire;
- compl_add_rem_dataa[] = (! protect_remainder[]);
- compl_add_rem_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire);
- diff_signs = (numerator[31..31] $ denominator[3..3]);
- gnd_wire = B"0";
- neg_quot[] = compl_add_quot_result[];
- neg_rem[] = compl_add_rem_result[];
- norm_den[] = my_abs_den.result[];
- norm_num[] = my_abs_num.result[];
- num_sign = numerator[31..31];
- protect_quotient[] = divider.quotient[];
- protect_remainder[] = divider.remainder[];
- quotient[] = ((protect_quotient[] & (! diff_signs)) # (neg_quot[] & diff_signs));
- remainder[] = ((protect_remainder[] & (! num_sign)) # (neg_rem[] & num_sign));
- vcc_wire = B"1";
-END;
---VALID FILE
diff --git a/db/abs_divider_lbg.tdf b/db/abs_divider_lbg.tdf
deleted file mode 100644
index b5fc0ff..0000000
--- a/db/abs_divider_lbg.tdf
+++ /dev/null
@@ -1,89 +0,0 @@
---abs_divider DEN_REPRESENTATION="SIGNED" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 NUM_REPRESENTATION="SIGNED" SKIP_BITS=0 WIDTH_D=6 WIDTH_N=32 denominator numerator quotient remainder
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION alt_u_div_qve (denominator[5..0], numerator[31..0])
-RETURNS ( quotient[31..0], remainder[5..0]);
-FUNCTION lpm_abs_ln9 (data[5..0])
-RETURNS ( overflow, result[5..0]);
-FUNCTION lpm_abs_4p9 (data[31..0])
-RETURNS ( overflow, result[31..0]);
-
---synthesis_resources = lut 311
-SUBDESIGN abs_divider_lbg
-(
- denominator[5..0] : input;
- numerator[31..0] : input;
- quotient[31..0] : output;
- remainder[5..0] : output;
-)
-VARIABLE
- divider : alt_u_div_qve;
- my_abs_den : lpm_abs_ln9;
- my_abs_num : lpm_abs_4p9;
- compl_add_quot_result_int[32..0] : WIRE;
- compl_add_quot_cin : WIRE;
- compl_add_quot_dataa[31..0] : WIRE;
- compl_add_quot_datab[31..0] : WIRE;
- compl_add_quot_result[31..0] : WIRE;
- compl_add_rem_result_int[6..0] : WIRE;
- compl_add_rem_cin : WIRE;
- compl_add_rem_dataa[5..0] : WIRE;
- compl_add_rem_datab[5..0] : WIRE;
- compl_add_rem_result[5..0] : WIRE;
- diff_signs : WIRE;
- gnd_wire : WIRE;
- neg_quot[31..0] : WIRE;
- neg_rem[5..0] : WIRE;
- norm_den[5..0] : WIRE;
- norm_num[31..0] : WIRE;
- num_sign : WIRE;
- protect_quotient[31..0] : WIRE;
- protect_remainder[5..0] : WIRE;
- vcc_wire : WIRE;
-
-BEGIN
- divider.denominator[] = norm_den[];
- divider.numerator[] = norm_num[];
- my_abs_den.data[] = denominator[];
- my_abs_num.data[] = numerator[];
- compl_add_quot_result_int[] = (compl_add_quot_dataa[], compl_add_quot_cin) + (compl_add_quot_datab[], compl_add_quot_cin);
- compl_add_quot_result[] = compl_add_quot_result_int[32..1];
- compl_add_quot_cin = vcc_wire;
- compl_add_quot_dataa[] = (! protect_quotient[]);
- compl_add_quot_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire);
- compl_add_rem_result_int[] = (compl_add_rem_dataa[], compl_add_rem_cin) + (compl_add_rem_datab[], compl_add_rem_cin);
- compl_add_rem_result[] = compl_add_rem_result_int[6..1];
- compl_add_rem_cin = vcc_wire;
- compl_add_rem_dataa[] = (! protect_remainder[]);
- compl_add_rem_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire);
- diff_signs = (numerator[31..31] $ denominator[5..5]);
- gnd_wire = B"0";
- neg_quot[] = compl_add_quot_result[];
- neg_rem[] = compl_add_rem_result[];
- norm_den[] = my_abs_den.result[];
- norm_num[] = my_abs_num.result[];
- num_sign = numerator[31..31];
- protect_quotient[] = divider.quotient[];
- protect_remainder[] = divider.remainder[];
- quotient[] = ((protect_quotient[] & (! diff_signs)) # (neg_quot[] & diff_signs));
- remainder[] = ((protect_remainder[] & (! num_sign)) # (neg_rem[] & num_sign));
- vcc_wire = B"1";
-END;
---VALID FILE
diff --git a/db/alt_u_div_mve.tdf b/db/alt_u_div_mve.tdf
deleted file mode 100644
index 1928036..0000000
--- a/db/alt_u_div_mve.tdf
+++ /dev/null
@@ -1,382 +0,0 @@
---alt_u_div DEVICE_FAMILY="Cyclone V" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=4 WIDTH_N=32 WIDTH_Q=32 WIDTH_R=4 denominator numerator quotient remainder
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-
---synthesis_resources = lut 182
-SUBDESIGN alt_u_div_mve
-(
- denominator[3..0] : input;
- numerator[31..0] : input;
- quotient[31..0] : output;
- remainder[3..0] : output;
-)
-VARIABLE
- add_sub_0_result_int[1..0] : WIRE;
- add_sub_0_cout : WIRE;
- add_sub_0_dataa[0..0] : WIRE;
- add_sub_0_datab[0..0] : WIRE;
- add_sub_0_result[0..0] : WIRE;
- add_sub_1_result_int[2..0] : WIRE;
- add_sub_1_cout : WIRE;
- add_sub_1_dataa[1..0] : WIRE;
- add_sub_1_datab[1..0] : WIRE;
- add_sub_1_result[1..0] : WIRE;
- add_sub_10_result_int[5..0] : WIRE;
- add_sub_10_cout : WIRE;
- add_sub_10_dataa[4..0] : WIRE;
- add_sub_10_datab[4..0] : WIRE;
- add_sub_10_result[4..0] : WIRE;
- add_sub_11_result_int[5..0] : WIRE;
- add_sub_11_cout : WIRE;
- add_sub_11_dataa[4..0] : WIRE;
- add_sub_11_datab[4..0] : WIRE;
- add_sub_11_result[4..0] : WIRE;
- add_sub_12_result_int[5..0] : WIRE;
- add_sub_12_cout : WIRE;
- add_sub_12_dataa[4..0] : WIRE;
- add_sub_12_datab[4..0] : WIRE;
- add_sub_12_result[4..0] : WIRE;
- add_sub_13_result_int[5..0] : WIRE;
- add_sub_13_cout : WIRE;
- add_sub_13_dataa[4..0] : WIRE;
- add_sub_13_datab[4..0] : WIRE;
- add_sub_13_result[4..0] : WIRE;
- add_sub_14_result_int[5..0] : WIRE;
- add_sub_14_cout : WIRE;
- add_sub_14_dataa[4..0] : WIRE;
- add_sub_14_datab[4..0] : WIRE;
- add_sub_14_result[4..0] : WIRE;
- add_sub_15_result_int[5..0] : WIRE;
- add_sub_15_cout : WIRE;
- add_sub_15_dataa[4..0] : WIRE;
- add_sub_15_datab[4..0] : WIRE;
- add_sub_15_result[4..0] : WIRE;
- add_sub_16_result_int[5..0] : WIRE;
- add_sub_16_cout : WIRE;
- add_sub_16_dataa[4..0] : WIRE;
- add_sub_16_datab[4..0] : WIRE;
- add_sub_16_result[4..0] : WIRE;
- add_sub_17_result_int[5..0] : WIRE;
- add_sub_17_cout : WIRE;
- add_sub_17_dataa[4..0] : WIRE;
- add_sub_17_datab[4..0] : WIRE;
- add_sub_17_result[4..0] : WIRE;
- add_sub_18_result_int[5..0] : WIRE;
- add_sub_18_cout : WIRE;
- add_sub_18_dataa[4..0] : WIRE;
- add_sub_18_datab[4..0] : WIRE;
- add_sub_18_result[4..0] : WIRE;
- add_sub_19_result_int[5..0] : WIRE;
- add_sub_19_cout : WIRE;
- add_sub_19_dataa[4..0] : WIRE;
- add_sub_19_datab[4..0] : WIRE;
- add_sub_19_result[4..0] : WIRE;
- add_sub_2_result_int[3..0] : WIRE;
- add_sub_2_cout : WIRE;
- add_sub_2_dataa[2..0] : WIRE;
- add_sub_2_datab[2..0] : WIRE;
- add_sub_2_result[2..0] : WIRE;
- add_sub_20_result_int[5..0] : WIRE;
- add_sub_20_cout : WIRE;
- add_sub_20_dataa[4..0] : WIRE;
- add_sub_20_datab[4..0] : WIRE;
- add_sub_20_result[4..0] : WIRE;
- add_sub_21_result_int[5..0] : WIRE;
- add_sub_21_cout : WIRE;
- add_sub_21_dataa[4..0] : WIRE;
- add_sub_21_datab[4..0] : WIRE;
- add_sub_21_result[4..0] : WIRE;
- add_sub_22_result_int[5..0] : WIRE;
- add_sub_22_cout : WIRE;
- add_sub_22_dataa[4..0] : WIRE;
- add_sub_22_datab[4..0] : WIRE;
- add_sub_22_result[4..0] : WIRE;
- add_sub_23_result_int[5..0] : WIRE;
- add_sub_23_cout : WIRE;
- add_sub_23_dataa[4..0] : WIRE;
- add_sub_23_datab[4..0] : WIRE;
- add_sub_23_result[4..0] : WIRE;
- add_sub_24_result_int[5..0] : WIRE;
- add_sub_24_cout : WIRE;
- add_sub_24_dataa[4..0] : WIRE;
- add_sub_24_datab[4..0] : WIRE;
- add_sub_24_result[4..0] : WIRE;
- add_sub_25_result_int[5..0] : WIRE;
- add_sub_25_cout : WIRE;
- add_sub_25_dataa[4..0] : WIRE;
- add_sub_25_datab[4..0] : WIRE;
- add_sub_25_result[4..0] : WIRE;
- add_sub_26_result_int[5..0] : WIRE;
- add_sub_26_cout : WIRE;
- add_sub_26_dataa[4..0] : WIRE;
- add_sub_26_datab[4..0] : WIRE;
- add_sub_26_result[4..0] : WIRE;
- add_sub_27_result_int[5..0] : WIRE;
- add_sub_27_cout : WIRE;
- add_sub_27_dataa[4..0] : WIRE;
- add_sub_27_datab[4..0] : WIRE;
- add_sub_27_result[4..0] : WIRE;
- add_sub_28_result_int[5..0] : WIRE;
- add_sub_28_cout : WIRE;
- add_sub_28_dataa[4..0] : WIRE;
- add_sub_28_datab[4..0] : WIRE;
- add_sub_28_result[4..0] : WIRE;
- add_sub_29_result_int[5..0] : WIRE;
- add_sub_29_cout : WIRE;
- add_sub_29_dataa[4..0] : WIRE;
- add_sub_29_datab[4..0] : WIRE;
- add_sub_29_result[4..0] : WIRE;
- add_sub_3_result_int[4..0] : WIRE;
- add_sub_3_cout : WIRE;
- add_sub_3_dataa[3..0] : WIRE;
- add_sub_3_datab[3..0] : WIRE;
- add_sub_3_result[3..0] : WIRE;
- add_sub_30_result_int[5..0] : WIRE;
- add_sub_30_cout : WIRE;
- add_sub_30_dataa[4..0] : WIRE;
- add_sub_30_datab[4..0] : WIRE;
- add_sub_30_result[4..0] : WIRE;
- add_sub_31_result_int[5..0] : WIRE;
- add_sub_31_cout : WIRE;
- add_sub_31_dataa[4..0] : WIRE;
- add_sub_31_datab[4..0] : WIRE;
- add_sub_31_result[4..0] : WIRE;
- add_sub_4_result_int[5..0] : WIRE;
- add_sub_4_cout : WIRE;
- add_sub_4_dataa[4..0] : WIRE;
- add_sub_4_datab[4..0] : WIRE;
- add_sub_4_result[4..0] : WIRE;
- add_sub_5_result_int[5..0] : WIRE;
- add_sub_5_cout : WIRE;
- add_sub_5_dataa[4..0] : WIRE;
- add_sub_5_datab[4..0] : WIRE;
- add_sub_5_result[4..0] : WIRE;
- add_sub_6_result_int[5..0] : WIRE;
- add_sub_6_cout : WIRE;
- add_sub_6_dataa[4..0] : WIRE;
- add_sub_6_datab[4..0] : WIRE;
- add_sub_6_result[4..0] : WIRE;
- add_sub_7_result_int[5..0] : WIRE;
- add_sub_7_cout : WIRE;
- add_sub_7_dataa[4..0] : WIRE;
- add_sub_7_datab[4..0] : WIRE;
- add_sub_7_result[4..0] : WIRE;
- add_sub_8_result_int[5..0] : WIRE;
- add_sub_8_cout : WIRE;
- add_sub_8_dataa[4..0] : WIRE;
- add_sub_8_datab[4..0] : WIRE;
- add_sub_8_result[4..0] : WIRE;
- add_sub_9_result_int[5..0] : WIRE;
- add_sub_9_cout : WIRE;
- add_sub_9_dataa[4..0] : WIRE;
- add_sub_9_datab[4..0] : WIRE;
- add_sub_9_result[4..0] : WIRE;
- DenominatorIn[164..0] : WIRE;
- DenominatorIn_tmp[164..0] : WIRE;
- gnd_wire : WIRE;
- nose[1055..0] : WIRE;
- NumeratorIn[1055..0] : WIRE;
- NumeratorIn_tmp[1055..0] : WIRE;
- prestg[159..0] : WIRE;
- quotient_tmp[31..0] : WIRE;
- sel[131..0] : WIRE;
- selnose[1055..0] : WIRE;
- StageIn[164..0] : WIRE;
- StageIn_tmp[164..0] : WIRE;
- StageOut[159..0] : WIRE;
-
-BEGIN
- add_sub_0_result_int[] = (0, add_sub_0_dataa[]) - (0, add_sub_0_datab[]);
- add_sub_0_result[] = add_sub_0_result_int[0..0];
- add_sub_0_cout = !add_sub_0_result_int[1];
- add_sub_0_dataa[] = NumeratorIn[31..31];
- add_sub_0_datab[] = DenominatorIn[0..0];
- add_sub_1_result_int[] = (0, add_sub_1_dataa[]) - (0, add_sub_1_datab[]);
- add_sub_1_result[] = add_sub_1_result_int[1..0];
- add_sub_1_cout = !add_sub_1_result_int[2];
- add_sub_1_dataa[] = ( StageIn[5..5], NumeratorIn[62..62]);
- add_sub_1_datab[] = DenominatorIn[6..5];
- add_sub_10_result_int[] = (0, add_sub_10_dataa[]) - (0, add_sub_10_datab[]);
- add_sub_10_result[] = add_sub_10_result_int[4..0];
- add_sub_10_cout = !add_sub_10_result_int[5];
- add_sub_10_dataa[] = ( StageIn[53..50], NumeratorIn[341..341]);
- add_sub_10_datab[] = DenominatorIn[54..50];
- add_sub_11_result_int[] = (0, add_sub_11_dataa[]) - (0, add_sub_11_datab[]);
- add_sub_11_result[] = add_sub_11_result_int[4..0];
- add_sub_11_cout = !add_sub_11_result_int[5];
- add_sub_11_dataa[] = ( StageIn[58..55], NumeratorIn[372..372]);
- add_sub_11_datab[] = DenominatorIn[59..55];
- add_sub_12_result_int[] = (0, add_sub_12_dataa[]) - (0, add_sub_12_datab[]);
- add_sub_12_result[] = add_sub_12_result_int[4..0];
- add_sub_12_cout = !add_sub_12_result_int[5];
- add_sub_12_dataa[] = ( StageIn[63..60], NumeratorIn[403..403]);
- add_sub_12_datab[] = DenominatorIn[64..60];
- add_sub_13_result_int[] = (0, add_sub_13_dataa[]) - (0, add_sub_13_datab[]);
- add_sub_13_result[] = add_sub_13_result_int[4..0];
- add_sub_13_cout = !add_sub_13_result_int[5];
- add_sub_13_dataa[] = ( StageIn[68..65], NumeratorIn[434..434]);
- add_sub_13_datab[] = DenominatorIn[69..65];
- add_sub_14_result_int[] = (0, add_sub_14_dataa[]) - (0, add_sub_14_datab[]);
- add_sub_14_result[] = add_sub_14_result_int[4..0];
- add_sub_14_cout = !add_sub_14_result_int[5];
- add_sub_14_dataa[] = ( StageIn[73..70], NumeratorIn[465..465]);
- add_sub_14_datab[] = DenominatorIn[74..70];
- add_sub_15_result_int[] = (0, add_sub_15_dataa[]) - (0, add_sub_15_datab[]);
- add_sub_15_result[] = add_sub_15_result_int[4..0];
- add_sub_15_cout = !add_sub_15_result_int[5];
- add_sub_15_dataa[] = ( StageIn[78..75], NumeratorIn[496..496]);
- add_sub_15_datab[] = DenominatorIn[79..75];
- add_sub_16_result_int[] = (0, add_sub_16_dataa[]) - (0, add_sub_16_datab[]);
- add_sub_16_result[] = add_sub_16_result_int[4..0];
- add_sub_16_cout = !add_sub_16_result_int[5];
- add_sub_16_dataa[] = ( StageIn[83..80], NumeratorIn[527..527]);
- add_sub_16_datab[] = DenominatorIn[84..80];
- add_sub_17_result_int[] = (0, add_sub_17_dataa[]) - (0, add_sub_17_datab[]);
- add_sub_17_result[] = add_sub_17_result_int[4..0];
- add_sub_17_cout = !add_sub_17_result_int[5];
- add_sub_17_dataa[] = ( StageIn[88..85], NumeratorIn[558..558]);
- add_sub_17_datab[] = DenominatorIn[89..85];
- add_sub_18_result_int[] = (0, add_sub_18_dataa[]) - (0, add_sub_18_datab[]);
- add_sub_18_result[] = add_sub_18_result_int[4..0];
- add_sub_18_cout = !add_sub_18_result_int[5];
- add_sub_18_dataa[] = ( StageIn[93..90], NumeratorIn[589..589]);
- add_sub_18_datab[] = DenominatorIn[94..90];
- add_sub_19_result_int[] = (0, add_sub_19_dataa[]) - (0, add_sub_19_datab[]);
- add_sub_19_result[] = add_sub_19_result_int[4..0];
- add_sub_19_cout = !add_sub_19_result_int[5];
- add_sub_19_dataa[] = ( StageIn[98..95], NumeratorIn[620..620]);
- add_sub_19_datab[] = DenominatorIn[99..95];
- add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]);
- add_sub_2_result[] = add_sub_2_result_int[2..0];
- add_sub_2_cout = !add_sub_2_result_int[3];
- add_sub_2_dataa[] = ( StageIn[11..10], NumeratorIn[93..93]);
- add_sub_2_datab[] = DenominatorIn[12..10];
- add_sub_20_result_int[] = (0, add_sub_20_dataa[]) - (0, add_sub_20_datab[]);
- add_sub_20_result[] = add_sub_20_result_int[4..0];
- add_sub_20_cout = !add_sub_20_result_int[5];
- add_sub_20_dataa[] = ( StageIn[103..100], NumeratorIn[651..651]);
- add_sub_20_datab[] = DenominatorIn[104..100];
- add_sub_21_result_int[] = (0, add_sub_21_dataa[]) - (0, add_sub_21_datab[]);
- add_sub_21_result[] = add_sub_21_result_int[4..0];
- add_sub_21_cout = !add_sub_21_result_int[5];
- add_sub_21_dataa[] = ( StageIn[108..105], NumeratorIn[682..682]);
- add_sub_21_datab[] = DenominatorIn[109..105];
- add_sub_22_result_int[] = (0, add_sub_22_dataa[]) - (0, add_sub_22_datab[]);
- add_sub_22_result[] = add_sub_22_result_int[4..0];
- add_sub_22_cout = !add_sub_22_result_int[5];
- add_sub_22_dataa[] = ( StageIn[113..110], NumeratorIn[713..713]);
- add_sub_22_datab[] = DenominatorIn[114..110];
- add_sub_23_result_int[] = (0, add_sub_23_dataa[]) - (0, add_sub_23_datab[]);
- add_sub_23_result[] = add_sub_23_result_int[4..0];
- add_sub_23_cout = !add_sub_23_result_int[5];
- add_sub_23_dataa[] = ( StageIn[118..115], NumeratorIn[744..744]);
- add_sub_23_datab[] = DenominatorIn[119..115];
- add_sub_24_result_int[] = (0, add_sub_24_dataa[]) - (0, add_sub_24_datab[]);
- add_sub_24_result[] = add_sub_24_result_int[4..0];
- add_sub_24_cout = !add_sub_24_result_int[5];
- add_sub_24_dataa[] = ( StageIn[123..120], NumeratorIn[775..775]);
- add_sub_24_datab[] = DenominatorIn[124..120];
- add_sub_25_result_int[] = (0, add_sub_25_dataa[]) - (0, add_sub_25_datab[]);
- add_sub_25_result[] = add_sub_25_result_int[4..0];
- add_sub_25_cout = !add_sub_25_result_int[5];
- add_sub_25_dataa[] = ( StageIn[128..125], NumeratorIn[806..806]);
- add_sub_25_datab[] = DenominatorIn[129..125];
- add_sub_26_result_int[] = (0, add_sub_26_dataa[]) - (0, add_sub_26_datab[]);
- add_sub_26_result[] = add_sub_26_result_int[4..0];
- add_sub_26_cout = !add_sub_26_result_int[5];
- add_sub_26_dataa[] = ( StageIn[133..130], NumeratorIn[837..837]);
- add_sub_26_datab[] = DenominatorIn[134..130];
- add_sub_27_result_int[] = (0, add_sub_27_dataa[]) - (0, add_sub_27_datab[]);
- add_sub_27_result[] = add_sub_27_result_int[4..0];
- add_sub_27_cout = !add_sub_27_result_int[5];
- add_sub_27_dataa[] = ( StageIn[138..135], NumeratorIn[868..868]);
- add_sub_27_datab[] = DenominatorIn[139..135];
- add_sub_28_result_int[] = (0, add_sub_28_dataa[]) - (0, add_sub_28_datab[]);
- add_sub_28_result[] = add_sub_28_result_int[4..0];
- add_sub_28_cout = !add_sub_28_result_int[5];
- add_sub_28_dataa[] = ( StageIn[143..140], NumeratorIn[899..899]);
- add_sub_28_datab[] = DenominatorIn[144..140];
- add_sub_29_result_int[] = (0, add_sub_29_dataa[]) - (0, add_sub_29_datab[]);
- add_sub_29_result[] = add_sub_29_result_int[4..0];
- add_sub_29_cout = !add_sub_29_result_int[5];
- add_sub_29_dataa[] = ( StageIn[148..145], NumeratorIn[930..930]);
- add_sub_29_datab[] = DenominatorIn[149..145];
- add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]);
- add_sub_3_result[] = add_sub_3_result_int[3..0];
- add_sub_3_cout = !add_sub_3_result_int[4];
- add_sub_3_dataa[] = ( StageIn[17..15], NumeratorIn[124..124]);
- add_sub_3_datab[] = DenominatorIn[18..15];
- add_sub_30_result_int[] = (0, add_sub_30_dataa[]) - (0, add_sub_30_datab[]);
- add_sub_30_result[] = add_sub_30_result_int[4..0];
- add_sub_30_cout = !add_sub_30_result_int[5];
- add_sub_30_dataa[] = ( StageIn[153..150], NumeratorIn[961..961]);
- add_sub_30_datab[] = DenominatorIn[154..150];
- add_sub_31_result_int[] = (0, add_sub_31_dataa[]) - (0, add_sub_31_datab[]);
- add_sub_31_result[] = add_sub_31_result_int[4..0];
- add_sub_31_cout = !add_sub_31_result_int[5];
- add_sub_31_dataa[] = ( StageIn[158..155], NumeratorIn[992..992]);
- add_sub_31_datab[] = DenominatorIn[159..155];
- add_sub_4_result_int[] = (0, add_sub_4_dataa[]) - (0, add_sub_4_datab[]);
- add_sub_4_result[] = add_sub_4_result_int[4..0];
- add_sub_4_cout = !add_sub_4_result_int[5];
- add_sub_4_dataa[] = ( StageIn[23..20], NumeratorIn[155..155]);
- add_sub_4_datab[] = DenominatorIn[24..20];
- add_sub_5_result_int[] = (0, add_sub_5_dataa[]) - (0, add_sub_5_datab[]);
- add_sub_5_result[] = add_sub_5_result_int[4..0];
- add_sub_5_cout = !add_sub_5_result_int[5];
- add_sub_5_dataa[] = ( StageIn[28..25], NumeratorIn[186..186]);
- add_sub_5_datab[] = DenominatorIn[29..25];
- add_sub_6_result_int[] = (0, add_sub_6_dataa[]) - (0, add_sub_6_datab[]);
- add_sub_6_result[] = add_sub_6_result_int[4..0];
- add_sub_6_cout = !add_sub_6_result_int[5];
- add_sub_6_dataa[] = ( StageIn[33..30], NumeratorIn[217..217]);
- add_sub_6_datab[] = DenominatorIn[34..30];
- add_sub_7_result_int[] = (0, add_sub_7_dataa[]) - (0, add_sub_7_datab[]);
- add_sub_7_result[] = add_sub_7_result_int[4..0];
- add_sub_7_cout = !add_sub_7_result_int[5];
- add_sub_7_dataa[] = ( StageIn[38..35], NumeratorIn[248..248]);
- add_sub_7_datab[] = DenominatorIn[39..35];
- add_sub_8_result_int[] = (0, add_sub_8_dataa[]) - (0, add_sub_8_datab[]);
- add_sub_8_result[] = add_sub_8_result_int[4..0];
- add_sub_8_cout = !add_sub_8_result_int[5];
- add_sub_8_dataa[] = ( StageIn[43..40], NumeratorIn[279..279]);
- add_sub_8_datab[] = DenominatorIn[44..40];
- add_sub_9_result_int[] = (0, add_sub_9_dataa[]) - (0, add_sub_9_datab[]);
- add_sub_9_result[] = add_sub_9_result_int[4..0];
- add_sub_9_cout = !add_sub_9_result_int[5];
- add_sub_9_dataa[] = ( StageIn[48..45], NumeratorIn[310..310]);
- add_sub_9_datab[] = DenominatorIn[49..45];
- DenominatorIn[] = DenominatorIn_tmp[];
- DenominatorIn_tmp[] = ( DenominatorIn[159..0], ( gnd_wire, denominator[]));
- gnd_wire = B"0";
- nose[] = ( B"00000000000000000000000000000000", add_sub_31_cout, B"00000000000000000000000000000000", add_sub_30_cout, B"00000000000000000000000000000000", add_sub_29_cout, B"00000000000000000000000000000000", add_sub_28_cout, B"00000000000000000000000000000000", add_sub_27_cout, B"00000000000000000000000000000000", add_sub_26_cout, B"00000000000000000000000000000000", add_sub_25_cout, B"00000000000000000000000000000000", add_sub_24_cout, B"00000000000000000000000000000000", add_sub_23_cout, B"00000000000000000000000000000000", add_sub_22_cout, B"00000000000000000000000000000000", add_sub_21_cout, B"00000000000000000000000000000000", add_sub_20_cout, B"00000000000000000000000000000000", add_sub_19_cout, B"00000000000000000000000000000000", add_sub_18_cout, B"00000000000000000000000000000000", add_sub_17_cout, B"00000000000000000000000000000000", add_sub_16_cout, B"00000000000000000000000000000000", add_sub_15_cout, B"00000000000000000000000000000000", add_sub_14_cout, B"00000000000000000000000000000000", add_sub_13_cout, B"00000000000000000000000000000000", add_sub_12_cout, B"00000000000000000000000000000000", add_sub_11_cout, B"00000000000000000000000000000000", add_sub_10_cout, B"00000000000000000000000000000000", add_sub_9_cout, B"00000000000000000000000000000000", add_sub_8_cout, B"00000000000000000000000000000000", add_sub_7_cout, B"00000000000000000000000000000000", add_sub_6_cout, B"00000000000000000000000000000000", add_sub_5_cout, B"00000000000000000000000000000000", add_sub_4_cout, B"00000000000000000000000000000000", add_sub_3_cout, B"00000000000000000000000000000000", add_sub_2_cout, B"00000000000000000000000000000000", add_sub_1_cout, B"00000000000000000000000000000000", add_sub_0_cout);
- NumeratorIn[] = NumeratorIn_tmp[];
- NumeratorIn_tmp[] = ( NumeratorIn[1023..0], numerator[]);
- prestg[] = ( add_sub_31_result[], add_sub_30_result[], add_sub_29_result[], add_sub_28_result[], add_sub_27_result[], add_sub_26_result[], add_sub_25_result[], add_sub_24_result[], add_sub_23_result[], add_sub_22_result[], add_sub_21_result[], add_sub_20_result[], add_sub_19_result[], add_sub_18_result[], add_sub_17_result[], add_sub_16_result[], add_sub_15_result[], add_sub_14_result[], add_sub_13_result[], add_sub_12_result[], add_sub_11_result[], add_sub_10_result[], add_sub_9_result[], add_sub_8_result[], add_sub_7_result[], add_sub_6_result[], add_sub_5_result[], add_sub_4_result[], GND, add_sub_3_result[], B"00", add_sub_2_result[], B"000", add_sub_1_result[], B"0000", add_sub_0_result[]);
- quotient[] = quotient_tmp[];
- quotient_tmp[] = ( (! selnose[0..0]), (! selnose[33..33]), (! selnose[66..66]), (! selnose[99..99]), (! selnose[132..132]), (! selnose[165..165]), (! selnose[198..198]), (! selnose[231..231]), (! selnose[264..264]), (! selnose[297..297]), (! selnose[330..330]), (! selnose[363..363]), (! selnose[396..396]), (! selnose[429..429]), (! selnose[462..462]), (! selnose[495..495]), (! selnose[528..528]), (! selnose[561..561]), (! selnose[594..594]), (! selnose[627..627]), (! selnose[660..660]), (! selnose[693..693]), (! selnose[726..726]), (! selnose[759..759]), (! selnose[792..792]), (! selnose[825..825]), (! selnose[858..858]), (! selnose[891..891]), (! selnose[924..924]), (! selnose[957..957]), (! selnose[990..990]), (! selnose[1023..1023]));
- remainder[3..0] = StageIn[163..160];
- sel[] = ( gnd_wire, (sel[131..131] # DenominatorIn[163..163]), (sel[130..130] # DenominatorIn[162..162]), (sel[129..129] # DenominatorIn[161..161]), gnd_wire, (sel[127..127] # DenominatorIn[158..158]), (sel[126..126] # DenominatorIn[157..157]), (sel[125..125] # DenominatorIn[156..156]), gnd_wire, (sel[123..123] # DenominatorIn[153..153]), (sel[122..122] # DenominatorIn[152..152]), (sel[121..121] # DenominatorIn[151..151]), gnd_wire, (sel[119..119] # DenominatorIn[148..148]), (sel[118..118] # DenominatorIn[147..147]), (sel[117..117] # DenominatorIn[146..146]), gnd_wire, (sel[115..115] # DenominatorIn[143..143]), (sel[114..114] # DenominatorIn[142..142]), (sel[113..113] # DenominatorIn[141..141]), gnd_wire, (sel[111..111] # DenominatorIn[138..138]), (sel[110..110] # DenominatorIn[137..137]), (sel[109..109] # DenominatorIn[136..136]), gnd_wire, (sel[107..107] # DenominatorIn[133..133]), (sel[106..106] # DenominatorIn[132..132]), (sel[105..105] # DenominatorIn[131..131]), gnd_wire, (sel[103..103] # DenominatorIn[128..128]), (sel[102..102] # DenominatorIn[127..127]), (sel[101..101] # DenominatorIn[126..126]), gnd_wire, (sel[99..99] # DenominatorIn[123..123]), (sel[98..98] # DenominatorIn[122..122]), (sel[97..97] # DenominatorIn[121..121]), gnd_wire, (sel[95..95] # DenominatorIn[118..118]), (sel[94..94] # DenominatorIn[117..117]), (sel[93..93] # DenominatorIn[116..116]), gnd_wire, (sel[91..91] # DenominatorIn[113..113]), (sel[90..90] # DenominatorIn[112..112]), (sel[89..89] # DenominatorIn[111..111]), gnd_wire, (sel[87..87] # DenominatorIn[108..108]), (sel[86..86] # DenominatorIn[107..107]), (sel[85..85] # DenominatorIn[106..106]), gnd_wire, (sel[83..83] # DenominatorIn[103..103]), (sel[82..82] # DenominatorIn[102..102]), (sel[81..81] # DenominatorIn[101..101]), gnd_wire, (sel[79..79] # DenominatorIn[98..98]), (sel[78..78] # DenominatorIn[97..97]), (sel[77..77] # DenominatorIn[96..96]), gnd_wire, (sel[75..75] # DenominatorIn[93..93]), (sel[74..74] # DenominatorIn[92..92]), (sel[73..73] # DenominatorIn[91..91]), gnd_wire, (sel[71..71] # DenominatorIn[88..88]), (sel[70..70] # DenominatorIn[87..87]), (sel[69..69] # DenominatorIn[86..86]), gnd_wire, (sel[67..67] # DenominatorIn[83..83]), (sel[66..66] # DenominatorIn[82..82]), (sel[65..65] # DenominatorIn[81..81]), gnd_wire, (sel[63..63] # DenominatorIn[78..78]), (sel[62..62] # DenominatorIn[77..77]), (sel[61..61] # DenominatorIn[76..76]), gnd_wire, (sel[59..59] # DenominatorIn[73..73]), (sel[58..58] # DenominatorIn[72..72]), (sel[57..57] # DenominatorIn[71..71]), gnd_wire, (sel[55..55] # DenominatorIn[68..68]), (sel[54..54] # DenominatorIn[67..67]), (sel[53..53] # DenominatorIn[66..66]), gnd_wire, (sel[51..51] # DenominatorIn[63..63]), (sel[50..50] # DenominatorIn[62..62]), (sel[49..49] # DenominatorIn[61..61]), gnd_wire, (sel[47..47] # DenominatorIn[58..58]), (sel[46..46] # DenominatorIn[57..57]), (sel[45..45] # DenominatorIn[56..56]), gnd_wire, (sel[43..43] # DenominatorIn[53..53]), (sel[42..42] # DenominatorIn[52..52]), (sel[41..41] # DenominatorIn[51..51]), gnd_wire, (sel[39..39] # DenominatorIn[48..48]), (sel[38..38] # DenominatorIn[47..47]), (sel[37..37] # DenominatorIn[46..46]), gnd_wire, (sel[35..35] # DenominatorIn[43..43]), (sel[34..34] # DenominatorIn[42..42]), (sel[33..33] # DenominatorIn[41..41]), gnd_wire, (sel[31..31] # DenominatorIn[38..38]), (sel[30..30] # DenominatorIn[37..37]), (sel[29..29] # DenominatorIn[36..36]), gnd_wire, (sel[27..27] # DenominatorIn[33..33]), (sel[26..26] # DenominatorIn[32..32]), (sel[25..25] # DenominatorIn[31..31]), gnd_wire, (sel[23..23] # DenominatorIn[28..28]), (sel[22..22] # DenominatorIn[27..27]), (sel[21..21] # DenominatorIn[26..26]), gnd_wire, (sel[19..19] # DenominatorIn[23..23]), (sel[18..18] # DenominatorIn[22..22]), (sel[17..17] # DenominatorIn[21..21]), gnd_wire, (sel[15..15] # DenominatorIn[18..18]), (sel[14..14] # DenominatorIn[17..17]), (sel[13..13] # DenominatorIn[16..16]), gnd_wire, (sel[11..11] # DenominatorIn[13..13]), (sel[10..10] # DenominatorIn[12..12]), (sel[9..9] # DenominatorIn[11..11]), gnd_wire, (sel[7..7] # DenominatorIn[8..8]), (sel[6..6] # DenominatorIn[7..7]), (sel[5..5] # DenominatorIn[6..6]), gnd_wire, (sel[3..3] # DenominatorIn[3..3]), (sel[2..2] # DenominatorIn[2..2]), (sel[1..1] # DenominatorIn[1..1]));
- selnose[] = ( (! nose[1055..1055]), (! nose[1054..1054]), (! nose[1053..1053]), (! nose[1052..1052]), (! nose[1051..1051]), (! nose[1050..1050]), (! nose[1049..1049]), (! nose[1048..1048]), (! nose[1047..1047]), (! nose[1046..1046]), (! nose[1045..1045]), (! nose[1044..1044]), (! nose[1043..1043]), (! nose[1042..1042]), (! nose[1041..1041]), (! nose[1040..1040]), (! nose[1039..1039]), (! nose[1038..1038]), (! nose[1037..1037]), (! nose[1036..1036]), (! nose[1035..1035]), (! nose[1034..1034]), (! nose[1033..1033]), (! nose[1032..1032]), (! nose[1031..1031]), (! nose[1030..1030]), (! nose[1029..1029]), (! nose[1028..1028]), ((! nose[1027..1027]) # sel[131..131]), ((! nose[1026..1026]) # sel[130..130]), ((! nose[1025..1025]) # sel[129..129]), ((! nose[1024..1024]) # sel[128..128]), (! nose[1023..1023]), (! nose[1022..1022]), (! nose[1021..1021]), (! nose[1020..1020]), (! nose[1019..1019]), (! nose[1018..1018]), (! nose[1017..1017]), (! nose[1016..1016]), (! nose[1015..1015]), (! nose[1014..1014]), (! nose[1013..1013]), (! nose[1012..1012]), (! nose[1011..1011]), (! nose[1010..1010]), (! nose[1009..1009]), (! nose[1008..1008]), (! nose[1007..1007]), (! nose[1006..1006]), (! nose[1005..1005]), (! nose[1004..1004]), (! nose[1003..1003]), (! nose[1002..1002]), (! nose[1001..1001]), (! nose[1000..1000]), (! nose[999..999]), (! nose[998..998]), (! nose[997..997]), (! nose[996..996]), ((! nose[995..995]) # sel[127..127]), ((! nose[994..994]) # sel[126..126]), ((! nose[993..993]) # sel[125..125]), ((! nose[992..992]) # sel[124..124]), (! nose[991..991]), (! nose[990..990]), (! nose[989..989]), (! nose[988..988]), (! nose[987..987]), (! nose[986..986]), (! nose[985..985]), (! nose[984..984]), (! nose[983..983]), (! nose[982..982]), (! nose[981..981]), (! nose[980..980]), (! nose[979..979]), (! nose[978..978]), (! nose[977..977]), (! nose[976..976]), (! nose[975..975]), (! nose[974..974]), (! nose[973..973]), (! nose[972..972]), (! nose[971..971]), (! nose[970..970]), (! nose[969..969]), (! nose[968..968]), (! nose[967..967]), (! nose[966..966]), (! nose[965..965]), (! nose[964..964]), ((! nose[963..963]) # sel[123..123]), ((! nose[962..962]) # sel[122..122]), ((! nose[961..961]) # sel[121..121]), ((! nose[960..960]) # sel[120..120]), (! nose[959..959]), (! nose[958..958]), (! nose[957..957]), (! nose[956..956]), (! nose[955..955]), (! nose[954..954]), (! nose[953..953]), (! nose[952..952]), (! nose[951..951]), (! nose[950..950]), (! nose[949..949]), (! nose[948..948]), (! nose[947..947]), (! nose[946..946]), (! nose[945..945]), (! nose[944..944]), (! nose[943..943]), (! nose[942..942]), (! nose[941..941]), (! nose[940..940]), (! nose[939..939]), (! nose[938..938]), (! nose[937..937]), (! nose[936..936]), (! nose[935..935]), (! nose[934..934]), (! nose[933..933]), (! nose[932..932]), ((! nose[931..931]) # sel[119..119]), ((! nose[930..930]) # sel[118..118]), ((! nose[929..929]) # sel[117..117]), ((! nose[928..928]) # sel[116..116]), (! nose[927..927]), (! nose[926..926]), (! nose[925..925]), (! nose[924..924]), (! nose[923..923]), (! nose[922..922]), (! nose[921..921]), (! nose[920..920]), (! nose[919..919]), (! nose[918..918]), (! nose[917..917]), (! nose[916..916]), (! nose[915..915]), (! nose[914..914]), (! nose[913..913]), (! nose[912..912]), (! nose[911..911]), (! nose[910..910]), (! nose[909..909]), (! nose[908..908]), (! nose[907..907]), (! nose[906..906]), (! nose[905..905]), (! nose[904..904]), (! nose[903..903]), (! nose[902..902]), (! nose[901..901]), (! nose[900..900]), ((! nose[899..899]) # sel[115..115]), ((! nose[898..898]) # sel[114..114]), ((! nose[897..897]) # sel[113..113]), ((! nose[896..896]) # sel[112..112]), (! nose[895..895]), (! nose[894..894]), (! nose[893..893]), (! nose[892..892]), (! nose[891..891]), (! nose[890..890]), (! nose[889..889]), (! nose[888..888]), (! nose[887..887]), (! nose[886..886]), (! nose[885..885]), (! nose[884..884]), (! nose[883..883]), (! nose[882..882]), (! nose[881..881]), (! nose[880..880]), (! nose[879..879]), (! nose[878..878]), (! nose[877..877]), (! nose[876..876]), (! nose[875..875]), (! nose[874..874]), (! nose[873..873]), (! nose[872..872]), (! nose[871..871]), (! nose[870..870]), (! nose[869..869]), (! nose[868..868]), ((! nose[867..867]) # sel[111..111]), ((! nose[866..866]) # sel[110..110]), ((! nose[865..865]) # sel[109..109]), ((! nose[864..864]) # sel[108..108]), (! nose[863..863]), (! nose[862..862]), (! nose[861..861]), (! nose[860..860]), (! nose[859..859]), (! nose[858..858]), (! nose[857..857]), (! nose[856..856]), (! nose[855..855]), (! nose[854..854]), (! nose[853..853]), (! nose[852..852]), (! nose[851..851]), (! nose[850..850]), (! nose[849..849]), (! nose[848..848]), (! nose[847..847]), (! nose[846..846]), (! nose[845..845]), (! nose[844..844]), (! nose[843..843]), (! nose[842..842]), (! nose[841..841]), (! nose[840..840]), (! nose[839..839]), (! nose[838..838]), (! nose[837..837]), (! nose[836..836]), ((! nose[835..835]) # sel[107..107]), ((! nose[834..834]) # sel[106..106]), ((! nose[833..833]) # sel[105..105]), ((! nose[832..832]) # sel[104..104]), (! nose[831..831]), (! nose[830..830]), (! nose[829..829]), (! nose[828..828]), (! nose[827..827]), (! nose[826..826]), (! nose[825..825]), (! nose[824..824]), (! nose[823..823]), (! nose[822..822]), (! nose[821..821]), (! nose[820..820]), (! nose[819..819]), (! nose[818..818]), (! nose[817..817]), (! nose[816..816]), (! nose[815..815]), (! nose[814..814]), (! nose[813..813]), (! nose[812..812]), (! nose[811..811]), (! nose[810..810]), (! nose[809..809]), (! nose[808..808]), (! nose[807..807]), (! nose[806..806]), (! nose[805..805]), (! nose[804..804]), ((! nose[803..803]) # sel[103..103]), ((! nose[802..802]) # sel[102..102]), ((! nose[801..801]) # sel[101..101]), ((! nose[800..800]) # sel[100..100]), (! nose[799..799]), (! nose[798..798]), (! nose[797..797]), (! nose[796..796]), (! nose[795..795]), (! nose[794..794]), (! nose[793..793]), (! nose[792..792]), (! nose[791..791]), (! nose[790..790]), (! nose[789..789]), (! nose[788..788]), (! nose[787..787]), (! nose[786..786]), (! nose[785..785]), (! nose[784..784]), (! nose[783..783]), (! nose[782..782]), (! nose[781..781]), (! nose[780..780]), (! nose[779..779]), (! nose[778..778]), (! nose[777..777]), (! nose[776..776]), (! nose[775..775]), (! nose[774..774]), (! nose[773..773]), (! nose[772..772]), ((! nose[771..771]) # sel[99..99]), ((! nose[770..770]) # sel[98..98]), ((! nose[769..769]) # sel[97..97]), ((! nose[768..768]) # sel[96..96]), (! nose[767..767]), (! nose[766..766]), (! nose[765..765]), (! nose[764..764]), (! nose[763..763]), (! nose[762..762]), (! nose[761..761]), (! nose[760..760]), (! nose[759..759]), (! nose[758..758]), (! nose[757..757]), (! nose[756..756]), (! nose[755..755]), (! nose[754..754]), (! nose[753..753]), (! nose[752..752]), (! nose[751..751]), (! nose[750..750]), (! nose[749..749]), (! nose[748..748]), (! nose[747..747]), (! nose[746..746]), (! nose[745..745]), (! nose[744..744]), (! nose[743..743]), (! nose[742..742]), (! nose[741..741]), (! nose[740..740]), ((! nose[739..739]) # sel[95..95]), ((! nose[738..738]) # sel[94..94]), ((! nose[737..737]) # sel[93..93]), ((! nose[736..736]) # sel[92..92]), (! nose[735..735]), (! nose[734..734]), (! nose[733..733]), (! nose[732..732]), (! nose[731..731]), (! nose[730..730]), (! nose[729..729]), (! nose[728..728]), (! nose[727..727]), (! nose[726..726]), (! nose[725..725]), (! nose[724..724]), (! nose[723..723]), (! nose[722..722]), (! nose[721..721]), (! nose[720..720]), (! nose[719..719]), (! nose[718..718]), (! nose[717..717]), (! nose[716..716]), (! nose[715..715]), (! nose[714..714]), (! nose[713..713]), (! nose[712..712]), (! nose[711..711]), (! nose[710..710]), (! nose[709..709]), (! nose[708..708]), ((! nose[707..707]) # sel[91..91]), ((! nose[706..706]) # sel[90..90]), ((! nose[705..705]) # sel[89..89]), ((! nose[704..704]) # sel[88..88]), (! nose[703..703]), (! nose[702..702]), (! nose[701..701]), (! nose[700..700]), (! nose[699..699]), (! nose[698..698]), (! nose[697..697]), (! nose[696..696]), (! nose[695..695]), (! nose[694..694]), (! nose[693..693]), (! nose[692..692]), (! nose[691..691]), (! nose[690..690]), (! nose[689..689]), (! nose[688..688]), (! nose[687..687]), (! nose[686..686]), (! nose[685..685]), (! nose[684..684]), (! nose[683..683]), (! nose[682..682]), (! nose[681..681]), (! nose[680..680]), (! nose[679..679]), (! nose[678..678]), (! nose[677..677]), (! nose[676..676]), ((! nose[675..675]) # sel[87..87]), ((! nose[674..674]) # sel[86..86]), ((! nose[673..673]) # sel[85..85]), ((! nose[672..672]) # sel[84..84]), (! nose[671..671]), (! nose[670..670]), (! nose[669..669]), (! nose[668..668]), (! nose[667..667]), (! nose[666..666]), (! nose[665..665]), (! nose[664..664]), (! nose[663..663]), (! nose[662..662]), (! nose[661..661]), (! nose[660..660]), (! nose[659..659]), (! nose[658..658]), (! nose[657..657]), (! nose[656..656]), (! nose[655..655]), (! nose[654..654]), (! nose[653..653]), (! nose[652..652]), (! nose[651..651]), (! nose[650..650]), (! nose[649..649]), (! nose[648..648]), (! nose[647..647]), (! nose[646..646]), (! nose[645..645]), (! nose[644..644]), ((! nose[643..643]) # sel[83..83]), ((! nose[642..642]) # sel[82..82]), ((! nose[641..641]) # sel[81..81]), ((! nose[640..640]) # sel[80..80]), (! nose[639..639]), (! nose[638..638]), (! nose[637..637]), (! nose[636..636]), (! nose[635..635]), (! nose[634..634]), (! nose[633..633]), (! nose[632..632]), (! nose[631..631]), (! nose[630..630]), (! nose[629..629]), (! nose[628..628]), (! nose[627..627]), (! nose[626..626]), (! nose[625..625]), (! nose[624..624]), (! nose[623..623]), (! nose[622..622]), (! nose[621..621]), (! nose[620..620]), (! nose[619..619]), (! nose[618..618]), (! nose[617..617]), (! nose[616..616]), (! nose[615..615]), (! nose[614..614]), (! nose[613..613]), (! nose[612..612]), ((! nose[611..611]) # sel[79..79]), ((! nose[610..610]) # sel[78..78]), ((! nose[609..609]) # sel[77..77]), ((! nose[608..608]) # sel[76..76]), (! nose[607..607]), (! nose[606..606]), (! nose[605..605]), (! nose[604..604]), (! nose[603..603]), (! nose[602..602]), (! nose[601..601]), (! nose[600..600]), (! nose[599..599]), (! nose[598..598]), (! nose[597..597]), (! nose[596..596]), (! nose[595..595]), (! nose[594..594]), (! nose[593..593]), (! nose[592..592]), (! nose[591..591]), (! nose[590..590]), (! nose[589..589]), (! nose[588..588]), (! nose[587..587]), (! nose[586..586]), (! nose[585..585]), (! nose[584..584]), (! nose[583..583]), (! nose[582..582]), (! nose[581..581]), (! nose[580..580]), ((! nose[579..579]) # sel[75..75]), ((! nose[578..578]) # sel[74..74]), ((! nose[577..577]) # sel[73..73]), ((! nose[576..576]) # sel[72..72]), (! nose[575..575]), (! nose[574..574]), (! nose[573..573]), (! nose[572..572]), (! nose[571..571]), (! nose[570..570]), (! nose[569..569]), (! nose[568..568]), (! nose[567..567]), (! nose[566..566]), (! nose[565..565]), (! nose[564..564]), (! nose[563..563]), (! nose[562..562]), (! nose[561..561]), (! nose[560..560]), (! nose[559..559]), (! nose[558..558]), (! nose[557..557]), (! nose[556..556]), (! nose[555..555]), (! nose[554..554]), (! nose[553..553]), (! nose[552..552]), (! nose[551..551]), (! nose[550..550]), (! nose[549..549]), (! nose[548..548]), ((! nose[547..547]) # sel[71..71]), ((! nose[546..546]) # sel[70..70]), ((! nose[545..545]) # sel[69..69]), ((! nose[544..544]) # sel[68..68]), (! nose[543..543]), (! nose[542..542]), (! nose[541..541]), (! nose[540..540]), (! nose[539..539]), (! nose[538..538]), (! nose[537..537]), (! nose[536..536]), (! nose[535..535]), (! nose[534..534]), (! nose[533..533]), (! nose[532..532]), (! nose[531..531]), (! nose[530..530]), (! nose[529..529]), (! nose[528..528]), (! nose[527..527]), (! nose[526..526]), (! nose[525..525]), (! nose[524..524]), (! nose[523..523]), (! nose[522..522]), (! nose[521..521]), (! nose[520..520]), (! nose[519..519]), (! nose[518..518]), (! nose[517..517]), (! nose[516..516]), ((! nose[515..515]) # sel[67..67]), ((! nose[514..514]) # sel[66..66]), ((! nose[513..513]) # sel[65..65]), ((! nose[512..512]) # sel[64..64]), (! nose[511..511]), (! nose[510..510]), (! nose[509..509]), (! nose[508..508]), (! nose[507..507]), (! nose[506..506]), (! nose[505..505]), (! nose[504..504]), (! nose[503..503]), (! nose[502..502]), (! nose[501..501]), (! nose[500..500]), (! nose[499..499]), (! nose[498..498]), (! nose[497..497]), (! nose[496..496]), (! nose[495..495]), (! nose[494..494]), (! nose[493..493]), (! nose[492..492]), (! nose[491..491]), (! nose[490..490]), (! nose[489..489]), (! nose[488..488]), (! nose[487..487]), (! nose[486..486]), (! nose[485..485]), (! nose[484..484]), ((! nose[483..483]) # sel[63..63]), ((! nose[482..482]) # sel[62..62]), ((! nose[481..481]) # sel[61..61]), ((! nose[480..480]) # sel[60..60]), (! nose[479..479]), (! nose[478..478]), (! nose[477..477]), (! nose[476..476]), (! nose[475..475]), (! nose[474..474]), (! nose[473..473]), (! nose[472..472]), (! nose[471..471]), (! nose[470..470]), (! nose[469..469]), (! nose[468..468]), (! nose[467..467]), (! nose[466..466]), (! nose[465..465]), (! nose[464..464]), (! nose[463..463]), (! nose[462..462]), (! nose[461..461]), (! nose[460..460]), (! nose[459..459]), (! nose[458..458]), (! nose[457..457]), (! nose[456..456]), (! nose[455..455]), (! nose[454..454]), (! nose[453..453]), (! nose[452..452]), ((! nose[451..451]) # sel[59..59]), ((! nose[450..450]) # sel[58..58]), ((! nose[449..449]) # sel[57..57]), ((! nose[448..448]) # sel[56..56]), (! nose[447..447]), (! nose[446..446]), (! nose[445..445]), (! nose[444..444]), (! nose[443..443]), (! nose[442..442]), (! nose[441..441]), (! nose[440..440]), (! nose[439..439]), (! nose[438..438]), (! nose[437..437]), (! nose[436..436]), (! nose[435..435]), (! nose[434..434]), (! nose[433..433]), (! nose[432..432]), (! nose[431..431]), (! nose[430..430]), (! nose[429..429]), (! nose[428..428]), (! nose[427..427]), (! nose[426..426]), (! nose[425..425]), (! nose[424..424]), (! nose[423..423]), (! nose[422..422]), (! nose[421..421]), (! nose[420..420]), ((! nose[419..419]) # sel[55..55]), ((! nose[418..418]) # sel[54..54]), ((! nose[417..417]) # sel[53..53]), ((! nose[416..416]) # sel[52..52]), (! nose[415..415]), (! nose[414..414]), (! nose[413..413]), (! nose[412..412]), (! nose[411..411]), (! nose[410..410]), (! nose[409..409]), (! nose[408..408]), (! nose[407..407]), (! nose[406..406]), (! nose[405..405]), (! nose[404..404]), (! nose[403..403]), (! nose[402..402]), (! nose[401..401]), (! nose[400..400]), (! nose[399..399]), (! nose[398..398]), (! nose[397..397]), (! nose[396..396]), (! nose[395..395]), (! nose[394..394]), (! nose[393..393]), (! nose[392..392]), (! nose[391..391]), (! nose[390..390]), (! nose[389..389]), (! nose[388..388]), ((! nose[387..387]) # sel[51..51]), ((! nose[386..386]) # sel[50..50]), ((! nose[385..385]) # sel[49..49]), ((! nose[384..384]) # sel[48..48]), (! nose[383..383]), (! nose[382..382]), (! nose[381..381]), (! nose[380..380]), (! nose[379..379]), (! nose[378..378]), (! nose[377..377]), (! nose[376..376]), (! nose[375..375]), (! nose[374..374]), (! nose[373..373]), (! nose[372..372]), (! nose[371..371]), (! nose[370..370]), (! nose[369..369]), (! nose[368..368]), (! nose[367..367]), (! nose[366..366]), (! nose[365..365]), (! nose[364..364]), (! nose[363..363]), (! nose[362..362]), (! nose[361..361]), (! nose[360..360]), (! nose[359..359]), (! nose[358..358]), (! nose[357..357]), (! nose[356..356]), ((! nose[355..355]) # sel[47..47]), ((! nose[354..354]) # sel[46..46]), ((! nose[353..353]) # sel[45..45]), ((! nose[352..352]) # sel[44..44]), (! nose[351..351]), (! nose[350..350]), (! nose[349..349]), (! nose[348..348]), (! nose[347..347]), (! nose[346..346]), (! nose[345..345]), (! nose[344..344]), (! nose[343..343]), (! nose[342..342]), (! nose[341..341]), (! nose[340..340]), (! nose[339..339]), (! nose[338..338]), (! nose[337..337]), (! nose[336..336]), (! nose[335..335]), (! nose[334..334]), (! nose[333..333]), (! nose[332..332]), (! nose[331..331]), (! nose[330..330]), (! nose[329..329]), (! nose[328..328]), (! nose[327..327]), (! nose[326..326]), (! nose[325..325]), (! nose[324..324]), ((! nose[323..323]) # sel[43..43]), ((! nose[322..322]) # sel[42..42]), ((! nose[321..321]) # sel[41..41]), ((! nose[320..320]) # sel[40..40]), (! nose[319..319]), (! nose[318..318]), (! nose[317..317]), (! nose[316..316]), (! nose[315..315]), (! nose[314..314]), (! nose[313..313]), (! nose[312..312]), (! nose[311..311]), (! nose[310..310]), (! nose[309..309]), (! nose[308..308]), (! nose[307..307]), (! nose[306..306]), (! nose[305..305]), (! nose[304..304]), (! nose[303..303]), (! nose[302..302]), (! nose[301..301]), (! nose[300..300]), (! nose[299..299]), (! nose[298..298]), (! nose[297..297]), (! nose[296..296]), (! nose[295..295]), (! nose[294..294]), (! nose[293..293]), (! nose[292..292]), ((! nose[291..291]) # sel[39..39]), ((! nose[290..290]) # sel[38..38]), ((! nose[289..289]) # sel[37..37]), ((! nose[288..288]) # sel[36..36]), (! nose[287..287]), (! nose[286..286]), (! nose[285..285]), (! nose[284..284]), (! nose[283..283]), (! nose[282..282]), (! nose[281..281]), (! nose[280..280]), (! nose[279..279]), (! nose[278..278]), (! nose[277..277]), (! nose[276..276]), (! nose[275..275]), (! nose[274..274]), (! nose[273..273]), (! nose[272..272]), (! nose[271..271]), (! nose[270..270]), (! nose[269..269]), (! nose[268..268]), (! nose[267..267]), (! nose[266..266]), (! nose[265..265]), (! nose[264..264]), (! nose[263..263]), (! nose[262..262]), (! nose[261..261]), (! nose[260..260]), ((! nose[259..259]) # sel[35..35]), ((! nose[258..258]) # sel[34..34]), ((! nose[257..257]) # sel[33..33]), ((! nose[256..256]) # sel[32..32]), (! nose[255..255]), (! nose[254..254]), (! nose[253..253]), (! nose[252..252]), (! nose[251..251]), (! nose[250..250]), (! nose[249..249]), (! nose[248..248]), (! nose[247..247]), (! nose[246..246]), (! nose[245..245]), (! nose[244..244]), (! nose[243..243]), (! nose[242..242]), (! nose[241..241]), (! nose[240..240]), (! nose[239..239]), (! nose[238..238]), (! nose[237..237]), (! nose[236..236]), (! nose[235..235]), (! nose[234..234]), (! nose[233..233]), (! nose[232..232]), (! nose[231..231]), (! nose[230..230]), (! nose[229..229]), (! nose[228..228]), ((! nose[227..227]) # sel[31..31]), ((! nose[226..226]) # sel[30..30]), ((! nose[225..225]) # sel[29..29]), ((! nose[224..224]) # sel[28..28]), (! nose[223..223]), (! nose[222..222]), (! nose[221..221]), (! nose[220..220]), (! nose[219..219]), (! nose[218..218]), (! nose[217..217]), (! nose[216..216]), (! nose[215..215]), (! nose[214..214]), (! nose[213..213]), (! nose[212..212]), (! nose[211..211]), (! nose[210..210]), (! nose[209..209]), (! nose[208..208]), (! nose[207..207]), (! nose[206..206]), (! nose[205..205]), (! nose[204..204]), (! nose[203..203]), (! nose[202..202]), (! nose[201..201]), (! nose[200..200]), (! nose[199..199]), (! nose[198..198]), (! nose[197..197]), (! nose[196..196]), ((! nose[195..195]) # sel[27..27]), ((! nose[194..194]) # sel[26..26]), ((! nose[193..193]) # sel[25..25]), ((! nose[192..192]) # sel[24..24]), (! nose[191..191]), (! nose[190..190]), (! nose[189..189]), (! nose[188..188]), (! nose[187..187]), (! nose[186..186]), (! nose[185..185]), (! nose[184..184]), (! nose[183..183]), (! nose[182..182]), (! nose[181..181]), (! nose[180..180]), (! nose[179..179]), (! nose[178..178]), (! nose[177..177]), (! nose[176..176]), (! nose[175..175]), (! nose[174..174]), (! nose[173..173]), (! nose[172..172]), (! nose[171..171]), (! nose[170..170]), (! nose[169..169]), (! nose[168..168]), (! nose[167..167]), (! nose[166..166]), (! nose[165..165]), (! nose[164..164]), ((! nose[163..163]) # sel[23..23]), ((! nose[162..162]) # sel[22..22]), ((! nose[161..161]) # sel[21..21]), ((! nose[160..160]) # sel[20..20]), (! nose[159..159]), (! nose[158..158]), (! nose[157..157]), (! nose[156..156]), (! nose[155..155]), (! nose[154..154]), (! nose[153..153]), (! nose[152..152]), (! nose[151..151]), (! nose[150..150]), (! nose[149..149]), (! nose[148..148]), (! nose[147..147]), (! nose[146..146]), (! nose[145..145]), (! nose[144..144]), (! nose[143..143]), (! nose[142..142]), (! nose[141..141]), (! nose[140..140]), (! nose[139..139]), (! nose[138..138]), (! nose[137..137]), (! nose[136..136]), (! nose[135..135]), (! nose[134..134]), (! nose[133..133]), (! nose[132..132]), ((! nose[131..131]) # sel[19..19]), ((! nose[130..130]) # sel[18..18]), ((! nose[129..129]) # sel[17..17]), ((! nose[128..128]) # sel[16..16]), (! nose[127..127]), (! nose[126..126]), (! nose[125..125]), (! nose[124..124]), (! nose[123..123]), (! nose[122..122]), (! nose[121..121]), (! nose[120..120]), (! nose[119..119]), (! nose[118..118]), (! nose[117..117]), (! nose[116..116]), (! nose[115..115]), (! nose[114..114]), (! nose[113..113]), (! nose[112..112]), (! nose[111..111]), (! nose[110..110]), (! nose[109..109]), (! nose[108..108]), (! nose[107..107]), (! nose[106..106]), (! nose[105..105]), (! nose[104..104]), (! nose[103..103]), (! nose[102..102]), (! nose[101..101]), (! nose[100..100]), ((! nose[99..99]) # sel[15..15]), ((! nose[98..98]) # sel[14..14]), ((! nose[97..97]) # sel[13..13]), ((! nose[96..96]) # sel[12..12]), (! nose[95..95]), (! nose[94..94]), (! nose[93..93]), (! nose[92..92]), (! nose[91..91]), (! nose[90..90]), (! nose[89..89]), (! nose[88..88]), (! nose[87..87]), (! nose[86..86]), (! nose[85..85]), (! nose[84..84]), (! nose[83..83]), (! nose[82..82]), (! nose[81..81]), (! nose[80..80]), (! nose[79..79]), (! nose[78..78]), (! nose[77..77]), (! nose[76..76]), (! nose[75..75]), (! nose[74..74]), (! nose[73..73]), (! nose[72..72]), (! nose[71..71]), (! nose[70..70]), (! nose[69..69]), (! nose[68..68]), ((! nose[67..67]) # sel[11..11]), ((! nose[66..66]) # sel[10..10]), ((! nose[65..65]) # sel[9..9]), ((! nose[64..64]) # sel[8..8]), (! nose[63..63]), (! nose[62..62]), (! nose[61..61]), (! nose[60..60]), (! nose[59..59]), (! nose[58..58]), (! nose[57..57]), (! nose[56..56]), (! nose[55..55]), (! nose[54..54]), (! nose[53..53]), (! nose[52..52]), (! nose[51..51]), (! nose[50..50]), (! nose[49..49]), (! nose[48..48]), (! nose[47..47]), (! nose[46..46]), (! nose[45..45]), (! nose[44..44]), (! nose[43..43]), (! nose[42..42]), (! nose[41..41]), (! nose[40..40]), (! nose[39..39]), (! nose[38..38]), (! nose[37..37]), (! nose[36..36]), ((! nose[35..35]) # sel[7..7]), ((! nose[34..34]) # sel[6..6]), ((! nose[33..33]) # sel[5..5]), ((! nose[32..32]) # sel[4..4]), (! nose[31..31]), (! nose[30..30]), (! nose[29..29]), (! nose[28..28]), (! nose[27..27]), (! nose[26..26]), (! nose[25..25]), (! nose[24..24]), (! nose[23..23]), (! nose[22..22]), (! nose[21..21]), (! nose[20..20]), (! nose[19..19]), (! nose[18..18]), (! nose[17..17]), (! nose[16..16]), (! nose[15..15]), (! nose[14..14]), (! nose[13..13]), (! nose[12..12]), (! nose[11..11]), (! nose[10..10]), (! nose[9..9]), (! nose[8..8]), (! nose[7..7]), (! nose[6..6]), (! nose[5..5]), (! nose[4..4]), ((! nose[3..3]) # sel[3..3]), ((! nose[2..2]) # sel[2..2]), ((! nose[1..1]) # sel[1..1]), ((! nose[0..0]) # sel[0..0]));
- StageIn[] = StageIn_tmp[];
- StageIn_tmp[] = ( StageOut[159..0], B"00000");
- StageOut[] = ( ((( StageIn[158..155], NumeratorIn[992..992]) & selnose[1023..1023]) # (prestg[159..155] & (! selnose[1023..1023]))), ((( StageIn[153..150], NumeratorIn[961..961]) & selnose[990..990]) # (prestg[154..150] & (! selnose[990..990]))), ((( StageIn[148..145], NumeratorIn[930..930]) & selnose[957..957]) # (prestg[149..145] & (! selnose[957..957]))), ((( StageIn[143..140], NumeratorIn[899..899]) & selnose[924..924]) # (prestg[144..140] & (! selnose[924..924]))), ((( StageIn[138..135], NumeratorIn[868..868]) & selnose[891..891]) # (prestg[139..135] & (! selnose[891..891]))), ((( StageIn[133..130], NumeratorIn[837..837]) & selnose[858..858]) # (prestg[134..130] & (! selnose[858..858]))), ((( StageIn[128..125], NumeratorIn[806..806]) & selnose[825..825]) # (prestg[129..125] & (! selnose[825..825]))), ((( StageIn[123..120], NumeratorIn[775..775]) & selnose[792..792]) # (prestg[124..120] & (! selnose[792..792]))), ((( StageIn[118..115], NumeratorIn[744..744]) & selnose[759..759]) # (prestg[119..115] & (! selnose[759..759]))), ((( StageIn[113..110], NumeratorIn[713..713]) & selnose[726..726]) # (prestg[114..110] & (! selnose[726..726]))), ((( StageIn[108..105], NumeratorIn[682..682]) & selnose[693..693]) # (prestg[109..105] & (! selnose[693..693]))), ((( StageIn[103..100], NumeratorIn[651..651]) & selnose[660..660]) # (prestg[104..100] & (! selnose[660..660]))), ((( StageIn[98..95], NumeratorIn[620..620]) & selnose[627..627]) # (prestg[99..95] & (! selnose[627..627]))), ((( StageIn[93..90], NumeratorIn[589..589]) & selnose[594..594]) # (prestg[94..90] & (! selnose[594..594]))), ((( StageIn[88..85], NumeratorIn[558..558]) & selnose[561..561]) # (prestg[89..85] & (! selnose[561..561]))), ((( StageIn[83..80], NumeratorIn[527..527]) & selnose[528..528]) # (prestg[84..80] & (! selnose[528..528]))), ((( StageIn[78..75], NumeratorIn[496..496]) & selnose[495..495]) # (prestg[79..75] & (! selnose[495..495]))), ((( StageIn[73..70], NumeratorIn[465..465]) & selnose[462..462]) # (prestg[74..70] & (! selnose[462..462]))), ((( StageIn[68..65], NumeratorIn[434..434]) & selnose[429..429]) # (prestg[69..65] & (! selnose[429..429]))), ((( StageIn[63..60], NumeratorIn[403..403]) & selnose[396..396]) # (prestg[64..60] & (! selnose[396..396]))), ((( StageIn[58..55], NumeratorIn[372..372]) & selnose[363..363]) # (prestg[59..55] & (! selnose[363..363]))), ((( StageIn[53..50], NumeratorIn[341..341]) & selnose[330..330]) # (prestg[54..50] & (! selnose[330..330]))), ((( StageIn[48..45], NumeratorIn[310..310]) & selnose[297..297]) # (prestg[49..45] & (! selnose[297..297]))), ((( StageIn[43..40], NumeratorIn[279..279]) & selnose[264..264]) # (prestg[44..40] & (! selnose[264..264]))), ((( StageIn[38..35], NumeratorIn[248..248]) & selnose[231..231]) # (prestg[39..35] & (! selnose[231..231]))), ((( StageIn[33..30], NumeratorIn[217..217]) & selnose[198..198]) # (prestg[34..30] & (! selnose[198..198]))), ((( StageIn[28..25], NumeratorIn[186..186]) & selnose[165..165]) # (prestg[29..25] & (! selnose[165..165]))), ((( StageIn[23..20], NumeratorIn[155..155]) & selnose[132..132]) # (prestg[24..20] & (! selnose[132..132]))), ((( StageIn[18..15], NumeratorIn[124..124]) & selnose[99..99]) # (prestg[19..15] & (! selnose[99..99]))), ((( StageIn[13..10], NumeratorIn[93..93]) & selnose[66..66]) # (prestg[14..10] & (! selnose[66..66]))), ((( StageIn[8..5], NumeratorIn[62..62]) & selnose[33..33]) # (prestg[9..5] & (! selnose[33..33]))), ((( StageIn[3..0], NumeratorIn[31..31]) & selnose[0..0]) # (prestg[4..0] & (! selnose[0..0]))));
-END;
---VALID FILE
diff --git a/db/alt_u_div_qve.tdf b/db/alt_u_div_qve.tdf
deleted file mode 100644
index d4d660c..0000000
--- a/db/alt_u_div_qve.tdf
+++ /dev/null
@@ -1,382 +0,0 @@
---alt_u_div DEVICE_FAMILY="Cyclone V" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=6 WIDTH_N=32 WIDTH_Q=32 WIDTH_R=6 denominator numerator quotient remainder
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-
---synthesis_resources = lut 235
-SUBDESIGN alt_u_div_qve
-(
- denominator[5..0] : input;
- numerator[31..0] : input;
- quotient[31..0] : output;
- remainder[5..0] : output;
-)
-VARIABLE
- add_sub_0_result_int[1..0] : WIRE;
- add_sub_0_cout : WIRE;
- add_sub_0_dataa[0..0] : WIRE;
- add_sub_0_datab[0..0] : WIRE;
- add_sub_0_result[0..0] : WIRE;
- add_sub_1_result_int[2..0] : WIRE;
- add_sub_1_cout : WIRE;
- add_sub_1_dataa[1..0] : WIRE;
- add_sub_1_datab[1..0] : WIRE;
- add_sub_1_result[1..0] : WIRE;
- add_sub_10_result_int[7..0] : WIRE;
- add_sub_10_cout : WIRE;
- add_sub_10_dataa[6..0] : WIRE;
- add_sub_10_datab[6..0] : WIRE;
- add_sub_10_result[6..0] : WIRE;
- add_sub_11_result_int[7..0] : WIRE;
- add_sub_11_cout : WIRE;
- add_sub_11_dataa[6..0] : WIRE;
- add_sub_11_datab[6..0] : WIRE;
- add_sub_11_result[6..0] : WIRE;
- add_sub_12_result_int[7..0] : WIRE;
- add_sub_12_cout : WIRE;
- add_sub_12_dataa[6..0] : WIRE;
- add_sub_12_datab[6..0] : WIRE;
- add_sub_12_result[6..0] : WIRE;
- add_sub_13_result_int[7..0] : WIRE;
- add_sub_13_cout : WIRE;
- add_sub_13_dataa[6..0] : WIRE;
- add_sub_13_datab[6..0] : WIRE;
- add_sub_13_result[6..0] : WIRE;
- add_sub_14_result_int[7..0] : WIRE;
- add_sub_14_cout : WIRE;
- add_sub_14_dataa[6..0] : WIRE;
- add_sub_14_datab[6..0] : WIRE;
- add_sub_14_result[6..0] : WIRE;
- add_sub_15_result_int[7..0] : WIRE;
- add_sub_15_cout : WIRE;
- add_sub_15_dataa[6..0] : WIRE;
- add_sub_15_datab[6..0] : WIRE;
- add_sub_15_result[6..0] : WIRE;
- add_sub_16_result_int[7..0] : WIRE;
- add_sub_16_cout : WIRE;
- add_sub_16_dataa[6..0] : WIRE;
- add_sub_16_datab[6..0] : WIRE;
- add_sub_16_result[6..0] : WIRE;
- add_sub_17_result_int[7..0] : WIRE;
- add_sub_17_cout : WIRE;
- add_sub_17_dataa[6..0] : WIRE;
- add_sub_17_datab[6..0] : WIRE;
- add_sub_17_result[6..0] : WIRE;
- add_sub_18_result_int[7..0] : WIRE;
- add_sub_18_cout : WIRE;
- add_sub_18_dataa[6..0] : WIRE;
- add_sub_18_datab[6..0] : WIRE;
- add_sub_18_result[6..0] : WIRE;
- add_sub_19_result_int[7..0] : WIRE;
- add_sub_19_cout : WIRE;
- add_sub_19_dataa[6..0] : WIRE;
- add_sub_19_datab[6..0] : WIRE;
- add_sub_19_result[6..0] : WIRE;
- add_sub_2_result_int[3..0] : WIRE;
- add_sub_2_cout : WIRE;
- add_sub_2_dataa[2..0] : WIRE;
- add_sub_2_datab[2..0] : WIRE;
- add_sub_2_result[2..0] : WIRE;
- add_sub_20_result_int[7..0] : WIRE;
- add_sub_20_cout : WIRE;
- add_sub_20_dataa[6..0] : WIRE;
- add_sub_20_datab[6..0] : WIRE;
- add_sub_20_result[6..0] : WIRE;
- add_sub_21_result_int[7..0] : WIRE;
- add_sub_21_cout : WIRE;
- add_sub_21_dataa[6..0] : WIRE;
- add_sub_21_datab[6..0] : WIRE;
- add_sub_21_result[6..0] : WIRE;
- add_sub_22_result_int[7..0] : WIRE;
- add_sub_22_cout : WIRE;
- add_sub_22_dataa[6..0] : WIRE;
- add_sub_22_datab[6..0] : WIRE;
- add_sub_22_result[6..0] : WIRE;
- add_sub_23_result_int[7..0] : WIRE;
- add_sub_23_cout : WIRE;
- add_sub_23_dataa[6..0] : WIRE;
- add_sub_23_datab[6..0] : WIRE;
- add_sub_23_result[6..0] : WIRE;
- add_sub_24_result_int[7..0] : WIRE;
- add_sub_24_cout : WIRE;
- add_sub_24_dataa[6..0] : WIRE;
- add_sub_24_datab[6..0] : WIRE;
- add_sub_24_result[6..0] : WIRE;
- add_sub_25_result_int[7..0] : WIRE;
- add_sub_25_cout : WIRE;
- add_sub_25_dataa[6..0] : WIRE;
- add_sub_25_datab[6..0] : WIRE;
- add_sub_25_result[6..0] : WIRE;
- add_sub_26_result_int[7..0] : WIRE;
- add_sub_26_cout : WIRE;
- add_sub_26_dataa[6..0] : WIRE;
- add_sub_26_datab[6..0] : WIRE;
- add_sub_26_result[6..0] : WIRE;
- add_sub_27_result_int[7..0] : WIRE;
- add_sub_27_cout : WIRE;
- add_sub_27_dataa[6..0] : WIRE;
- add_sub_27_datab[6..0] : WIRE;
- add_sub_27_result[6..0] : WIRE;
- add_sub_28_result_int[7..0] : WIRE;
- add_sub_28_cout : WIRE;
- add_sub_28_dataa[6..0] : WIRE;
- add_sub_28_datab[6..0] : WIRE;
- add_sub_28_result[6..0] : WIRE;
- add_sub_29_result_int[7..0] : WIRE;
- add_sub_29_cout : WIRE;
- add_sub_29_dataa[6..0] : WIRE;
- add_sub_29_datab[6..0] : WIRE;
- add_sub_29_result[6..0] : WIRE;
- add_sub_3_result_int[4..0] : WIRE;
- add_sub_3_cout : WIRE;
- add_sub_3_dataa[3..0] : WIRE;
- add_sub_3_datab[3..0] : WIRE;
- add_sub_3_result[3..0] : WIRE;
- add_sub_30_result_int[7..0] : WIRE;
- add_sub_30_cout : WIRE;
- add_sub_30_dataa[6..0] : WIRE;
- add_sub_30_datab[6..0] : WIRE;
- add_sub_30_result[6..0] : WIRE;
- add_sub_31_result_int[7..0] : WIRE;
- add_sub_31_cout : WIRE;
- add_sub_31_dataa[6..0] : WIRE;
- add_sub_31_datab[6..0] : WIRE;
- add_sub_31_result[6..0] : WIRE;
- add_sub_4_result_int[5..0] : WIRE;
- add_sub_4_cout : WIRE;
- add_sub_4_dataa[4..0] : WIRE;
- add_sub_4_datab[4..0] : WIRE;
- add_sub_4_result[4..0] : WIRE;
- add_sub_5_result_int[6..0] : WIRE;
- add_sub_5_cout : WIRE;
- add_sub_5_dataa[5..0] : WIRE;
- add_sub_5_datab[5..0] : WIRE;
- add_sub_5_result[5..0] : WIRE;
- add_sub_6_result_int[7..0] : WIRE;
- add_sub_6_cout : WIRE;
- add_sub_6_dataa[6..0] : WIRE;
- add_sub_6_datab[6..0] : WIRE;
- add_sub_6_result[6..0] : WIRE;
- add_sub_7_result_int[7..0] : WIRE;
- add_sub_7_cout : WIRE;
- add_sub_7_dataa[6..0] : WIRE;
- add_sub_7_datab[6..0] : WIRE;
- add_sub_7_result[6..0] : WIRE;
- add_sub_8_result_int[7..0] : WIRE;
- add_sub_8_cout : WIRE;
- add_sub_8_dataa[6..0] : WIRE;
- add_sub_8_datab[6..0] : WIRE;
- add_sub_8_result[6..0] : WIRE;
- add_sub_9_result_int[7..0] : WIRE;
- add_sub_9_cout : WIRE;
- add_sub_9_dataa[6..0] : WIRE;
- add_sub_9_datab[6..0] : WIRE;
- add_sub_9_result[6..0] : WIRE;
- DenominatorIn[230..0] : WIRE;
- DenominatorIn_tmp[230..0] : WIRE;
- gnd_wire : WIRE;
- nose[1055..0] : WIRE;
- NumeratorIn[1055..0] : WIRE;
- NumeratorIn_tmp[1055..0] : WIRE;
- prestg[223..0] : WIRE;
- quotient_tmp[31..0] : WIRE;
- sel[197..0] : WIRE;
- selnose[1055..0] : WIRE;
- StageIn[230..0] : WIRE;
- StageIn_tmp[230..0] : WIRE;
- StageOut[223..0] : WIRE;
-
-BEGIN
- add_sub_0_result_int[] = (0, add_sub_0_dataa[]) - (0, add_sub_0_datab[]);
- add_sub_0_result[] = add_sub_0_result_int[0..0];
- add_sub_0_cout = !add_sub_0_result_int[1];
- add_sub_0_dataa[] = NumeratorIn[31..31];
- add_sub_0_datab[] = DenominatorIn[0..0];
- add_sub_1_result_int[] = (0, add_sub_1_dataa[]) - (0, add_sub_1_datab[]);
- add_sub_1_result[] = add_sub_1_result_int[1..0];
- add_sub_1_cout = !add_sub_1_result_int[2];
- add_sub_1_dataa[] = ( StageIn[7..7], NumeratorIn[62..62]);
- add_sub_1_datab[] = DenominatorIn[8..7];
- add_sub_10_result_int[] = (0, add_sub_10_dataa[]) - (0, add_sub_10_datab[]);
- add_sub_10_result[] = add_sub_10_result_int[6..0];
- add_sub_10_cout = !add_sub_10_result_int[7];
- add_sub_10_dataa[] = ( StageIn[75..70], NumeratorIn[341..341]);
- add_sub_10_datab[] = DenominatorIn[76..70];
- add_sub_11_result_int[] = (0, add_sub_11_dataa[]) - (0, add_sub_11_datab[]);
- add_sub_11_result[] = add_sub_11_result_int[6..0];
- add_sub_11_cout = !add_sub_11_result_int[7];
- add_sub_11_dataa[] = ( StageIn[82..77], NumeratorIn[372..372]);
- add_sub_11_datab[] = DenominatorIn[83..77];
- add_sub_12_result_int[] = (0, add_sub_12_dataa[]) - (0, add_sub_12_datab[]);
- add_sub_12_result[] = add_sub_12_result_int[6..0];
- add_sub_12_cout = !add_sub_12_result_int[7];
- add_sub_12_dataa[] = ( StageIn[89..84], NumeratorIn[403..403]);
- add_sub_12_datab[] = DenominatorIn[90..84];
- add_sub_13_result_int[] = (0, add_sub_13_dataa[]) - (0, add_sub_13_datab[]);
- add_sub_13_result[] = add_sub_13_result_int[6..0];
- add_sub_13_cout = !add_sub_13_result_int[7];
- add_sub_13_dataa[] = ( StageIn[96..91], NumeratorIn[434..434]);
- add_sub_13_datab[] = DenominatorIn[97..91];
- add_sub_14_result_int[] = (0, add_sub_14_dataa[]) - (0, add_sub_14_datab[]);
- add_sub_14_result[] = add_sub_14_result_int[6..0];
- add_sub_14_cout = !add_sub_14_result_int[7];
- add_sub_14_dataa[] = ( StageIn[103..98], NumeratorIn[465..465]);
- add_sub_14_datab[] = DenominatorIn[104..98];
- add_sub_15_result_int[] = (0, add_sub_15_dataa[]) - (0, add_sub_15_datab[]);
- add_sub_15_result[] = add_sub_15_result_int[6..0];
- add_sub_15_cout = !add_sub_15_result_int[7];
- add_sub_15_dataa[] = ( StageIn[110..105], NumeratorIn[496..496]);
- add_sub_15_datab[] = DenominatorIn[111..105];
- add_sub_16_result_int[] = (0, add_sub_16_dataa[]) - (0, add_sub_16_datab[]);
- add_sub_16_result[] = add_sub_16_result_int[6..0];
- add_sub_16_cout = !add_sub_16_result_int[7];
- add_sub_16_dataa[] = ( StageIn[117..112], NumeratorIn[527..527]);
- add_sub_16_datab[] = DenominatorIn[118..112];
- add_sub_17_result_int[] = (0, add_sub_17_dataa[]) - (0, add_sub_17_datab[]);
- add_sub_17_result[] = add_sub_17_result_int[6..0];
- add_sub_17_cout = !add_sub_17_result_int[7];
- add_sub_17_dataa[] = ( StageIn[124..119], NumeratorIn[558..558]);
- add_sub_17_datab[] = DenominatorIn[125..119];
- add_sub_18_result_int[] = (0, add_sub_18_dataa[]) - (0, add_sub_18_datab[]);
- add_sub_18_result[] = add_sub_18_result_int[6..0];
- add_sub_18_cout = !add_sub_18_result_int[7];
- add_sub_18_dataa[] = ( StageIn[131..126], NumeratorIn[589..589]);
- add_sub_18_datab[] = DenominatorIn[132..126];
- add_sub_19_result_int[] = (0, add_sub_19_dataa[]) - (0, add_sub_19_datab[]);
- add_sub_19_result[] = add_sub_19_result_int[6..0];
- add_sub_19_cout = !add_sub_19_result_int[7];
- add_sub_19_dataa[] = ( StageIn[138..133], NumeratorIn[620..620]);
- add_sub_19_datab[] = DenominatorIn[139..133];
- add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]);
- add_sub_2_result[] = add_sub_2_result_int[2..0];
- add_sub_2_cout = !add_sub_2_result_int[3];
- add_sub_2_dataa[] = ( StageIn[15..14], NumeratorIn[93..93]);
- add_sub_2_datab[] = DenominatorIn[16..14];
- add_sub_20_result_int[] = (0, add_sub_20_dataa[]) - (0, add_sub_20_datab[]);
- add_sub_20_result[] = add_sub_20_result_int[6..0];
- add_sub_20_cout = !add_sub_20_result_int[7];
- add_sub_20_dataa[] = ( StageIn[145..140], NumeratorIn[651..651]);
- add_sub_20_datab[] = DenominatorIn[146..140];
- add_sub_21_result_int[] = (0, add_sub_21_dataa[]) - (0, add_sub_21_datab[]);
- add_sub_21_result[] = add_sub_21_result_int[6..0];
- add_sub_21_cout = !add_sub_21_result_int[7];
- add_sub_21_dataa[] = ( StageIn[152..147], NumeratorIn[682..682]);
- add_sub_21_datab[] = DenominatorIn[153..147];
- add_sub_22_result_int[] = (0, add_sub_22_dataa[]) - (0, add_sub_22_datab[]);
- add_sub_22_result[] = add_sub_22_result_int[6..0];
- add_sub_22_cout = !add_sub_22_result_int[7];
- add_sub_22_dataa[] = ( StageIn[159..154], NumeratorIn[713..713]);
- add_sub_22_datab[] = DenominatorIn[160..154];
- add_sub_23_result_int[] = (0, add_sub_23_dataa[]) - (0, add_sub_23_datab[]);
- add_sub_23_result[] = add_sub_23_result_int[6..0];
- add_sub_23_cout = !add_sub_23_result_int[7];
- add_sub_23_dataa[] = ( StageIn[166..161], NumeratorIn[744..744]);
- add_sub_23_datab[] = DenominatorIn[167..161];
- add_sub_24_result_int[] = (0, add_sub_24_dataa[]) - (0, add_sub_24_datab[]);
- add_sub_24_result[] = add_sub_24_result_int[6..0];
- add_sub_24_cout = !add_sub_24_result_int[7];
- add_sub_24_dataa[] = ( StageIn[173..168], NumeratorIn[775..775]);
- add_sub_24_datab[] = DenominatorIn[174..168];
- add_sub_25_result_int[] = (0, add_sub_25_dataa[]) - (0, add_sub_25_datab[]);
- add_sub_25_result[] = add_sub_25_result_int[6..0];
- add_sub_25_cout = !add_sub_25_result_int[7];
- add_sub_25_dataa[] = ( StageIn[180..175], NumeratorIn[806..806]);
- add_sub_25_datab[] = DenominatorIn[181..175];
- add_sub_26_result_int[] = (0, add_sub_26_dataa[]) - (0, add_sub_26_datab[]);
- add_sub_26_result[] = add_sub_26_result_int[6..0];
- add_sub_26_cout = !add_sub_26_result_int[7];
- add_sub_26_dataa[] = ( StageIn[187..182], NumeratorIn[837..837]);
- add_sub_26_datab[] = DenominatorIn[188..182];
- add_sub_27_result_int[] = (0, add_sub_27_dataa[]) - (0, add_sub_27_datab[]);
- add_sub_27_result[] = add_sub_27_result_int[6..0];
- add_sub_27_cout = !add_sub_27_result_int[7];
- add_sub_27_dataa[] = ( StageIn[194..189], NumeratorIn[868..868]);
- add_sub_27_datab[] = DenominatorIn[195..189];
- add_sub_28_result_int[] = (0, add_sub_28_dataa[]) - (0, add_sub_28_datab[]);
- add_sub_28_result[] = add_sub_28_result_int[6..0];
- add_sub_28_cout = !add_sub_28_result_int[7];
- add_sub_28_dataa[] = ( StageIn[201..196], NumeratorIn[899..899]);
- add_sub_28_datab[] = DenominatorIn[202..196];
- add_sub_29_result_int[] = (0, add_sub_29_dataa[]) - (0, add_sub_29_datab[]);
- add_sub_29_result[] = add_sub_29_result_int[6..0];
- add_sub_29_cout = !add_sub_29_result_int[7];
- add_sub_29_dataa[] = ( StageIn[208..203], NumeratorIn[930..930]);
- add_sub_29_datab[] = DenominatorIn[209..203];
- add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]);
- add_sub_3_result[] = add_sub_3_result_int[3..0];
- add_sub_3_cout = !add_sub_3_result_int[4];
- add_sub_3_dataa[] = ( StageIn[23..21], NumeratorIn[124..124]);
- add_sub_3_datab[] = DenominatorIn[24..21];
- add_sub_30_result_int[] = (0, add_sub_30_dataa[]) - (0, add_sub_30_datab[]);
- add_sub_30_result[] = add_sub_30_result_int[6..0];
- add_sub_30_cout = !add_sub_30_result_int[7];
- add_sub_30_dataa[] = ( StageIn[215..210], NumeratorIn[961..961]);
- add_sub_30_datab[] = DenominatorIn[216..210];
- add_sub_31_result_int[] = (0, add_sub_31_dataa[]) - (0, add_sub_31_datab[]);
- add_sub_31_result[] = add_sub_31_result_int[6..0];
- add_sub_31_cout = !add_sub_31_result_int[7];
- add_sub_31_dataa[] = ( StageIn[222..217], NumeratorIn[992..992]);
- add_sub_31_datab[] = DenominatorIn[223..217];
- add_sub_4_result_int[] = (0, add_sub_4_dataa[]) - (0, add_sub_4_datab[]);
- add_sub_4_result[] = add_sub_4_result_int[4..0];
- add_sub_4_cout = !add_sub_4_result_int[5];
- add_sub_4_dataa[] = ( StageIn[31..28], NumeratorIn[155..155]);
- add_sub_4_datab[] = DenominatorIn[32..28];
- add_sub_5_result_int[] = (0, add_sub_5_dataa[]) - (0, add_sub_5_datab[]);
- add_sub_5_result[] = add_sub_5_result_int[5..0];
- add_sub_5_cout = !add_sub_5_result_int[6];
- add_sub_5_dataa[] = ( StageIn[39..35], NumeratorIn[186..186]);
- add_sub_5_datab[] = DenominatorIn[40..35];
- add_sub_6_result_int[] = (0, add_sub_6_dataa[]) - (0, add_sub_6_datab[]);
- add_sub_6_result[] = add_sub_6_result_int[6..0];
- add_sub_6_cout = !add_sub_6_result_int[7];
- add_sub_6_dataa[] = ( StageIn[47..42], NumeratorIn[217..217]);
- add_sub_6_datab[] = DenominatorIn[48..42];
- add_sub_7_result_int[] = (0, add_sub_7_dataa[]) - (0, add_sub_7_datab[]);
- add_sub_7_result[] = add_sub_7_result_int[6..0];
- add_sub_7_cout = !add_sub_7_result_int[7];
- add_sub_7_dataa[] = ( StageIn[54..49], NumeratorIn[248..248]);
- add_sub_7_datab[] = DenominatorIn[55..49];
- add_sub_8_result_int[] = (0, add_sub_8_dataa[]) - (0, add_sub_8_datab[]);
- add_sub_8_result[] = add_sub_8_result_int[6..0];
- add_sub_8_cout = !add_sub_8_result_int[7];
- add_sub_8_dataa[] = ( StageIn[61..56], NumeratorIn[279..279]);
- add_sub_8_datab[] = DenominatorIn[62..56];
- add_sub_9_result_int[] = (0, add_sub_9_dataa[]) - (0, add_sub_9_datab[]);
- add_sub_9_result[] = add_sub_9_result_int[6..0];
- add_sub_9_cout = !add_sub_9_result_int[7];
- add_sub_9_dataa[] = ( StageIn[68..63], NumeratorIn[310..310]);
- add_sub_9_datab[] = DenominatorIn[69..63];
- DenominatorIn[] = DenominatorIn_tmp[];
- DenominatorIn_tmp[] = ( DenominatorIn[223..0], ( gnd_wire, denominator[]));
- gnd_wire = B"0";
- nose[] = ( B"00000000000000000000000000000000", add_sub_31_cout, B"00000000000000000000000000000000", add_sub_30_cout, B"00000000000000000000000000000000", add_sub_29_cout, B"00000000000000000000000000000000", add_sub_28_cout, B"00000000000000000000000000000000", add_sub_27_cout, B"00000000000000000000000000000000", add_sub_26_cout, B"00000000000000000000000000000000", add_sub_25_cout, B"00000000000000000000000000000000", add_sub_24_cout, B"00000000000000000000000000000000", add_sub_23_cout, B"00000000000000000000000000000000", add_sub_22_cout, B"00000000000000000000000000000000", add_sub_21_cout, B"00000000000000000000000000000000", add_sub_20_cout, B"00000000000000000000000000000000", add_sub_19_cout, B"00000000000000000000000000000000", add_sub_18_cout, B"00000000000000000000000000000000", add_sub_17_cout, B"00000000000000000000000000000000", add_sub_16_cout, B"00000000000000000000000000000000", add_sub_15_cout, B"00000000000000000000000000000000", add_sub_14_cout, B"00000000000000000000000000000000", add_sub_13_cout, B"00000000000000000000000000000000", add_sub_12_cout, B"00000000000000000000000000000000", add_sub_11_cout, B"00000000000000000000000000000000", add_sub_10_cout, B"00000000000000000000000000000000", add_sub_9_cout, B"00000000000000000000000000000000", add_sub_8_cout, B"00000000000000000000000000000000", add_sub_7_cout, B"00000000000000000000000000000000", add_sub_6_cout, B"00000000000000000000000000000000", add_sub_5_cout, B"00000000000000000000000000000000", add_sub_4_cout, B"00000000000000000000000000000000", add_sub_3_cout, B"00000000000000000000000000000000", add_sub_2_cout, B"00000000000000000000000000000000", add_sub_1_cout, B"00000000000000000000000000000000", add_sub_0_cout);
- NumeratorIn[] = NumeratorIn_tmp[];
- NumeratorIn_tmp[] = ( NumeratorIn[1023..0], numerator[]);
- prestg[] = ( add_sub_31_result[], add_sub_30_result[], add_sub_29_result[], add_sub_28_result[], add_sub_27_result[], add_sub_26_result[], add_sub_25_result[], add_sub_24_result[], add_sub_23_result[], add_sub_22_result[], add_sub_21_result[], add_sub_20_result[], add_sub_19_result[], add_sub_18_result[], add_sub_17_result[], add_sub_16_result[], add_sub_15_result[], add_sub_14_result[], add_sub_13_result[], add_sub_12_result[], add_sub_11_result[], add_sub_10_result[], add_sub_9_result[], add_sub_8_result[], add_sub_7_result[], add_sub_6_result[], GND, add_sub_5_result[], B"00", add_sub_4_result[], B"000", add_sub_3_result[], B"0000", add_sub_2_result[], B"00000", add_sub_1_result[], B"000000", add_sub_0_result[]);
- quotient[] = quotient_tmp[];
- quotient_tmp[] = ( (! selnose[0..0]), (! selnose[33..33]), (! selnose[66..66]), (! selnose[99..99]), (! selnose[132..132]), (! selnose[165..165]), (! selnose[198..198]), (! selnose[231..231]), (! selnose[264..264]), (! selnose[297..297]), (! selnose[330..330]), (! selnose[363..363]), (! selnose[396..396]), (! selnose[429..429]), (! selnose[462..462]), (! selnose[495..495]), (! selnose[528..528]), (! selnose[561..561]), (! selnose[594..594]), (! selnose[627..627]), (! selnose[660..660]), (! selnose[693..693]), (! selnose[726..726]), (! selnose[759..759]), (! selnose[792..792]), (! selnose[825..825]), (! selnose[858..858]), (! selnose[891..891]), (! selnose[924..924]), (! selnose[957..957]), (! selnose[990..990]), (! selnose[1023..1023]));
- remainder[5..0] = StageIn[229..224];
- sel[] = ( gnd_wire, (sel[197..197] # DenominatorIn[229..229]), (sel[196..196] # DenominatorIn[228..228]), (sel[195..195] # DenominatorIn[227..227]), (sel[194..194] # DenominatorIn[226..226]), (sel[193..193] # DenominatorIn[225..225]), gnd_wire, (sel[191..191] # DenominatorIn[222..222]), (sel[190..190] # DenominatorIn[221..221]), (sel[189..189] # DenominatorIn[220..220]), (sel[188..188] # DenominatorIn[219..219]), (sel[187..187] # DenominatorIn[218..218]), gnd_wire, (sel[185..185] # DenominatorIn[215..215]), (sel[184..184] # DenominatorIn[214..214]), (sel[183..183] # DenominatorIn[213..213]), (sel[182..182] # DenominatorIn[212..212]), (sel[181..181] # DenominatorIn[211..211]), gnd_wire, (sel[179..179] # DenominatorIn[208..208]), (sel[178..178] # DenominatorIn[207..207]), (sel[177..177] # DenominatorIn[206..206]), (sel[176..176] # DenominatorIn[205..205]), (sel[175..175] # DenominatorIn[204..204]), gnd_wire, (sel[173..173] # DenominatorIn[201..201]), (sel[172..172] # DenominatorIn[200..200]), (sel[171..171] # DenominatorIn[199..199]), (sel[170..170] # DenominatorIn[198..198]), (sel[169..169] # DenominatorIn[197..197]), gnd_wire, (sel[167..167] # DenominatorIn[194..194]), (sel[166..166] # DenominatorIn[193..193]), (sel[165..165] # DenominatorIn[192..192]), (sel[164..164] # DenominatorIn[191..191]), (sel[163..163] # DenominatorIn[190..190]), gnd_wire, (sel[161..161] # DenominatorIn[187..187]), (sel[160..160] # DenominatorIn[186..186]), (sel[159..159] # DenominatorIn[185..185]), (sel[158..158] # DenominatorIn[184..184]), (sel[157..157] # DenominatorIn[183..183]), gnd_wire, (sel[155..155] # DenominatorIn[180..180]), (sel[154..154] # DenominatorIn[179..179]), (sel[153..153] # DenominatorIn[178..178]), (sel[152..152] # DenominatorIn[177..177]), (sel[151..151] # DenominatorIn[176..176]), gnd_wire, (sel[149..149] # DenominatorIn[173..173]), (sel[148..148] # DenominatorIn[172..172]), (sel[147..147] # DenominatorIn[171..171]), (sel[146..146] # DenominatorIn[170..170]), (sel[145..145] # DenominatorIn[169..169]), gnd_wire, (sel[143..143] # DenominatorIn[166..166]), (sel[142..142] # DenominatorIn[165..165]), (sel[141..141] # DenominatorIn[164..164]), (sel[140..140] # DenominatorIn[163..163]), (sel[139..139] # DenominatorIn[162..162]), gnd_wire, (sel[137..137] # DenominatorIn[159..159]), (sel[136..136] # DenominatorIn[158..158]), (sel[135..135] # DenominatorIn[157..157]), (sel[134..134] # DenominatorIn[156..156]), (sel[133..133] # DenominatorIn[155..155]), gnd_wire, (sel[131..131] # DenominatorIn[152..152]), (sel[130..130] # DenominatorIn[151..151]), (sel[129..129] # DenominatorIn[150..150]), (sel[128..128] # DenominatorIn[149..149]), (sel[127..127] # DenominatorIn[148..148]), gnd_wire, (sel[125..125] # DenominatorIn[145..145]), (sel[124..124] # DenominatorIn[144..144]), (sel[123..123] # DenominatorIn[143..143]), (sel[122..122] # DenominatorIn[142..142]), (sel[121..121] # DenominatorIn[141..141]), gnd_wire, (sel[119..119] # DenominatorIn[138..138]), (sel[118..118] # DenominatorIn[137..137]), (sel[117..117] # DenominatorIn[136..136]), (sel[116..116] # DenominatorIn[135..135]), (sel[115..115] # DenominatorIn[134..134]), gnd_wire, (sel[113..113] # DenominatorIn[131..131]), (sel[112..112] # DenominatorIn[130..130]), (sel[111..111] # DenominatorIn[129..129]), (sel[110..110] # DenominatorIn[128..128]), (sel[109..109] # DenominatorIn[127..127]), gnd_wire, (sel[107..107] # DenominatorIn[124..124]), (sel[106..106] # DenominatorIn[123..123]), (sel[105..105] # DenominatorIn[122..122]), (sel[104..104] # DenominatorIn[121..121]), (sel[103..103] # DenominatorIn[120..120]), gnd_wire, (sel[101..101] # DenominatorIn[117..117]), (sel[100..100] # DenominatorIn[116..116]), (sel[99..99] # DenominatorIn[115..115]), (sel[98..98] # DenominatorIn[114..114]), (sel[97..97] # DenominatorIn[113..113]), gnd_wire, (sel[95..95] # DenominatorIn[110..110]), (sel[94..94] # DenominatorIn[109..109]), (sel[93..93] # DenominatorIn[108..108]), (sel[92..92] # DenominatorIn[107..107]), (sel[91..91] # DenominatorIn[106..106]), gnd_wire, (sel[89..89] # DenominatorIn[103..103]), (sel[88..88] # DenominatorIn[102..102]), (sel[87..87] # DenominatorIn[101..101]), (sel[86..86] # DenominatorIn[100..100]), (sel[85..85] # DenominatorIn[99..99]), gnd_wire, (sel[83..83] # DenominatorIn[96..96]), (sel[82..82] # DenominatorIn[95..95]), (sel[81..81] # DenominatorIn[94..94]), (sel[80..80] # DenominatorIn[93..93]), (sel[79..79] # DenominatorIn[92..92]), gnd_wire, (sel[77..77] # DenominatorIn[89..89]), (sel[76..76] # DenominatorIn[88..88]), (sel[75..75] # DenominatorIn[87..87]), (sel[74..74] # DenominatorIn[86..86]), (sel[73..73] # DenominatorIn[85..85]), gnd_wire, (sel[71..71] # DenominatorIn[82..82]), (sel[70..70] # DenominatorIn[81..81]), (sel[69..69] # DenominatorIn[80..80]), (sel[68..68] # DenominatorIn[79..79]), (sel[67..67] # DenominatorIn[78..78]), gnd_wire, (sel[65..65] # DenominatorIn[75..75]), (sel[64..64] # DenominatorIn[74..74]), (sel[63..63] # DenominatorIn[73..73]), (sel[62..62] # DenominatorIn[72..72]), (sel[61..61] # DenominatorIn[71..71]), gnd_wire, (sel[59..59] # DenominatorIn[68..68]), (sel[58..58] # DenominatorIn[67..67]), (sel[57..57] # DenominatorIn[66..66]), (sel[56..56] # DenominatorIn[65..65]), (sel[55..55] # DenominatorIn[64..64]), gnd_wire, (sel[53..53] # DenominatorIn[61..61]), (sel[52..52] # DenominatorIn[60..60]), (sel[51..51] # DenominatorIn[59..59]), (sel[50..50] # DenominatorIn[58..58]), (sel[49..49] # DenominatorIn[57..57]), gnd_wire, (sel[47..47] # DenominatorIn[54..54]), (sel[46..46] # DenominatorIn[53..53]), (sel[45..45] # DenominatorIn[52..52]), (sel[44..44] # DenominatorIn[51..51]), (sel[43..43] # DenominatorIn[50..50]), gnd_wire, (sel[41..41] # DenominatorIn[47..47]), (sel[40..40] # DenominatorIn[46..46]), (sel[39..39] # DenominatorIn[45..45]), (sel[38..38] # DenominatorIn[44..44]), (sel[37..37] # DenominatorIn[43..43]), gnd_wire, (sel[35..35] # DenominatorIn[40..40]), (sel[34..34] # DenominatorIn[39..39]), (sel[33..33] # DenominatorIn[38..38]), (sel[32..32] # DenominatorIn[37..37]), (sel[31..31] # DenominatorIn[36..36]), gnd_wire, (sel[29..29] # DenominatorIn[33..33]), (sel[28..28] # DenominatorIn[32..32]), (sel[27..27] # DenominatorIn[31..31]), (sel[26..26] # DenominatorIn[30..30]), (sel[25..25] # DenominatorIn[29..29]), gnd_wire, (sel[23..23] # DenominatorIn[26..26]), (sel[22..22] # DenominatorIn[25..25]), (sel[21..21] # DenominatorIn[24..24]), (sel[20..20] # DenominatorIn[23..23]), (sel[19..19] # DenominatorIn[22..22]), gnd_wire, (sel[17..17] # DenominatorIn[19..19]), (sel[16..16] # DenominatorIn[18..18]), (sel[15..15] # DenominatorIn[17..17]), (sel[14..14] # DenominatorIn[16..16]), (sel[13..13] # DenominatorIn[15..15]), gnd_wire, (sel[11..11] # DenominatorIn[12..12]), (sel[10..10] # DenominatorIn[11..11]), (sel[9..9] # DenominatorIn[10..10]), (sel[8..8] # DenominatorIn[9..9]), (sel[7..7] # DenominatorIn[8..8]), gnd_wire, (sel[5..5] # DenominatorIn[5..5]), (sel[4..4] # DenominatorIn[4..4]), (sel[3..3] # DenominatorIn[3..3]), (sel[2..2] # DenominatorIn[2..2]), (sel[1..1] # DenominatorIn[1..1]));
- selnose[] = ( (! nose[1055..1055]), (! nose[1054..1054]), (! nose[1053..1053]), (! nose[1052..1052]), (! nose[1051..1051]), (! nose[1050..1050]), (! nose[1049..1049]), (! nose[1048..1048]), (! nose[1047..1047]), (! nose[1046..1046]), (! nose[1045..1045]), (! nose[1044..1044]), (! nose[1043..1043]), (! nose[1042..1042]), (! nose[1041..1041]), (! nose[1040..1040]), (! nose[1039..1039]), (! nose[1038..1038]), (! nose[1037..1037]), (! nose[1036..1036]), (! nose[1035..1035]), (! nose[1034..1034]), (! nose[1033..1033]), (! nose[1032..1032]), (! nose[1031..1031]), (! nose[1030..1030]), ((! nose[1029..1029]) # sel[197..197]), ((! nose[1028..1028]) # sel[196..196]), ((! nose[1027..1027]) # sel[195..195]), ((! nose[1026..1026]) # sel[194..194]), ((! nose[1025..1025]) # sel[193..193]), ((! nose[1024..1024]) # sel[192..192]), (! nose[1023..1023]), (! nose[1022..1022]), (! nose[1021..1021]), (! nose[1020..1020]), (! nose[1019..1019]), (! nose[1018..1018]), (! nose[1017..1017]), (! nose[1016..1016]), (! nose[1015..1015]), (! nose[1014..1014]), (! nose[1013..1013]), (! nose[1012..1012]), (! nose[1011..1011]), (! nose[1010..1010]), (! nose[1009..1009]), (! nose[1008..1008]), (! nose[1007..1007]), (! nose[1006..1006]), (! nose[1005..1005]), (! nose[1004..1004]), (! nose[1003..1003]), (! nose[1002..1002]), (! nose[1001..1001]), (! nose[1000..1000]), (! nose[999..999]), (! nose[998..998]), ((! nose[997..997]) # sel[191..191]), ((! nose[996..996]) # sel[190..190]), ((! nose[995..995]) # sel[189..189]), ((! nose[994..994]) # sel[188..188]), ((! nose[993..993]) # sel[187..187]), ((! nose[992..992]) # sel[186..186]), (! nose[991..991]), (! nose[990..990]), (! nose[989..989]), (! nose[988..988]), (! nose[987..987]), (! nose[986..986]), (! nose[985..985]), (! nose[984..984]), (! nose[983..983]), (! nose[982..982]), (! nose[981..981]), (! nose[980..980]), (! nose[979..979]), (! nose[978..978]), (! nose[977..977]), (! nose[976..976]), (! nose[975..975]), (! nose[974..974]), (! nose[973..973]), (! nose[972..972]), (! nose[971..971]), (! nose[970..970]), (! nose[969..969]), (! nose[968..968]), (! nose[967..967]), (! nose[966..966]), ((! nose[965..965]) # sel[185..185]), ((! nose[964..964]) # sel[184..184]), ((! nose[963..963]) # sel[183..183]), ((! nose[962..962]) # sel[182..182]), ((! nose[961..961]) # sel[181..181]), ((! nose[960..960]) # sel[180..180]), (! nose[959..959]), (! nose[958..958]), (! nose[957..957]), (! nose[956..956]), (! nose[955..955]), (! nose[954..954]), (! nose[953..953]), (! nose[952..952]), (! nose[951..951]), (! nose[950..950]), (! nose[949..949]), (! nose[948..948]), (! nose[947..947]), (! nose[946..946]), (! nose[945..945]), (! nose[944..944]), (! nose[943..943]), (! nose[942..942]), (! nose[941..941]), (! nose[940..940]), (! nose[939..939]), (! nose[938..938]), (! nose[937..937]), (! nose[936..936]), (! nose[935..935]), (! nose[934..934]), ((! nose[933..933]) # sel[179..179]), ((! nose[932..932]) # sel[178..178]), ((! nose[931..931]) # sel[177..177]), ((! nose[930..930]) # sel[176..176]), ((! nose[929..929]) # sel[175..175]), ((! nose[928..928]) # sel[174..174]), (! nose[927..927]), (! nose[926..926]), (! nose[925..925]), (! nose[924..924]), (! nose[923..923]), (! nose[922..922]), (! nose[921..921]), (! nose[920..920]), (! nose[919..919]), (! nose[918..918]), (! nose[917..917]), (! nose[916..916]), (! nose[915..915]), (! nose[914..914]), (! nose[913..913]), (! nose[912..912]), (! nose[911..911]), (! nose[910..910]), (! nose[909..909]), (! nose[908..908]), (! nose[907..907]), (! nose[906..906]), (! nose[905..905]), (! nose[904..904]), (! nose[903..903]), (! nose[902..902]), ((! nose[901..901]) # sel[173..173]), ((! nose[900..900]) # sel[172..172]), ((! nose[899..899]) # sel[171..171]), ((! nose[898..898]) # sel[170..170]), ((! nose[897..897]) # sel[169..169]), ((! nose[896..896]) # sel[168..168]), (! nose[895..895]), (! nose[894..894]), (! nose[893..893]), (! nose[892..892]), (! nose[891..891]), (! nose[890..890]), (! nose[889..889]), (! nose[888..888]), (! nose[887..887]), (! nose[886..886]), (! nose[885..885]), (! nose[884..884]), (! nose[883..883]), (! nose[882..882]), (! nose[881..881]), (! nose[880..880]), (! nose[879..879]), (! nose[878..878]), (! nose[877..877]), (! nose[876..876]), (! nose[875..875]), (! nose[874..874]), (! nose[873..873]), (! nose[872..872]), (! nose[871..871]), (! nose[870..870]), ((! nose[869..869]) # sel[167..167]), ((! nose[868..868]) # sel[166..166]), ((! nose[867..867]) # sel[165..165]), ((! nose[866..866]) # sel[164..164]), ((! nose[865..865]) # sel[163..163]), ((! nose[864..864]) # sel[162..162]), (! nose[863..863]), (! nose[862..862]), (! nose[861..861]), (! nose[860..860]), (! nose[859..859]), (! nose[858..858]), (! nose[857..857]), (! nose[856..856]), (! nose[855..855]), (! nose[854..854]), (! nose[853..853]), (! nose[852..852]), (! nose[851..851]), (! nose[850..850]), (! nose[849..849]), (! nose[848..848]), (! nose[847..847]), (! nose[846..846]), (! nose[845..845]), (! nose[844..844]), (! nose[843..843]), (! nose[842..842]), (! nose[841..841]), (! nose[840..840]), (! nose[839..839]), (! nose[838..838]), ((! nose[837..837]) # sel[161..161]), ((! nose[836..836]) # sel[160..160]), ((! nose[835..835]) # sel[159..159]), ((! nose[834..834]) # sel[158..158]), ((! nose[833..833]) # sel[157..157]), ((! nose[832..832]) # sel[156..156]), (! nose[831..831]), (! nose[830..830]), (! nose[829..829]), (! nose[828..828]), (! nose[827..827]), (! nose[826..826]), (! nose[825..825]), (! nose[824..824]), (! nose[823..823]), (! nose[822..822]), (! nose[821..821]), (! nose[820..820]), (! nose[819..819]), (! nose[818..818]), (! nose[817..817]), (! nose[816..816]), (! nose[815..815]), (! nose[814..814]), (! nose[813..813]), (! nose[812..812]), (! nose[811..811]), (! nose[810..810]), (! nose[809..809]), (! nose[808..808]), (! nose[807..807]), (! nose[806..806]), ((! nose[805..805]) # sel[155..155]), ((! nose[804..804]) # sel[154..154]), ((! nose[803..803]) # sel[153..153]), ((! nose[802..802]) # sel[152..152]), ((! nose[801..801]) # sel[151..151]), ((! nose[800..800]) # sel[150..150]), (! nose[799..799]), (! nose[798..798]), (! nose[797..797]), (! nose[796..796]), (! nose[795..795]), (! nose[794..794]), (! nose[793..793]), (! nose[792..792]), (! nose[791..791]), (! nose[790..790]), (! nose[789..789]), (! nose[788..788]), (! nose[787..787]), (! nose[786..786]), (! nose[785..785]), (! nose[784..784]), (! nose[783..783]), (! nose[782..782]), (! nose[781..781]), (! nose[780..780]), (! nose[779..779]), (! nose[778..778]), (! nose[777..777]), (! nose[776..776]), (! nose[775..775]), (! nose[774..774]), ((! nose[773..773]) # sel[149..149]), ((! nose[772..772]) # sel[148..148]), ((! nose[771..771]) # sel[147..147]), ((! nose[770..770]) # sel[146..146]), ((! nose[769..769]) # sel[145..145]), ((! nose[768..768]) # sel[144..144]), (! nose[767..767]), (! nose[766..766]), (! nose[765..765]), (! nose[764..764]), (! nose[763..763]), (! nose[762..762]), (! nose[761..761]), (! nose[760..760]), (! nose[759..759]), (! nose[758..758]), (! nose[757..757]), (! nose[756..756]), (! nose[755..755]), (! nose[754..754]), (! nose[753..753]), (! nose[752..752]), (! nose[751..751]), (! nose[750..750]), (! nose[749..749]), (! nose[748..748]), (! nose[747..747]), (! nose[746..746]), (! nose[745..745]), (! nose[744..744]), (! nose[743..743]), (! nose[742..742]), ((! nose[741..741]) # sel[143..143]), ((! nose[740..740]) # sel[142..142]), ((! nose[739..739]) # sel[141..141]), ((! nose[738..738]) # sel[140..140]), ((! nose[737..737]) # sel[139..139]), ((! nose[736..736]) # sel[138..138]), (! nose[735..735]), (! nose[734..734]), (! nose[733..733]), (! nose[732..732]), (! nose[731..731]), (! nose[730..730]), (! nose[729..729]), (! nose[728..728]), (! nose[727..727]), (! nose[726..726]), (! nose[725..725]), (! nose[724..724]), (! nose[723..723]), (! nose[722..722]), (! nose[721..721]), (! nose[720..720]), (! nose[719..719]), (! nose[718..718]), (! nose[717..717]), (! nose[716..716]), (! nose[715..715]), (! nose[714..714]), (! nose[713..713]), (! nose[712..712]), (! nose[711..711]), (! nose[710..710]), ((! nose[709..709]) # sel[137..137]), ((! nose[708..708]) # sel[136..136]), ((! nose[707..707]) # sel[135..135]), ((! nose[706..706]) # sel[134..134]), ((! nose[705..705]) # sel[133..133]), ((! nose[704..704]) # sel[132..132]), (! nose[703..703]), (! nose[702..702]), (! nose[701..701]), (! nose[700..700]), (! nose[699..699]), (! nose[698..698]), (! nose[697..697]), (! nose[696..696]), (! nose[695..695]), (! nose[694..694]), (! nose[693..693]), (! nose[692..692]), (! nose[691..691]), (! nose[690..690]), (! nose[689..689]), (! nose[688..688]), (! nose[687..687]), (! nose[686..686]), (! nose[685..685]), (! nose[684..684]), (! nose[683..683]), (! nose[682..682]), (! nose[681..681]), (! nose[680..680]), (! nose[679..679]), (! nose[678..678]), ((! nose[677..677]) # sel[131..131]), ((! nose[676..676]) # sel[130..130]), ((! nose[675..675]) # sel[129..129]), ((! nose[674..674]) # sel[128..128]), ((! nose[673..673]) # sel[127..127]), ((! nose[672..672]) # sel[126..126]), (! nose[671..671]), (! nose[670..670]), (! nose[669..669]), (! nose[668..668]), (! nose[667..667]), (! nose[666..666]), (! nose[665..665]), (! nose[664..664]), (! nose[663..663]), (! nose[662..662]), (! nose[661..661]), (! nose[660..660]), (! nose[659..659]), (! nose[658..658]), (! nose[657..657]), (! nose[656..656]), (! nose[655..655]), (! nose[654..654]), (! nose[653..653]), (! nose[652..652]), (! nose[651..651]), (! nose[650..650]), (! nose[649..649]), (! nose[648..648]), (! nose[647..647]), (! nose[646..646]), ((! nose[645..645]) # sel[125..125]), ((! nose[644..644]) # sel[124..124]), ((! nose[643..643]) # sel[123..123]), ((! nose[642..642]) # sel[122..122]), ((! nose[641..641]) # sel[121..121]), ((! nose[640..640]) # sel[120..120]), (! nose[639..639]), (! nose[638..638]), (! nose[637..637]), (! nose[636..636]), (! nose[635..635]), (! nose[634..634]), (! nose[633..633]), (! nose[632..632]), (! nose[631..631]), (! nose[630..630]), (! nose[629..629]), (! nose[628..628]), (! nose[627..627]), (! nose[626..626]), (! nose[625..625]), (! nose[624..624]), (! nose[623..623]), (! nose[622..622]), (! nose[621..621]), (! nose[620..620]), (! nose[619..619]), (! nose[618..618]), (! nose[617..617]), (! nose[616..616]), (! nose[615..615]), (! nose[614..614]), ((! nose[613..613]) # sel[119..119]), ((! nose[612..612]) # sel[118..118]), ((! nose[611..611]) # sel[117..117]), ((! nose[610..610]) # sel[116..116]), ((! nose[609..609]) # sel[115..115]), ((! nose[608..608]) # sel[114..114]), (! nose[607..607]), (! nose[606..606]), (! nose[605..605]), (! nose[604..604]), (! nose[603..603]), (! nose[602..602]), (! nose[601..601]), (! nose[600..600]), (! nose[599..599]), (! nose[598..598]), (! nose[597..597]), (! nose[596..596]), (! nose[595..595]), (! nose[594..594]), (! nose[593..593]), (! nose[592..592]), (! nose[591..591]), (! nose[590..590]), (! nose[589..589]), (! nose[588..588]), (! nose[587..587]), (! nose[586..586]), (! nose[585..585]), (! nose[584..584]), (! nose[583..583]), (! nose[582..582]), ((! nose[581..581]) # sel[113..113]), ((! nose[580..580]) # sel[112..112]), ((! nose[579..579]) # sel[111..111]), ((! nose[578..578]) # sel[110..110]), ((! nose[577..577]) # sel[109..109]), ((! nose[576..576]) # sel[108..108]), (! nose[575..575]), (! nose[574..574]), (! nose[573..573]), (! nose[572..572]), (! nose[571..571]), (! nose[570..570]), (! nose[569..569]), (! nose[568..568]), (! nose[567..567]), (! nose[566..566]), (! nose[565..565]), (! nose[564..564]), (! nose[563..563]), (! nose[562..562]), (! nose[561..561]), (! nose[560..560]), (! nose[559..559]), (! nose[558..558]), (! nose[557..557]), (! nose[556..556]), (! nose[555..555]), (! nose[554..554]), (! nose[553..553]), (! nose[552..552]), (! nose[551..551]), (! nose[550..550]), ((! nose[549..549]) # sel[107..107]), ((! nose[548..548]) # sel[106..106]), ((! nose[547..547]) # sel[105..105]), ((! nose[546..546]) # sel[104..104]), ((! nose[545..545]) # sel[103..103]), ((! nose[544..544]) # sel[102..102]), (! nose[543..543]), (! nose[542..542]), (! nose[541..541]), (! nose[540..540]), (! nose[539..539]), (! nose[538..538]), (! nose[537..537]), (! nose[536..536]), (! nose[535..535]), (! nose[534..534]), (! nose[533..533]), (! nose[532..532]), (! nose[531..531]), (! nose[530..530]), (! nose[529..529]), (! nose[528..528]), (! nose[527..527]), (! nose[526..526]), (! nose[525..525]), (! nose[524..524]), (! nose[523..523]), (! nose[522..522]), (! nose[521..521]), (! nose[520..520]), (! nose[519..519]), (! nose[518..518]), ((! nose[517..517]) # sel[101..101]), ((! nose[516..516]) # sel[100..100]), ((! nose[515..515]) # sel[99..99]), ((! nose[514..514]) # sel[98..98]), ((! nose[513..513]) # sel[97..97]), ((! nose[512..512]) # sel[96..96]), (! nose[511..511]), (! nose[510..510]), (! nose[509..509]), (! nose[508..508]), (! nose[507..507]), (! nose[506..506]), (! nose[505..505]), (! nose[504..504]), (! nose[503..503]), (! nose[502..502]), (! nose[501..501]), (! nose[500..500]), (! nose[499..499]), (! nose[498..498]), (! nose[497..497]), (! nose[496..496]), (! nose[495..495]), (! nose[494..494]), (! nose[493..493]), (! nose[492..492]), (! nose[491..491]), (! nose[490..490]), (! nose[489..489]), (! nose[488..488]), (! nose[487..487]), (! nose[486..486]), ((! nose[485..485]) # sel[95..95]), ((! nose[484..484]) # sel[94..94]), ((! nose[483..483]) # sel[93..93]), ((! nose[482..482]) # sel[92..92]), ((! nose[481..481]) # sel[91..91]), ((! nose[480..480]) # sel[90..90]), (! nose[479..479]), (! nose[478..478]), (! nose[477..477]), (! nose[476..476]), (! nose[475..475]), (! nose[474..474]), (! nose[473..473]), (! nose[472..472]), (! nose[471..471]), (! nose[470..470]), (! nose[469..469]), (! nose[468..468]), (! nose[467..467]), (! nose[466..466]), (! nose[465..465]), (! nose[464..464]), (! nose[463..463]), (! nose[462..462]), (! nose[461..461]), (! nose[460..460]), (! nose[459..459]), (! nose[458..458]), (! nose[457..457]), (! nose[456..456]), (! nose[455..455]), (! nose[454..454]), ((! nose[453..453]) # sel[89..89]), ((! nose[452..452]) # sel[88..88]), ((! nose[451..451]) # sel[87..87]), ((! nose[450..450]) # sel[86..86]), ((! nose[449..449]) # sel[85..85]), ((! nose[448..448]) # sel[84..84]), (! nose[447..447]), (! nose[446..446]), (! nose[445..445]), (! nose[444..444]), (! nose[443..443]), (! nose[442..442]), (! nose[441..441]), (! nose[440..440]), (! nose[439..439]), (! nose[438..438]), (! nose[437..437]), (! nose[436..436]), (! nose[435..435]), (! nose[434..434]), (! nose[433..433]), (! nose[432..432]), (! nose[431..431]), (! nose[430..430]), (! nose[429..429]), (! nose[428..428]), (! nose[427..427]), (! nose[426..426]), (! nose[425..425]), (! nose[424..424]), (! nose[423..423]), (! nose[422..422]), ((! nose[421..421]) # sel[83..83]), ((! nose[420..420]) # sel[82..82]), ((! nose[419..419]) # sel[81..81]), ((! nose[418..418]) # sel[80..80]), ((! nose[417..417]) # sel[79..79]), ((! nose[416..416]) # sel[78..78]), (! nose[415..415]), (! nose[414..414]), (! nose[413..413]), (! nose[412..412]), (! nose[411..411]), (! nose[410..410]), (! nose[409..409]), (! nose[408..408]), (! nose[407..407]), (! nose[406..406]), (! nose[405..405]), (! nose[404..404]), (! nose[403..403]), (! nose[402..402]), (! nose[401..401]), (! nose[400..400]), (! nose[399..399]), (! nose[398..398]), (! nose[397..397]), (! nose[396..396]), (! nose[395..395]), (! nose[394..394]), (! nose[393..393]), (! nose[392..392]), (! nose[391..391]), (! nose[390..390]), ((! nose[389..389]) # sel[77..77]), ((! nose[388..388]) # sel[76..76]), ((! nose[387..387]) # sel[75..75]), ((! nose[386..386]) # sel[74..74]), ((! nose[385..385]) # sel[73..73]), ((! nose[384..384]) # sel[72..72]), (! nose[383..383]), (! nose[382..382]), (! nose[381..381]), (! nose[380..380]), (! nose[379..379]), (! nose[378..378]), (! nose[377..377]), (! nose[376..376]), (! nose[375..375]), (! nose[374..374]), (! nose[373..373]), (! nose[372..372]), (! nose[371..371]), (! nose[370..370]), (! nose[369..369]), (! nose[368..368]), (! nose[367..367]), (! nose[366..366]), (! nose[365..365]), (! nose[364..364]), (! nose[363..363]), (! nose[362..362]), (! nose[361..361]), (! nose[360..360]), (! nose[359..359]), (! nose[358..358]), ((! nose[357..357]) # sel[71..71]), ((! nose[356..356]) # sel[70..70]), ((! nose[355..355]) # sel[69..69]), ((! nose[354..354]) # sel[68..68]), ((! nose[353..353]) # sel[67..67]), ((! nose[352..352]) # sel[66..66]), (! nose[351..351]), (! nose[350..350]), (! nose[349..349]), (! nose[348..348]), (! nose[347..347]), (! nose[346..346]), (! nose[345..345]), (! nose[344..344]), (! nose[343..343]), (! nose[342..342]), (! nose[341..341]), (! nose[340..340]), (! nose[339..339]), (! nose[338..338]), (! nose[337..337]), (! nose[336..336]), (! nose[335..335]), (! nose[334..334]), (! nose[333..333]), (! nose[332..332]), (! nose[331..331]), (! nose[330..330]), (! nose[329..329]), (! nose[328..328]), (! nose[327..327]), (! nose[326..326]), ((! nose[325..325]) # sel[65..65]), ((! nose[324..324]) # sel[64..64]), ((! nose[323..323]) # sel[63..63]), ((! nose[322..322]) # sel[62..62]), ((! nose[321..321]) # sel[61..61]), ((! nose[320..320]) # sel[60..60]), (! nose[319..319]), (! nose[318..318]), (! nose[317..317]), (! nose[316..316]), (! nose[315..315]), (! nose[314..314]), (! nose[313..313]), (! nose[312..312]), (! nose[311..311]), (! nose[310..310]), (! nose[309..309]), (! nose[308..308]), (! nose[307..307]), (! nose[306..306]), (! nose[305..305]), (! nose[304..304]), (! nose[303..303]), (! nose[302..302]), (! nose[301..301]), (! nose[300..300]), (! nose[299..299]), (! nose[298..298]), (! nose[297..297]), (! nose[296..296]), (! nose[295..295]), (! nose[294..294]), ((! nose[293..293]) # sel[59..59]), ((! nose[292..292]) # sel[58..58]), ((! nose[291..291]) # sel[57..57]), ((! nose[290..290]) # sel[56..56]), ((! nose[289..289]) # sel[55..55]), ((! nose[288..288]) # sel[54..54]), (! nose[287..287]), (! nose[286..286]), (! nose[285..285]), (! nose[284..284]), (! nose[283..283]), (! nose[282..282]), (! nose[281..281]), (! nose[280..280]), (! nose[279..279]), (! nose[278..278]), (! nose[277..277]), (! nose[276..276]), (! nose[275..275]), (! nose[274..274]), (! nose[273..273]), (! nose[272..272]), (! nose[271..271]), (! nose[270..270]), (! nose[269..269]), (! nose[268..268]), (! nose[267..267]), (! nose[266..266]), (! nose[265..265]), (! nose[264..264]), (! nose[263..263]), (! nose[262..262]), ((! nose[261..261]) # sel[53..53]), ((! nose[260..260]) # sel[52..52]), ((! nose[259..259]) # sel[51..51]), ((! nose[258..258]) # sel[50..50]), ((! nose[257..257]) # sel[49..49]), ((! nose[256..256]) # sel[48..48]), (! nose[255..255]), (! nose[254..254]), (! nose[253..253]), (! nose[252..252]), (! nose[251..251]), (! nose[250..250]), (! nose[249..249]), (! nose[248..248]), (! nose[247..247]), (! nose[246..246]), (! nose[245..245]), (! nose[244..244]), (! nose[243..243]), (! nose[242..242]), (! nose[241..241]), (! nose[240..240]), (! nose[239..239]), (! nose[238..238]), (! nose[237..237]), (! nose[236..236]), (! nose[235..235]), (! nose[234..234]), (! nose[233..233]), (! nose[232..232]), (! nose[231..231]), (! nose[230..230]), ((! nose[229..229]) # sel[47..47]), ((! nose[228..228]) # sel[46..46]), ((! nose[227..227]) # sel[45..45]), ((! nose[226..226]) # sel[44..44]), ((! nose[225..225]) # sel[43..43]), ((! nose[224..224]) # sel[42..42]), (! nose[223..223]), (! nose[222..222]), (! nose[221..221]), (! nose[220..220]), (! nose[219..219]), (! nose[218..218]), (! nose[217..217]), (! nose[216..216]), (! nose[215..215]), (! nose[214..214]), (! nose[213..213]), (! nose[212..212]), (! nose[211..211]), (! nose[210..210]), (! nose[209..209]), (! nose[208..208]), (! nose[207..207]), (! nose[206..206]), (! nose[205..205]), (! nose[204..204]), (! nose[203..203]), (! nose[202..202]), (! nose[201..201]), (! nose[200..200]), (! nose[199..199]), (! nose[198..198]), ((! nose[197..197]) # sel[41..41]), ((! nose[196..196]) # sel[40..40]), ((! nose[195..195]) # sel[39..39]), ((! nose[194..194]) # sel[38..38]), ((! nose[193..193]) # sel[37..37]), ((! nose[192..192]) # sel[36..36]), (! nose[191..191]), (! nose[190..190]), (! nose[189..189]), (! nose[188..188]), (! nose[187..187]), (! nose[186..186]), (! nose[185..185]), (! nose[184..184]), (! nose[183..183]), (! nose[182..182]), (! nose[181..181]), (! nose[180..180]), (! nose[179..179]), (! nose[178..178]), (! nose[177..177]), (! nose[176..176]), (! nose[175..175]), (! nose[174..174]), (! nose[173..173]), (! nose[172..172]), (! nose[171..171]), (! nose[170..170]), (! nose[169..169]), (! nose[168..168]), (! nose[167..167]), (! nose[166..166]), ((! nose[165..165]) # sel[35..35]), ((! nose[164..164]) # sel[34..34]), ((! nose[163..163]) # sel[33..33]), ((! nose[162..162]) # sel[32..32]), ((! nose[161..161]) # sel[31..31]), ((! nose[160..160]) # sel[30..30]), (! nose[159..159]), (! nose[158..158]), (! nose[157..157]), (! nose[156..156]), (! nose[155..155]), (! nose[154..154]), (! nose[153..153]), (! nose[152..152]), (! nose[151..151]), (! nose[150..150]), (! nose[149..149]), (! nose[148..148]), (! nose[147..147]), (! nose[146..146]), (! nose[145..145]), (! nose[144..144]), (! nose[143..143]), (! nose[142..142]), (! nose[141..141]), (! nose[140..140]), (! nose[139..139]), (! nose[138..138]), (! nose[137..137]), (! nose[136..136]), (! nose[135..135]), (! nose[134..134]), ((! nose[133..133]) # sel[29..29]), ((! nose[132..132]) # sel[28..28]), ((! nose[131..131]) # sel[27..27]), ((! nose[130..130]) # sel[26..26]), ((! nose[129..129]) # sel[25..25]), ((! nose[128..128]) # sel[24..24]), (! nose[127..127]), (! nose[126..126]), (! nose[125..125]), (! nose[124..124]), (! nose[123..123]), (! nose[122..122]), (! nose[121..121]), (! nose[120..120]), (! nose[119..119]), (! nose[118..118]), (! nose[117..117]), (! nose[116..116]), (! nose[115..115]), (! nose[114..114]), (! nose[113..113]), (! nose[112..112]), (! nose[111..111]), (! nose[110..110]), (! nose[109..109]), (! nose[108..108]), (! nose[107..107]), (! nose[106..106]), (! nose[105..105]), (! nose[104..104]), (! nose[103..103]), (! nose[102..102]), ((! nose[101..101]) # sel[23..23]), ((! nose[100..100]) # sel[22..22]), ((! nose[99..99]) # sel[21..21]), ((! nose[98..98]) # sel[20..20]), ((! nose[97..97]) # sel[19..19]), ((! nose[96..96]) # sel[18..18]), (! nose[95..95]), (! nose[94..94]), (! nose[93..93]), (! nose[92..92]), (! nose[91..91]), (! nose[90..90]), (! nose[89..89]), (! nose[88..88]), (! nose[87..87]), (! nose[86..86]), (! nose[85..85]), (! nose[84..84]), (! nose[83..83]), (! nose[82..82]), (! nose[81..81]), (! nose[80..80]), (! nose[79..79]), (! nose[78..78]), (! nose[77..77]), (! nose[76..76]), (! nose[75..75]), (! nose[74..74]), (! nose[73..73]), (! nose[72..72]), (! nose[71..71]), (! nose[70..70]), ((! nose[69..69]) # sel[17..17]), ((! nose[68..68]) # sel[16..16]), ((! nose[67..67]) # sel[15..15]), ((! nose[66..66]) # sel[14..14]), ((! nose[65..65]) # sel[13..13]), ((! nose[64..64]) # sel[12..12]), (! nose[63..63]), (! nose[62..62]), (! nose[61..61]), (! nose[60..60]), (! nose[59..59]), (! nose[58..58]), (! nose[57..57]), (! nose[56..56]), (! nose[55..55]), (! nose[54..54]), (! nose[53..53]), (! nose[52..52]), (! nose[51..51]), (! nose[50..50]), (! nose[49..49]), (! nose[48..48]), (! nose[47..47]), (! nose[46..46]), (! nose[45..45]), (! nose[44..44]), (! nose[43..43]), (! nose[42..42]), (! nose[41..41]), (! nose[40..40]), (! nose[39..39]), (! nose[38..38]), ((! nose[37..37]) # sel[11..11]), ((! nose[36..36]) # sel[10..10]), ((! nose[35..35]) # sel[9..9]), ((! nose[34..34]) # sel[8..8]), ((! nose[33..33]) # sel[7..7]), ((! nose[32..32]) # sel[6..6]), (! nose[31..31]), (! nose[30..30]), (! nose[29..29]), (! nose[28..28]), (! nose[27..27]), (! nose[26..26]), (! nose[25..25]), (! nose[24..24]), (! nose[23..23]), (! nose[22..22]), (! nose[21..21]), (! nose[20..20]), (! nose[19..19]), (! nose[18..18]), (! nose[17..17]), (! nose[16..16]), (! nose[15..15]), (! nose[14..14]), (! nose[13..13]), (! nose[12..12]), (! nose[11..11]), (! nose[10..10]), (! nose[9..9]), (! nose[8..8]), (! nose[7..7]), (! nose[6..6]), ((! nose[5..5]) # sel[5..5]), ((! nose[4..4]) # sel[4..4]), ((! nose[3..3]) # sel[3..3]), ((! nose[2..2]) # sel[2..2]), ((! nose[1..1]) # sel[1..1]), ((! nose[0..0]) # sel[0..0]));
- StageIn[] = StageIn_tmp[];
- StageIn_tmp[] = ( StageOut[223..0], B"0000000");
- StageOut[] = ( ((( StageIn[222..217], NumeratorIn[992..992]) & selnose[1023..1023]) # (prestg[223..217] & (! selnose[1023..1023]))), ((( StageIn[215..210], NumeratorIn[961..961]) & selnose[990..990]) # (prestg[216..210] & (! selnose[990..990]))), ((( StageIn[208..203], NumeratorIn[930..930]) & selnose[957..957]) # (prestg[209..203] & (! selnose[957..957]))), ((( StageIn[201..196], NumeratorIn[899..899]) & selnose[924..924]) # (prestg[202..196] & (! selnose[924..924]))), ((( StageIn[194..189], NumeratorIn[868..868]) & selnose[891..891]) # (prestg[195..189] & (! selnose[891..891]))), ((( StageIn[187..182], NumeratorIn[837..837]) & selnose[858..858]) # (prestg[188..182] & (! selnose[858..858]))), ((( StageIn[180..175], NumeratorIn[806..806]) & selnose[825..825]) # (prestg[181..175] & (! selnose[825..825]))), ((( StageIn[173..168], NumeratorIn[775..775]) & selnose[792..792]) # (prestg[174..168] & (! selnose[792..792]))), ((( StageIn[166..161], NumeratorIn[744..744]) & selnose[759..759]) # (prestg[167..161] & (! selnose[759..759]))), ((( StageIn[159..154], NumeratorIn[713..713]) & selnose[726..726]) # (prestg[160..154] & (! selnose[726..726]))), ((( StageIn[152..147], NumeratorIn[682..682]) & selnose[693..693]) # (prestg[153..147] & (! selnose[693..693]))), ((( StageIn[145..140], NumeratorIn[651..651]) & selnose[660..660]) # (prestg[146..140] & (! selnose[660..660]))), ((( StageIn[138..133], NumeratorIn[620..620]) & selnose[627..627]) # (prestg[139..133] & (! selnose[627..627]))), ((( StageIn[131..126], NumeratorIn[589..589]) & selnose[594..594]) # (prestg[132..126] & (! selnose[594..594]))), ((( StageIn[124..119], NumeratorIn[558..558]) & selnose[561..561]) # (prestg[125..119] & (! selnose[561..561]))), ((( StageIn[117..112], NumeratorIn[527..527]) & selnose[528..528]) # (prestg[118..112] & (! selnose[528..528]))), ((( StageIn[110..105], NumeratorIn[496..496]) & selnose[495..495]) # (prestg[111..105] & (! selnose[495..495]))), ((( StageIn[103..98], NumeratorIn[465..465]) & selnose[462..462]) # (prestg[104..98] & (! selnose[462..462]))), ((( StageIn[96..91], NumeratorIn[434..434]) & selnose[429..429]) # (prestg[97..91] & (! selnose[429..429]))), ((( StageIn[89..84], NumeratorIn[403..403]) & selnose[396..396]) # (prestg[90..84] & (! selnose[396..396]))), ((( StageIn[82..77], NumeratorIn[372..372]) & selnose[363..363]) # (prestg[83..77] & (! selnose[363..363]))), ((( StageIn[75..70], NumeratorIn[341..341]) & selnose[330..330]) # (prestg[76..70] & (! selnose[330..330]))), ((( StageIn[68..63], NumeratorIn[310..310]) & selnose[297..297]) # (prestg[69..63] & (! selnose[297..297]))), ((( StageIn[61..56], NumeratorIn[279..279]) & selnose[264..264]) # (prestg[62..56] & (! selnose[264..264]))), ((( StageIn[54..49], NumeratorIn[248..248]) & selnose[231..231]) # (prestg[55..49] & (! selnose[231..231]))), ((( StageIn[47..42], NumeratorIn[217..217]) & selnose[198..198]) # (prestg[48..42] & (! selnose[198..198]))), ((( StageIn[40..35], NumeratorIn[186..186]) & selnose[165..165]) # (prestg[41..35] & (! selnose[165..165]))), ((( StageIn[33..28], NumeratorIn[155..155]) & selnose[132..132]) # (prestg[34..28] & (! selnose[132..132]))), ((( StageIn[26..21], NumeratorIn[124..124]) & selnose[99..99]) # (prestg[27..21] & (! selnose[99..99]))), ((( StageIn[19..14], NumeratorIn[93..93]) & selnose[66..66]) # (prestg[20..14] & (! selnose[66..66]))), ((( StageIn[12..7], NumeratorIn[62..62]) & selnose[33..33]) # (prestg[13..7] & (! selnose[33..33]))), ((( StageIn[5..0], NumeratorIn[31..31]) & selnose[0..0]) # (prestg[6..0] & (! selnose[0..0]))));
-END;
---VALID FILE
diff --git a/db/alt_u_div_sse.tdf b/db/alt_u_div_sse.tdf
deleted file mode 100644
index a0d54e1..0000000
--- a/db/alt_u_div_sse.tdf
+++ /dev/null
@@ -1,142 +0,0 @@
---alt_u_div DEVICE_FAMILY="Cyclone V" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=4 WIDTH_N=8 WIDTH_Q=8 WIDTH_R=4 denominator numerator quotient remainder
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-
---synthesis_resources = lut 38
-SUBDESIGN alt_u_div_sse
-(
- denominator[3..0] : input;
- numerator[7..0] : input;
- quotient[7..0] : output;
- remainder[3..0] : output;
-)
-VARIABLE
- add_sub_0_result_int[1..0] : WIRE;
- add_sub_0_cout : WIRE;
- add_sub_0_dataa[0..0] : WIRE;
- add_sub_0_datab[0..0] : WIRE;
- add_sub_0_result[0..0] : WIRE;
- add_sub_1_result_int[2..0] : WIRE;
- add_sub_1_cout : WIRE;
- add_sub_1_dataa[1..0] : WIRE;
- add_sub_1_datab[1..0] : WIRE;
- add_sub_1_result[1..0] : WIRE;
- add_sub_2_result_int[3..0] : WIRE;
- add_sub_2_cout : WIRE;
- add_sub_2_dataa[2..0] : WIRE;
- add_sub_2_datab[2..0] : WIRE;
- add_sub_2_result[2..0] : WIRE;
- add_sub_3_result_int[4..0] : WIRE;
- add_sub_3_cout : WIRE;
- add_sub_3_dataa[3..0] : WIRE;
- add_sub_3_datab[3..0] : WIRE;
- add_sub_3_result[3..0] : WIRE;
- add_sub_4_result_int[5..0] : WIRE;
- add_sub_4_cout : WIRE;
- add_sub_4_dataa[4..0] : WIRE;
- add_sub_4_datab[4..0] : WIRE;
- add_sub_4_result[4..0] : WIRE;
- add_sub_5_result_int[5..0] : WIRE;
- add_sub_5_cout : WIRE;
- add_sub_5_dataa[4..0] : WIRE;
- add_sub_5_datab[4..0] : WIRE;
- add_sub_5_result[4..0] : WIRE;
- add_sub_6_result_int[5..0] : WIRE;
- add_sub_6_cout : WIRE;
- add_sub_6_dataa[4..0] : WIRE;
- add_sub_6_datab[4..0] : WIRE;
- add_sub_6_result[4..0] : WIRE;
- add_sub_7_result_int[5..0] : WIRE;
- add_sub_7_cout : WIRE;
- add_sub_7_dataa[4..0] : WIRE;
- add_sub_7_datab[4..0] : WIRE;
- add_sub_7_result[4..0] : WIRE;
- DenominatorIn[44..0] : WIRE;
- DenominatorIn_tmp[44..0] : WIRE;
- gnd_wire : WIRE;
- nose[71..0] : WIRE;
- NumeratorIn[71..0] : WIRE;
- NumeratorIn_tmp[71..0] : WIRE;
- prestg[39..0] : WIRE;
- quotient_tmp[7..0] : WIRE;
- sel[35..0] : WIRE;
- selnose[71..0] : WIRE;
- StageIn[44..0] : WIRE;
- StageIn_tmp[44..0] : WIRE;
- StageOut[39..0] : WIRE;
-
-BEGIN
- add_sub_0_result_int[] = (0, add_sub_0_dataa[]) - (0, add_sub_0_datab[]);
- add_sub_0_result[] = add_sub_0_result_int[0..0];
- add_sub_0_cout = !add_sub_0_result_int[1];
- add_sub_0_dataa[] = NumeratorIn[7..7];
- add_sub_0_datab[] = DenominatorIn[0..0];
- add_sub_1_result_int[] = (0, add_sub_1_dataa[]) - (0, add_sub_1_datab[]);
- add_sub_1_result[] = add_sub_1_result_int[1..0];
- add_sub_1_cout = !add_sub_1_result_int[2];
- add_sub_1_dataa[] = ( StageIn[5..5], NumeratorIn[14..14]);
- add_sub_1_datab[] = DenominatorIn[6..5];
- add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]);
- add_sub_2_result[] = add_sub_2_result_int[2..0];
- add_sub_2_cout = !add_sub_2_result_int[3];
- add_sub_2_dataa[] = ( StageIn[11..10], NumeratorIn[21..21]);
- add_sub_2_datab[] = DenominatorIn[12..10];
- add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]);
- add_sub_3_result[] = add_sub_3_result_int[3..0];
- add_sub_3_cout = !add_sub_3_result_int[4];
- add_sub_3_dataa[] = ( StageIn[17..15], NumeratorIn[28..28]);
- add_sub_3_datab[] = DenominatorIn[18..15];
- add_sub_4_result_int[] = (0, add_sub_4_dataa[]) - (0, add_sub_4_datab[]);
- add_sub_4_result[] = add_sub_4_result_int[4..0];
- add_sub_4_cout = !add_sub_4_result_int[5];
- add_sub_4_dataa[] = ( StageIn[23..20], NumeratorIn[35..35]);
- add_sub_4_datab[] = DenominatorIn[24..20];
- add_sub_5_result_int[] = (0, add_sub_5_dataa[]) - (0, add_sub_5_datab[]);
- add_sub_5_result[] = add_sub_5_result_int[4..0];
- add_sub_5_cout = !add_sub_5_result_int[5];
- add_sub_5_dataa[] = ( StageIn[28..25], NumeratorIn[42..42]);
- add_sub_5_datab[] = DenominatorIn[29..25];
- add_sub_6_result_int[] = (0, add_sub_6_dataa[]) - (0, add_sub_6_datab[]);
- add_sub_6_result[] = add_sub_6_result_int[4..0];
- add_sub_6_cout = !add_sub_6_result_int[5];
- add_sub_6_dataa[] = ( StageIn[33..30], NumeratorIn[49..49]);
- add_sub_6_datab[] = DenominatorIn[34..30];
- add_sub_7_result_int[] = (0, add_sub_7_dataa[]) - (0, add_sub_7_datab[]);
- add_sub_7_result[] = add_sub_7_result_int[4..0];
- add_sub_7_cout = !add_sub_7_result_int[5];
- add_sub_7_dataa[] = ( StageIn[38..35], NumeratorIn[56..56]);
- add_sub_7_datab[] = DenominatorIn[39..35];
- DenominatorIn[] = DenominatorIn_tmp[];
- DenominatorIn_tmp[] = ( DenominatorIn[39..0], ( gnd_wire, denominator[]));
- gnd_wire = B"0";
- nose[] = ( B"00000000", add_sub_7_cout, B"00000000", add_sub_6_cout, B"00000000", add_sub_5_cout, B"00000000", add_sub_4_cout, B"00000000", add_sub_3_cout, B"00000000", add_sub_2_cout, B"00000000", add_sub_1_cout, B"00000000", add_sub_0_cout);
- NumeratorIn[] = NumeratorIn_tmp[];
- NumeratorIn_tmp[] = ( NumeratorIn[63..0], numerator[]);
- prestg[] = ( add_sub_7_result[], add_sub_6_result[], add_sub_5_result[], add_sub_4_result[], GND, add_sub_3_result[], B"00", add_sub_2_result[], B"000", add_sub_1_result[], B"0000", add_sub_0_result[]);
- quotient[] = quotient_tmp[];
- quotient_tmp[] = ( (! selnose[0..0]), (! selnose[9..9]), (! selnose[18..18]), (! selnose[27..27]), (! selnose[36..36]), (! selnose[45..45]), (! selnose[54..54]), (! selnose[63..63]));
- remainder[3..0] = StageIn[43..40];
- sel[] = ( gnd_wire, (sel[35..35] # DenominatorIn[43..43]), (sel[34..34] # DenominatorIn[42..42]), (sel[33..33] # DenominatorIn[41..41]), gnd_wire, (sel[31..31] # DenominatorIn[38..38]), (sel[30..30] # DenominatorIn[37..37]), (sel[29..29] # DenominatorIn[36..36]), gnd_wire, (sel[27..27] # DenominatorIn[33..33]), (sel[26..26] # DenominatorIn[32..32]), (sel[25..25] # DenominatorIn[31..31]), gnd_wire, (sel[23..23] # DenominatorIn[28..28]), (sel[22..22] # DenominatorIn[27..27]), (sel[21..21] # DenominatorIn[26..26]), gnd_wire, (sel[19..19] # DenominatorIn[23..23]), (sel[18..18] # DenominatorIn[22..22]), (sel[17..17] # DenominatorIn[21..21]), gnd_wire, (sel[15..15] # DenominatorIn[18..18]), (sel[14..14] # DenominatorIn[17..17]), (sel[13..13] # DenominatorIn[16..16]), gnd_wire, (sel[11..11] # DenominatorIn[13..13]), (sel[10..10] # DenominatorIn[12..12]), (sel[9..9] # DenominatorIn[11..11]), gnd_wire, (sel[7..7] # DenominatorIn[8..8]), (sel[6..6] # DenominatorIn[7..7]), (sel[5..5] # DenominatorIn[6..6]), gnd_wire, (sel[3..3] # DenominatorIn[3..3]), (sel[2..2] # DenominatorIn[2..2]), (sel[1..1] # DenominatorIn[1..1]));
- selnose[] = ( (! nose[71..71]), (! nose[70..70]), (! nose[69..69]), (! nose[68..68]), ((! nose[67..67]) # sel[35..35]), ((! nose[66..66]) # sel[34..34]), ((! nose[65..65]) # sel[33..33]), ((! nose[64..64]) # sel[32..32]), (! nose[63..63]), (! nose[62..62]), (! nose[61..61]), (! nose[60..60]), ((! nose[59..59]) # sel[31..31]), ((! nose[58..58]) # sel[30..30]), ((! nose[57..57]) # sel[29..29]), ((! nose[56..56]) # sel[28..28]), (! nose[55..55]), (! nose[54..54]), (! nose[53..53]), (! nose[52..52]), ((! nose[51..51]) # sel[27..27]), ((! nose[50..50]) # sel[26..26]), ((! nose[49..49]) # sel[25..25]), ((! nose[48..48]) # sel[24..24]), (! nose[47..47]), (! nose[46..46]), (! nose[45..45]), (! nose[44..44]), ((! nose[43..43]) # sel[23..23]), ((! nose[42..42]) # sel[22..22]), ((! nose[41..41]) # sel[21..21]), ((! nose[40..40]) # sel[20..20]), (! nose[39..39]), (! nose[38..38]), (! nose[37..37]), (! nose[36..36]), ((! nose[35..35]) # sel[19..19]), ((! nose[34..34]) # sel[18..18]), ((! nose[33..33]) # sel[17..17]), ((! nose[32..32]) # sel[16..16]), (! nose[31..31]), (! nose[30..30]), (! nose[29..29]), (! nose[28..28]), ((! nose[27..27]) # sel[15..15]), ((! nose[26..26]) # sel[14..14]), ((! nose[25..25]) # sel[13..13]), ((! nose[24..24]) # sel[12..12]), (! nose[23..23]), (! nose[22..22]), (! nose[21..21]), (! nose[20..20]), ((! nose[19..19]) # sel[11..11]), ((! nose[18..18]) # sel[10..10]), ((! nose[17..17]) # sel[9..9]), ((! nose[16..16]) # sel[8..8]), (! nose[15..15]), (! nose[14..14]), (! nose[13..13]), (! nose[12..12]), ((! nose[11..11]) # sel[7..7]), ((! nose[10..10]) # sel[6..6]), ((! nose[9..9]) # sel[5..5]), ((! nose[8..8]) # sel[4..4]), (! nose[7..7]), (! nose[6..6]), (! nose[5..5]), (! nose[4..4]), ((! nose[3..3]) # sel[3..3]), ((! nose[2..2]) # sel[2..2]), ((! nose[1..1]) # sel[1..1]), ((! nose[0..0]) # sel[0..0]));
- StageIn[] = StageIn_tmp[];
- StageIn_tmp[] = ( StageOut[39..0], B"00000");
- StageOut[] = ( ((( StageIn[38..35], NumeratorIn[56..56]) & selnose[63..63]) # (prestg[39..35] & (! selnose[63..63]))), ((( StageIn[33..30], NumeratorIn[49..49]) & selnose[54..54]) # (prestg[34..30] & (! selnose[54..54]))), ((( StageIn[28..25], NumeratorIn[42..42]) & selnose[45..45]) # (prestg[29..25] & (! selnose[45..45]))), ((( StageIn[23..20], NumeratorIn[35..35]) & selnose[36..36]) # (prestg[24..20] & (! selnose[36..36]))), ((( StageIn[18..15], NumeratorIn[28..28]) & selnose[27..27]) # (prestg[19..15] & (! selnose[27..27]))), ((( StageIn[13..10], NumeratorIn[21..21]) & selnose[18..18]) # (prestg[14..10] & (! selnose[18..18]))), ((( StageIn[8..5], NumeratorIn[14..14]) & selnose[9..9]) # (prestg[9..5] & (! selnose[9..9]))), ((( StageIn[3..0], NumeratorIn[7..7]) & selnose[0..0]) # (prestg[4..0] & (! selnose[0..0]))));
-END;
---VALID FILE
diff --git a/db/altsyncram_dsq1.tdf b/db/altsyncram_dsq1.tdf
deleted file mode 100644
index 72df83f..0000000
--- a/db/altsyncram_dsq1.tdf
+++ /dev/null
@@ -1,300 +0,0 @@
---altsyncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CYCLONEII_M4K_COMPATIBILITY="ON" DEVICE_FAMILY="Cyclone V" INDATA_ACLR_A="NONE" INIT_FILE="db/chip8.ram0_memory_e9e85012.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=4096 NUMWORDS_B=4096 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" WIDTH_A=8 WIDTH_B=8 WIDTHAD_A=12 WIDTHAD_B=12 WRCONTROL_ACLR_A="NONE" address_a address_b clock0 data_a q_b CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
---VERSION_BEGIN 23.1 cbx_altera_syncram_nd_impl 2023:11:29:19:33:06:SC cbx_altsyncram 2023:11:29:19:33:06:SC cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_compare 2023:11:29:19:33:06:SC cbx_lpm_decode 2023:11:29:19:33:06:SC cbx_lpm_mux 2023:11:29:19:33:05:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_stratixiii 2023:11:29:19:33:06:SC cbx_stratixv 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION cyclonev_ram_block (clk0, clk1, clr0, clr1, ena0, ena1, ena2, ena3, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe)
-WITH ( CLK0_CORE_CLOCK_ENABLE, CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_CORE_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ENABLE_ECC, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, mem_init1, mem_init10, mem_init11, mem_init12, mem_init13, mem_init14, mem_init15, mem_init16, mem_init17, mem_init18, mem_init19, mem_init2, mem_init20, mem_init21, mem_init22, mem_init23, mem_init24, mem_init25, mem_init26, mem_init27, mem_init28, mem_init29, mem_init3, mem_init30, mem_init31, mem_init32, mem_init33, mem_init34, mem_init35, mem_init36, mem_init37, mem_init38, mem_init39, mem_init4, mem_init40, mem_init41, mem_init42, mem_init43, mem_init44, mem_init45, mem_init46, mem_init47, mem_init48, mem_init49, mem_init5, mem_init50, mem_init51, mem_init52, mem_init53, mem_init54, mem_init55, mem_init56, mem_init57, mem_init58, mem_init59, mem_init6, mem_init60, mem_init61, mem_init62, mem_init63, mem_init64, mem_init65, mem_init66, mem_init67, mem_init68, mem_init69, mem_init7, mem_init70, mem_init71, mem_init8, mem_init9, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, PORT_A_ADDRESS_CLEAR, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_READ_DURING_WRITE_MODE, PORT_B_ADDRESS_CLEAR, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_CLOCK, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_IN_CLOCK, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_READ_DURING_WRITE_MODE, PORT_B_READ_ENABLE_CLOCK, PORT_B_WRITE_ENABLE_CLOCK, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCSTATUS = 3)
-RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]);
-
---synthesis_resources = M10K 4
-OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION";
-
-SUBDESIGN altsyncram_dsq1
-(
- address_a[11..0] : input;
- address_b[11..0] : input;
- clock0 : input;
- data_a[7..0] : input;
- q_b[7..0] : output;
-)
-VARIABLE
- ram_block1a0 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 0,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 0,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a1 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 1,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 1,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a2 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 2,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 2,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a3 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 3,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 3,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a4 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 4,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 4,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a5 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 5,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 5,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a6 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 6,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 6,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- ram_block1a7 : cyclonev_ram_block
- WITH (
- CLK0_CORE_CLOCK_ENABLE = "none",
- CLK0_INPUT_CLOCK_ENABLE = "none",
- CONNECTIVITY_CHECKING = "OFF",
- INIT_FILE = "db/chip8.ram0_memory_e9e85012.hdl.mif",
- INIT_FILE_LAYOUT = "port_b",
- LOGICAL_RAM_NAME = "ALTSYNCRAM",
- MIXED_PORT_FEED_THROUGH_MODE = "old",
- OPERATION_MODE = "dual_port",
- PORT_A_ADDRESS_WIDTH = 12,
- PORT_A_DATA_WIDTH = 1,
- PORT_A_FIRST_ADDRESS = 0,
- PORT_A_FIRST_BIT_NUMBER = 7,
- PORT_A_LAST_ADDRESS = 4095,
- PORT_A_LOGICAL_RAM_DEPTH = 4096,
- PORT_A_LOGICAL_RAM_WIDTH = 8,
- PORT_B_ADDRESS_CLEAR = "none",
- PORT_B_ADDRESS_CLOCK = "clock0",
- PORT_B_ADDRESS_WIDTH = 12,
- PORT_B_DATA_OUT_CLEAR = "none",
- PORT_B_DATA_WIDTH = 1,
- PORT_B_FIRST_ADDRESS = 0,
- PORT_B_FIRST_BIT_NUMBER = 7,
- PORT_B_LAST_ADDRESS = 4095,
- PORT_B_LOGICAL_RAM_DEPTH = 4096,
- PORT_B_LOGICAL_RAM_WIDTH = 8,
- PORT_B_READ_ENABLE_CLOCK = "clock0",
- RAM_BLOCK_TYPE = "AUTO"
- );
- address_a_wire[11..0] : WIRE;
- address_b_wire[11..0] : WIRE;
- wren_a : NODE;
-
-BEGIN
- ram_block1a[7..0].clk0 = clock0;
- ram_block1a[7..0].portaaddr[] = ( address_a_wire[11..0]);
- ram_block1a[0].portadatain[] = ( data_a[0..0]);
- ram_block1a[1].portadatain[] = ( data_a[1..1]);
- ram_block1a[2].portadatain[] = ( data_a[2..2]);
- ram_block1a[3].portadatain[] = ( data_a[3..3]);
- ram_block1a[4].portadatain[] = ( data_a[4..4]);
- ram_block1a[5].portadatain[] = ( data_a[5..5]);
- ram_block1a[6].portadatain[] = ( data_a[6..6]);
- ram_block1a[7].portadatain[] = ( data_a[7..7]);
- ram_block1a[7..0].portawe = wren_a;
- ram_block1a[7..0].portbaddr[] = ( address_b_wire[11..0]);
- ram_block1a[7..0].portbre = B"11111111";
- address_a_wire[] = address_a[];
- address_b_wire[] = address_b[];
- q_b[] = ( ram_block1a[7..0].portbdataout[0..0]);
- wren_a = GND;
-END;
---VALID FILE
diff --git a/db/chip8.(0).cnf.cdb b/db/chip8.(0).cnf.cdb
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diff --git a/db/chip8.(8).cnf.cdb b/db/chip8.(8).cnf.cdb
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diff --git a/db/chip8.(9).cnf.hdb b/db/chip8.(9).cnf.hdb
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index fa2f585..0000000
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diff --git a/db/chip8.ace_cmp.bpm b/db/chip8.ace_cmp.bpm
deleted file mode 100644
index 7906c4c..0000000
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diff --git a/db/chip8.ace_cmp.cdb b/db/chip8.ace_cmp.cdb
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index 631d3a8..0000000
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diff --git a/db/chip8.ace_cmp.hdb b/db/chip8.ace_cmp.hdb
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index a7c3b6a..0000000
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diff --git a/db/chip8.asm.qmsg b/db/chip8.asm.qmsg
deleted file mode 100644
index dbc681b..0000000
--- a/db/chip8.asm.qmsg
+++ /dev/null
@@ -1,6 +0,0 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1712584339260 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition " "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1712584339260 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 8 08:52:19 2024 " "Processing started: Mon Apr 8 08:52:19 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1712584339260 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1712584339260 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off chip8 -c chip8 " "Command: quartus_asm --read_settings_files=off --write_settings_files=off chip8 -c chip8" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1712584339260 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1712584340042 ""}
-{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1712584345507 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1 Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "628 " "Peak virtual memory: 628 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1712584345784 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 8 08:52:25 2024 " "Processing ended: Mon Apr 8 08:52:25 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1712584345784 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Elapsed time: 00:00:06" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1712584345784 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:07 " "Total CPU time (on all processors): 00:00:07" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1712584345784 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1712584345784 ""}
diff --git a/db/chip8.asm.rdb b/db/chip8.asm.rdb
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index a1f58f6..0000000
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diff --git a/db/chip8.cbx.xml b/db/chip8.cbx.xml
deleted file mode 100644
index d58838d..0000000
--- a/db/chip8.cbx.xml
+++ /dev/null
@@ -1,5 +0,0 @@
-
-
-
-
-
diff --git a/db/chip8.cmp.bpm b/db/chip8.cmp.bpm
deleted file mode 100644
index 3dfa27c..0000000
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diff --git a/db/chip8.cmp.cdb b/db/chip8.cmp.cdb
deleted file mode 100644
index dc9bc62..0000000
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diff --git a/db/chip8.cmp.hdb b/db/chip8.cmp.hdb
deleted file mode 100644
index 5529edf..0000000
Binary files a/db/chip8.cmp.hdb and /dev/null differ
diff --git a/db/chip8.cmp.idb b/db/chip8.cmp.idb
deleted file mode 100644
index 7d52da9..0000000
Binary files a/db/chip8.cmp.idb and /dev/null differ
diff --git a/db/chip8.cmp.logdb b/db/chip8.cmp.logdb
deleted file mode 100644
index 24dafab..0000000
--- a/db/chip8.cmp.logdb
+++ /dev/null
@@ -1,50 +0,0 @@
-v1
-IO_RULES,NUM_CLKS_NOT_EXCEED_CLKS_AVAILABLE,INAPPLICABLE,IO_000002,Capacity Checks,Number of clocks in an I/O bank should not exceed the number of clocks available.,Critical,No Global Signal assignments found.,,I/O,,
-IO_RULES,NUM_PINS_NOT_EXCEED_LOC_AVAILABLE,PASS,IO_000001,Capacity Checks,Number of pins in an I/O bank should not exceed the number of locations available.,Critical,0 such failures found.,,I/O,,
-IO_RULES,NUM_VREF_NOT_EXCEED_LOC_AVAILABLE,PASS,IO_000003,Capacity Checks,Number of pins in a Vrefgroup should not exceed the number of locations available.,Critical,0 such failures found.,,I/O,,
-IO_RULES,IO_BANK_SUPPORT_VCCIO,INAPPLICABLE,IO_000004,Voltage Compatibility Checks,The I/O bank should support the requested VCCIO.,Critical,No IOBANK_VCCIO assignments found.,,I/O,,
-IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VREF,INAPPLICABLE,IO_000005,Voltage Compatibility Checks,The I/O bank should not have competing VREF values.,Critical,No VREF I/O Standard assignments found.,,I/O,,
-IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VCCIO,PASS,IO_000006,Voltage Compatibility Checks,The I/O bank should not have competing VCCIO values.,Critical,0 such failures found.,,I/O,,
-IO_RULES,CHECK_UNAVAILABLE_LOC,PASS,IO_000007,Valid Location Checks,Checks for unavailable locations.,Critical,0 such failures found.,,I/O,,
-IO_RULES,CHECK_RESERVED_LOC,INAPPLICABLE,IO_000008,Valid Location Checks,Checks for reserved locations.,Critical,No reserved LogicLock region found.,,I/O,,
-IO_RULES,OCT_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000047,I/O Properties Checks for One I/O,On Chip Termination and Slew Rate should not be used at the same time.,Critical,No Slew Rate assignments found.,,I/O,,
-IO_RULES,LOC_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000046,I/O Properties Checks for One I/O,The location should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
-IO_RULES,IO_STD_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000045,I/O Properties Checks for One I/O,The I/O standard should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
-IO_RULES,WEAK_PULL_UP_AND_BUS_HOLD_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000027,I/O Properties Checks for One I/O,Weak Pull Up and Bus Hold should not be used at the same time.,Critical,No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found.,,I/O,,
-IO_RULES,OCT_AND_CURRENT_STRENGTH_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000026,I/O Properties Checks for One I/O,On Chip Termination and Current Strength should not be used at the same time.,Critical,No Current Strength assignments found.,,I/O,,
-IO_RULES,IO_DIR_SUPPORT_OCT_VALUE,PASS,IO_000024,I/O Properties Checks for One I/O,The I/O direction should support the On Chip Termination value.,Critical,0 such failures found.,,I/O,,
-IO_RULES,IO_STD_SUPPORT_OPEN_DRAIN_VALUE,INAPPLICABLE,IO_000023,I/O Properties Checks for One I/O,The I/O standard should support the Open Drain value.,Critical,No open drain assignments found.,,I/O,,
-IO_RULES,IO_STD_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000022,I/O Properties Checks for One I/O,The I/O standard should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
-IO_RULES,IO_STD_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000021,I/O Properties Checks for One I/O,The I/O standard should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
-IO_RULES,IO_STD_SUPPORT_PCI_CLAMP_DIODE,INAPPLICABLE,IO_000020,I/O Properties Checks for One I/O,The I/O standard should support the requested PCI Clamp Diode.,Critical,No Clamping Diode assignments found.,,I/O,,
-IO_RULES,IO_STD_SUPPORT_OCT_VALUE,PASS,IO_000019,I/O Properties Checks for One I/O,The I/O standard should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
-IO_RULES,IO_STD_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000018,I/O Properties Checks for One I/O,The I/O standard should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
-IO_RULES,LOC_SUPPORT_PCI_CLAMP_DIODE,INAPPLICABLE,IO_000015,I/O Properties Checks for One I/O,The location should support the requested PCI Clamp Diode.,Critical,No Clamping Diode assignments found.,,I/O,,
-IO_RULES,LOC_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000014,I/O Properties Checks for One I/O,The location should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
-IO_RULES,LOC_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000013,I/O Properties Checks for One I/O,The location should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
-IO_RULES,LOC_SUPPORT_OCT_VALUE,PASS,IO_000012,I/O Properties Checks for One I/O,The location should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
-IO_RULES,LOC_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000011,I/O Properties Checks for One I/O,The location should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
-IO_RULES,LOC_SUPPORT_IO_DIR,PASS,IO_000010,I/O Properties Checks for One I/O,The location should support the requested I/O direction.,Critical,0 such failures found.,,I/O,,
-IO_RULES,LOC_SUPPORT_IO_STD,PASS,IO_000009,I/O Properties Checks for One I/O,The location should support the requested I/O standard.,Critical,0 such failures found.,,I/O,,
-IO_RULES,SINGLE_ENDED_OUTPUTS_LAB_ROWS_FROM_DIFF_IO,INAPPLICABLE,IO_000034,SI Related Distance Checks,Single-ended outputs should be 0 LAB row(s) away from a differential I/O.,High,No Differential I/O Standard assignments found.,,I/O,,
-IO_RULES,DEV_IO_RULE_OCT_DISCLAIMER,,,,,,,,,,
-IO_RULES_MATRIX,Pin/Rules,IO_000002;IO_000001;IO_000003;IO_000004;IO_000005;IO_000006;IO_000007;IO_000008;IO_000047;IO_000046;IO_000045;IO_000027;IO_000026;IO_000024;IO_000023;IO_000022;IO_000021;IO_000020;IO_000019;IO_000018;IO_000015;IO_000014;IO_000013;IO_000012;IO_000011;IO_000010;IO_000009;IO_000034,
-IO_RULES_MATRIX,Total Pass,0;10;10;0;0;10;10;0;0;0;0;0;0;1;0;0;0;0;1;0;0;0;0;1;0;10;10;0,
-IO_RULES_MATRIX,Total Unchecked,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
-IO_RULES_MATRIX,Total Inapplicable,10;0;0;10;10;0;0;10;10;10;10;10;10;9;10;10;10;10;9;10;10;10;10;9;10;0;0;10,
-IO_RULES_MATRIX,Total Fail,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
-IO_RULES_MATRIX,lcd_clk,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,lcd_data,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,led[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,led[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,led[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,led[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,led[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,led[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,rst_in,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,fpga_clk,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_SUMMARY,Total I/O Rules,28,
-IO_RULES_SUMMARY,Number of I/O Rules Passed,9,
-IO_RULES_SUMMARY,Number of I/O Rules Failed,0,
-IO_RULES_SUMMARY,Number of I/O Rules Unchecked,0,
-IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,19,
diff --git a/db/chip8.cmp.rdb b/db/chip8.cmp.rdb
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diff --git a/db/chip8.db_info b/db/chip8.db_info
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@@ -1,3 +0,0 @@
-Quartus_Version = Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-Version_Index = 570679040
-Creation_Time = Sun Apr 7 23:44:47 2024
diff --git a/db/chip8.eco.cdb b/db/chip8.eco.cdb
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diff --git a/db/chip8.fit.qmsg b/db/chip8.fit.qmsg
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@@ -1,47 +0,0 @@
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1712584068646 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1712584068647 ""}
-{ "Info" "IMPP_MPP_USER_DEVICE" "chip8 5CSEBA6U23I7 " "Selected device 5CSEBA6U23I7 for design \"chip8\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1712584068695 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature -40 degrees C " "Low junction temperature is -40 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1712584068718 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 100 degrees C " "High junction temperature is 100 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1712584068719 ""}
-{ "Warning" "WMPP_MPP_RAM_IS_ACTUALLY_ROM_TOP" "" "Found RAM instances implemented as ROM because the write logic is disabled. One instance is listed below as an example." { { "Info" "IMPP_MPP_RAM_IS_ACTUALLY_ROM_SUB" "memory:mem\|altsyncram:mem_rtl_0\|altsyncram_dsq1:auto_generated\|ram_block1a4 " "Atom \"memory:mem\|altsyncram:mem_rtl_0\|altsyncram_dsq1:auto_generated\|ram_block1a4\" is instantiated as RAM, but it is actually implemented as ROM function because the write logic is always disabled" { } { } 0 119043 "Atom \"%1!s!\" is instantiated as RAM, but it is actually implemented as ROM function because the write logic is always disabled" 0 0 "Design Software" 0 -1 1712584068781 "|chip8|memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated|ram_block1a4"} } { } 0 18550 "Found RAM instances implemented as ROM because the write logic is disabled. One instance is listed below as an example." 0 0 "Fitter" 0 -1 1712584068781 ""}
-{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1712584069129 ""}
-{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1712584069151 ""}
-{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1712584069410 ""}
-{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1712584069535 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" { } { } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1712584076794 ""}
-{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "2 s (2 global) " "Automatically promoted 2 clocks (2 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "downclocker:dc\|clk_out~CLKENA0 8651 global CLKCTRL_G2 " "downclocker:dc\|clk_out~CLKENA0 with 8651 fanout uses global clock CLKCTRL_G2" { { "Info" "ICCLK_UNLOCKED_FOR_VPR" "" "This signal is driven by core routing -- it may be moved during placement to reduce routing delays" { } { } 0 12525 "This signal is driven by core routing -- it may be moved during placement to reduce routing delays" 0 0 "Design Software" 0 -1 1712584077135 ""} } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1712584077135 ""} { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "fpga_clk~inputCLKENA0 19 global CLKCTRL_G5 " "fpga_clk~inputCLKENA0 with 19 fanout uses global clock CLKCTRL_G5" { } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1712584077135 ""} } { } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1712584077135 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" { } { } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1712584077136 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1712584077211 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1712584077246 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1712584077302 ""}
-{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1712584077356 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1712584077356 ""}
-{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" { } { } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1712584077382 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "chip8.sdc " "Synopsys Design Constraints File file not found: 'chip8.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1712584078336 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1712584078336 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1712584078556 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1712584078557 ""}
-{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1712584078562 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" { } { } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1712584079519 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1712584079542 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1712584079542 ""}
-{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "lcd_cs " "Node \"lcd_cs\" is assigned to location or region, but does not exist in design" { } { { "/opt/intelFPGA/23.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/opt/intelFPGA/23.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "lcd_cs" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1712584079755 ""} } { } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1712584079755 ""}
-{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:10 " "Fitter preparation operations ending: elapsed time is 00:00:10" { } { } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1712584079756 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1712584082588 ""}
-{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." { } { } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1712584084069 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:39 " "Fitter placement preparation operations ending: elapsed time is 00:00:39" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1712584121786 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1712584149944 ""}
-{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1712584168529 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:19 " "Fitter placement operations ending: elapsed time is 00:00:19" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1712584168529 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1712584170647 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "12 " "Router estimated average interconnect usage is 12% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "58 X22_Y11 X32_Y22 " "Router estimated peak interconnect usage is 58% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22" { } { { "loc" "" { Generic "/home/nickorlow/programming/school/warminster/yayacemu/" { { 1 { 0 "Router estimated peak interconnect usage is 58% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22"} { { 12 { 0 ""} 22 11 11 12 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1712584194284 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1712584194284 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1712584298166 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1712584298166 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:02:05 " "Fitter routing operations ending: elapsed time is 00:02:05" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1712584298172 ""}
-{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 36.34 " "Total time spent on timing analysis during the Fitter is 36.34 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1712584310458 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1712584310576 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1712584314203 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1712584314216 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1712584318324 ""}
-{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:23 " "Fitter post-fit operations ending: elapsed time is 00:00:23" { } { } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1712584333182 ""}
-{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1712584333786 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.fit.smsg " "Generated suppressed messages file /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1712584334741 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 8 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2824 " "Peak virtual memory: 2824 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1712584338184 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 8 08:52:18 2024 " "Processing ended: Mon Apr 8 08:52:18 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1712584338184 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:04:30 " "Elapsed time: 00:04:30" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1712584338184 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:11:39 " "Total CPU time (on all processors): 00:11:39" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1712584338184 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1712584338184 ""}
diff --git a/db/chip8.hier_info b/db/chip8.hier_info
deleted file mode 100644
index 7c38e41..0000000
--- a/db/chip8.hier_info
+++ /dev/null
@@ -1,25868 +0,0 @@
-|chip8
-fpga_clk => fpga_clk.IN2
-rst_in => ~NO_FANOUT~
-lcd_clk << cpu:cpu.port8
-lcd_data << cpu:cpu.port9
-led[0] << cpu:cpu.port10
-led[1] << cpu:cpu.port10
-led[2] << cpu:cpu.port10
-led[3] << cpu:cpu.port10
-led[4] << cpu:cpu.port10
-led[5] << cpu:cpu.port10
-
-
-|chip8|downclocker:dc
-clk_in => counter[0].CLK
-clk_in => counter[1].CLK
-clk_in => counter[2].CLK
-clk_in => counter[3].CLK
-clk_in => counter[4].CLK
-clk_in => counter[5].CLK
-clk_in => counter[6].CLK
-clk_in => counter[7].CLK
-clk_in => counter[8].CLK
-clk_in => counter[9].CLK
-clk_in => clk_out~reg0.CLK
-clk_out <= clk_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
-
-
-|chip8|memory:mem
-clk_in => mem.we_a.CLK
-clk_in => mem.waddr_a[11].CLK
-clk_in => mem.waddr_a[10].CLK
-clk_in => mem.waddr_a[9].CLK
-clk_in => mem.waddr_a[8].CLK
-clk_in => mem.waddr_a[7].CLK
-clk_in => mem.waddr_a[6].CLK
-clk_in => mem.waddr_a[5].CLK
-clk_in => mem.waddr_a[4].CLK
-clk_in => mem.waddr_a[3].CLK
-clk_in => mem.waddr_a[2].CLK
-clk_in => mem.waddr_a[1].CLK
-clk_in => mem.waddr_a[0].CLK
-clk_in => mem.data_a[7].CLK
-clk_in => mem.data_a[6].CLK
-clk_in => mem.data_a[5].CLK
-clk_in => mem.data_a[4].CLK
-clk_in => mem.data_a[3].CLK
-clk_in => mem.data_a[2].CLK
-clk_in => mem.data_a[1].CLK
-clk_in => mem.data_a[0].CLK
-clk_in => data_out[0]~reg0.CLK
-clk_in => data_out[1]~reg0.CLK
-clk_in => data_out[2]~reg0.CLK
-clk_in => data_out[3]~reg0.CLK
-clk_in => data_out[4]~reg0.CLK
-clk_in => data_out[5]~reg0.CLK
-clk_in => data_out[6]~reg0.CLK
-clk_in => data_out[7]~reg0.CLK
-clk_in => mem.CLK0
-do_write => mem.we_a.DATAIN
-do_write => mem.WE
-write_address[0] => mem.waddr_a[0].DATAIN
-write_address[0] => mem.WADDR
-write_address[1] => mem.waddr_a[1].DATAIN
-write_address[1] => mem.WADDR1
-write_address[2] => mem.waddr_a[2].DATAIN
-write_address[2] => mem.WADDR2
-write_address[3] => mem.waddr_a[3].DATAIN
-write_address[3] => mem.WADDR3
-write_address[4] => mem.waddr_a[4].DATAIN
-write_address[4] => mem.WADDR4
-write_address[5] => mem.waddr_a[5].DATAIN
-write_address[5] => mem.WADDR5
-write_address[6] => mem.waddr_a[6].DATAIN
-write_address[6] => mem.WADDR6
-write_address[7] => mem.waddr_a[7].DATAIN
-write_address[7] => mem.WADDR7
-write_address[8] => mem.waddr_a[8].DATAIN
-write_address[8] => mem.WADDR8
-write_address[9] => mem.waddr_a[9].DATAIN
-write_address[9] => mem.WADDR9
-write_address[10] => mem.waddr_a[10].DATAIN
-write_address[10] => mem.WADDR10
-write_address[11] => mem.waddr_a[11].DATAIN
-write_address[11] => mem.WADDR11
-data_in[0] => mem.data_a[0].DATAIN
-data_in[0] => mem.DATAIN
-data_in[1] => mem.data_a[1].DATAIN
-data_in[1] => mem.DATAIN1
-data_in[2] => mem.data_a[2].DATAIN
-data_in[2] => mem.DATAIN2
-data_in[3] => mem.data_a[3].DATAIN
-data_in[3] => mem.DATAIN3
-data_in[4] => mem.data_a[4].DATAIN
-data_in[4] => mem.DATAIN4
-data_in[5] => mem.data_a[5].DATAIN
-data_in[5] => mem.DATAIN5
-data_in[6] => mem.data_a[6].DATAIN
-data_in[6] => mem.DATAIN6
-data_in[7] => mem.data_a[7].DATAIN
-data_in[7] => mem.DATAIN7
-read_address[0] => mem.RADDR
-read_address[1] => mem.RADDR1
-read_address[2] => mem.RADDR2
-read_address[3] => mem.RADDR3
-read_address[4] => mem.RADDR4
-read_address[5] => mem.RADDR5
-read_address[6] => mem.RADDR6
-read_address[7] => mem.RADDR7
-read_address[8] => mem.RADDR8
-read_address[9] => mem.RADDR9
-read_address[10] => mem.RADDR10
-read_address[11] => mem.RADDR11
-data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[1] <= data_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[2] <= data_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[3] <= data_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[4] <= data_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[5] <= data_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[6] <= data_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-data_out[7] <= data_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-
-
-|chip8|cpu:cpu
-clk_in => alu:alu.clk_in
-clk_in => cycle_counter[0]~reg0.CLK
-clk_in => cycle_counter[1]~reg0.CLK
-clk_in => cycle_counter[2]~reg0.CLK
-clk_in => cycle_counter[3]~reg0.CLK
-clk_in => cycle_counter[4]~reg0.CLK
-clk_in => cycle_counter[5]~reg0.CLK
-clk_in => cycle_counter[6]~reg0.CLK
-clk_in => cycle_counter[7]~reg0.CLK
-clk_in => cycle_counter[8]~reg0.CLK
-clk_in => cycle_counter[9]~reg0.CLK
-clk_in => cycle_counter[10]~reg0.CLK
-clk_in => cycle_counter[11]~reg0.CLK
-clk_in => cycle_counter[12]~reg0.CLK
-clk_in => cycle_counter[13]~reg0.CLK
-clk_in => cycle_counter[14]~reg0.CLK
-clk_in => cycle_counter[15]~reg0.CLK
-clk_in => cycle_counter[16]~reg0.CLK
-clk_in => cycle_counter[17]~reg0.CLK
-clk_in => cycle_counter[18]~reg0.CLK
-clk_in => cycle_counter[19]~reg0.CLK
-clk_in => cycle_counter[20]~reg0.CLK
-clk_in => cycle_counter[21]~reg0.CLK
-clk_in => cycle_counter[22]~reg0.CLK
-clk_in => cycle_counter[23]~reg0.CLK
-clk_in => cycle_counter[24]~reg0.CLK
-clk_in => cycle_counter[25]~reg0.CLK
-clk_in => cycle_counter[26]~reg0.CLK
-clk_in => cycle_counter[27]~reg0.CLK
-clk_in => cycle_counter[28]~reg0.CLK
-clk_in => cycle_counter[29]~reg0.CLK
-clk_in => cycle_counter[30]~reg0.CLK
-clk_in => cycle_counter[31]~reg0.CLK
-clk_in => index_reg[0].CLK
-clk_in => index_reg[1].CLK
-clk_in => index_reg[2].CLK
-clk_in => index_reg[3].CLK
-clk_in => index_reg[4].CLK
-clk_in => index_reg[5].CLK
-clk_in => index_reg[6].CLK
-clk_in => index_reg[7].CLK
-clk_in => index_reg[8].CLK
-clk_in => index_reg[9].CLK
-clk_in => index_reg[10].CLK
-clk_in => index_reg[11].CLK
-clk_in => wr_go~reg0.CLK
-clk_in => wr_memory_data[0]~reg0.CLK
-clk_in => wr_memory_data[1]~reg0.CLK
-clk_in => wr_memory_data[2]~reg0.CLK
-clk_in => wr_memory_data[3]~reg0.CLK
-clk_in => wr_memory_data[4]~reg0.CLK
-clk_in => wr_memory_data[5]~reg0.CLK
-clk_in => wr_memory_data[6]~reg0.CLK
-clk_in => wr_memory_data[7]~reg0.CLK
-clk_in => wr_memory_address[0]~reg0.CLK
-clk_in => wr_memory_address[1]~reg0.CLK
-clk_in => wr_memory_address[2]~reg0.CLK
-clk_in => wr_memory_address[3]~reg0.CLK
-clk_in => wr_memory_address[4]~reg0.CLK
-clk_in => wr_memory_address[5]~reg0.CLK
-clk_in => wr_memory_address[6]~reg0.CLK
-clk_in => wr_memory_address[7]~reg0.CLK
-clk_in => wr_memory_address[8]~reg0.CLK
-clk_in => wr_memory_address[9]~reg0.CLK
-clk_in => wr_memory_address[10]~reg0.CLK
-clk_in => wr_memory_address[11]~reg0.CLK
-clk_in => alu_rst.CLK
-clk_in => vram[1023][0].CLK
-clk_in => vram[1023][1].CLK
-clk_in => vram[1023][2].CLK
-clk_in => vram[1023][3].CLK
-clk_in => vram[1023][4].CLK
-clk_in => vram[1023][5].CLK
-clk_in => vram[1023][6].CLK
-clk_in => vram[1023][7].CLK
-clk_in => vram[1022][0].CLK
-clk_in => vram[1022][1].CLK
-clk_in => vram[1022][2].CLK
-clk_in => vram[1022][3].CLK
-clk_in => vram[1022][4].CLK
-clk_in => vram[1022][5].CLK
-clk_in => vram[1022][6].CLK
-clk_in => vram[1022][7].CLK
-clk_in => vram[1021][0].CLK
-clk_in => vram[1021][1].CLK
-clk_in => vram[1021][2].CLK
-clk_in => vram[1021][3].CLK
-clk_in => vram[1021][4].CLK
-clk_in => vram[1021][5].CLK
-clk_in => vram[1021][6].CLK
-clk_in => vram[1021][7].CLK
-clk_in => vram[1020][0].CLK
-clk_in => vram[1020][1].CLK
-clk_in => vram[1020][2].CLK
-clk_in => vram[1020][3].CLK
-clk_in => vram[1020][4].CLK
-clk_in => vram[1020][5].CLK
-clk_in => vram[1020][6].CLK
-clk_in => vram[1020][7].CLK
-clk_in => vram[1019][0].CLK
-clk_in => vram[1019][1].CLK
-clk_in => vram[1019][2].CLK
-clk_in => vram[1019][3].CLK
-clk_in => vram[1019][4].CLK
-clk_in => vram[1019][5].CLK
-clk_in => vram[1019][6].CLK
-clk_in => vram[1019][7].CLK
-clk_in => vram[1018][0].CLK
-clk_in => vram[1018][1].CLK
-clk_in => vram[1018][2].CLK
-clk_in => vram[1018][3].CLK
-clk_in => vram[1018][4].CLK
-clk_in => vram[1018][5].CLK
-clk_in => vram[1018][6].CLK
-clk_in => vram[1018][7].CLK
-clk_in => vram[1017][0].CLK
-clk_in => vram[1017][1].CLK
-clk_in => vram[1017][2].CLK
-clk_in => vram[1017][3].CLK
-clk_in => vram[1017][4].CLK
-clk_in => vram[1017][5].CLK
-clk_in => vram[1017][6].CLK
-clk_in => vram[1017][7].CLK
-clk_in => vram[1016][0].CLK
-clk_in => vram[1016][1].CLK
-clk_in => vram[1016][2].CLK
-clk_in => vram[1016][3].CLK
-clk_in => vram[1016][4].CLK
-clk_in => vram[1016][5].CLK
-clk_in => vram[1016][6].CLK
-clk_in => vram[1016][7].CLK
-clk_in => vram[1015][0].CLK
-clk_in => vram[1015][1].CLK
-clk_in => vram[1015][2].CLK
-clk_in => vram[1015][3].CLK
-clk_in => vram[1015][4].CLK
-clk_in => vram[1015][5].CLK
-clk_in => vram[1015][6].CLK
-clk_in => vram[1015][7].CLK
-clk_in => vram[1014][0].CLK
-clk_in => vram[1014][1].CLK
-clk_in => vram[1014][2].CLK
-clk_in => vram[1014][3].CLK
-clk_in => vram[1014][4].CLK
-clk_in => vram[1014][5].CLK
-clk_in => vram[1014][6].CLK
-clk_in => vram[1014][7].CLK
-clk_in => vram[1013][0].CLK
-clk_in => vram[1013][1].CLK
-clk_in => vram[1013][2].CLK
-clk_in => vram[1013][3].CLK
-clk_in => vram[1013][4].CLK
-clk_in => vram[1013][5].CLK
-clk_in => vram[1013][6].CLK
-clk_in => vram[1013][7].CLK
-clk_in => vram[1012][0].CLK
-clk_in => vram[1012][1].CLK
-clk_in => vram[1012][2].CLK
-clk_in => vram[1012][3].CLK
-clk_in => vram[1012][4].CLK
-clk_in => vram[1012][5].CLK
-clk_in => vram[1012][6].CLK
-clk_in => vram[1012][7].CLK
-clk_in => vram[1011][0].CLK
-clk_in => vram[1011][1].CLK
-clk_in => vram[1011][2].CLK
-clk_in => vram[1011][3].CLK
-clk_in => vram[1011][4].CLK
-clk_in => vram[1011][5].CLK
-clk_in => vram[1011][6].CLK
-clk_in => vram[1011][7].CLK
-clk_in => vram[1010][0].CLK
-clk_in => vram[1010][1].CLK
-clk_in => vram[1010][2].CLK
-clk_in => vram[1010][3].CLK
-clk_in => vram[1010][4].CLK
-clk_in => vram[1010][5].CLK
-clk_in => vram[1010][6].CLK
-clk_in => vram[1010][7].CLK
-clk_in => vram[1009][0].CLK
-clk_in => vram[1009][1].CLK
-clk_in => vram[1009][2].CLK
-clk_in => vram[1009][3].CLK
-clk_in => vram[1009][4].CLK
-clk_in => vram[1009][5].CLK
-clk_in => vram[1009][6].CLK
-clk_in => vram[1009][7].CLK
-clk_in => vram[1008][0].CLK
-clk_in => vram[1008][1].CLK
-clk_in => vram[1008][2].CLK
-clk_in => vram[1008][3].CLK
-clk_in => vram[1008][4].CLK
-clk_in => vram[1008][5].CLK
-clk_in => vram[1008][6].CLK
-clk_in => vram[1008][7].CLK
-clk_in => vram[1007][0].CLK
-clk_in => vram[1007][1].CLK
-clk_in => vram[1007][2].CLK
-clk_in => vram[1007][3].CLK
-clk_in => vram[1007][4].CLK
-clk_in => vram[1007][5].CLK
-clk_in => vram[1007][6].CLK
-clk_in => vram[1007][7].CLK
-clk_in => vram[1006][0].CLK
-clk_in => vram[1006][1].CLK
-clk_in => vram[1006][2].CLK
-clk_in => vram[1006][3].CLK
-clk_in => vram[1006][4].CLK
-clk_in => vram[1006][5].CLK
-clk_in => vram[1006][6].CLK
-clk_in => vram[1006][7].CLK
-clk_in => vram[1005][0].CLK
-clk_in => vram[1005][1].CLK
-clk_in => vram[1005][2].CLK
-clk_in => vram[1005][3].CLK
-clk_in => vram[1005][4].CLK
-clk_in => vram[1005][5].CLK
-clk_in => vram[1005][6].CLK
-clk_in => vram[1005][7].CLK
-clk_in => vram[1004][0].CLK
-clk_in => vram[1004][1].CLK
-clk_in => vram[1004][2].CLK
-clk_in => vram[1004][3].CLK
-clk_in => vram[1004][4].CLK
-clk_in => vram[1004][5].CLK
-clk_in => vram[1004][6].CLK
-clk_in => vram[1004][7].CLK
-clk_in => vram[1003][0].CLK
-clk_in => vram[1003][1].CLK
-clk_in => vram[1003][2].CLK
-clk_in => vram[1003][3].CLK
-clk_in => vram[1003][4].CLK
-clk_in => vram[1003][5].CLK
-clk_in => vram[1003][6].CLK
-clk_in => vram[1003][7].CLK
-clk_in => vram[1002][0].CLK
-clk_in => vram[1002][1].CLK
-clk_in => vram[1002][2].CLK
-clk_in => vram[1002][3].CLK
-clk_in => vram[1002][4].CLK
-clk_in => vram[1002][5].CLK
-clk_in => vram[1002][6].CLK
-clk_in => vram[1002][7].CLK
-clk_in => vram[1001][0].CLK
-clk_in => vram[1001][1].CLK
-clk_in => vram[1001][2].CLK
-clk_in => vram[1001][3].CLK
-clk_in => vram[1001][4].CLK
-clk_in => vram[1001][5].CLK
-clk_in => vram[1001][6].CLK
-clk_in => vram[1001][7].CLK
-clk_in => vram[1000][0].CLK
-clk_in => vram[1000][1].CLK
-clk_in => vram[1000][2].CLK
-clk_in => vram[1000][3].CLK
-clk_in => vram[1000][4].CLK
-clk_in => vram[1000][5].CLK
-clk_in => vram[1000][6].CLK
-clk_in => vram[1000][7].CLK
-clk_in => vram[999][0].CLK
-clk_in => vram[999][1].CLK
-clk_in => vram[999][2].CLK
-clk_in => vram[999][3].CLK
-clk_in => vram[999][4].CLK
-clk_in => vram[999][5].CLK
-clk_in => vram[999][6].CLK
-clk_in => vram[999][7].CLK
-clk_in => vram[998][0].CLK
-clk_in => vram[998][1].CLK
-clk_in => vram[998][2].CLK
-clk_in => vram[998][3].CLK
-clk_in => vram[998][4].CLK
-clk_in => vram[998][5].CLK
-clk_in => vram[998][6].CLK
-clk_in => vram[998][7].CLK
-clk_in => vram[997][0].CLK
-clk_in => vram[997][1].CLK
-clk_in => vram[997][2].CLK
-clk_in => vram[997][3].CLK
-clk_in => vram[997][4].CLK
-clk_in => vram[997][5].CLK
-clk_in => vram[997][6].CLK
-clk_in => vram[997][7].CLK
-clk_in => vram[996][0].CLK
-clk_in => vram[996][1].CLK
-clk_in => vram[996][2].CLK
-clk_in => vram[996][3].CLK
-clk_in => vram[996][4].CLK
-clk_in => vram[996][5].CLK
-clk_in => vram[996][6].CLK
-clk_in => vram[996][7].CLK
-clk_in => vram[995][0].CLK
-clk_in => vram[995][1].CLK
-clk_in => vram[995][2].CLK
-clk_in => vram[995][3].CLK
-clk_in => vram[995][4].CLK
-clk_in => vram[995][5].CLK
-clk_in => vram[995][6].CLK
-clk_in => vram[995][7].CLK
-clk_in => vram[994][0].CLK
-clk_in => vram[994][1].CLK
-clk_in => vram[994][2].CLK
-clk_in => vram[994][3].CLK
-clk_in => vram[994][4].CLK
-clk_in => vram[994][5].CLK
-clk_in => vram[994][6].CLK
-clk_in => vram[994][7].CLK
-clk_in => vram[993][0].CLK
-clk_in => vram[993][1].CLK
-clk_in => vram[993][2].CLK
-clk_in => vram[993][3].CLK
-clk_in => vram[993][4].CLK
-clk_in => vram[993][5].CLK
-clk_in => vram[993][6].CLK
-clk_in => vram[993][7].CLK
-clk_in => vram[992][0].CLK
-clk_in => vram[992][1].CLK
-clk_in => vram[992][2].CLK
-clk_in => vram[992][3].CLK
-clk_in => vram[992][4].CLK
-clk_in => vram[992][5].CLK
-clk_in => vram[992][6].CLK
-clk_in => vram[992][7].CLK
-clk_in => vram[991][0].CLK
-clk_in => vram[991][1].CLK
-clk_in => vram[991][2].CLK
-clk_in => vram[991][3].CLK
-clk_in => vram[991][4].CLK
-clk_in => vram[991][5].CLK
-clk_in => vram[991][6].CLK
-clk_in => vram[991][7].CLK
-clk_in => vram[990][0].CLK
-clk_in => vram[990][1].CLK
-clk_in => vram[990][2].CLK
-clk_in => vram[990][3].CLK
-clk_in => vram[990][4].CLK
-clk_in => vram[990][5].CLK
-clk_in => vram[990][6].CLK
-clk_in => vram[990][7].CLK
-clk_in => vram[989][0].CLK
-clk_in => vram[989][1].CLK
-clk_in => vram[989][2].CLK
-clk_in => vram[989][3].CLK
-clk_in => vram[989][4].CLK
-clk_in => vram[989][5].CLK
-clk_in => vram[989][6].CLK
-clk_in => vram[989][7].CLK
-clk_in => vram[988][0].CLK
-clk_in => vram[988][1].CLK
-clk_in => vram[988][2].CLK
-clk_in => vram[988][3].CLK
-clk_in => vram[988][4].CLK
-clk_in => vram[988][5].CLK
-clk_in => vram[988][6].CLK
-clk_in => vram[988][7].CLK
-clk_in => vram[987][0].CLK
-clk_in => vram[987][1].CLK
-clk_in => vram[987][2].CLK
-clk_in => vram[987][3].CLK
-clk_in => vram[987][4].CLK
-clk_in => vram[987][5].CLK
-clk_in => vram[987][6].CLK
-clk_in => vram[987][7].CLK
-clk_in => vram[986][0].CLK
-clk_in => vram[986][1].CLK
-clk_in => vram[986][2].CLK
-clk_in => vram[986][3].CLK
-clk_in => vram[986][4].CLK
-clk_in => vram[986][5].CLK
-clk_in => vram[986][6].CLK
-clk_in => vram[986][7].CLK
-clk_in => vram[985][0].CLK
-clk_in => vram[985][1].CLK
-clk_in => vram[985][2].CLK
-clk_in => vram[985][3].CLK
-clk_in => vram[985][4].CLK
-clk_in => vram[985][5].CLK
-clk_in => vram[985][6].CLK
-clk_in => vram[985][7].CLK
-clk_in => vram[984][0].CLK
-clk_in => vram[984][1].CLK
-clk_in => vram[984][2].CLK
-clk_in => vram[984][3].CLK
-clk_in => vram[984][4].CLK
-clk_in => vram[984][5].CLK
-clk_in => vram[984][6].CLK
-clk_in => vram[984][7].CLK
-clk_in => vram[983][0].CLK
-clk_in => vram[983][1].CLK
-clk_in => vram[983][2].CLK
-clk_in => vram[983][3].CLK
-clk_in => vram[983][4].CLK
-clk_in => vram[983][5].CLK
-clk_in => vram[983][6].CLK
-clk_in => vram[983][7].CLK
-clk_in => vram[982][0].CLK
-clk_in => vram[982][1].CLK
-clk_in => vram[982][2].CLK
-clk_in => vram[982][3].CLK
-clk_in => vram[982][4].CLK
-clk_in => vram[982][5].CLK
-clk_in => vram[982][6].CLK
-clk_in => vram[982][7].CLK
-clk_in => vram[981][0].CLK
-clk_in => vram[981][1].CLK
-clk_in => vram[981][2].CLK
-clk_in => vram[981][3].CLK
-clk_in => vram[981][4].CLK
-clk_in => vram[981][5].CLK
-clk_in => vram[981][6].CLK
-clk_in => vram[981][7].CLK
-clk_in => vram[980][0].CLK
-clk_in => vram[980][1].CLK
-clk_in => vram[980][2].CLK
-clk_in => vram[980][3].CLK
-clk_in => vram[980][4].CLK
-clk_in => vram[980][5].CLK
-clk_in => vram[980][6].CLK
-clk_in => vram[980][7].CLK
-clk_in => vram[979][0].CLK
-clk_in => vram[979][1].CLK
-clk_in => vram[979][2].CLK
-clk_in => vram[979][3].CLK
-clk_in => vram[979][4].CLK
-clk_in => vram[979][5].CLK
-clk_in => vram[979][6].CLK
-clk_in => vram[979][7].CLK
-clk_in => vram[978][0].CLK
-clk_in => vram[978][1].CLK
-clk_in => vram[978][2].CLK
-clk_in => vram[978][3].CLK
-clk_in => vram[978][4].CLK
-clk_in => vram[978][5].CLK
-clk_in => vram[978][6].CLK
-clk_in => vram[978][7].CLK
-clk_in => vram[977][0].CLK
-clk_in => vram[977][1].CLK
-clk_in => vram[977][2].CLK
-clk_in => vram[977][3].CLK
-clk_in => vram[977][4].CLK
-clk_in => vram[977][5].CLK
-clk_in => vram[977][6].CLK
-clk_in => vram[977][7].CLK
-clk_in => vram[976][0].CLK
-clk_in => vram[976][1].CLK
-clk_in => vram[976][2].CLK
-clk_in => vram[976][3].CLK
-clk_in => vram[976][4].CLK
-clk_in => vram[976][5].CLK
-clk_in => vram[976][6].CLK
-clk_in => vram[976][7].CLK
-clk_in => vram[975][0].CLK
-clk_in => vram[975][1].CLK
-clk_in => vram[975][2].CLK
-clk_in => vram[975][3].CLK
-clk_in => vram[975][4].CLK
-clk_in => vram[975][5].CLK
-clk_in => vram[975][6].CLK
-clk_in => vram[975][7].CLK
-clk_in => vram[974][0].CLK
-clk_in => vram[974][1].CLK
-clk_in => vram[974][2].CLK
-clk_in => vram[974][3].CLK
-clk_in => vram[974][4].CLK
-clk_in => vram[974][5].CLK
-clk_in => vram[974][6].CLK
-clk_in => vram[974][7].CLK
-clk_in => vram[973][0].CLK
-clk_in => vram[973][1].CLK
-clk_in => vram[973][2].CLK
-clk_in => vram[973][3].CLK
-clk_in => vram[973][4].CLK
-clk_in => vram[973][5].CLK
-clk_in => vram[973][6].CLK
-clk_in => vram[973][7].CLK
-clk_in => vram[972][0].CLK
-clk_in => vram[972][1].CLK
-clk_in => vram[972][2].CLK
-clk_in => vram[972][3].CLK
-clk_in => vram[972][4].CLK
-clk_in => vram[972][5].CLK
-clk_in => vram[972][6].CLK
-clk_in => vram[972][7].CLK
-clk_in => vram[971][0].CLK
-clk_in => vram[971][1].CLK
-clk_in => vram[971][2].CLK
-clk_in => vram[971][3].CLK
-clk_in => vram[971][4].CLK
-clk_in => vram[971][5].CLK
-clk_in => vram[971][6].CLK
-clk_in => vram[971][7].CLK
-clk_in => vram[970][0].CLK
-clk_in => vram[970][1].CLK
-clk_in => vram[970][2].CLK
-clk_in => vram[970][3].CLK
-clk_in => vram[970][4].CLK
-clk_in => vram[970][5].CLK
-clk_in => vram[970][6].CLK
-clk_in => vram[970][7].CLK
-clk_in => vram[969][0].CLK
-clk_in => vram[969][1].CLK
-clk_in => vram[969][2].CLK
-clk_in => vram[969][3].CLK
-clk_in => vram[969][4].CLK
-clk_in => vram[969][5].CLK
-clk_in => vram[969][6].CLK
-clk_in => vram[969][7].CLK
-clk_in => vram[968][0].CLK
-clk_in => vram[968][1].CLK
-clk_in => vram[968][2].CLK
-clk_in => vram[968][3].CLK
-clk_in => vram[968][4].CLK
-clk_in => vram[968][5].CLK
-clk_in => vram[968][6].CLK
-clk_in => vram[968][7].CLK
-clk_in => vram[967][0].CLK
-clk_in => vram[967][1].CLK
-clk_in => vram[967][2].CLK
-clk_in => vram[967][3].CLK
-clk_in => vram[967][4].CLK
-clk_in => vram[967][5].CLK
-clk_in => vram[967][6].CLK
-clk_in => vram[967][7].CLK
-clk_in => vram[966][0].CLK
-clk_in => vram[966][1].CLK
-clk_in => vram[966][2].CLK
-clk_in => vram[966][3].CLK
-clk_in => vram[966][4].CLK
-clk_in => vram[966][5].CLK
-clk_in => vram[966][6].CLK
-clk_in => vram[966][7].CLK
-clk_in => vram[965][0].CLK
-clk_in => vram[965][1].CLK
-clk_in => vram[965][2].CLK
-clk_in => vram[965][3].CLK
-clk_in => vram[965][4].CLK
-clk_in => vram[965][5].CLK
-clk_in => vram[965][6].CLK
-clk_in => vram[965][7].CLK
-clk_in => vram[964][0].CLK
-clk_in => vram[964][1].CLK
-clk_in => vram[964][2].CLK
-clk_in => vram[964][3].CLK
-clk_in => vram[964][4].CLK
-clk_in => vram[964][5].CLK
-clk_in => vram[964][6].CLK
-clk_in => vram[964][7].CLK
-clk_in => vram[963][0].CLK
-clk_in => vram[963][1].CLK
-clk_in => vram[963][2].CLK
-clk_in => vram[963][3].CLK
-clk_in => vram[963][4].CLK
-clk_in => vram[963][5].CLK
-clk_in => vram[963][6].CLK
-clk_in => vram[963][7].CLK
-clk_in => vram[962][0].CLK
-clk_in => vram[962][1].CLK
-clk_in => vram[962][2].CLK
-clk_in => vram[962][3].CLK
-clk_in => vram[962][4].CLK
-clk_in => vram[962][5].CLK
-clk_in => vram[962][6].CLK
-clk_in => vram[962][7].CLK
-clk_in => vram[961][0].CLK
-clk_in => vram[961][1].CLK
-clk_in => vram[961][2].CLK
-clk_in => vram[961][3].CLK
-clk_in => vram[961][4].CLK
-clk_in => vram[961][5].CLK
-clk_in => vram[961][6].CLK
-clk_in => vram[961][7].CLK
-clk_in => vram[960][0].CLK
-clk_in => vram[960][1].CLK
-clk_in => vram[960][2].CLK
-clk_in => vram[960][3].CLK
-clk_in => vram[960][4].CLK
-clk_in => vram[960][5].CLK
-clk_in => vram[960][6].CLK
-clk_in => vram[960][7].CLK
-clk_in => vram[959][0].CLK
-clk_in => vram[959][1].CLK
-clk_in => vram[959][2].CLK
-clk_in => vram[959][3].CLK
-clk_in => vram[959][4].CLK
-clk_in => vram[959][5].CLK
-clk_in => vram[959][6].CLK
-clk_in => vram[959][7].CLK
-clk_in => vram[958][0].CLK
-clk_in => vram[958][1].CLK
-clk_in => vram[958][2].CLK
-clk_in => vram[958][3].CLK
-clk_in => vram[958][4].CLK
-clk_in => vram[958][5].CLK
-clk_in => vram[958][6].CLK
-clk_in => vram[958][7].CLK
-clk_in => vram[957][0].CLK
-clk_in => vram[957][1].CLK
-clk_in => vram[957][2].CLK
-clk_in => vram[957][3].CLK
-clk_in => vram[957][4].CLK
-clk_in => vram[957][5].CLK
-clk_in => vram[957][6].CLK
-clk_in => vram[957][7].CLK
-clk_in => vram[956][0].CLK
-clk_in => vram[956][1].CLK
-clk_in => vram[956][2].CLK
-clk_in => vram[956][3].CLK
-clk_in => vram[956][4].CLK
-clk_in => vram[956][5].CLK
-clk_in => vram[956][6].CLK
-clk_in => vram[956][7].CLK
-clk_in => vram[955][0].CLK
-clk_in => vram[955][1].CLK
-clk_in => vram[955][2].CLK
-clk_in => vram[955][3].CLK
-clk_in => vram[955][4].CLK
-clk_in => vram[955][5].CLK
-clk_in => vram[955][6].CLK
-clk_in => vram[955][7].CLK
-clk_in => vram[954][0].CLK
-clk_in => vram[954][1].CLK
-clk_in => vram[954][2].CLK
-clk_in => vram[954][3].CLK
-clk_in => vram[954][4].CLK
-clk_in => vram[954][5].CLK
-clk_in => vram[954][6].CLK
-clk_in => vram[954][7].CLK
-clk_in => vram[953][0].CLK
-clk_in => vram[953][1].CLK
-clk_in => vram[953][2].CLK
-clk_in => vram[953][3].CLK
-clk_in => vram[953][4].CLK
-clk_in => vram[953][5].CLK
-clk_in => vram[953][6].CLK
-clk_in => vram[953][7].CLK
-clk_in => vram[952][0].CLK
-clk_in => vram[952][1].CLK
-clk_in => vram[952][2].CLK
-clk_in => vram[952][3].CLK
-clk_in => vram[952][4].CLK
-clk_in => vram[952][5].CLK
-clk_in => vram[952][6].CLK
-clk_in => vram[952][7].CLK
-clk_in => vram[951][0].CLK
-clk_in => vram[951][1].CLK
-clk_in => vram[951][2].CLK
-clk_in => vram[951][3].CLK
-clk_in => vram[951][4].CLK
-clk_in => vram[951][5].CLK
-clk_in => vram[951][6].CLK
-clk_in => vram[951][7].CLK
-clk_in => vram[950][0].CLK
-clk_in => vram[950][1].CLK
-clk_in => vram[950][2].CLK
-clk_in => vram[950][3].CLK
-clk_in => vram[950][4].CLK
-clk_in => vram[950][5].CLK
-clk_in => vram[950][6].CLK
-clk_in => vram[950][7].CLK
-clk_in => vram[949][0].CLK
-clk_in => vram[949][1].CLK
-clk_in => vram[949][2].CLK
-clk_in => vram[949][3].CLK
-clk_in => vram[949][4].CLK
-clk_in => vram[949][5].CLK
-clk_in => vram[949][6].CLK
-clk_in => vram[949][7].CLK
-clk_in => vram[948][0].CLK
-clk_in => vram[948][1].CLK
-clk_in => vram[948][2].CLK
-clk_in => vram[948][3].CLK
-clk_in => vram[948][4].CLK
-clk_in => vram[948][5].CLK
-clk_in => vram[948][6].CLK
-clk_in => vram[948][7].CLK
-clk_in => vram[947][0].CLK
-clk_in => vram[947][1].CLK
-clk_in => vram[947][2].CLK
-clk_in => vram[947][3].CLK
-clk_in => vram[947][4].CLK
-clk_in => vram[947][5].CLK
-clk_in => vram[947][6].CLK
-clk_in => vram[947][7].CLK
-clk_in => vram[946][0].CLK
-clk_in => vram[946][1].CLK
-clk_in => vram[946][2].CLK
-clk_in => vram[946][3].CLK
-clk_in => vram[946][4].CLK
-clk_in => vram[946][5].CLK
-clk_in => vram[946][6].CLK
-clk_in => vram[946][7].CLK
-clk_in => vram[945][0].CLK
-clk_in => vram[945][1].CLK
-clk_in => vram[945][2].CLK
-clk_in => vram[945][3].CLK
-clk_in => vram[945][4].CLK
-clk_in => vram[945][5].CLK
-clk_in => vram[945][6].CLK
-clk_in => vram[945][7].CLK
-clk_in => vram[944][0].CLK
-clk_in => vram[944][1].CLK
-clk_in => vram[944][2].CLK
-clk_in => vram[944][3].CLK
-clk_in => vram[944][4].CLK
-clk_in => vram[944][5].CLK
-clk_in => vram[944][6].CLK
-clk_in => vram[944][7].CLK
-clk_in => vram[943][0].CLK
-clk_in => vram[943][1].CLK
-clk_in => vram[943][2].CLK
-clk_in => vram[943][3].CLK
-clk_in => vram[943][4].CLK
-clk_in => vram[943][5].CLK
-clk_in => vram[943][6].CLK
-clk_in => vram[943][7].CLK
-clk_in => vram[942][0].CLK
-clk_in => vram[942][1].CLK
-clk_in => vram[942][2].CLK
-clk_in => vram[942][3].CLK
-clk_in => vram[942][4].CLK
-clk_in => vram[942][5].CLK
-clk_in => vram[942][6].CLK
-clk_in => vram[942][7].CLK
-clk_in => vram[941][0].CLK
-clk_in => vram[941][1].CLK
-clk_in => vram[941][2].CLK
-clk_in => vram[941][3].CLK
-clk_in => vram[941][4].CLK
-clk_in => vram[941][5].CLK
-clk_in => vram[941][6].CLK
-clk_in => vram[941][7].CLK
-clk_in => vram[940][0].CLK
-clk_in => vram[940][1].CLK
-clk_in => vram[940][2].CLK
-clk_in => vram[940][3].CLK
-clk_in => vram[940][4].CLK
-clk_in => vram[940][5].CLK
-clk_in => vram[940][6].CLK
-clk_in => vram[940][7].CLK
-clk_in => vram[939][0].CLK
-clk_in => vram[939][1].CLK
-clk_in => vram[939][2].CLK
-clk_in => vram[939][3].CLK
-clk_in => vram[939][4].CLK
-clk_in => vram[939][5].CLK
-clk_in => vram[939][6].CLK
-clk_in => vram[939][7].CLK
-clk_in => vram[938][0].CLK
-clk_in => vram[938][1].CLK
-clk_in => vram[938][2].CLK
-clk_in => vram[938][3].CLK
-clk_in => vram[938][4].CLK
-clk_in => vram[938][5].CLK
-clk_in => vram[938][6].CLK
-clk_in => vram[938][7].CLK
-clk_in => vram[937][0].CLK
-clk_in => vram[937][1].CLK
-clk_in => vram[937][2].CLK
-clk_in => vram[937][3].CLK
-clk_in => vram[937][4].CLK
-clk_in => vram[937][5].CLK
-clk_in => vram[937][6].CLK
-clk_in => vram[937][7].CLK
-clk_in => vram[936][0].CLK
-clk_in => vram[936][1].CLK
-clk_in => vram[936][2].CLK
-clk_in => vram[936][3].CLK
-clk_in => vram[936][4].CLK
-clk_in => vram[936][5].CLK
-clk_in => vram[936][6].CLK
-clk_in => vram[936][7].CLK
-clk_in => vram[935][0].CLK
-clk_in => vram[935][1].CLK
-clk_in => vram[935][2].CLK
-clk_in => vram[935][3].CLK
-clk_in => vram[935][4].CLK
-clk_in => vram[935][5].CLK
-clk_in => vram[935][6].CLK
-clk_in => vram[935][7].CLK
-clk_in => vram[934][0].CLK
-clk_in => vram[934][1].CLK
-clk_in => vram[934][2].CLK
-clk_in => vram[934][3].CLK
-clk_in => vram[934][4].CLK
-clk_in => vram[934][5].CLK
-clk_in => vram[934][6].CLK
-clk_in => vram[934][7].CLK
-clk_in => vram[933][0].CLK
-clk_in => vram[933][1].CLK
-clk_in => vram[933][2].CLK
-clk_in => vram[933][3].CLK
-clk_in => vram[933][4].CLK
-clk_in => vram[933][5].CLK
-clk_in => vram[933][6].CLK
-clk_in => vram[933][7].CLK
-clk_in => vram[932][0].CLK
-clk_in => vram[932][1].CLK
-clk_in => vram[932][2].CLK
-clk_in => vram[932][3].CLK
-clk_in => vram[932][4].CLK
-clk_in => vram[932][5].CLK
-clk_in => vram[932][6].CLK
-clk_in => vram[932][7].CLK
-clk_in => vram[931][0].CLK
-clk_in => vram[931][1].CLK
-clk_in => vram[931][2].CLK
-clk_in => vram[931][3].CLK
-clk_in => vram[931][4].CLK
-clk_in => vram[931][5].CLK
-clk_in => vram[931][6].CLK
-clk_in => vram[931][7].CLK
-clk_in => vram[930][0].CLK
-clk_in => vram[930][1].CLK
-clk_in => vram[930][2].CLK
-clk_in => vram[930][3].CLK
-clk_in => vram[930][4].CLK
-clk_in => vram[930][5].CLK
-clk_in => vram[930][6].CLK
-clk_in => vram[930][7].CLK
-clk_in => vram[929][0].CLK
-clk_in => vram[929][1].CLK
-clk_in => vram[929][2].CLK
-clk_in => vram[929][3].CLK
-clk_in => vram[929][4].CLK
-clk_in => vram[929][5].CLK
-clk_in => vram[929][6].CLK
-clk_in => vram[929][7].CLK
-clk_in => vram[928][0].CLK
-clk_in => vram[928][1].CLK
-clk_in => vram[928][2].CLK
-clk_in => vram[928][3].CLK
-clk_in => vram[928][4].CLK
-clk_in => vram[928][5].CLK
-clk_in => vram[928][6].CLK
-clk_in => vram[928][7].CLK
-clk_in => vram[927][0].CLK
-clk_in => vram[927][1].CLK
-clk_in => vram[927][2].CLK
-clk_in => vram[927][3].CLK
-clk_in => vram[927][4].CLK
-clk_in => vram[927][5].CLK
-clk_in => vram[927][6].CLK
-clk_in => vram[927][7].CLK
-clk_in => vram[926][0].CLK
-clk_in => vram[926][1].CLK
-clk_in => vram[926][2].CLK
-clk_in => vram[926][3].CLK
-clk_in => vram[926][4].CLK
-clk_in => vram[926][5].CLK
-clk_in => vram[926][6].CLK
-clk_in => vram[926][7].CLK
-clk_in => vram[925][0].CLK
-clk_in => vram[925][1].CLK
-clk_in => vram[925][2].CLK
-clk_in => vram[925][3].CLK
-clk_in => vram[925][4].CLK
-clk_in => vram[925][5].CLK
-clk_in => vram[925][6].CLK
-clk_in => vram[925][7].CLK
-clk_in => vram[924][0].CLK
-clk_in => vram[924][1].CLK
-clk_in => vram[924][2].CLK
-clk_in => vram[924][3].CLK
-clk_in => vram[924][4].CLK
-clk_in => vram[924][5].CLK
-clk_in => vram[924][6].CLK
-clk_in => vram[924][7].CLK
-clk_in => vram[923][0].CLK
-clk_in => vram[923][1].CLK
-clk_in => vram[923][2].CLK
-clk_in => vram[923][3].CLK
-clk_in => vram[923][4].CLK
-clk_in => vram[923][5].CLK
-clk_in => vram[923][6].CLK
-clk_in => vram[923][7].CLK
-clk_in => vram[922][0].CLK
-clk_in => vram[922][1].CLK
-clk_in => vram[922][2].CLK
-clk_in => vram[922][3].CLK
-clk_in => vram[922][4].CLK
-clk_in => vram[922][5].CLK
-clk_in => vram[922][6].CLK
-clk_in => vram[922][7].CLK
-clk_in => vram[921][0].CLK
-clk_in => vram[921][1].CLK
-clk_in => vram[921][2].CLK
-clk_in => vram[921][3].CLK
-clk_in => vram[921][4].CLK
-clk_in => vram[921][5].CLK
-clk_in => vram[921][6].CLK
-clk_in => vram[921][7].CLK
-clk_in => vram[920][0].CLK
-clk_in => vram[920][1].CLK
-clk_in => vram[920][2].CLK
-clk_in => vram[920][3].CLK
-clk_in => vram[920][4].CLK
-clk_in => vram[920][5].CLK
-clk_in => vram[920][6].CLK
-clk_in => vram[920][7].CLK
-clk_in => vram[919][0].CLK
-clk_in => vram[919][1].CLK
-clk_in => vram[919][2].CLK
-clk_in => vram[919][3].CLK
-clk_in => vram[919][4].CLK
-clk_in => vram[919][5].CLK
-clk_in => vram[919][6].CLK
-clk_in => vram[919][7].CLK
-clk_in => vram[918][0].CLK
-clk_in => vram[918][1].CLK
-clk_in => vram[918][2].CLK
-clk_in => vram[918][3].CLK
-clk_in => vram[918][4].CLK
-clk_in => vram[918][5].CLK
-clk_in => vram[918][6].CLK
-clk_in => vram[918][7].CLK
-clk_in => vram[917][0].CLK
-clk_in => vram[917][1].CLK
-clk_in => vram[917][2].CLK
-clk_in => vram[917][3].CLK
-clk_in => vram[917][4].CLK
-clk_in => vram[917][5].CLK
-clk_in => vram[917][6].CLK
-clk_in => vram[917][7].CLK
-clk_in => vram[916][0].CLK
-clk_in => vram[916][1].CLK
-clk_in => vram[916][2].CLK
-clk_in => vram[916][3].CLK
-clk_in => vram[916][4].CLK
-clk_in => vram[916][5].CLK
-clk_in => vram[916][6].CLK
-clk_in => vram[916][7].CLK
-clk_in => vram[915][0].CLK
-clk_in => vram[915][1].CLK
-clk_in => vram[915][2].CLK
-clk_in => vram[915][3].CLK
-clk_in => vram[915][4].CLK
-clk_in => vram[915][5].CLK
-clk_in => vram[915][6].CLK
-clk_in => vram[915][7].CLK
-clk_in => vram[914][0].CLK
-clk_in => vram[914][1].CLK
-clk_in => vram[914][2].CLK
-clk_in => vram[914][3].CLK
-clk_in => vram[914][4].CLK
-clk_in => vram[914][5].CLK
-clk_in => vram[914][6].CLK
-clk_in => vram[914][7].CLK
-clk_in => vram[913][0].CLK
-clk_in => vram[913][1].CLK
-clk_in => vram[913][2].CLK
-clk_in => vram[913][3].CLK
-clk_in => vram[913][4].CLK
-clk_in => vram[913][5].CLK
-clk_in => vram[913][6].CLK
-clk_in => vram[913][7].CLK
-clk_in => vram[912][0].CLK
-clk_in => vram[912][1].CLK
-clk_in => vram[912][2].CLK
-clk_in => vram[912][3].CLK
-clk_in => vram[912][4].CLK
-clk_in => vram[912][5].CLK
-clk_in => vram[912][6].CLK
-clk_in => vram[912][7].CLK
-clk_in => vram[911][0].CLK
-clk_in => vram[911][1].CLK
-clk_in => vram[911][2].CLK
-clk_in => vram[911][3].CLK
-clk_in => vram[911][4].CLK
-clk_in => vram[911][5].CLK
-clk_in => vram[911][6].CLK
-clk_in => vram[911][7].CLK
-clk_in => vram[910][0].CLK
-clk_in => vram[910][1].CLK
-clk_in => vram[910][2].CLK
-clk_in => vram[910][3].CLK
-clk_in => vram[910][4].CLK
-clk_in => vram[910][5].CLK
-clk_in => vram[910][6].CLK
-clk_in => vram[910][7].CLK
-clk_in => vram[909][0].CLK
-clk_in => vram[909][1].CLK
-clk_in => vram[909][2].CLK
-clk_in => vram[909][3].CLK
-clk_in => vram[909][4].CLK
-clk_in => vram[909][5].CLK
-clk_in => vram[909][6].CLK
-clk_in => vram[909][7].CLK
-clk_in => vram[908][0].CLK
-clk_in => vram[908][1].CLK
-clk_in => vram[908][2].CLK
-clk_in => vram[908][3].CLK
-clk_in => vram[908][4].CLK
-clk_in => vram[908][5].CLK
-clk_in => vram[908][6].CLK
-clk_in => vram[908][7].CLK
-clk_in => vram[907][0].CLK
-clk_in => vram[907][1].CLK
-clk_in => vram[907][2].CLK
-clk_in => vram[907][3].CLK
-clk_in => vram[907][4].CLK
-clk_in => vram[907][5].CLK
-clk_in => vram[907][6].CLK
-clk_in => vram[907][7].CLK
-clk_in => vram[906][0].CLK
-clk_in => vram[906][1].CLK
-clk_in => vram[906][2].CLK
-clk_in => vram[906][3].CLK
-clk_in => vram[906][4].CLK
-clk_in => vram[906][5].CLK
-clk_in => vram[906][6].CLK
-clk_in => vram[906][7].CLK
-clk_in => vram[905][0].CLK
-clk_in => vram[905][1].CLK
-clk_in => vram[905][2].CLK
-clk_in => vram[905][3].CLK
-clk_in => vram[905][4].CLK
-clk_in => vram[905][5].CLK
-clk_in => vram[905][6].CLK
-clk_in => vram[905][7].CLK
-clk_in => vram[904][0].CLK
-clk_in => vram[904][1].CLK
-clk_in => vram[904][2].CLK
-clk_in => vram[904][3].CLK
-clk_in => vram[904][4].CLK
-clk_in => vram[904][5].CLK
-clk_in => vram[904][6].CLK
-clk_in => vram[904][7].CLK
-clk_in => vram[903][0].CLK
-clk_in => vram[903][1].CLK
-clk_in => vram[903][2].CLK
-clk_in => vram[903][3].CLK
-clk_in => vram[903][4].CLK
-clk_in => vram[903][5].CLK
-clk_in => vram[903][6].CLK
-clk_in => vram[903][7].CLK
-clk_in => vram[902][0].CLK
-clk_in => vram[902][1].CLK
-clk_in => vram[902][2].CLK
-clk_in => vram[902][3].CLK
-clk_in => vram[902][4].CLK
-clk_in => vram[902][5].CLK
-clk_in => vram[902][6].CLK
-clk_in => vram[902][7].CLK
-clk_in => vram[901][0].CLK
-clk_in => vram[901][1].CLK
-clk_in => vram[901][2].CLK
-clk_in => vram[901][3].CLK
-clk_in => vram[901][4].CLK
-clk_in => vram[901][5].CLK
-clk_in => vram[901][6].CLK
-clk_in => vram[901][7].CLK
-clk_in => vram[900][0].CLK
-clk_in => vram[900][1].CLK
-clk_in => vram[900][2].CLK
-clk_in => vram[900][3].CLK
-clk_in => vram[900][4].CLK
-clk_in => vram[900][5].CLK
-clk_in => vram[900][6].CLK
-clk_in => vram[900][7].CLK
-clk_in => vram[899][0].CLK
-clk_in => vram[899][1].CLK
-clk_in => vram[899][2].CLK
-clk_in => vram[899][3].CLK
-clk_in => vram[899][4].CLK
-clk_in => vram[899][5].CLK
-clk_in => vram[899][6].CLK
-clk_in => vram[899][7].CLK
-clk_in => vram[898][0].CLK
-clk_in => vram[898][1].CLK
-clk_in => vram[898][2].CLK
-clk_in => vram[898][3].CLK
-clk_in => vram[898][4].CLK
-clk_in => vram[898][5].CLK
-clk_in => vram[898][6].CLK
-clk_in => vram[898][7].CLK
-clk_in => vram[897][0].CLK
-clk_in => vram[897][1].CLK
-clk_in => vram[897][2].CLK
-clk_in => vram[897][3].CLK
-clk_in => vram[897][4].CLK
-clk_in => vram[897][5].CLK
-clk_in => vram[897][6].CLK
-clk_in => vram[897][7].CLK
-clk_in => vram[896][0].CLK
-clk_in => vram[896][1].CLK
-clk_in => vram[896][2].CLK
-clk_in => vram[896][3].CLK
-clk_in => vram[896][4].CLK
-clk_in => vram[896][5].CLK
-clk_in => vram[896][6].CLK
-clk_in => vram[896][7].CLK
-clk_in => vram[895][0].CLK
-clk_in => vram[895][1].CLK
-clk_in => vram[895][2].CLK
-clk_in => vram[895][3].CLK
-clk_in => vram[895][4].CLK
-clk_in => vram[895][5].CLK
-clk_in => vram[895][6].CLK
-clk_in => vram[895][7].CLK
-clk_in => vram[894][0].CLK
-clk_in => vram[894][1].CLK
-clk_in => vram[894][2].CLK
-clk_in => vram[894][3].CLK
-clk_in => vram[894][4].CLK
-clk_in => vram[894][5].CLK
-clk_in => vram[894][6].CLK
-clk_in => vram[894][7].CLK
-clk_in => vram[893][0].CLK
-clk_in => vram[893][1].CLK
-clk_in => vram[893][2].CLK
-clk_in => vram[893][3].CLK
-clk_in => vram[893][4].CLK
-clk_in => vram[893][5].CLK
-clk_in => vram[893][6].CLK
-clk_in => vram[893][7].CLK
-clk_in => vram[892][0].CLK
-clk_in => vram[892][1].CLK
-clk_in => vram[892][2].CLK
-clk_in => vram[892][3].CLK
-clk_in => vram[892][4].CLK
-clk_in => vram[892][5].CLK
-clk_in => vram[892][6].CLK
-clk_in => vram[892][7].CLK
-clk_in => vram[891][0].CLK
-clk_in => vram[891][1].CLK
-clk_in => vram[891][2].CLK
-clk_in => vram[891][3].CLK
-clk_in => vram[891][4].CLK
-clk_in => vram[891][5].CLK
-clk_in => vram[891][6].CLK
-clk_in => vram[891][7].CLK
-clk_in => vram[890][0].CLK
-clk_in => vram[890][1].CLK
-clk_in => vram[890][2].CLK
-clk_in => vram[890][3].CLK
-clk_in => vram[890][4].CLK
-clk_in => vram[890][5].CLK
-clk_in => vram[890][6].CLK
-clk_in => vram[890][7].CLK
-clk_in => vram[889][0].CLK
-clk_in => vram[889][1].CLK
-clk_in => vram[889][2].CLK
-clk_in => vram[889][3].CLK
-clk_in => vram[889][4].CLK
-clk_in => vram[889][5].CLK
-clk_in => vram[889][6].CLK
-clk_in => vram[889][7].CLK
-clk_in => vram[888][0].CLK
-clk_in => vram[888][1].CLK
-clk_in => vram[888][2].CLK
-clk_in => vram[888][3].CLK
-clk_in => vram[888][4].CLK
-clk_in => vram[888][5].CLK
-clk_in => vram[888][6].CLK
-clk_in => vram[888][7].CLK
-clk_in => vram[887][0].CLK
-clk_in => vram[887][1].CLK
-clk_in => vram[887][2].CLK
-clk_in => vram[887][3].CLK
-clk_in => vram[887][4].CLK
-clk_in => vram[887][5].CLK
-clk_in => vram[887][6].CLK
-clk_in => vram[887][7].CLK
-clk_in => vram[886][0].CLK
-clk_in => vram[886][1].CLK
-clk_in => vram[886][2].CLK
-clk_in => vram[886][3].CLK
-clk_in => vram[886][4].CLK
-clk_in => vram[886][5].CLK
-clk_in => vram[886][6].CLK
-clk_in => vram[886][7].CLK
-clk_in => vram[885][0].CLK
-clk_in => vram[885][1].CLK
-clk_in => vram[885][2].CLK
-clk_in => vram[885][3].CLK
-clk_in => vram[885][4].CLK
-clk_in => vram[885][5].CLK
-clk_in => vram[885][6].CLK
-clk_in => vram[885][7].CLK
-clk_in => vram[884][0].CLK
-clk_in => vram[884][1].CLK
-clk_in => vram[884][2].CLK
-clk_in => vram[884][3].CLK
-clk_in => vram[884][4].CLK
-clk_in => vram[884][5].CLK
-clk_in => vram[884][6].CLK
-clk_in => vram[884][7].CLK
-clk_in => vram[883][0].CLK
-clk_in => vram[883][1].CLK
-clk_in => vram[883][2].CLK
-clk_in => vram[883][3].CLK
-clk_in => vram[883][4].CLK
-clk_in => vram[883][5].CLK
-clk_in => vram[883][6].CLK
-clk_in => vram[883][7].CLK
-clk_in => vram[882][0].CLK
-clk_in => vram[882][1].CLK
-clk_in => vram[882][2].CLK
-clk_in => vram[882][3].CLK
-clk_in => vram[882][4].CLK
-clk_in => vram[882][5].CLK
-clk_in => vram[882][6].CLK
-clk_in => vram[882][7].CLK
-clk_in => vram[881][0].CLK
-clk_in => vram[881][1].CLK
-clk_in => vram[881][2].CLK
-clk_in => vram[881][3].CLK
-clk_in => vram[881][4].CLK
-clk_in => vram[881][5].CLK
-clk_in => vram[881][6].CLK
-clk_in => vram[881][7].CLK
-clk_in => vram[880][0].CLK
-clk_in => vram[880][1].CLK
-clk_in => vram[880][2].CLK
-clk_in => vram[880][3].CLK
-clk_in => vram[880][4].CLK
-clk_in => vram[880][5].CLK
-clk_in => vram[880][6].CLK
-clk_in => vram[880][7].CLK
-clk_in => vram[879][0].CLK
-clk_in => vram[879][1].CLK
-clk_in => vram[879][2].CLK
-clk_in => vram[879][3].CLK
-clk_in => vram[879][4].CLK
-clk_in => vram[879][5].CLK
-clk_in => vram[879][6].CLK
-clk_in => vram[879][7].CLK
-clk_in => vram[878][0].CLK
-clk_in => vram[878][1].CLK
-clk_in => vram[878][2].CLK
-clk_in => vram[878][3].CLK
-clk_in => vram[878][4].CLK
-clk_in => vram[878][5].CLK
-clk_in => vram[878][6].CLK
-clk_in => vram[878][7].CLK
-clk_in => vram[877][0].CLK
-clk_in => vram[877][1].CLK
-clk_in => vram[877][2].CLK
-clk_in => vram[877][3].CLK
-clk_in => vram[877][4].CLK
-clk_in => vram[877][5].CLK
-clk_in => vram[877][6].CLK
-clk_in => vram[877][7].CLK
-clk_in => vram[876][0].CLK
-clk_in => vram[876][1].CLK
-clk_in => vram[876][2].CLK
-clk_in => vram[876][3].CLK
-clk_in => vram[876][4].CLK
-clk_in => vram[876][5].CLK
-clk_in => vram[876][6].CLK
-clk_in => vram[876][7].CLK
-clk_in => vram[875][0].CLK
-clk_in => vram[875][1].CLK
-clk_in => vram[875][2].CLK
-clk_in => vram[875][3].CLK
-clk_in => vram[875][4].CLK
-clk_in => vram[875][5].CLK
-clk_in => vram[875][6].CLK
-clk_in => vram[875][7].CLK
-clk_in => vram[874][0].CLK
-clk_in => vram[874][1].CLK
-clk_in => vram[874][2].CLK
-clk_in => vram[874][3].CLK
-clk_in => vram[874][4].CLK
-clk_in => vram[874][5].CLK
-clk_in => vram[874][6].CLK
-clk_in => vram[874][7].CLK
-clk_in => vram[873][0].CLK
-clk_in => vram[873][1].CLK
-clk_in => vram[873][2].CLK
-clk_in => vram[873][3].CLK
-clk_in => vram[873][4].CLK
-clk_in => vram[873][5].CLK
-clk_in => vram[873][6].CLK
-clk_in => vram[873][7].CLK
-clk_in => vram[872][0].CLK
-clk_in => vram[872][1].CLK
-clk_in => vram[872][2].CLK
-clk_in => vram[872][3].CLK
-clk_in => vram[872][4].CLK
-clk_in => vram[872][5].CLK
-clk_in => vram[872][6].CLK
-clk_in => vram[872][7].CLK
-clk_in => vram[871][0].CLK
-clk_in => vram[871][1].CLK
-clk_in => vram[871][2].CLK
-clk_in => vram[871][3].CLK
-clk_in => vram[871][4].CLK
-clk_in => vram[871][5].CLK
-clk_in => vram[871][6].CLK
-clk_in => vram[871][7].CLK
-clk_in => vram[870][0].CLK
-clk_in => vram[870][1].CLK
-clk_in => vram[870][2].CLK
-clk_in => vram[870][3].CLK
-clk_in => vram[870][4].CLK
-clk_in => vram[870][5].CLK
-clk_in => vram[870][6].CLK
-clk_in => vram[870][7].CLK
-clk_in => vram[869][0].CLK
-clk_in => vram[869][1].CLK
-clk_in => vram[869][2].CLK
-clk_in => vram[869][3].CLK
-clk_in => vram[869][4].CLK
-clk_in => vram[869][5].CLK
-clk_in => vram[869][6].CLK
-clk_in => vram[869][7].CLK
-clk_in => vram[868][0].CLK
-clk_in => vram[868][1].CLK
-clk_in => vram[868][2].CLK
-clk_in => vram[868][3].CLK
-clk_in => vram[868][4].CLK
-clk_in => vram[868][5].CLK
-clk_in => vram[868][6].CLK
-clk_in => vram[868][7].CLK
-clk_in => vram[867][0].CLK
-clk_in => vram[867][1].CLK
-clk_in => vram[867][2].CLK
-clk_in => vram[867][3].CLK
-clk_in => vram[867][4].CLK
-clk_in => vram[867][5].CLK
-clk_in => vram[867][6].CLK
-clk_in => vram[867][7].CLK
-clk_in => vram[866][0].CLK
-clk_in => vram[866][1].CLK
-clk_in => vram[866][2].CLK
-clk_in => vram[866][3].CLK
-clk_in => vram[866][4].CLK
-clk_in => vram[866][5].CLK
-clk_in => vram[866][6].CLK
-clk_in => vram[866][7].CLK
-clk_in => vram[865][0].CLK
-clk_in => vram[865][1].CLK
-clk_in => vram[865][2].CLK
-clk_in => vram[865][3].CLK
-clk_in => vram[865][4].CLK
-clk_in => vram[865][5].CLK
-clk_in => vram[865][6].CLK
-clk_in => vram[865][7].CLK
-clk_in => vram[864][0].CLK
-clk_in => vram[864][1].CLK
-clk_in => vram[864][2].CLK
-clk_in => vram[864][3].CLK
-clk_in => vram[864][4].CLK
-clk_in => vram[864][5].CLK
-clk_in => vram[864][6].CLK
-clk_in => vram[864][7].CLK
-clk_in => vram[863][0].CLK
-clk_in => vram[863][1].CLK
-clk_in => vram[863][2].CLK
-clk_in => vram[863][3].CLK
-clk_in => vram[863][4].CLK
-clk_in => vram[863][5].CLK
-clk_in => vram[863][6].CLK
-clk_in => vram[863][7].CLK
-clk_in => vram[862][0].CLK
-clk_in => vram[862][1].CLK
-clk_in => vram[862][2].CLK
-clk_in => vram[862][3].CLK
-clk_in => vram[862][4].CLK
-clk_in => vram[862][5].CLK
-clk_in => vram[862][6].CLK
-clk_in => vram[862][7].CLK
-clk_in => vram[861][0].CLK
-clk_in => vram[861][1].CLK
-clk_in => vram[861][2].CLK
-clk_in => vram[861][3].CLK
-clk_in => vram[861][4].CLK
-clk_in => vram[861][5].CLK
-clk_in => vram[861][6].CLK
-clk_in => vram[861][7].CLK
-clk_in => vram[860][0].CLK
-clk_in => vram[860][1].CLK
-clk_in => vram[860][2].CLK
-clk_in => vram[860][3].CLK
-clk_in => vram[860][4].CLK
-clk_in => vram[860][5].CLK
-clk_in => vram[860][6].CLK
-clk_in => vram[860][7].CLK
-clk_in => vram[859][0].CLK
-clk_in => vram[859][1].CLK
-clk_in => vram[859][2].CLK
-clk_in => vram[859][3].CLK
-clk_in => vram[859][4].CLK
-clk_in => vram[859][5].CLK
-clk_in => vram[859][6].CLK
-clk_in => vram[859][7].CLK
-clk_in => vram[858][0].CLK
-clk_in => vram[858][1].CLK
-clk_in => vram[858][2].CLK
-clk_in => vram[858][3].CLK
-clk_in => vram[858][4].CLK
-clk_in => vram[858][5].CLK
-clk_in => vram[858][6].CLK
-clk_in => vram[858][7].CLK
-clk_in => vram[857][0].CLK
-clk_in => vram[857][1].CLK
-clk_in => vram[857][2].CLK
-clk_in => vram[857][3].CLK
-clk_in => vram[857][4].CLK
-clk_in => vram[857][5].CLK
-clk_in => vram[857][6].CLK
-clk_in => vram[857][7].CLK
-clk_in => vram[856][0].CLK
-clk_in => vram[856][1].CLK
-clk_in => vram[856][2].CLK
-clk_in => vram[856][3].CLK
-clk_in => vram[856][4].CLK
-clk_in => vram[856][5].CLK
-clk_in => vram[856][6].CLK
-clk_in => vram[856][7].CLK
-clk_in => vram[855][0].CLK
-clk_in => vram[855][1].CLK
-clk_in => vram[855][2].CLK
-clk_in => vram[855][3].CLK
-clk_in => vram[855][4].CLK
-clk_in => vram[855][5].CLK
-clk_in => vram[855][6].CLK
-clk_in => vram[855][7].CLK
-clk_in => vram[854][0].CLK
-clk_in => vram[854][1].CLK
-clk_in => vram[854][2].CLK
-clk_in => vram[854][3].CLK
-clk_in => vram[854][4].CLK
-clk_in => vram[854][5].CLK
-clk_in => vram[854][6].CLK
-clk_in => vram[854][7].CLK
-clk_in => vram[853][0].CLK
-clk_in => vram[853][1].CLK
-clk_in => vram[853][2].CLK
-clk_in => vram[853][3].CLK
-clk_in => vram[853][4].CLK
-clk_in => vram[853][5].CLK
-clk_in => vram[853][6].CLK
-clk_in => vram[853][7].CLK
-clk_in => vram[852][0].CLK
-clk_in => vram[852][1].CLK
-clk_in => vram[852][2].CLK
-clk_in => vram[852][3].CLK
-clk_in => vram[852][4].CLK
-clk_in => vram[852][5].CLK
-clk_in => vram[852][6].CLK
-clk_in => vram[852][7].CLK
-clk_in => vram[851][0].CLK
-clk_in => vram[851][1].CLK
-clk_in => vram[851][2].CLK
-clk_in => vram[851][3].CLK
-clk_in => vram[851][4].CLK
-clk_in => vram[851][5].CLK
-clk_in => vram[851][6].CLK
-clk_in => vram[851][7].CLK
-clk_in => vram[850][0].CLK
-clk_in => vram[850][1].CLK
-clk_in => vram[850][2].CLK
-clk_in => vram[850][3].CLK
-clk_in => vram[850][4].CLK
-clk_in => vram[850][5].CLK
-clk_in => vram[850][6].CLK
-clk_in => vram[850][7].CLK
-clk_in => vram[849][0].CLK
-clk_in => vram[849][1].CLK
-clk_in => vram[849][2].CLK
-clk_in => vram[849][3].CLK
-clk_in => vram[849][4].CLK
-clk_in => vram[849][5].CLK
-clk_in => vram[849][6].CLK
-clk_in => vram[849][7].CLK
-clk_in => vram[848][0].CLK
-clk_in => vram[848][1].CLK
-clk_in => vram[848][2].CLK
-clk_in => vram[848][3].CLK
-clk_in => vram[848][4].CLK
-clk_in => vram[848][5].CLK
-clk_in => vram[848][6].CLK
-clk_in => vram[848][7].CLK
-clk_in => vram[847][0].CLK
-clk_in => vram[847][1].CLK
-clk_in => vram[847][2].CLK
-clk_in => vram[847][3].CLK
-clk_in => vram[847][4].CLK
-clk_in => vram[847][5].CLK
-clk_in => vram[847][6].CLK
-clk_in => vram[847][7].CLK
-clk_in => vram[846][0].CLK
-clk_in => vram[846][1].CLK
-clk_in => vram[846][2].CLK
-clk_in => vram[846][3].CLK
-clk_in => vram[846][4].CLK
-clk_in => vram[846][5].CLK
-clk_in => vram[846][6].CLK
-clk_in => vram[846][7].CLK
-clk_in => vram[845][0].CLK
-clk_in => vram[845][1].CLK
-clk_in => vram[845][2].CLK
-clk_in => vram[845][3].CLK
-clk_in => vram[845][4].CLK
-clk_in => vram[845][5].CLK
-clk_in => vram[845][6].CLK
-clk_in => vram[845][7].CLK
-clk_in => vram[844][0].CLK
-clk_in => vram[844][1].CLK
-clk_in => vram[844][2].CLK
-clk_in => vram[844][3].CLK
-clk_in => vram[844][4].CLK
-clk_in => vram[844][5].CLK
-clk_in => vram[844][6].CLK
-clk_in => vram[844][7].CLK
-clk_in => vram[843][0].CLK
-clk_in => vram[843][1].CLK
-clk_in => vram[843][2].CLK
-clk_in => vram[843][3].CLK
-clk_in => vram[843][4].CLK
-clk_in => vram[843][5].CLK
-clk_in => vram[843][6].CLK
-clk_in => vram[843][7].CLK
-clk_in => vram[842][0].CLK
-clk_in => vram[842][1].CLK
-clk_in => vram[842][2].CLK
-clk_in => vram[842][3].CLK
-clk_in => vram[842][4].CLK
-clk_in => vram[842][5].CLK
-clk_in => vram[842][6].CLK
-clk_in => vram[842][7].CLK
-clk_in => vram[841][0].CLK
-clk_in => vram[841][1].CLK
-clk_in => vram[841][2].CLK
-clk_in => vram[841][3].CLK
-clk_in => vram[841][4].CLK
-clk_in => vram[841][5].CLK
-clk_in => vram[841][6].CLK
-clk_in => vram[841][7].CLK
-clk_in => vram[840][0].CLK
-clk_in => vram[840][1].CLK
-clk_in => vram[840][2].CLK
-clk_in => vram[840][3].CLK
-clk_in => vram[840][4].CLK
-clk_in => vram[840][5].CLK
-clk_in => vram[840][6].CLK
-clk_in => vram[840][7].CLK
-clk_in => vram[839][0].CLK
-clk_in => vram[839][1].CLK
-clk_in => vram[839][2].CLK
-clk_in => vram[839][3].CLK
-clk_in => vram[839][4].CLK
-clk_in => vram[839][5].CLK
-clk_in => vram[839][6].CLK
-clk_in => vram[839][7].CLK
-clk_in => vram[838][0].CLK
-clk_in => vram[838][1].CLK
-clk_in => vram[838][2].CLK
-clk_in => vram[838][3].CLK
-clk_in => vram[838][4].CLK
-clk_in => vram[838][5].CLK
-clk_in => vram[838][6].CLK
-clk_in => vram[838][7].CLK
-clk_in => vram[837][0].CLK
-clk_in => vram[837][1].CLK
-clk_in => vram[837][2].CLK
-clk_in => vram[837][3].CLK
-clk_in => vram[837][4].CLK
-clk_in => vram[837][5].CLK
-clk_in => vram[837][6].CLK
-clk_in => vram[837][7].CLK
-clk_in => vram[836][0].CLK
-clk_in => vram[836][1].CLK
-clk_in => vram[836][2].CLK
-clk_in => vram[836][3].CLK
-clk_in => vram[836][4].CLK
-clk_in => vram[836][5].CLK
-clk_in => vram[836][6].CLK
-clk_in => vram[836][7].CLK
-clk_in => vram[835][0].CLK
-clk_in => vram[835][1].CLK
-clk_in => vram[835][2].CLK
-clk_in => vram[835][3].CLK
-clk_in => vram[835][4].CLK
-clk_in => vram[835][5].CLK
-clk_in => vram[835][6].CLK
-clk_in => vram[835][7].CLK
-clk_in => vram[834][0].CLK
-clk_in => vram[834][1].CLK
-clk_in => vram[834][2].CLK
-clk_in => vram[834][3].CLK
-clk_in => vram[834][4].CLK
-clk_in => vram[834][5].CLK
-clk_in => vram[834][6].CLK
-clk_in => vram[834][7].CLK
-clk_in => vram[833][0].CLK
-clk_in => vram[833][1].CLK
-clk_in => vram[833][2].CLK
-clk_in => vram[833][3].CLK
-clk_in => vram[833][4].CLK
-clk_in => vram[833][5].CLK
-clk_in => vram[833][6].CLK
-clk_in => vram[833][7].CLK
-clk_in => vram[832][0].CLK
-clk_in => vram[832][1].CLK
-clk_in => vram[832][2].CLK
-clk_in => vram[832][3].CLK
-clk_in => vram[832][4].CLK
-clk_in => vram[832][5].CLK
-clk_in => vram[832][6].CLK
-clk_in => vram[832][7].CLK
-clk_in => vram[831][0].CLK
-clk_in => vram[831][1].CLK
-clk_in => vram[831][2].CLK
-clk_in => vram[831][3].CLK
-clk_in => vram[831][4].CLK
-clk_in => vram[831][5].CLK
-clk_in => vram[831][6].CLK
-clk_in => vram[831][7].CLK
-clk_in => vram[830][0].CLK
-clk_in => vram[830][1].CLK
-clk_in => vram[830][2].CLK
-clk_in => vram[830][3].CLK
-clk_in => vram[830][4].CLK
-clk_in => vram[830][5].CLK
-clk_in => vram[830][6].CLK
-clk_in => vram[830][7].CLK
-clk_in => vram[829][0].CLK
-clk_in => vram[829][1].CLK
-clk_in => vram[829][2].CLK
-clk_in => vram[829][3].CLK
-clk_in => vram[829][4].CLK
-clk_in => vram[829][5].CLK
-clk_in => vram[829][6].CLK
-clk_in => vram[829][7].CLK
-clk_in => vram[828][0].CLK
-clk_in => vram[828][1].CLK
-clk_in => vram[828][2].CLK
-clk_in => vram[828][3].CLK
-clk_in => vram[828][4].CLK
-clk_in => vram[828][5].CLK
-clk_in => vram[828][6].CLK
-clk_in => vram[828][7].CLK
-clk_in => vram[827][0].CLK
-clk_in => vram[827][1].CLK
-clk_in => vram[827][2].CLK
-clk_in => vram[827][3].CLK
-clk_in => vram[827][4].CLK
-clk_in => vram[827][5].CLK
-clk_in => vram[827][6].CLK
-clk_in => vram[827][7].CLK
-clk_in => vram[826][0].CLK
-clk_in => vram[826][1].CLK
-clk_in => vram[826][2].CLK
-clk_in => vram[826][3].CLK
-clk_in => vram[826][4].CLK
-clk_in => vram[826][5].CLK
-clk_in => vram[826][6].CLK
-clk_in => vram[826][7].CLK
-clk_in => vram[825][0].CLK
-clk_in => vram[825][1].CLK
-clk_in => vram[825][2].CLK
-clk_in => vram[825][3].CLK
-clk_in => vram[825][4].CLK
-clk_in => vram[825][5].CLK
-clk_in => vram[825][6].CLK
-clk_in => vram[825][7].CLK
-clk_in => vram[824][0].CLK
-clk_in => vram[824][1].CLK
-clk_in => vram[824][2].CLK
-clk_in => vram[824][3].CLK
-clk_in => vram[824][4].CLK
-clk_in => vram[824][5].CLK
-clk_in => vram[824][6].CLK
-clk_in => vram[824][7].CLK
-clk_in => vram[823][0].CLK
-clk_in => vram[823][1].CLK
-clk_in => vram[823][2].CLK
-clk_in => vram[823][3].CLK
-clk_in => vram[823][4].CLK
-clk_in => vram[823][5].CLK
-clk_in => vram[823][6].CLK
-clk_in => vram[823][7].CLK
-clk_in => vram[822][0].CLK
-clk_in => vram[822][1].CLK
-clk_in => vram[822][2].CLK
-clk_in => vram[822][3].CLK
-clk_in => vram[822][4].CLK
-clk_in => vram[822][5].CLK
-clk_in => vram[822][6].CLK
-clk_in => vram[822][7].CLK
-clk_in => vram[821][0].CLK
-clk_in => vram[821][1].CLK
-clk_in => vram[821][2].CLK
-clk_in => vram[821][3].CLK
-clk_in => vram[821][4].CLK
-clk_in => vram[821][5].CLK
-clk_in => vram[821][6].CLK
-clk_in => vram[821][7].CLK
-clk_in => vram[820][0].CLK
-clk_in => vram[820][1].CLK
-clk_in => vram[820][2].CLK
-clk_in => vram[820][3].CLK
-clk_in => vram[820][4].CLK
-clk_in => vram[820][5].CLK
-clk_in => vram[820][6].CLK
-clk_in => vram[820][7].CLK
-clk_in => vram[819][0].CLK
-clk_in => vram[819][1].CLK
-clk_in => vram[819][2].CLK
-clk_in => vram[819][3].CLK
-clk_in => vram[819][4].CLK
-clk_in => vram[819][5].CLK
-clk_in => vram[819][6].CLK
-clk_in => vram[819][7].CLK
-clk_in => vram[818][0].CLK
-clk_in => vram[818][1].CLK
-clk_in => vram[818][2].CLK
-clk_in => vram[818][3].CLK
-clk_in => vram[818][4].CLK
-clk_in => vram[818][5].CLK
-clk_in => vram[818][6].CLK
-clk_in => vram[818][7].CLK
-clk_in => vram[817][0].CLK
-clk_in => vram[817][1].CLK
-clk_in => vram[817][2].CLK
-clk_in => vram[817][3].CLK
-clk_in => vram[817][4].CLK
-clk_in => vram[817][5].CLK
-clk_in => vram[817][6].CLK
-clk_in => vram[817][7].CLK
-clk_in => vram[816][0].CLK
-clk_in => vram[816][1].CLK
-clk_in => vram[816][2].CLK
-clk_in => vram[816][3].CLK
-clk_in => vram[816][4].CLK
-clk_in => vram[816][5].CLK
-clk_in => vram[816][6].CLK
-clk_in => vram[816][7].CLK
-clk_in => vram[815][0].CLK
-clk_in => vram[815][1].CLK
-clk_in => vram[815][2].CLK
-clk_in => vram[815][3].CLK
-clk_in => vram[815][4].CLK
-clk_in => vram[815][5].CLK
-clk_in => vram[815][6].CLK
-clk_in => vram[815][7].CLK
-clk_in => vram[814][0].CLK
-clk_in => vram[814][1].CLK
-clk_in => vram[814][2].CLK
-clk_in => vram[814][3].CLK
-clk_in => vram[814][4].CLK
-clk_in => vram[814][5].CLK
-clk_in => vram[814][6].CLK
-clk_in => vram[814][7].CLK
-clk_in => vram[813][0].CLK
-clk_in => vram[813][1].CLK
-clk_in => vram[813][2].CLK
-clk_in => vram[813][3].CLK
-clk_in => vram[813][4].CLK
-clk_in => vram[813][5].CLK
-clk_in => vram[813][6].CLK
-clk_in => vram[813][7].CLK
-clk_in => vram[812][0].CLK
-clk_in => vram[812][1].CLK
-clk_in => vram[812][2].CLK
-clk_in => vram[812][3].CLK
-clk_in => vram[812][4].CLK
-clk_in => vram[812][5].CLK
-clk_in => vram[812][6].CLK
-clk_in => vram[812][7].CLK
-clk_in => vram[811][0].CLK
-clk_in => vram[811][1].CLK
-clk_in => vram[811][2].CLK
-clk_in => vram[811][3].CLK
-clk_in => vram[811][4].CLK
-clk_in => vram[811][5].CLK
-clk_in => vram[811][6].CLK
-clk_in => vram[811][7].CLK
-clk_in => vram[810][0].CLK
-clk_in => vram[810][1].CLK
-clk_in => vram[810][2].CLK
-clk_in => vram[810][3].CLK
-clk_in => vram[810][4].CLK
-clk_in => vram[810][5].CLK
-clk_in => vram[810][6].CLK
-clk_in => vram[810][7].CLK
-clk_in => vram[809][0].CLK
-clk_in => vram[809][1].CLK
-clk_in => vram[809][2].CLK
-clk_in => vram[809][3].CLK
-clk_in => vram[809][4].CLK
-clk_in => vram[809][5].CLK
-clk_in => vram[809][6].CLK
-clk_in => vram[809][7].CLK
-clk_in => vram[808][0].CLK
-clk_in => vram[808][1].CLK
-clk_in => vram[808][2].CLK
-clk_in => vram[808][3].CLK
-clk_in => vram[808][4].CLK
-clk_in => vram[808][5].CLK
-clk_in => vram[808][6].CLK
-clk_in => vram[808][7].CLK
-clk_in => vram[807][0].CLK
-clk_in => vram[807][1].CLK
-clk_in => vram[807][2].CLK
-clk_in => vram[807][3].CLK
-clk_in => vram[807][4].CLK
-clk_in => vram[807][5].CLK
-clk_in => vram[807][6].CLK
-clk_in => vram[807][7].CLK
-clk_in => vram[806][0].CLK
-clk_in => vram[806][1].CLK
-clk_in => vram[806][2].CLK
-clk_in => vram[806][3].CLK
-clk_in => vram[806][4].CLK
-clk_in => vram[806][5].CLK
-clk_in => vram[806][6].CLK
-clk_in => vram[806][7].CLK
-clk_in => vram[805][0].CLK
-clk_in => vram[805][1].CLK
-clk_in => vram[805][2].CLK
-clk_in => vram[805][3].CLK
-clk_in => vram[805][4].CLK
-clk_in => vram[805][5].CLK
-clk_in => vram[805][6].CLK
-clk_in => vram[805][7].CLK
-clk_in => vram[804][0].CLK
-clk_in => vram[804][1].CLK
-clk_in => vram[804][2].CLK
-clk_in => vram[804][3].CLK
-clk_in => vram[804][4].CLK
-clk_in => vram[804][5].CLK
-clk_in => vram[804][6].CLK
-clk_in => vram[804][7].CLK
-clk_in => vram[803][0].CLK
-clk_in => vram[803][1].CLK
-clk_in => vram[803][2].CLK
-clk_in => vram[803][3].CLK
-clk_in => vram[803][4].CLK
-clk_in => vram[803][5].CLK
-clk_in => vram[803][6].CLK
-clk_in => vram[803][7].CLK
-clk_in => vram[802][0].CLK
-clk_in => vram[802][1].CLK
-clk_in => vram[802][2].CLK
-clk_in => vram[802][3].CLK
-clk_in => vram[802][4].CLK
-clk_in => vram[802][5].CLK
-clk_in => vram[802][6].CLK
-clk_in => vram[802][7].CLK
-clk_in => vram[801][0].CLK
-clk_in => vram[801][1].CLK
-clk_in => vram[801][2].CLK
-clk_in => vram[801][3].CLK
-clk_in => vram[801][4].CLK
-clk_in => vram[801][5].CLK
-clk_in => vram[801][6].CLK
-clk_in => vram[801][7].CLK
-clk_in => vram[800][0].CLK
-clk_in => vram[800][1].CLK
-clk_in => vram[800][2].CLK
-clk_in => vram[800][3].CLK
-clk_in => vram[800][4].CLK
-clk_in => vram[800][5].CLK
-clk_in => vram[800][6].CLK
-clk_in => vram[800][7].CLK
-clk_in => vram[799][0].CLK
-clk_in => vram[799][1].CLK
-clk_in => vram[799][2].CLK
-clk_in => vram[799][3].CLK
-clk_in => vram[799][4].CLK
-clk_in => vram[799][5].CLK
-clk_in => vram[799][6].CLK
-clk_in => vram[799][7].CLK
-clk_in => vram[798][0].CLK
-clk_in => vram[798][1].CLK
-clk_in => vram[798][2].CLK
-clk_in => vram[798][3].CLK
-clk_in => vram[798][4].CLK
-clk_in => vram[798][5].CLK
-clk_in => vram[798][6].CLK
-clk_in => vram[798][7].CLK
-clk_in => vram[797][0].CLK
-clk_in => vram[797][1].CLK
-clk_in => vram[797][2].CLK
-clk_in => vram[797][3].CLK
-clk_in => vram[797][4].CLK
-clk_in => vram[797][5].CLK
-clk_in => vram[797][6].CLK
-clk_in => vram[797][7].CLK
-clk_in => vram[796][0].CLK
-clk_in => vram[796][1].CLK
-clk_in => vram[796][2].CLK
-clk_in => vram[796][3].CLK
-clk_in => vram[796][4].CLK
-clk_in => vram[796][5].CLK
-clk_in => vram[796][6].CLK
-clk_in => vram[796][7].CLK
-clk_in => vram[795][0].CLK
-clk_in => vram[795][1].CLK
-clk_in => vram[795][2].CLK
-clk_in => vram[795][3].CLK
-clk_in => vram[795][4].CLK
-clk_in => vram[795][5].CLK
-clk_in => vram[795][6].CLK
-clk_in => vram[795][7].CLK
-clk_in => vram[794][0].CLK
-clk_in => vram[794][1].CLK
-clk_in => vram[794][2].CLK
-clk_in => vram[794][3].CLK
-clk_in => vram[794][4].CLK
-clk_in => vram[794][5].CLK
-clk_in => vram[794][6].CLK
-clk_in => vram[794][7].CLK
-clk_in => vram[793][0].CLK
-clk_in => vram[793][1].CLK
-clk_in => vram[793][2].CLK
-clk_in => vram[793][3].CLK
-clk_in => vram[793][4].CLK
-clk_in => vram[793][5].CLK
-clk_in => vram[793][6].CLK
-clk_in => vram[793][7].CLK
-clk_in => vram[792][0].CLK
-clk_in => vram[792][1].CLK
-clk_in => vram[792][2].CLK
-clk_in => vram[792][3].CLK
-clk_in => vram[792][4].CLK
-clk_in => vram[792][5].CLK
-clk_in => vram[792][6].CLK
-clk_in => vram[792][7].CLK
-clk_in => vram[791][0].CLK
-clk_in => vram[791][1].CLK
-clk_in => vram[791][2].CLK
-clk_in => vram[791][3].CLK
-clk_in => vram[791][4].CLK
-clk_in => vram[791][5].CLK
-clk_in => vram[791][6].CLK
-clk_in => vram[791][7].CLK
-clk_in => vram[790][0].CLK
-clk_in => vram[790][1].CLK
-clk_in => vram[790][2].CLK
-clk_in => vram[790][3].CLK
-clk_in => vram[790][4].CLK
-clk_in => vram[790][5].CLK
-clk_in => vram[790][6].CLK
-clk_in => vram[790][7].CLK
-clk_in => vram[789][0].CLK
-clk_in => vram[789][1].CLK
-clk_in => vram[789][2].CLK
-clk_in => vram[789][3].CLK
-clk_in => vram[789][4].CLK
-clk_in => vram[789][5].CLK
-clk_in => vram[789][6].CLK
-clk_in => vram[789][7].CLK
-clk_in => vram[788][0].CLK
-clk_in => vram[788][1].CLK
-clk_in => vram[788][2].CLK
-clk_in => vram[788][3].CLK
-clk_in => vram[788][4].CLK
-clk_in => vram[788][5].CLK
-clk_in => vram[788][6].CLK
-clk_in => vram[788][7].CLK
-clk_in => vram[787][0].CLK
-clk_in => vram[787][1].CLK
-clk_in => vram[787][2].CLK
-clk_in => vram[787][3].CLK
-clk_in => vram[787][4].CLK
-clk_in => vram[787][5].CLK
-clk_in => vram[787][6].CLK
-clk_in => vram[787][7].CLK
-clk_in => vram[786][0].CLK
-clk_in => vram[786][1].CLK
-clk_in => vram[786][2].CLK
-clk_in => vram[786][3].CLK
-clk_in => vram[786][4].CLK
-clk_in => vram[786][5].CLK
-clk_in => vram[786][6].CLK
-clk_in => vram[786][7].CLK
-clk_in => vram[785][0].CLK
-clk_in => vram[785][1].CLK
-clk_in => vram[785][2].CLK
-clk_in => vram[785][3].CLK
-clk_in => vram[785][4].CLK
-clk_in => vram[785][5].CLK
-clk_in => vram[785][6].CLK
-clk_in => vram[785][7].CLK
-clk_in => vram[784][0].CLK
-clk_in => vram[784][1].CLK
-clk_in => vram[784][2].CLK
-clk_in => vram[784][3].CLK
-clk_in => vram[784][4].CLK
-clk_in => vram[784][5].CLK
-clk_in => vram[784][6].CLK
-clk_in => vram[784][7].CLK
-clk_in => vram[783][0].CLK
-clk_in => vram[783][1].CLK
-clk_in => vram[783][2].CLK
-clk_in => vram[783][3].CLK
-clk_in => vram[783][4].CLK
-clk_in => vram[783][5].CLK
-clk_in => vram[783][6].CLK
-clk_in => vram[783][7].CLK
-clk_in => vram[782][0].CLK
-clk_in => vram[782][1].CLK
-clk_in => vram[782][2].CLK
-clk_in => vram[782][3].CLK
-clk_in => vram[782][4].CLK
-clk_in => vram[782][5].CLK
-clk_in => vram[782][6].CLK
-clk_in => vram[782][7].CLK
-clk_in => vram[781][0].CLK
-clk_in => vram[781][1].CLK
-clk_in => vram[781][2].CLK
-clk_in => vram[781][3].CLK
-clk_in => vram[781][4].CLK
-clk_in => vram[781][5].CLK
-clk_in => vram[781][6].CLK
-clk_in => vram[781][7].CLK
-clk_in => vram[780][0].CLK
-clk_in => vram[780][1].CLK
-clk_in => vram[780][2].CLK
-clk_in => vram[780][3].CLK
-clk_in => vram[780][4].CLK
-clk_in => vram[780][5].CLK
-clk_in => vram[780][6].CLK
-clk_in => vram[780][7].CLK
-clk_in => vram[779][0].CLK
-clk_in => vram[779][1].CLK
-clk_in => vram[779][2].CLK
-clk_in => vram[779][3].CLK
-clk_in => vram[779][4].CLK
-clk_in => vram[779][5].CLK
-clk_in => vram[779][6].CLK
-clk_in => vram[779][7].CLK
-clk_in => vram[778][0].CLK
-clk_in => vram[778][1].CLK
-clk_in => vram[778][2].CLK
-clk_in => vram[778][3].CLK
-clk_in => vram[778][4].CLK
-clk_in => vram[778][5].CLK
-clk_in => vram[778][6].CLK
-clk_in => vram[778][7].CLK
-clk_in => vram[777][0].CLK
-clk_in => vram[777][1].CLK
-clk_in => vram[777][2].CLK
-clk_in => vram[777][3].CLK
-clk_in => vram[777][4].CLK
-clk_in => vram[777][5].CLK
-clk_in => vram[777][6].CLK
-clk_in => vram[777][7].CLK
-clk_in => vram[776][0].CLK
-clk_in => vram[776][1].CLK
-clk_in => vram[776][2].CLK
-clk_in => vram[776][3].CLK
-clk_in => vram[776][4].CLK
-clk_in => vram[776][5].CLK
-clk_in => vram[776][6].CLK
-clk_in => vram[776][7].CLK
-clk_in => vram[775][0].CLK
-clk_in => vram[775][1].CLK
-clk_in => vram[775][2].CLK
-clk_in => vram[775][3].CLK
-clk_in => vram[775][4].CLK
-clk_in => vram[775][5].CLK
-clk_in => vram[775][6].CLK
-clk_in => vram[775][7].CLK
-clk_in => vram[774][0].CLK
-clk_in => vram[774][1].CLK
-clk_in => vram[774][2].CLK
-clk_in => vram[774][3].CLK
-clk_in => vram[774][4].CLK
-clk_in => vram[774][5].CLK
-clk_in => vram[774][6].CLK
-clk_in => vram[774][7].CLK
-clk_in => vram[773][0].CLK
-clk_in => vram[773][1].CLK
-clk_in => vram[773][2].CLK
-clk_in => vram[773][3].CLK
-clk_in => vram[773][4].CLK
-clk_in => vram[773][5].CLK
-clk_in => vram[773][6].CLK
-clk_in => vram[773][7].CLK
-clk_in => vram[772][0].CLK
-clk_in => vram[772][1].CLK
-clk_in => vram[772][2].CLK
-clk_in => vram[772][3].CLK
-clk_in => vram[772][4].CLK
-clk_in => vram[772][5].CLK
-clk_in => vram[772][6].CLK
-clk_in => vram[772][7].CLK
-clk_in => vram[771][0].CLK
-clk_in => vram[771][1].CLK
-clk_in => vram[771][2].CLK
-clk_in => vram[771][3].CLK
-clk_in => vram[771][4].CLK
-clk_in => vram[771][5].CLK
-clk_in => vram[771][6].CLK
-clk_in => vram[771][7].CLK
-clk_in => vram[770][0].CLK
-clk_in => vram[770][1].CLK
-clk_in => vram[770][2].CLK
-clk_in => vram[770][3].CLK
-clk_in => vram[770][4].CLK
-clk_in => vram[770][5].CLK
-clk_in => vram[770][6].CLK
-clk_in => vram[770][7].CLK
-clk_in => vram[769][0].CLK
-clk_in => vram[769][1].CLK
-clk_in => vram[769][2].CLK
-clk_in => vram[769][3].CLK
-clk_in => vram[769][4].CLK
-clk_in => vram[769][5].CLK
-clk_in => vram[769][6].CLK
-clk_in => vram[769][7].CLK
-clk_in => vram[768][0].CLK
-clk_in => vram[768][1].CLK
-clk_in => vram[768][2].CLK
-clk_in => vram[768][3].CLK
-clk_in => vram[768][4].CLK
-clk_in => vram[768][5].CLK
-clk_in => vram[768][6].CLK
-clk_in => vram[768][7].CLK
-clk_in => vram[767][0].CLK
-clk_in => vram[767][1].CLK
-clk_in => vram[767][2].CLK
-clk_in => vram[767][3].CLK
-clk_in => vram[767][4].CLK
-clk_in => vram[767][5].CLK
-clk_in => vram[767][6].CLK
-clk_in => vram[767][7].CLK
-clk_in => vram[766][0].CLK
-clk_in => vram[766][1].CLK
-clk_in => vram[766][2].CLK
-clk_in => vram[766][3].CLK
-clk_in => vram[766][4].CLK
-clk_in => vram[766][5].CLK
-clk_in => vram[766][6].CLK
-clk_in => vram[766][7].CLK
-clk_in => vram[765][0].CLK
-clk_in => vram[765][1].CLK
-clk_in => vram[765][2].CLK
-clk_in => vram[765][3].CLK
-clk_in => vram[765][4].CLK
-clk_in => vram[765][5].CLK
-clk_in => vram[765][6].CLK
-clk_in => vram[765][7].CLK
-clk_in => vram[764][0].CLK
-clk_in => vram[764][1].CLK
-clk_in => vram[764][2].CLK
-clk_in => vram[764][3].CLK
-clk_in => vram[764][4].CLK
-clk_in => vram[764][5].CLK
-clk_in => vram[764][6].CLK
-clk_in => vram[764][7].CLK
-clk_in => vram[763][0].CLK
-clk_in => vram[763][1].CLK
-clk_in => vram[763][2].CLK
-clk_in => vram[763][3].CLK
-clk_in => vram[763][4].CLK
-clk_in => vram[763][5].CLK
-clk_in => vram[763][6].CLK
-clk_in => vram[763][7].CLK
-clk_in => vram[762][0].CLK
-clk_in => vram[762][1].CLK
-clk_in => vram[762][2].CLK
-clk_in => vram[762][3].CLK
-clk_in => vram[762][4].CLK
-clk_in => vram[762][5].CLK
-clk_in => vram[762][6].CLK
-clk_in => vram[762][7].CLK
-clk_in => vram[761][0].CLK
-clk_in => vram[761][1].CLK
-clk_in => vram[761][2].CLK
-clk_in => vram[761][3].CLK
-clk_in => vram[761][4].CLK
-clk_in => vram[761][5].CLK
-clk_in => vram[761][6].CLK
-clk_in => vram[761][7].CLK
-clk_in => vram[760][0].CLK
-clk_in => vram[760][1].CLK
-clk_in => vram[760][2].CLK
-clk_in => vram[760][3].CLK
-clk_in => vram[760][4].CLK
-clk_in => vram[760][5].CLK
-clk_in => vram[760][6].CLK
-clk_in => vram[760][7].CLK
-clk_in => vram[759][0].CLK
-clk_in => vram[759][1].CLK
-clk_in => vram[759][2].CLK
-clk_in => vram[759][3].CLK
-clk_in => vram[759][4].CLK
-clk_in => vram[759][5].CLK
-clk_in => vram[759][6].CLK
-clk_in => vram[759][7].CLK
-clk_in => vram[758][0].CLK
-clk_in => vram[758][1].CLK
-clk_in => vram[758][2].CLK
-clk_in => vram[758][3].CLK
-clk_in => vram[758][4].CLK
-clk_in => vram[758][5].CLK
-clk_in => vram[758][6].CLK
-clk_in => vram[758][7].CLK
-clk_in => vram[757][0].CLK
-clk_in => vram[757][1].CLK
-clk_in => vram[757][2].CLK
-clk_in => vram[757][3].CLK
-clk_in => vram[757][4].CLK
-clk_in => vram[757][5].CLK
-clk_in => vram[757][6].CLK
-clk_in => vram[757][7].CLK
-clk_in => vram[756][0].CLK
-clk_in => vram[756][1].CLK
-clk_in => vram[756][2].CLK
-clk_in => vram[756][3].CLK
-clk_in => vram[756][4].CLK
-clk_in => vram[756][5].CLK
-clk_in => vram[756][6].CLK
-clk_in => vram[756][7].CLK
-clk_in => vram[755][0].CLK
-clk_in => vram[755][1].CLK
-clk_in => vram[755][2].CLK
-clk_in => vram[755][3].CLK
-clk_in => vram[755][4].CLK
-clk_in => vram[755][5].CLK
-clk_in => vram[755][6].CLK
-clk_in => vram[755][7].CLK
-clk_in => vram[754][0].CLK
-clk_in => vram[754][1].CLK
-clk_in => vram[754][2].CLK
-clk_in => vram[754][3].CLK
-clk_in => vram[754][4].CLK
-clk_in => vram[754][5].CLK
-clk_in => vram[754][6].CLK
-clk_in => vram[754][7].CLK
-clk_in => vram[753][0].CLK
-clk_in => vram[753][1].CLK
-clk_in => vram[753][2].CLK
-clk_in => vram[753][3].CLK
-clk_in => vram[753][4].CLK
-clk_in => vram[753][5].CLK
-clk_in => vram[753][6].CLK
-clk_in => vram[753][7].CLK
-clk_in => vram[752][0].CLK
-clk_in => vram[752][1].CLK
-clk_in => vram[752][2].CLK
-clk_in => vram[752][3].CLK
-clk_in => vram[752][4].CLK
-clk_in => vram[752][5].CLK
-clk_in => vram[752][6].CLK
-clk_in => vram[752][7].CLK
-clk_in => vram[751][0].CLK
-clk_in => vram[751][1].CLK
-clk_in => vram[751][2].CLK
-clk_in => vram[751][3].CLK
-clk_in => vram[751][4].CLK
-clk_in => vram[751][5].CLK
-clk_in => vram[751][6].CLK
-clk_in => vram[751][7].CLK
-clk_in => vram[750][0].CLK
-clk_in => vram[750][1].CLK
-clk_in => vram[750][2].CLK
-clk_in => vram[750][3].CLK
-clk_in => vram[750][4].CLK
-clk_in => vram[750][5].CLK
-clk_in => vram[750][6].CLK
-clk_in => vram[750][7].CLK
-clk_in => vram[749][0].CLK
-clk_in => vram[749][1].CLK
-clk_in => vram[749][2].CLK
-clk_in => vram[749][3].CLK
-clk_in => vram[749][4].CLK
-clk_in => vram[749][5].CLK
-clk_in => vram[749][6].CLK
-clk_in => vram[749][7].CLK
-clk_in => vram[748][0].CLK
-clk_in => vram[748][1].CLK
-clk_in => vram[748][2].CLK
-clk_in => vram[748][3].CLK
-clk_in => vram[748][4].CLK
-clk_in => vram[748][5].CLK
-clk_in => vram[748][6].CLK
-clk_in => vram[748][7].CLK
-clk_in => vram[747][0].CLK
-clk_in => vram[747][1].CLK
-clk_in => vram[747][2].CLK
-clk_in => vram[747][3].CLK
-clk_in => vram[747][4].CLK
-clk_in => vram[747][5].CLK
-clk_in => vram[747][6].CLK
-clk_in => vram[747][7].CLK
-clk_in => vram[746][0].CLK
-clk_in => vram[746][1].CLK
-clk_in => vram[746][2].CLK
-clk_in => vram[746][3].CLK
-clk_in => vram[746][4].CLK
-clk_in => vram[746][5].CLK
-clk_in => vram[746][6].CLK
-clk_in => vram[746][7].CLK
-clk_in => vram[745][0].CLK
-clk_in => vram[745][1].CLK
-clk_in => vram[745][2].CLK
-clk_in => vram[745][3].CLK
-clk_in => vram[745][4].CLK
-clk_in => vram[745][5].CLK
-clk_in => vram[745][6].CLK
-clk_in => vram[745][7].CLK
-clk_in => vram[744][0].CLK
-clk_in => vram[744][1].CLK
-clk_in => vram[744][2].CLK
-clk_in => vram[744][3].CLK
-clk_in => vram[744][4].CLK
-clk_in => vram[744][5].CLK
-clk_in => vram[744][6].CLK
-clk_in => vram[744][7].CLK
-clk_in => vram[743][0].CLK
-clk_in => vram[743][1].CLK
-clk_in => vram[743][2].CLK
-clk_in => vram[743][3].CLK
-clk_in => vram[743][4].CLK
-clk_in => vram[743][5].CLK
-clk_in => vram[743][6].CLK
-clk_in => vram[743][7].CLK
-clk_in => vram[742][0].CLK
-clk_in => vram[742][1].CLK
-clk_in => vram[742][2].CLK
-clk_in => vram[742][3].CLK
-clk_in => vram[742][4].CLK
-clk_in => vram[742][5].CLK
-clk_in => vram[742][6].CLK
-clk_in => vram[742][7].CLK
-clk_in => vram[741][0].CLK
-clk_in => vram[741][1].CLK
-clk_in => vram[741][2].CLK
-clk_in => vram[741][3].CLK
-clk_in => vram[741][4].CLK
-clk_in => vram[741][5].CLK
-clk_in => vram[741][6].CLK
-clk_in => vram[741][7].CLK
-clk_in => vram[740][0].CLK
-clk_in => vram[740][1].CLK
-clk_in => vram[740][2].CLK
-clk_in => vram[740][3].CLK
-clk_in => vram[740][4].CLK
-clk_in => vram[740][5].CLK
-clk_in => vram[740][6].CLK
-clk_in => vram[740][7].CLK
-clk_in => vram[739][0].CLK
-clk_in => vram[739][1].CLK
-clk_in => vram[739][2].CLK
-clk_in => vram[739][3].CLK
-clk_in => vram[739][4].CLK
-clk_in => vram[739][5].CLK
-clk_in => vram[739][6].CLK
-clk_in => vram[739][7].CLK
-clk_in => vram[738][0].CLK
-clk_in => vram[738][1].CLK
-clk_in => vram[738][2].CLK
-clk_in => vram[738][3].CLK
-clk_in => vram[738][4].CLK
-clk_in => vram[738][5].CLK
-clk_in => vram[738][6].CLK
-clk_in => vram[738][7].CLK
-clk_in => vram[737][0].CLK
-clk_in => vram[737][1].CLK
-clk_in => vram[737][2].CLK
-clk_in => vram[737][3].CLK
-clk_in => vram[737][4].CLK
-clk_in => vram[737][5].CLK
-clk_in => vram[737][6].CLK
-clk_in => vram[737][7].CLK
-clk_in => vram[736][0].CLK
-clk_in => vram[736][1].CLK
-clk_in => vram[736][2].CLK
-clk_in => vram[736][3].CLK
-clk_in => vram[736][4].CLK
-clk_in => vram[736][5].CLK
-clk_in => vram[736][6].CLK
-clk_in => vram[736][7].CLK
-clk_in => vram[735][0].CLK
-clk_in => vram[735][1].CLK
-clk_in => vram[735][2].CLK
-clk_in => vram[735][3].CLK
-clk_in => vram[735][4].CLK
-clk_in => vram[735][5].CLK
-clk_in => vram[735][6].CLK
-clk_in => vram[735][7].CLK
-clk_in => vram[734][0].CLK
-clk_in => vram[734][1].CLK
-clk_in => vram[734][2].CLK
-clk_in => vram[734][3].CLK
-clk_in => vram[734][4].CLK
-clk_in => vram[734][5].CLK
-clk_in => vram[734][6].CLK
-clk_in => vram[734][7].CLK
-clk_in => vram[733][0].CLK
-clk_in => vram[733][1].CLK
-clk_in => vram[733][2].CLK
-clk_in => vram[733][3].CLK
-clk_in => vram[733][4].CLK
-clk_in => vram[733][5].CLK
-clk_in => vram[733][6].CLK
-clk_in => vram[733][7].CLK
-clk_in => vram[732][0].CLK
-clk_in => vram[732][1].CLK
-clk_in => vram[732][2].CLK
-clk_in => vram[732][3].CLK
-clk_in => vram[732][4].CLK
-clk_in => vram[732][5].CLK
-clk_in => vram[732][6].CLK
-clk_in => vram[732][7].CLK
-clk_in => vram[731][0].CLK
-clk_in => vram[731][1].CLK
-clk_in => vram[731][2].CLK
-clk_in => vram[731][3].CLK
-clk_in => vram[731][4].CLK
-clk_in => vram[731][5].CLK
-clk_in => vram[731][6].CLK
-clk_in => vram[731][7].CLK
-clk_in => vram[730][0].CLK
-clk_in => vram[730][1].CLK
-clk_in => vram[730][2].CLK
-clk_in => vram[730][3].CLK
-clk_in => vram[730][4].CLK
-clk_in => vram[730][5].CLK
-clk_in => vram[730][6].CLK
-clk_in => vram[730][7].CLK
-clk_in => vram[729][0].CLK
-clk_in => vram[729][1].CLK
-clk_in => vram[729][2].CLK
-clk_in => vram[729][3].CLK
-clk_in => vram[729][4].CLK
-clk_in => vram[729][5].CLK
-clk_in => vram[729][6].CLK
-clk_in => vram[729][7].CLK
-clk_in => vram[728][0].CLK
-clk_in => vram[728][1].CLK
-clk_in => vram[728][2].CLK
-clk_in => vram[728][3].CLK
-clk_in => vram[728][4].CLK
-clk_in => vram[728][5].CLK
-clk_in => vram[728][6].CLK
-clk_in => vram[728][7].CLK
-clk_in => vram[727][0].CLK
-clk_in => vram[727][1].CLK
-clk_in => vram[727][2].CLK
-clk_in => vram[727][3].CLK
-clk_in => vram[727][4].CLK
-clk_in => vram[727][5].CLK
-clk_in => vram[727][6].CLK
-clk_in => vram[727][7].CLK
-clk_in => vram[726][0].CLK
-clk_in => vram[726][1].CLK
-clk_in => vram[726][2].CLK
-clk_in => vram[726][3].CLK
-clk_in => vram[726][4].CLK
-clk_in => vram[726][5].CLK
-clk_in => vram[726][6].CLK
-clk_in => vram[726][7].CLK
-clk_in => vram[725][0].CLK
-clk_in => vram[725][1].CLK
-clk_in => vram[725][2].CLK
-clk_in => vram[725][3].CLK
-clk_in => vram[725][4].CLK
-clk_in => vram[725][5].CLK
-clk_in => vram[725][6].CLK
-clk_in => vram[725][7].CLK
-clk_in => vram[724][0].CLK
-clk_in => vram[724][1].CLK
-clk_in => vram[724][2].CLK
-clk_in => vram[724][3].CLK
-clk_in => vram[724][4].CLK
-clk_in => vram[724][5].CLK
-clk_in => vram[724][6].CLK
-clk_in => vram[724][7].CLK
-clk_in => vram[723][0].CLK
-clk_in => vram[723][1].CLK
-clk_in => vram[723][2].CLK
-clk_in => vram[723][3].CLK
-clk_in => vram[723][4].CLK
-clk_in => vram[723][5].CLK
-clk_in => vram[723][6].CLK
-clk_in => vram[723][7].CLK
-clk_in => vram[722][0].CLK
-clk_in => vram[722][1].CLK
-clk_in => vram[722][2].CLK
-clk_in => vram[722][3].CLK
-clk_in => vram[722][4].CLK
-clk_in => vram[722][5].CLK
-clk_in => vram[722][6].CLK
-clk_in => vram[722][7].CLK
-clk_in => vram[721][0].CLK
-clk_in => vram[721][1].CLK
-clk_in => vram[721][2].CLK
-clk_in => vram[721][3].CLK
-clk_in => vram[721][4].CLK
-clk_in => vram[721][5].CLK
-clk_in => vram[721][6].CLK
-clk_in => vram[721][7].CLK
-clk_in => vram[720][0].CLK
-clk_in => vram[720][1].CLK
-clk_in => vram[720][2].CLK
-clk_in => vram[720][3].CLK
-clk_in => vram[720][4].CLK
-clk_in => vram[720][5].CLK
-clk_in => vram[720][6].CLK
-clk_in => vram[720][7].CLK
-clk_in => vram[719][0].CLK
-clk_in => vram[719][1].CLK
-clk_in => vram[719][2].CLK
-clk_in => vram[719][3].CLK
-clk_in => vram[719][4].CLK
-clk_in => vram[719][5].CLK
-clk_in => vram[719][6].CLK
-clk_in => vram[719][7].CLK
-clk_in => vram[718][0].CLK
-clk_in => vram[718][1].CLK
-clk_in => vram[718][2].CLK
-clk_in => vram[718][3].CLK
-clk_in => vram[718][4].CLK
-clk_in => vram[718][5].CLK
-clk_in => vram[718][6].CLK
-clk_in => vram[718][7].CLK
-clk_in => vram[717][0].CLK
-clk_in => vram[717][1].CLK
-clk_in => vram[717][2].CLK
-clk_in => vram[717][3].CLK
-clk_in => vram[717][4].CLK
-clk_in => vram[717][5].CLK
-clk_in => vram[717][6].CLK
-clk_in => vram[717][7].CLK
-clk_in => vram[716][0].CLK
-clk_in => vram[716][1].CLK
-clk_in => vram[716][2].CLK
-clk_in => vram[716][3].CLK
-clk_in => vram[716][4].CLK
-clk_in => vram[716][5].CLK
-clk_in => vram[716][6].CLK
-clk_in => vram[716][7].CLK
-clk_in => vram[715][0].CLK
-clk_in => vram[715][1].CLK
-clk_in => vram[715][2].CLK
-clk_in => vram[715][3].CLK
-clk_in => vram[715][4].CLK
-clk_in => vram[715][5].CLK
-clk_in => vram[715][6].CLK
-clk_in => vram[715][7].CLK
-clk_in => vram[714][0].CLK
-clk_in => vram[714][1].CLK
-clk_in => vram[714][2].CLK
-clk_in => vram[714][3].CLK
-clk_in => vram[714][4].CLK
-clk_in => vram[714][5].CLK
-clk_in => vram[714][6].CLK
-clk_in => vram[714][7].CLK
-clk_in => vram[713][0].CLK
-clk_in => vram[713][1].CLK
-clk_in => vram[713][2].CLK
-clk_in => vram[713][3].CLK
-clk_in => vram[713][4].CLK
-clk_in => vram[713][5].CLK
-clk_in => vram[713][6].CLK
-clk_in => vram[713][7].CLK
-clk_in => vram[712][0].CLK
-clk_in => vram[712][1].CLK
-clk_in => vram[712][2].CLK
-clk_in => vram[712][3].CLK
-clk_in => vram[712][4].CLK
-clk_in => vram[712][5].CLK
-clk_in => vram[712][6].CLK
-clk_in => vram[712][7].CLK
-clk_in => vram[711][0].CLK
-clk_in => vram[711][1].CLK
-clk_in => vram[711][2].CLK
-clk_in => vram[711][3].CLK
-clk_in => vram[711][4].CLK
-clk_in => vram[711][5].CLK
-clk_in => vram[711][6].CLK
-clk_in => vram[711][7].CLK
-clk_in => vram[710][0].CLK
-clk_in => vram[710][1].CLK
-clk_in => vram[710][2].CLK
-clk_in => vram[710][3].CLK
-clk_in => vram[710][4].CLK
-clk_in => vram[710][5].CLK
-clk_in => vram[710][6].CLK
-clk_in => vram[710][7].CLK
-clk_in => vram[709][0].CLK
-clk_in => vram[709][1].CLK
-clk_in => vram[709][2].CLK
-clk_in => vram[709][3].CLK
-clk_in => vram[709][4].CLK
-clk_in => vram[709][5].CLK
-clk_in => vram[709][6].CLK
-clk_in => vram[709][7].CLK
-clk_in => vram[708][0].CLK
-clk_in => vram[708][1].CLK
-clk_in => vram[708][2].CLK
-clk_in => vram[708][3].CLK
-clk_in => vram[708][4].CLK
-clk_in => vram[708][5].CLK
-clk_in => vram[708][6].CLK
-clk_in => vram[708][7].CLK
-clk_in => vram[707][0].CLK
-clk_in => vram[707][1].CLK
-clk_in => vram[707][2].CLK
-clk_in => vram[707][3].CLK
-clk_in => vram[707][4].CLK
-clk_in => vram[707][5].CLK
-clk_in => vram[707][6].CLK
-clk_in => vram[707][7].CLK
-clk_in => vram[706][0].CLK
-clk_in => vram[706][1].CLK
-clk_in => vram[706][2].CLK
-clk_in => vram[706][3].CLK
-clk_in => vram[706][4].CLK
-clk_in => vram[706][5].CLK
-clk_in => vram[706][6].CLK
-clk_in => vram[706][7].CLK
-clk_in => vram[705][0].CLK
-clk_in => vram[705][1].CLK
-clk_in => vram[705][2].CLK
-clk_in => vram[705][3].CLK
-clk_in => vram[705][4].CLK
-clk_in => vram[705][5].CLK
-clk_in => vram[705][6].CLK
-clk_in => vram[705][7].CLK
-clk_in => vram[704][0].CLK
-clk_in => vram[704][1].CLK
-clk_in => vram[704][2].CLK
-clk_in => vram[704][3].CLK
-clk_in => vram[704][4].CLK
-clk_in => vram[704][5].CLK
-clk_in => vram[704][6].CLK
-clk_in => vram[704][7].CLK
-clk_in => vram[703][0].CLK
-clk_in => vram[703][1].CLK
-clk_in => vram[703][2].CLK
-clk_in => vram[703][3].CLK
-clk_in => vram[703][4].CLK
-clk_in => vram[703][5].CLK
-clk_in => vram[703][6].CLK
-clk_in => vram[703][7].CLK
-clk_in => vram[702][0].CLK
-clk_in => vram[702][1].CLK
-clk_in => vram[702][2].CLK
-clk_in => vram[702][3].CLK
-clk_in => vram[702][4].CLK
-clk_in => vram[702][5].CLK
-clk_in => vram[702][6].CLK
-clk_in => vram[702][7].CLK
-clk_in => vram[701][0].CLK
-clk_in => vram[701][1].CLK
-clk_in => vram[701][2].CLK
-clk_in => vram[701][3].CLK
-clk_in => vram[701][4].CLK
-clk_in => vram[701][5].CLK
-clk_in => vram[701][6].CLK
-clk_in => vram[701][7].CLK
-clk_in => vram[700][0].CLK
-clk_in => vram[700][1].CLK
-clk_in => vram[700][2].CLK
-clk_in => vram[700][3].CLK
-clk_in => vram[700][4].CLK
-clk_in => vram[700][5].CLK
-clk_in => vram[700][6].CLK
-clk_in => vram[700][7].CLK
-clk_in => vram[699][0].CLK
-clk_in => vram[699][1].CLK
-clk_in => vram[699][2].CLK
-clk_in => vram[699][3].CLK
-clk_in => vram[699][4].CLK
-clk_in => vram[699][5].CLK
-clk_in => vram[699][6].CLK
-clk_in => vram[699][7].CLK
-clk_in => vram[698][0].CLK
-clk_in => vram[698][1].CLK
-clk_in => vram[698][2].CLK
-clk_in => vram[698][3].CLK
-clk_in => vram[698][4].CLK
-clk_in => vram[698][5].CLK
-clk_in => vram[698][6].CLK
-clk_in => vram[698][7].CLK
-clk_in => vram[697][0].CLK
-clk_in => vram[697][1].CLK
-clk_in => vram[697][2].CLK
-clk_in => vram[697][3].CLK
-clk_in => vram[697][4].CLK
-clk_in => vram[697][5].CLK
-clk_in => vram[697][6].CLK
-clk_in => vram[697][7].CLK
-clk_in => vram[696][0].CLK
-clk_in => vram[696][1].CLK
-clk_in => vram[696][2].CLK
-clk_in => vram[696][3].CLK
-clk_in => vram[696][4].CLK
-clk_in => vram[696][5].CLK
-clk_in => vram[696][6].CLK
-clk_in => vram[696][7].CLK
-clk_in => vram[695][0].CLK
-clk_in => vram[695][1].CLK
-clk_in => vram[695][2].CLK
-clk_in => vram[695][3].CLK
-clk_in => vram[695][4].CLK
-clk_in => vram[695][5].CLK
-clk_in => vram[695][6].CLK
-clk_in => vram[695][7].CLK
-clk_in => vram[694][0].CLK
-clk_in => vram[694][1].CLK
-clk_in => vram[694][2].CLK
-clk_in => vram[694][3].CLK
-clk_in => vram[694][4].CLK
-clk_in => vram[694][5].CLK
-clk_in => vram[694][6].CLK
-clk_in => vram[694][7].CLK
-clk_in => vram[693][0].CLK
-clk_in => vram[693][1].CLK
-clk_in => vram[693][2].CLK
-clk_in => vram[693][3].CLK
-clk_in => vram[693][4].CLK
-clk_in => vram[693][5].CLK
-clk_in => vram[693][6].CLK
-clk_in => vram[693][7].CLK
-clk_in => vram[692][0].CLK
-clk_in => vram[692][1].CLK
-clk_in => vram[692][2].CLK
-clk_in => vram[692][3].CLK
-clk_in => vram[692][4].CLK
-clk_in => vram[692][5].CLK
-clk_in => vram[692][6].CLK
-clk_in => vram[692][7].CLK
-clk_in => vram[691][0].CLK
-clk_in => vram[691][1].CLK
-clk_in => vram[691][2].CLK
-clk_in => vram[691][3].CLK
-clk_in => vram[691][4].CLK
-clk_in => vram[691][5].CLK
-clk_in => vram[691][6].CLK
-clk_in => vram[691][7].CLK
-clk_in => vram[690][0].CLK
-clk_in => vram[690][1].CLK
-clk_in => vram[690][2].CLK
-clk_in => vram[690][3].CLK
-clk_in => vram[690][4].CLK
-clk_in => vram[690][5].CLK
-clk_in => vram[690][6].CLK
-clk_in => vram[690][7].CLK
-clk_in => vram[689][0].CLK
-clk_in => vram[689][1].CLK
-clk_in => vram[689][2].CLK
-clk_in => vram[689][3].CLK
-clk_in => vram[689][4].CLK
-clk_in => vram[689][5].CLK
-clk_in => vram[689][6].CLK
-clk_in => vram[689][7].CLK
-clk_in => vram[688][0].CLK
-clk_in => vram[688][1].CLK
-clk_in => vram[688][2].CLK
-clk_in => vram[688][3].CLK
-clk_in => vram[688][4].CLK
-clk_in => vram[688][5].CLK
-clk_in => vram[688][6].CLK
-clk_in => vram[688][7].CLK
-clk_in => vram[687][0].CLK
-clk_in => vram[687][1].CLK
-clk_in => vram[687][2].CLK
-clk_in => vram[687][3].CLK
-clk_in => vram[687][4].CLK
-clk_in => vram[687][5].CLK
-clk_in => vram[687][6].CLK
-clk_in => vram[687][7].CLK
-clk_in => vram[686][0].CLK
-clk_in => vram[686][1].CLK
-clk_in => vram[686][2].CLK
-clk_in => vram[686][3].CLK
-clk_in => vram[686][4].CLK
-clk_in => vram[686][5].CLK
-clk_in => vram[686][6].CLK
-clk_in => vram[686][7].CLK
-clk_in => vram[685][0].CLK
-clk_in => vram[685][1].CLK
-clk_in => vram[685][2].CLK
-clk_in => vram[685][3].CLK
-clk_in => vram[685][4].CLK
-clk_in => vram[685][5].CLK
-clk_in => vram[685][6].CLK
-clk_in => vram[685][7].CLK
-clk_in => vram[684][0].CLK
-clk_in => vram[684][1].CLK
-clk_in => vram[684][2].CLK
-clk_in => vram[684][3].CLK
-clk_in => vram[684][4].CLK
-clk_in => vram[684][5].CLK
-clk_in => vram[684][6].CLK
-clk_in => vram[684][7].CLK
-clk_in => vram[683][0].CLK
-clk_in => vram[683][1].CLK
-clk_in => vram[683][2].CLK
-clk_in => vram[683][3].CLK
-clk_in => vram[683][4].CLK
-clk_in => vram[683][5].CLK
-clk_in => vram[683][6].CLK
-clk_in => vram[683][7].CLK
-clk_in => vram[682][0].CLK
-clk_in => vram[682][1].CLK
-clk_in => vram[682][2].CLK
-clk_in => vram[682][3].CLK
-clk_in => vram[682][4].CLK
-clk_in => vram[682][5].CLK
-clk_in => vram[682][6].CLK
-clk_in => vram[682][7].CLK
-clk_in => vram[681][0].CLK
-clk_in => vram[681][1].CLK
-clk_in => vram[681][2].CLK
-clk_in => vram[681][3].CLK
-clk_in => vram[681][4].CLK
-clk_in => vram[681][5].CLK
-clk_in => vram[681][6].CLK
-clk_in => vram[681][7].CLK
-clk_in => vram[680][0].CLK
-clk_in => vram[680][1].CLK
-clk_in => vram[680][2].CLK
-clk_in => vram[680][3].CLK
-clk_in => vram[680][4].CLK
-clk_in => vram[680][5].CLK
-clk_in => vram[680][6].CLK
-clk_in => vram[680][7].CLK
-clk_in => vram[679][0].CLK
-clk_in => vram[679][1].CLK
-clk_in => vram[679][2].CLK
-clk_in => vram[679][3].CLK
-clk_in => vram[679][4].CLK
-clk_in => vram[679][5].CLK
-clk_in => vram[679][6].CLK
-clk_in => vram[679][7].CLK
-clk_in => vram[678][0].CLK
-clk_in => vram[678][1].CLK
-clk_in => vram[678][2].CLK
-clk_in => vram[678][3].CLK
-clk_in => vram[678][4].CLK
-clk_in => vram[678][5].CLK
-clk_in => vram[678][6].CLK
-clk_in => vram[678][7].CLK
-clk_in => vram[677][0].CLK
-clk_in => vram[677][1].CLK
-clk_in => vram[677][2].CLK
-clk_in => vram[677][3].CLK
-clk_in => vram[677][4].CLK
-clk_in => vram[677][5].CLK
-clk_in => vram[677][6].CLK
-clk_in => vram[677][7].CLK
-clk_in => vram[676][0].CLK
-clk_in => vram[676][1].CLK
-clk_in => vram[676][2].CLK
-clk_in => vram[676][3].CLK
-clk_in => vram[676][4].CLK
-clk_in => vram[676][5].CLK
-clk_in => vram[676][6].CLK
-clk_in => vram[676][7].CLK
-clk_in => vram[675][0].CLK
-clk_in => vram[675][1].CLK
-clk_in => vram[675][2].CLK
-clk_in => vram[675][3].CLK
-clk_in => vram[675][4].CLK
-clk_in => vram[675][5].CLK
-clk_in => vram[675][6].CLK
-clk_in => vram[675][7].CLK
-clk_in => vram[674][0].CLK
-clk_in => vram[674][1].CLK
-clk_in => vram[674][2].CLK
-clk_in => vram[674][3].CLK
-clk_in => vram[674][4].CLK
-clk_in => vram[674][5].CLK
-clk_in => vram[674][6].CLK
-clk_in => vram[674][7].CLK
-clk_in => vram[673][0].CLK
-clk_in => vram[673][1].CLK
-clk_in => vram[673][2].CLK
-clk_in => vram[673][3].CLK
-clk_in => vram[673][4].CLK
-clk_in => vram[673][5].CLK
-clk_in => vram[673][6].CLK
-clk_in => vram[673][7].CLK
-clk_in => vram[672][0].CLK
-clk_in => vram[672][1].CLK
-clk_in => vram[672][2].CLK
-clk_in => vram[672][3].CLK
-clk_in => vram[672][4].CLK
-clk_in => vram[672][5].CLK
-clk_in => vram[672][6].CLK
-clk_in => vram[672][7].CLK
-clk_in => vram[671][0].CLK
-clk_in => vram[671][1].CLK
-clk_in => vram[671][2].CLK
-clk_in => vram[671][3].CLK
-clk_in => vram[671][4].CLK
-clk_in => vram[671][5].CLK
-clk_in => vram[671][6].CLK
-clk_in => vram[671][7].CLK
-clk_in => vram[670][0].CLK
-clk_in => vram[670][1].CLK
-clk_in => vram[670][2].CLK
-clk_in => vram[670][3].CLK
-clk_in => vram[670][4].CLK
-clk_in => vram[670][5].CLK
-clk_in => vram[670][6].CLK
-clk_in => vram[670][7].CLK
-clk_in => vram[669][0].CLK
-clk_in => vram[669][1].CLK
-clk_in => vram[669][2].CLK
-clk_in => vram[669][3].CLK
-clk_in => vram[669][4].CLK
-clk_in => vram[669][5].CLK
-clk_in => vram[669][6].CLK
-clk_in => vram[669][7].CLK
-clk_in => vram[668][0].CLK
-clk_in => vram[668][1].CLK
-clk_in => vram[668][2].CLK
-clk_in => vram[668][3].CLK
-clk_in => vram[668][4].CLK
-clk_in => vram[668][5].CLK
-clk_in => vram[668][6].CLK
-clk_in => vram[668][7].CLK
-clk_in => vram[667][0].CLK
-clk_in => vram[667][1].CLK
-clk_in => vram[667][2].CLK
-clk_in => vram[667][3].CLK
-clk_in => vram[667][4].CLK
-clk_in => vram[667][5].CLK
-clk_in => vram[667][6].CLK
-clk_in => vram[667][7].CLK
-clk_in => vram[666][0].CLK
-clk_in => vram[666][1].CLK
-clk_in => vram[666][2].CLK
-clk_in => vram[666][3].CLK
-clk_in => vram[666][4].CLK
-clk_in => vram[666][5].CLK
-clk_in => vram[666][6].CLK
-clk_in => vram[666][7].CLK
-clk_in => vram[665][0].CLK
-clk_in => vram[665][1].CLK
-clk_in => vram[665][2].CLK
-clk_in => vram[665][3].CLK
-clk_in => vram[665][4].CLK
-clk_in => vram[665][5].CLK
-clk_in => vram[665][6].CLK
-clk_in => vram[665][7].CLK
-clk_in => vram[664][0].CLK
-clk_in => vram[664][1].CLK
-clk_in => vram[664][2].CLK
-clk_in => vram[664][3].CLK
-clk_in => vram[664][4].CLK
-clk_in => vram[664][5].CLK
-clk_in => vram[664][6].CLK
-clk_in => vram[664][7].CLK
-clk_in => vram[663][0].CLK
-clk_in => vram[663][1].CLK
-clk_in => vram[663][2].CLK
-clk_in => vram[663][3].CLK
-clk_in => vram[663][4].CLK
-clk_in => vram[663][5].CLK
-clk_in => vram[663][6].CLK
-clk_in => vram[663][7].CLK
-clk_in => vram[662][0].CLK
-clk_in => vram[662][1].CLK
-clk_in => vram[662][2].CLK
-clk_in => vram[662][3].CLK
-clk_in => vram[662][4].CLK
-clk_in => vram[662][5].CLK
-clk_in => vram[662][6].CLK
-clk_in => vram[662][7].CLK
-clk_in => vram[661][0].CLK
-clk_in => vram[661][1].CLK
-clk_in => vram[661][2].CLK
-clk_in => vram[661][3].CLK
-clk_in => vram[661][4].CLK
-clk_in => vram[661][5].CLK
-clk_in => vram[661][6].CLK
-clk_in => vram[661][7].CLK
-clk_in => vram[660][0].CLK
-clk_in => vram[660][1].CLK
-clk_in => vram[660][2].CLK
-clk_in => vram[660][3].CLK
-clk_in => vram[660][4].CLK
-clk_in => vram[660][5].CLK
-clk_in => vram[660][6].CLK
-clk_in => vram[660][7].CLK
-clk_in => vram[659][0].CLK
-clk_in => vram[659][1].CLK
-clk_in => vram[659][2].CLK
-clk_in => vram[659][3].CLK
-clk_in => vram[659][4].CLK
-clk_in => vram[659][5].CLK
-clk_in => vram[659][6].CLK
-clk_in => vram[659][7].CLK
-clk_in => vram[658][0].CLK
-clk_in => vram[658][1].CLK
-clk_in => vram[658][2].CLK
-clk_in => vram[658][3].CLK
-clk_in => vram[658][4].CLK
-clk_in => vram[658][5].CLK
-clk_in => vram[658][6].CLK
-clk_in => vram[658][7].CLK
-clk_in => vram[657][0].CLK
-clk_in => vram[657][1].CLK
-clk_in => vram[657][2].CLK
-clk_in => vram[657][3].CLK
-clk_in => vram[657][4].CLK
-clk_in => vram[657][5].CLK
-clk_in => vram[657][6].CLK
-clk_in => vram[657][7].CLK
-clk_in => vram[656][0].CLK
-clk_in => vram[656][1].CLK
-clk_in => vram[656][2].CLK
-clk_in => vram[656][3].CLK
-clk_in => vram[656][4].CLK
-clk_in => vram[656][5].CLK
-clk_in => vram[656][6].CLK
-clk_in => vram[656][7].CLK
-clk_in => vram[655][0].CLK
-clk_in => vram[655][1].CLK
-clk_in => vram[655][2].CLK
-clk_in => vram[655][3].CLK
-clk_in => vram[655][4].CLK
-clk_in => vram[655][5].CLK
-clk_in => vram[655][6].CLK
-clk_in => vram[655][7].CLK
-clk_in => vram[654][0].CLK
-clk_in => vram[654][1].CLK
-clk_in => vram[654][2].CLK
-clk_in => vram[654][3].CLK
-clk_in => vram[654][4].CLK
-clk_in => vram[654][5].CLK
-clk_in => vram[654][6].CLK
-clk_in => vram[654][7].CLK
-clk_in => vram[653][0].CLK
-clk_in => vram[653][1].CLK
-clk_in => vram[653][2].CLK
-clk_in => vram[653][3].CLK
-clk_in => vram[653][4].CLK
-clk_in => vram[653][5].CLK
-clk_in => vram[653][6].CLK
-clk_in => vram[653][7].CLK
-clk_in => vram[652][0].CLK
-clk_in => vram[652][1].CLK
-clk_in => vram[652][2].CLK
-clk_in => vram[652][3].CLK
-clk_in => vram[652][4].CLK
-clk_in => vram[652][5].CLK
-clk_in => vram[652][6].CLK
-clk_in => vram[652][7].CLK
-clk_in => vram[651][0].CLK
-clk_in => vram[651][1].CLK
-clk_in => vram[651][2].CLK
-clk_in => vram[651][3].CLK
-clk_in => vram[651][4].CLK
-clk_in => vram[651][5].CLK
-clk_in => vram[651][6].CLK
-clk_in => vram[651][7].CLK
-clk_in => vram[650][0].CLK
-clk_in => vram[650][1].CLK
-clk_in => vram[650][2].CLK
-clk_in => vram[650][3].CLK
-clk_in => vram[650][4].CLK
-clk_in => vram[650][5].CLK
-clk_in => vram[650][6].CLK
-clk_in => vram[650][7].CLK
-clk_in => vram[649][0].CLK
-clk_in => vram[649][1].CLK
-clk_in => vram[649][2].CLK
-clk_in => vram[649][3].CLK
-clk_in => vram[649][4].CLK
-clk_in => vram[649][5].CLK
-clk_in => vram[649][6].CLK
-clk_in => vram[649][7].CLK
-clk_in => vram[648][0].CLK
-clk_in => vram[648][1].CLK
-clk_in => vram[648][2].CLK
-clk_in => vram[648][3].CLK
-clk_in => vram[648][4].CLK
-clk_in => vram[648][5].CLK
-clk_in => vram[648][6].CLK
-clk_in => vram[648][7].CLK
-clk_in => vram[647][0].CLK
-clk_in => vram[647][1].CLK
-clk_in => vram[647][2].CLK
-clk_in => vram[647][3].CLK
-clk_in => vram[647][4].CLK
-clk_in => vram[647][5].CLK
-clk_in => vram[647][6].CLK
-clk_in => vram[647][7].CLK
-clk_in => vram[646][0].CLK
-clk_in => vram[646][1].CLK
-clk_in => vram[646][2].CLK
-clk_in => vram[646][3].CLK
-clk_in => vram[646][4].CLK
-clk_in => vram[646][5].CLK
-clk_in => vram[646][6].CLK
-clk_in => vram[646][7].CLK
-clk_in => vram[645][0].CLK
-clk_in => vram[645][1].CLK
-clk_in => vram[645][2].CLK
-clk_in => vram[645][3].CLK
-clk_in => vram[645][4].CLK
-clk_in => vram[645][5].CLK
-clk_in => vram[645][6].CLK
-clk_in => vram[645][7].CLK
-clk_in => vram[644][0].CLK
-clk_in => vram[644][1].CLK
-clk_in => vram[644][2].CLK
-clk_in => vram[644][3].CLK
-clk_in => vram[644][4].CLK
-clk_in => vram[644][5].CLK
-clk_in => vram[644][6].CLK
-clk_in => vram[644][7].CLK
-clk_in => vram[643][0].CLK
-clk_in => vram[643][1].CLK
-clk_in => vram[643][2].CLK
-clk_in => vram[643][3].CLK
-clk_in => vram[643][4].CLK
-clk_in => vram[643][5].CLK
-clk_in => vram[643][6].CLK
-clk_in => vram[643][7].CLK
-clk_in => vram[642][0].CLK
-clk_in => vram[642][1].CLK
-clk_in => vram[642][2].CLK
-clk_in => vram[642][3].CLK
-clk_in => vram[642][4].CLK
-clk_in => vram[642][5].CLK
-clk_in => vram[642][6].CLK
-clk_in => vram[642][7].CLK
-clk_in => vram[641][0].CLK
-clk_in => vram[641][1].CLK
-clk_in => vram[641][2].CLK
-clk_in => vram[641][3].CLK
-clk_in => vram[641][4].CLK
-clk_in => vram[641][5].CLK
-clk_in => vram[641][6].CLK
-clk_in => vram[641][7].CLK
-clk_in => vram[640][0].CLK
-clk_in => vram[640][1].CLK
-clk_in => vram[640][2].CLK
-clk_in => vram[640][3].CLK
-clk_in => vram[640][4].CLK
-clk_in => vram[640][5].CLK
-clk_in => vram[640][6].CLK
-clk_in => vram[640][7].CLK
-clk_in => vram[639][0].CLK
-clk_in => vram[639][1].CLK
-clk_in => vram[639][2].CLK
-clk_in => vram[639][3].CLK
-clk_in => vram[639][4].CLK
-clk_in => vram[639][5].CLK
-clk_in => vram[639][6].CLK
-clk_in => vram[639][7].CLK
-clk_in => vram[638][0].CLK
-clk_in => vram[638][1].CLK
-clk_in => vram[638][2].CLK
-clk_in => vram[638][3].CLK
-clk_in => vram[638][4].CLK
-clk_in => vram[638][5].CLK
-clk_in => vram[638][6].CLK
-clk_in => vram[638][7].CLK
-clk_in => vram[637][0].CLK
-clk_in => vram[637][1].CLK
-clk_in => vram[637][2].CLK
-clk_in => vram[637][3].CLK
-clk_in => vram[637][4].CLK
-clk_in => vram[637][5].CLK
-clk_in => vram[637][6].CLK
-clk_in => vram[637][7].CLK
-clk_in => vram[636][0].CLK
-clk_in => vram[636][1].CLK
-clk_in => vram[636][2].CLK
-clk_in => vram[636][3].CLK
-clk_in => vram[636][4].CLK
-clk_in => vram[636][5].CLK
-clk_in => vram[636][6].CLK
-clk_in => vram[636][7].CLK
-clk_in => vram[635][0].CLK
-clk_in => vram[635][1].CLK
-clk_in => vram[635][2].CLK
-clk_in => vram[635][3].CLK
-clk_in => vram[635][4].CLK
-clk_in => vram[635][5].CLK
-clk_in => vram[635][6].CLK
-clk_in => vram[635][7].CLK
-clk_in => vram[634][0].CLK
-clk_in => vram[634][1].CLK
-clk_in => vram[634][2].CLK
-clk_in => vram[634][3].CLK
-clk_in => vram[634][4].CLK
-clk_in => vram[634][5].CLK
-clk_in => vram[634][6].CLK
-clk_in => vram[634][7].CLK
-clk_in => vram[633][0].CLK
-clk_in => vram[633][1].CLK
-clk_in => vram[633][2].CLK
-clk_in => vram[633][3].CLK
-clk_in => vram[633][4].CLK
-clk_in => vram[633][5].CLK
-clk_in => vram[633][6].CLK
-clk_in => vram[633][7].CLK
-clk_in => vram[632][0].CLK
-clk_in => vram[632][1].CLK
-clk_in => vram[632][2].CLK
-clk_in => vram[632][3].CLK
-clk_in => vram[632][4].CLK
-clk_in => vram[632][5].CLK
-clk_in => vram[632][6].CLK
-clk_in => vram[632][7].CLK
-clk_in => vram[631][0].CLK
-clk_in => vram[631][1].CLK
-clk_in => vram[631][2].CLK
-clk_in => vram[631][3].CLK
-clk_in => vram[631][4].CLK
-clk_in => vram[631][5].CLK
-clk_in => vram[631][6].CLK
-clk_in => vram[631][7].CLK
-clk_in => vram[630][0].CLK
-clk_in => vram[630][1].CLK
-clk_in => vram[630][2].CLK
-clk_in => vram[630][3].CLK
-clk_in => vram[630][4].CLK
-clk_in => vram[630][5].CLK
-clk_in => vram[630][6].CLK
-clk_in => vram[630][7].CLK
-clk_in => vram[629][0].CLK
-clk_in => vram[629][1].CLK
-clk_in => vram[629][2].CLK
-clk_in => vram[629][3].CLK
-clk_in => vram[629][4].CLK
-clk_in => vram[629][5].CLK
-clk_in => vram[629][6].CLK
-clk_in => vram[629][7].CLK
-clk_in => vram[628][0].CLK
-clk_in => vram[628][1].CLK
-clk_in => vram[628][2].CLK
-clk_in => vram[628][3].CLK
-clk_in => vram[628][4].CLK
-clk_in => vram[628][5].CLK
-clk_in => vram[628][6].CLK
-clk_in => vram[628][7].CLK
-clk_in => vram[627][0].CLK
-clk_in => vram[627][1].CLK
-clk_in => vram[627][2].CLK
-clk_in => vram[627][3].CLK
-clk_in => vram[627][4].CLK
-clk_in => vram[627][5].CLK
-clk_in => vram[627][6].CLK
-clk_in => vram[627][7].CLK
-clk_in => vram[626][0].CLK
-clk_in => vram[626][1].CLK
-clk_in => vram[626][2].CLK
-clk_in => vram[626][3].CLK
-clk_in => vram[626][4].CLK
-clk_in => vram[626][5].CLK
-clk_in => vram[626][6].CLK
-clk_in => vram[626][7].CLK
-clk_in => vram[625][0].CLK
-clk_in => vram[625][1].CLK
-clk_in => vram[625][2].CLK
-clk_in => vram[625][3].CLK
-clk_in => vram[625][4].CLK
-clk_in => vram[625][5].CLK
-clk_in => vram[625][6].CLK
-clk_in => vram[625][7].CLK
-clk_in => vram[624][0].CLK
-clk_in => vram[624][1].CLK
-clk_in => vram[624][2].CLK
-clk_in => vram[624][3].CLK
-clk_in => vram[624][4].CLK
-clk_in => vram[624][5].CLK
-clk_in => vram[624][6].CLK
-clk_in => vram[624][7].CLK
-clk_in => vram[623][0].CLK
-clk_in => vram[623][1].CLK
-clk_in => vram[623][2].CLK
-clk_in => vram[623][3].CLK
-clk_in => vram[623][4].CLK
-clk_in => vram[623][5].CLK
-clk_in => vram[623][6].CLK
-clk_in => vram[623][7].CLK
-clk_in => vram[622][0].CLK
-clk_in => vram[622][1].CLK
-clk_in => vram[622][2].CLK
-clk_in => vram[622][3].CLK
-clk_in => vram[622][4].CLK
-clk_in => vram[622][5].CLK
-clk_in => vram[622][6].CLK
-clk_in => vram[622][7].CLK
-clk_in => vram[621][0].CLK
-clk_in => vram[621][1].CLK
-clk_in => vram[621][2].CLK
-clk_in => vram[621][3].CLK
-clk_in => vram[621][4].CLK
-clk_in => vram[621][5].CLK
-clk_in => vram[621][6].CLK
-clk_in => vram[621][7].CLK
-clk_in => vram[620][0].CLK
-clk_in => vram[620][1].CLK
-clk_in => vram[620][2].CLK
-clk_in => vram[620][3].CLK
-clk_in => vram[620][4].CLK
-clk_in => vram[620][5].CLK
-clk_in => vram[620][6].CLK
-clk_in => vram[620][7].CLK
-clk_in => vram[619][0].CLK
-clk_in => vram[619][1].CLK
-clk_in => vram[619][2].CLK
-clk_in => vram[619][3].CLK
-clk_in => vram[619][4].CLK
-clk_in => vram[619][5].CLK
-clk_in => vram[619][6].CLK
-clk_in => vram[619][7].CLK
-clk_in => vram[618][0].CLK
-clk_in => vram[618][1].CLK
-clk_in => vram[618][2].CLK
-clk_in => vram[618][3].CLK
-clk_in => vram[618][4].CLK
-clk_in => vram[618][5].CLK
-clk_in => vram[618][6].CLK
-clk_in => vram[618][7].CLK
-clk_in => vram[617][0].CLK
-clk_in => vram[617][1].CLK
-clk_in => vram[617][2].CLK
-clk_in => vram[617][3].CLK
-clk_in => vram[617][4].CLK
-clk_in => vram[617][5].CLK
-clk_in => vram[617][6].CLK
-clk_in => vram[617][7].CLK
-clk_in => vram[616][0].CLK
-clk_in => vram[616][1].CLK
-clk_in => vram[616][2].CLK
-clk_in => vram[616][3].CLK
-clk_in => vram[616][4].CLK
-clk_in => vram[616][5].CLK
-clk_in => vram[616][6].CLK
-clk_in => vram[616][7].CLK
-clk_in => vram[615][0].CLK
-clk_in => vram[615][1].CLK
-clk_in => vram[615][2].CLK
-clk_in => vram[615][3].CLK
-clk_in => vram[615][4].CLK
-clk_in => vram[615][5].CLK
-clk_in => vram[615][6].CLK
-clk_in => vram[615][7].CLK
-clk_in => vram[614][0].CLK
-clk_in => vram[614][1].CLK
-clk_in => vram[614][2].CLK
-clk_in => vram[614][3].CLK
-clk_in => vram[614][4].CLK
-clk_in => vram[614][5].CLK
-clk_in => vram[614][6].CLK
-clk_in => vram[614][7].CLK
-clk_in => vram[613][0].CLK
-clk_in => vram[613][1].CLK
-clk_in => vram[613][2].CLK
-clk_in => vram[613][3].CLK
-clk_in => vram[613][4].CLK
-clk_in => vram[613][5].CLK
-clk_in => vram[613][6].CLK
-clk_in => vram[613][7].CLK
-clk_in => vram[612][0].CLK
-clk_in => vram[612][1].CLK
-clk_in => vram[612][2].CLK
-clk_in => vram[612][3].CLK
-clk_in => vram[612][4].CLK
-clk_in => vram[612][5].CLK
-clk_in => vram[612][6].CLK
-clk_in => vram[612][7].CLK
-clk_in => vram[611][0].CLK
-clk_in => vram[611][1].CLK
-clk_in => vram[611][2].CLK
-clk_in => vram[611][3].CLK
-clk_in => vram[611][4].CLK
-clk_in => vram[611][5].CLK
-clk_in => vram[611][6].CLK
-clk_in => vram[611][7].CLK
-clk_in => vram[610][0].CLK
-clk_in => vram[610][1].CLK
-clk_in => vram[610][2].CLK
-clk_in => vram[610][3].CLK
-clk_in => vram[610][4].CLK
-clk_in => vram[610][5].CLK
-clk_in => vram[610][6].CLK
-clk_in => vram[610][7].CLK
-clk_in => vram[609][0].CLK
-clk_in => vram[609][1].CLK
-clk_in => vram[609][2].CLK
-clk_in => vram[609][3].CLK
-clk_in => vram[609][4].CLK
-clk_in => vram[609][5].CLK
-clk_in => vram[609][6].CLK
-clk_in => vram[609][7].CLK
-clk_in => vram[608][0].CLK
-clk_in => vram[608][1].CLK
-clk_in => vram[608][2].CLK
-clk_in => vram[608][3].CLK
-clk_in => vram[608][4].CLK
-clk_in => vram[608][5].CLK
-clk_in => vram[608][6].CLK
-clk_in => vram[608][7].CLK
-clk_in => vram[607][0].CLK
-clk_in => vram[607][1].CLK
-clk_in => vram[607][2].CLK
-clk_in => vram[607][3].CLK
-clk_in => vram[607][4].CLK
-clk_in => vram[607][5].CLK
-clk_in => vram[607][6].CLK
-clk_in => vram[607][7].CLK
-clk_in => vram[606][0].CLK
-clk_in => vram[606][1].CLK
-clk_in => vram[606][2].CLK
-clk_in => vram[606][3].CLK
-clk_in => vram[606][4].CLK
-clk_in => vram[606][5].CLK
-clk_in => vram[606][6].CLK
-clk_in => vram[606][7].CLK
-clk_in => vram[605][0].CLK
-clk_in => vram[605][1].CLK
-clk_in => vram[605][2].CLK
-clk_in => vram[605][3].CLK
-clk_in => vram[605][4].CLK
-clk_in => vram[605][5].CLK
-clk_in => vram[605][6].CLK
-clk_in => vram[605][7].CLK
-clk_in => vram[604][0].CLK
-clk_in => vram[604][1].CLK
-clk_in => vram[604][2].CLK
-clk_in => vram[604][3].CLK
-clk_in => vram[604][4].CLK
-clk_in => vram[604][5].CLK
-clk_in => vram[604][6].CLK
-clk_in => vram[604][7].CLK
-clk_in => vram[603][0].CLK
-clk_in => vram[603][1].CLK
-clk_in => vram[603][2].CLK
-clk_in => vram[603][3].CLK
-clk_in => vram[603][4].CLK
-clk_in => vram[603][5].CLK
-clk_in => vram[603][6].CLK
-clk_in => vram[603][7].CLK
-clk_in => vram[602][0].CLK
-clk_in => vram[602][1].CLK
-clk_in => vram[602][2].CLK
-clk_in => vram[602][3].CLK
-clk_in => vram[602][4].CLK
-clk_in => vram[602][5].CLK
-clk_in => vram[602][6].CLK
-clk_in => vram[602][7].CLK
-clk_in => vram[601][0].CLK
-clk_in => vram[601][1].CLK
-clk_in => vram[601][2].CLK
-clk_in => vram[601][3].CLK
-clk_in => vram[601][4].CLK
-clk_in => vram[601][5].CLK
-clk_in => vram[601][6].CLK
-clk_in => vram[601][7].CLK
-clk_in => vram[600][0].CLK
-clk_in => vram[600][1].CLK
-clk_in => vram[600][2].CLK
-clk_in => vram[600][3].CLK
-clk_in => vram[600][4].CLK
-clk_in => vram[600][5].CLK
-clk_in => vram[600][6].CLK
-clk_in => vram[600][7].CLK
-clk_in => vram[599][0].CLK
-clk_in => vram[599][1].CLK
-clk_in => vram[599][2].CLK
-clk_in => vram[599][3].CLK
-clk_in => vram[599][4].CLK
-clk_in => vram[599][5].CLK
-clk_in => vram[599][6].CLK
-clk_in => vram[599][7].CLK
-clk_in => vram[598][0].CLK
-clk_in => vram[598][1].CLK
-clk_in => vram[598][2].CLK
-clk_in => vram[598][3].CLK
-clk_in => vram[598][4].CLK
-clk_in => vram[598][5].CLK
-clk_in => vram[598][6].CLK
-clk_in => vram[598][7].CLK
-clk_in => vram[597][0].CLK
-clk_in => vram[597][1].CLK
-clk_in => vram[597][2].CLK
-clk_in => vram[597][3].CLK
-clk_in => vram[597][4].CLK
-clk_in => vram[597][5].CLK
-clk_in => vram[597][6].CLK
-clk_in => vram[597][7].CLK
-clk_in => vram[596][0].CLK
-clk_in => vram[596][1].CLK
-clk_in => vram[596][2].CLK
-clk_in => vram[596][3].CLK
-clk_in => vram[596][4].CLK
-clk_in => vram[596][5].CLK
-clk_in => vram[596][6].CLK
-clk_in => vram[596][7].CLK
-clk_in => vram[595][0].CLK
-clk_in => vram[595][1].CLK
-clk_in => vram[595][2].CLK
-clk_in => vram[595][3].CLK
-clk_in => vram[595][4].CLK
-clk_in => vram[595][5].CLK
-clk_in => vram[595][6].CLK
-clk_in => vram[595][7].CLK
-clk_in => vram[594][0].CLK
-clk_in => vram[594][1].CLK
-clk_in => vram[594][2].CLK
-clk_in => vram[594][3].CLK
-clk_in => vram[594][4].CLK
-clk_in => vram[594][5].CLK
-clk_in => vram[594][6].CLK
-clk_in => vram[594][7].CLK
-clk_in => vram[593][0].CLK
-clk_in => vram[593][1].CLK
-clk_in => vram[593][2].CLK
-clk_in => vram[593][3].CLK
-clk_in => vram[593][4].CLK
-clk_in => vram[593][5].CLK
-clk_in => vram[593][6].CLK
-clk_in => vram[593][7].CLK
-clk_in => vram[592][0].CLK
-clk_in => vram[592][1].CLK
-clk_in => vram[592][2].CLK
-clk_in => vram[592][3].CLK
-clk_in => vram[592][4].CLK
-clk_in => vram[592][5].CLK
-clk_in => vram[592][6].CLK
-clk_in => vram[592][7].CLK
-clk_in => vram[591][0].CLK
-clk_in => vram[591][1].CLK
-clk_in => vram[591][2].CLK
-clk_in => vram[591][3].CLK
-clk_in => vram[591][4].CLK
-clk_in => vram[591][5].CLK
-clk_in => vram[591][6].CLK
-clk_in => vram[591][7].CLK
-clk_in => vram[590][0].CLK
-clk_in => vram[590][1].CLK
-clk_in => vram[590][2].CLK
-clk_in => vram[590][3].CLK
-clk_in => vram[590][4].CLK
-clk_in => vram[590][5].CLK
-clk_in => vram[590][6].CLK
-clk_in => vram[590][7].CLK
-clk_in => vram[589][0].CLK
-clk_in => vram[589][1].CLK
-clk_in => vram[589][2].CLK
-clk_in => vram[589][3].CLK
-clk_in => vram[589][4].CLK
-clk_in => vram[589][5].CLK
-clk_in => vram[589][6].CLK
-clk_in => vram[589][7].CLK
-clk_in => vram[588][0].CLK
-clk_in => vram[588][1].CLK
-clk_in => vram[588][2].CLK
-clk_in => vram[588][3].CLK
-clk_in => vram[588][4].CLK
-clk_in => vram[588][5].CLK
-clk_in => vram[588][6].CLK
-clk_in => vram[588][7].CLK
-clk_in => vram[587][0].CLK
-clk_in => vram[587][1].CLK
-clk_in => vram[587][2].CLK
-clk_in => vram[587][3].CLK
-clk_in => vram[587][4].CLK
-clk_in => vram[587][5].CLK
-clk_in => vram[587][6].CLK
-clk_in => vram[587][7].CLK
-clk_in => vram[586][0].CLK
-clk_in => vram[586][1].CLK
-clk_in => vram[586][2].CLK
-clk_in => vram[586][3].CLK
-clk_in => vram[586][4].CLK
-clk_in => vram[586][5].CLK
-clk_in => vram[586][6].CLK
-clk_in => vram[586][7].CLK
-clk_in => vram[585][0].CLK
-clk_in => vram[585][1].CLK
-clk_in => vram[585][2].CLK
-clk_in => vram[585][3].CLK
-clk_in => vram[585][4].CLK
-clk_in => vram[585][5].CLK
-clk_in => vram[585][6].CLK
-clk_in => vram[585][7].CLK
-clk_in => vram[584][0].CLK
-clk_in => vram[584][1].CLK
-clk_in => vram[584][2].CLK
-clk_in => vram[584][3].CLK
-clk_in => vram[584][4].CLK
-clk_in => vram[584][5].CLK
-clk_in => vram[584][6].CLK
-clk_in => vram[584][7].CLK
-clk_in => vram[583][0].CLK
-clk_in => vram[583][1].CLK
-clk_in => vram[583][2].CLK
-clk_in => vram[583][3].CLK
-clk_in => vram[583][4].CLK
-clk_in => vram[583][5].CLK
-clk_in => vram[583][6].CLK
-clk_in => vram[583][7].CLK
-clk_in => vram[582][0].CLK
-clk_in => vram[582][1].CLK
-clk_in => vram[582][2].CLK
-clk_in => vram[582][3].CLK
-clk_in => vram[582][4].CLK
-clk_in => vram[582][5].CLK
-clk_in => vram[582][6].CLK
-clk_in => vram[582][7].CLK
-clk_in => vram[581][0].CLK
-clk_in => vram[581][1].CLK
-clk_in => vram[581][2].CLK
-clk_in => vram[581][3].CLK
-clk_in => vram[581][4].CLK
-clk_in => vram[581][5].CLK
-clk_in => vram[581][6].CLK
-clk_in => vram[581][7].CLK
-clk_in => vram[580][0].CLK
-clk_in => vram[580][1].CLK
-clk_in => vram[580][2].CLK
-clk_in => vram[580][3].CLK
-clk_in => vram[580][4].CLK
-clk_in => vram[580][5].CLK
-clk_in => vram[580][6].CLK
-clk_in => vram[580][7].CLK
-clk_in => vram[579][0].CLK
-clk_in => vram[579][1].CLK
-clk_in => vram[579][2].CLK
-clk_in => vram[579][3].CLK
-clk_in => vram[579][4].CLK
-clk_in => vram[579][5].CLK
-clk_in => vram[579][6].CLK
-clk_in => vram[579][7].CLK
-clk_in => vram[578][0].CLK
-clk_in => vram[578][1].CLK
-clk_in => vram[578][2].CLK
-clk_in => vram[578][3].CLK
-clk_in => vram[578][4].CLK
-clk_in => vram[578][5].CLK
-clk_in => vram[578][6].CLK
-clk_in => vram[578][7].CLK
-clk_in => vram[577][0].CLK
-clk_in => vram[577][1].CLK
-clk_in => vram[577][2].CLK
-clk_in => vram[577][3].CLK
-clk_in => vram[577][4].CLK
-clk_in => vram[577][5].CLK
-clk_in => vram[577][6].CLK
-clk_in => vram[577][7].CLK
-clk_in => vram[576][0].CLK
-clk_in => vram[576][1].CLK
-clk_in => vram[576][2].CLK
-clk_in => vram[576][3].CLK
-clk_in => vram[576][4].CLK
-clk_in => vram[576][5].CLK
-clk_in => vram[576][6].CLK
-clk_in => vram[576][7].CLK
-clk_in => vram[575][0].CLK
-clk_in => vram[575][1].CLK
-clk_in => vram[575][2].CLK
-clk_in => vram[575][3].CLK
-clk_in => vram[575][4].CLK
-clk_in => vram[575][5].CLK
-clk_in => vram[575][6].CLK
-clk_in => vram[575][7].CLK
-clk_in => vram[574][0].CLK
-clk_in => vram[574][1].CLK
-clk_in => vram[574][2].CLK
-clk_in => vram[574][3].CLK
-clk_in => vram[574][4].CLK
-clk_in => vram[574][5].CLK
-clk_in => vram[574][6].CLK
-clk_in => vram[574][7].CLK
-clk_in => vram[573][0].CLK
-clk_in => vram[573][1].CLK
-clk_in => vram[573][2].CLK
-clk_in => vram[573][3].CLK
-clk_in => vram[573][4].CLK
-clk_in => vram[573][5].CLK
-clk_in => vram[573][6].CLK
-clk_in => vram[573][7].CLK
-clk_in => vram[572][0].CLK
-clk_in => vram[572][1].CLK
-clk_in => vram[572][2].CLK
-clk_in => vram[572][3].CLK
-clk_in => vram[572][4].CLK
-clk_in => vram[572][5].CLK
-clk_in => vram[572][6].CLK
-clk_in => vram[572][7].CLK
-clk_in => vram[571][0].CLK
-clk_in => vram[571][1].CLK
-clk_in => vram[571][2].CLK
-clk_in => vram[571][3].CLK
-clk_in => vram[571][4].CLK
-clk_in => vram[571][5].CLK
-clk_in => vram[571][6].CLK
-clk_in => vram[571][7].CLK
-clk_in => vram[570][0].CLK
-clk_in => vram[570][1].CLK
-clk_in => vram[570][2].CLK
-clk_in => vram[570][3].CLK
-clk_in => vram[570][4].CLK
-clk_in => vram[570][5].CLK
-clk_in => vram[570][6].CLK
-clk_in => vram[570][7].CLK
-clk_in => vram[569][0].CLK
-clk_in => vram[569][1].CLK
-clk_in => vram[569][2].CLK
-clk_in => vram[569][3].CLK
-clk_in => vram[569][4].CLK
-clk_in => vram[569][5].CLK
-clk_in => vram[569][6].CLK
-clk_in => vram[569][7].CLK
-clk_in => vram[568][0].CLK
-clk_in => vram[568][1].CLK
-clk_in => vram[568][2].CLK
-clk_in => vram[568][3].CLK
-clk_in => vram[568][4].CLK
-clk_in => vram[568][5].CLK
-clk_in => vram[568][6].CLK
-clk_in => vram[568][7].CLK
-clk_in => vram[567][0].CLK
-clk_in => vram[567][1].CLK
-clk_in => vram[567][2].CLK
-clk_in => vram[567][3].CLK
-clk_in => vram[567][4].CLK
-clk_in => vram[567][5].CLK
-clk_in => vram[567][6].CLK
-clk_in => vram[567][7].CLK
-clk_in => vram[566][0].CLK
-clk_in => vram[566][1].CLK
-clk_in => vram[566][2].CLK
-clk_in => vram[566][3].CLK
-clk_in => vram[566][4].CLK
-clk_in => vram[566][5].CLK
-clk_in => vram[566][6].CLK
-clk_in => vram[566][7].CLK
-clk_in => vram[565][0].CLK
-clk_in => vram[565][1].CLK
-clk_in => vram[565][2].CLK
-clk_in => vram[565][3].CLK
-clk_in => vram[565][4].CLK
-clk_in => vram[565][5].CLK
-clk_in => vram[565][6].CLK
-clk_in => vram[565][7].CLK
-clk_in => vram[564][0].CLK
-clk_in => vram[564][1].CLK
-clk_in => vram[564][2].CLK
-clk_in => vram[564][3].CLK
-clk_in => vram[564][4].CLK
-clk_in => vram[564][5].CLK
-clk_in => vram[564][6].CLK
-clk_in => vram[564][7].CLK
-clk_in => vram[563][0].CLK
-clk_in => vram[563][1].CLK
-clk_in => vram[563][2].CLK
-clk_in => vram[563][3].CLK
-clk_in => vram[563][4].CLK
-clk_in => vram[563][5].CLK
-clk_in => vram[563][6].CLK
-clk_in => vram[563][7].CLK
-clk_in => vram[562][0].CLK
-clk_in => vram[562][1].CLK
-clk_in => vram[562][2].CLK
-clk_in => vram[562][3].CLK
-clk_in => vram[562][4].CLK
-clk_in => vram[562][5].CLK
-clk_in => vram[562][6].CLK
-clk_in => vram[562][7].CLK
-clk_in => vram[561][0].CLK
-clk_in => vram[561][1].CLK
-clk_in => vram[561][2].CLK
-clk_in => vram[561][3].CLK
-clk_in => vram[561][4].CLK
-clk_in => vram[561][5].CLK
-clk_in => vram[561][6].CLK
-clk_in => vram[561][7].CLK
-clk_in => vram[560][0].CLK
-clk_in => vram[560][1].CLK
-clk_in => vram[560][2].CLK
-clk_in => vram[560][3].CLK
-clk_in => vram[560][4].CLK
-clk_in => vram[560][5].CLK
-clk_in => vram[560][6].CLK
-clk_in => vram[560][7].CLK
-clk_in => vram[559][0].CLK
-clk_in => vram[559][1].CLK
-clk_in => vram[559][2].CLK
-clk_in => vram[559][3].CLK
-clk_in => vram[559][4].CLK
-clk_in => vram[559][5].CLK
-clk_in => vram[559][6].CLK
-clk_in => vram[559][7].CLK
-clk_in => vram[558][0].CLK
-clk_in => vram[558][1].CLK
-clk_in => vram[558][2].CLK
-clk_in => vram[558][3].CLK
-clk_in => vram[558][4].CLK
-clk_in => vram[558][5].CLK
-clk_in => vram[558][6].CLK
-clk_in => vram[558][7].CLK
-clk_in => vram[557][0].CLK
-clk_in => vram[557][1].CLK
-clk_in => vram[557][2].CLK
-clk_in => vram[557][3].CLK
-clk_in => vram[557][4].CLK
-clk_in => vram[557][5].CLK
-clk_in => vram[557][6].CLK
-clk_in => vram[557][7].CLK
-clk_in => vram[556][0].CLK
-clk_in => vram[556][1].CLK
-clk_in => vram[556][2].CLK
-clk_in => vram[556][3].CLK
-clk_in => vram[556][4].CLK
-clk_in => vram[556][5].CLK
-clk_in => vram[556][6].CLK
-clk_in => vram[556][7].CLK
-clk_in => vram[555][0].CLK
-clk_in => vram[555][1].CLK
-clk_in => vram[555][2].CLK
-clk_in => vram[555][3].CLK
-clk_in => vram[555][4].CLK
-clk_in => vram[555][5].CLK
-clk_in => vram[555][6].CLK
-clk_in => vram[555][7].CLK
-clk_in => vram[554][0].CLK
-clk_in => vram[554][1].CLK
-clk_in => vram[554][2].CLK
-clk_in => vram[554][3].CLK
-clk_in => vram[554][4].CLK
-clk_in => vram[554][5].CLK
-clk_in => vram[554][6].CLK
-clk_in => vram[554][7].CLK
-clk_in => vram[553][0].CLK
-clk_in => vram[553][1].CLK
-clk_in => vram[553][2].CLK
-clk_in => vram[553][3].CLK
-clk_in => vram[553][4].CLK
-clk_in => vram[553][5].CLK
-clk_in => vram[553][6].CLK
-clk_in => vram[553][7].CLK
-clk_in => vram[552][0].CLK
-clk_in => vram[552][1].CLK
-clk_in => vram[552][2].CLK
-clk_in => vram[552][3].CLK
-clk_in => vram[552][4].CLK
-clk_in => vram[552][5].CLK
-clk_in => vram[552][6].CLK
-clk_in => vram[552][7].CLK
-clk_in => vram[551][0].CLK
-clk_in => vram[551][1].CLK
-clk_in => vram[551][2].CLK
-clk_in => vram[551][3].CLK
-clk_in => vram[551][4].CLK
-clk_in => vram[551][5].CLK
-clk_in => vram[551][6].CLK
-clk_in => vram[551][7].CLK
-clk_in => vram[550][0].CLK
-clk_in => vram[550][1].CLK
-clk_in => vram[550][2].CLK
-clk_in => vram[550][3].CLK
-clk_in => vram[550][4].CLK
-clk_in => vram[550][5].CLK
-clk_in => vram[550][6].CLK
-clk_in => vram[550][7].CLK
-clk_in => vram[549][0].CLK
-clk_in => vram[549][1].CLK
-clk_in => vram[549][2].CLK
-clk_in => vram[549][3].CLK
-clk_in => vram[549][4].CLK
-clk_in => vram[549][5].CLK
-clk_in => vram[549][6].CLK
-clk_in => vram[549][7].CLK
-clk_in => vram[548][0].CLK
-clk_in => vram[548][1].CLK
-clk_in => vram[548][2].CLK
-clk_in => vram[548][3].CLK
-clk_in => vram[548][4].CLK
-clk_in => vram[548][5].CLK
-clk_in => vram[548][6].CLK
-clk_in => vram[548][7].CLK
-clk_in => vram[547][0].CLK
-clk_in => vram[547][1].CLK
-clk_in => vram[547][2].CLK
-clk_in => vram[547][3].CLK
-clk_in => vram[547][4].CLK
-clk_in => vram[547][5].CLK
-clk_in => vram[547][6].CLK
-clk_in => vram[547][7].CLK
-clk_in => vram[546][0].CLK
-clk_in => vram[546][1].CLK
-clk_in => vram[546][2].CLK
-clk_in => vram[546][3].CLK
-clk_in => vram[546][4].CLK
-clk_in => vram[546][5].CLK
-clk_in => vram[546][6].CLK
-clk_in => vram[546][7].CLK
-clk_in => vram[545][0].CLK
-clk_in => vram[545][1].CLK
-clk_in => vram[545][2].CLK
-clk_in => vram[545][3].CLK
-clk_in => vram[545][4].CLK
-clk_in => vram[545][5].CLK
-clk_in => vram[545][6].CLK
-clk_in => vram[545][7].CLK
-clk_in => vram[544][0].CLK
-clk_in => vram[544][1].CLK
-clk_in => vram[544][2].CLK
-clk_in => vram[544][3].CLK
-clk_in => vram[544][4].CLK
-clk_in => vram[544][5].CLK
-clk_in => vram[544][6].CLK
-clk_in => vram[544][7].CLK
-clk_in => vram[543][0].CLK
-clk_in => vram[543][1].CLK
-clk_in => vram[543][2].CLK
-clk_in => vram[543][3].CLK
-clk_in => vram[543][4].CLK
-clk_in => vram[543][5].CLK
-clk_in => vram[543][6].CLK
-clk_in => vram[543][7].CLK
-clk_in => vram[542][0].CLK
-clk_in => vram[542][1].CLK
-clk_in => vram[542][2].CLK
-clk_in => vram[542][3].CLK
-clk_in => vram[542][4].CLK
-clk_in => vram[542][5].CLK
-clk_in => vram[542][6].CLK
-clk_in => vram[542][7].CLK
-clk_in => vram[541][0].CLK
-clk_in => vram[541][1].CLK
-clk_in => vram[541][2].CLK
-clk_in => vram[541][3].CLK
-clk_in => vram[541][4].CLK
-clk_in => vram[541][5].CLK
-clk_in => vram[541][6].CLK
-clk_in => vram[541][7].CLK
-clk_in => vram[540][0].CLK
-clk_in => vram[540][1].CLK
-clk_in => vram[540][2].CLK
-clk_in => vram[540][3].CLK
-clk_in => vram[540][4].CLK
-clk_in => vram[540][5].CLK
-clk_in => vram[540][6].CLK
-clk_in => vram[540][7].CLK
-clk_in => vram[539][0].CLK
-clk_in => vram[539][1].CLK
-clk_in => vram[539][2].CLK
-clk_in => vram[539][3].CLK
-clk_in => vram[539][4].CLK
-clk_in => vram[539][5].CLK
-clk_in => vram[539][6].CLK
-clk_in => vram[539][7].CLK
-clk_in => vram[538][0].CLK
-clk_in => vram[538][1].CLK
-clk_in => vram[538][2].CLK
-clk_in => vram[538][3].CLK
-clk_in => vram[538][4].CLK
-clk_in => vram[538][5].CLK
-clk_in => vram[538][6].CLK
-clk_in => vram[538][7].CLK
-clk_in => vram[537][0].CLK
-clk_in => vram[537][1].CLK
-clk_in => vram[537][2].CLK
-clk_in => vram[537][3].CLK
-clk_in => vram[537][4].CLK
-clk_in => vram[537][5].CLK
-clk_in => vram[537][6].CLK
-clk_in => vram[537][7].CLK
-clk_in => vram[536][0].CLK
-clk_in => vram[536][1].CLK
-clk_in => vram[536][2].CLK
-clk_in => vram[536][3].CLK
-clk_in => vram[536][4].CLK
-clk_in => vram[536][5].CLK
-clk_in => vram[536][6].CLK
-clk_in => vram[536][7].CLK
-clk_in => vram[535][0].CLK
-clk_in => vram[535][1].CLK
-clk_in => vram[535][2].CLK
-clk_in => vram[535][3].CLK
-clk_in => vram[535][4].CLK
-clk_in => vram[535][5].CLK
-clk_in => vram[535][6].CLK
-clk_in => vram[535][7].CLK
-clk_in => vram[534][0].CLK
-clk_in => vram[534][1].CLK
-clk_in => vram[534][2].CLK
-clk_in => vram[534][3].CLK
-clk_in => vram[534][4].CLK
-clk_in => vram[534][5].CLK
-clk_in => vram[534][6].CLK
-clk_in => vram[534][7].CLK
-clk_in => vram[533][0].CLK
-clk_in => vram[533][1].CLK
-clk_in => vram[533][2].CLK
-clk_in => vram[533][3].CLK
-clk_in => vram[533][4].CLK
-clk_in => vram[533][5].CLK
-clk_in => vram[533][6].CLK
-clk_in => vram[533][7].CLK
-clk_in => vram[532][0].CLK
-clk_in => vram[532][1].CLK
-clk_in => vram[532][2].CLK
-clk_in => vram[532][3].CLK
-clk_in => vram[532][4].CLK
-clk_in => vram[532][5].CLK
-clk_in => vram[532][6].CLK
-clk_in => vram[532][7].CLK
-clk_in => vram[531][0].CLK
-clk_in => vram[531][1].CLK
-clk_in => vram[531][2].CLK
-clk_in => vram[531][3].CLK
-clk_in => vram[531][4].CLK
-clk_in => vram[531][5].CLK
-clk_in => vram[531][6].CLK
-clk_in => vram[531][7].CLK
-clk_in => vram[530][0].CLK
-clk_in => vram[530][1].CLK
-clk_in => vram[530][2].CLK
-clk_in => vram[530][3].CLK
-clk_in => vram[530][4].CLK
-clk_in => vram[530][5].CLK
-clk_in => vram[530][6].CLK
-clk_in => vram[530][7].CLK
-clk_in => vram[529][0].CLK
-clk_in => vram[529][1].CLK
-clk_in => vram[529][2].CLK
-clk_in => vram[529][3].CLK
-clk_in => vram[529][4].CLK
-clk_in => vram[529][5].CLK
-clk_in => vram[529][6].CLK
-clk_in => vram[529][7].CLK
-clk_in => vram[528][0].CLK
-clk_in => vram[528][1].CLK
-clk_in => vram[528][2].CLK
-clk_in => vram[528][3].CLK
-clk_in => vram[528][4].CLK
-clk_in => vram[528][5].CLK
-clk_in => vram[528][6].CLK
-clk_in => vram[528][7].CLK
-clk_in => vram[527][0].CLK
-clk_in => vram[527][1].CLK
-clk_in => vram[527][2].CLK
-clk_in => vram[527][3].CLK
-clk_in => vram[527][4].CLK
-clk_in => vram[527][5].CLK
-clk_in => vram[527][6].CLK
-clk_in => vram[527][7].CLK
-clk_in => vram[526][0].CLK
-clk_in => vram[526][1].CLK
-clk_in => vram[526][2].CLK
-clk_in => vram[526][3].CLK
-clk_in => vram[526][4].CLK
-clk_in => vram[526][5].CLK
-clk_in => vram[526][6].CLK
-clk_in => vram[526][7].CLK
-clk_in => vram[525][0].CLK
-clk_in => vram[525][1].CLK
-clk_in => vram[525][2].CLK
-clk_in => vram[525][3].CLK
-clk_in => vram[525][4].CLK
-clk_in => vram[525][5].CLK
-clk_in => vram[525][6].CLK
-clk_in => vram[525][7].CLK
-clk_in => vram[524][0].CLK
-clk_in => vram[524][1].CLK
-clk_in => vram[524][2].CLK
-clk_in => vram[524][3].CLK
-clk_in => vram[524][4].CLK
-clk_in => vram[524][5].CLK
-clk_in => vram[524][6].CLK
-clk_in => vram[524][7].CLK
-clk_in => vram[523][0].CLK
-clk_in => vram[523][1].CLK
-clk_in => vram[523][2].CLK
-clk_in => vram[523][3].CLK
-clk_in => vram[523][4].CLK
-clk_in => vram[523][5].CLK
-clk_in => vram[523][6].CLK
-clk_in => vram[523][7].CLK
-clk_in => vram[522][0].CLK
-clk_in => vram[522][1].CLK
-clk_in => vram[522][2].CLK
-clk_in => vram[522][3].CLK
-clk_in => vram[522][4].CLK
-clk_in => vram[522][5].CLK
-clk_in => vram[522][6].CLK
-clk_in => vram[522][7].CLK
-clk_in => vram[521][0].CLK
-clk_in => vram[521][1].CLK
-clk_in => vram[521][2].CLK
-clk_in => vram[521][3].CLK
-clk_in => vram[521][4].CLK
-clk_in => vram[521][5].CLK
-clk_in => vram[521][6].CLK
-clk_in => vram[521][7].CLK
-clk_in => vram[520][0].CLK
-clk_in => vram[520][1].CLK
-clk_in => vram[520][2].CLK
-clk_in => vram[520][3].CLK
-clk_in => vram[520][4].CLK
-clk_in => vram[520][5].CLK
-clk_in => vram[520][6].CLK
-clk_in => vram[520][7].CLK
-clk_in => vram[519][0].CLK
-clk_in => vram[519][1].CLK
-clk_in => vram[519][2].CLK
-clk_in => vram[519][3].CLK
-clk_in => vram[519][4].CLK
-clk_in => vram[519][5].CLK
-clk_in => vram[519][6].CLK
-clk_in => vram[519][7].CLK
-clk_in => vram[518][0].CLK
-clk_in => vram[518][1].CLK
-clk_in => vram[518][2].CLK
-clk_in => vram[518][3].CLK
-clk_in => vram[518][4].CLK
-clk_in => vram[518][5].CLK
-clk_in => vram[518][6].CLK
-clk_in => vram[518][7].CLK
-clk_in => vram[517][0].CLK
-clk_in => vram[517][1].CLK
-clk_in => vram[517][2].CLK
-clk_in => vram[517][3].CLK
-clk_in => vram[517][4].CLK
-clk_in => vram[517][5].CLK
-clk_in => vram[517][6].CLK
-clk_in => vram[517][7].CLK
-clk_in => vram[516][0].CLK
-clk_in => vram[516][1].CLK
-clk_in => vram[516][2].CLK
-clk_in => vram[516][3].CLK
-clk_in => vram[516][4].CLK
-clk_in => vram[516][5].CLK
-clk_in => vram[516][6].CLK
-clk_in => vram[516][7].CLK
-clk_in => vram[515][0].CLK
-clk_in => vram[515][1].CLK
-clk_in => vram[515][2].CLK
-clk_in => vram[515][3].CLK
-clk_in => vram[515][4].CLK
-clk_in => vram[515][5].CLK
-clk_in => vram[515][6].CLK
-clk_in => vram[515][7].CLK
-clk_in => vram[514][0].CLK
-clk_in => vram[514][1].CLK
-clk_in => vram[514][2].CLK
-clk_in => vram[514][3].CLK
-clk_in => vram[514][4].CLK
-clk_in => vram[514][5].CLK
-clk_in => vram[514][6].CLK
-clk_in => vram[514][7].CLK
-clk_in => vram[513][0].CLK
-clk_in => vram[513][1].CLK
-clk_in => vram[513][2].CLK
-clk_in => vram[513][3].CLK
-clk_in => vram[513][4].CLK
-clk_in => vram[513][5].CLK
-clk_in => vram[513][6].CLK
-clk_in => vram[513][7].CLK
-clk_in => vram[512][0].CLK
-clk_in => vram[512][1].CLK
-clk_in => vram[512][2].CLK
-clk_in => vram[512][3].CLK
-clk_in => vram[512][4].CLK
-clk_in => vram[512][5].CLK
-clk_in => vram[512][6].CLK
-clk_in => vram[512][7].CLK
-clk_in => vram[511][0].CLK
-clk_in => vram[511][1].CLK
-clk_in => vram[511][2].CLK
-clk_in => vram[511][3].CLK
-clk_in => vram[511][4].CLK
-clk_in => vram[511][5].CLK
-clk_in => vram[511][6].CLK
-clk_in => vram[511][7].CLK
-clk_in => vram[510][0].CLK
-clk_in => vram[510][1].CLK
-clk_in => vram[510][2].CLK
-clk_in => vram[510][3].CLK
-clk_in => vram[510][4].CLK
-clk_in => vram[510][5].CLK
-clk_in => vram[510][6].CLK
-clk_in => vram[510][7].CLK
-clk_in => vram[509][0].CLK
-clk_in => vram[509][1].CLK
-clk_in => vram[509][2].CLK
-clk_in => vram[509][3].CLK
-clk_in => vram[509][4].CLK
-clk_in => vram[509][5].CLK
-clk_in => vram[509][6].CLK
-clk_in => vram[509][7].CLK
-clk_in => vram[508][0].CLK
-clk_in => vram[508][1].CLK
-clk_in => vram[508][2].CLK
-clk_in => vram[508][3].CLK
-clk_in => vram[508][4].CLK
-clk_in => vram[508][5].CLK
-clk_in => vram[508][6].CLK
-clk_in => vram[508][7].CLK
-clk_in => vram[507][0].CLK
-clk_in => vram[507][1].CLK
-clk_in => vram[507][2].CLK
-clk_in => vram[507][3].CLK
-clk_in => vram[507][4].CLK
-clk_in => vram[507][5].CLK
-clk_in => vram[507][6].CLK
-clk_in => vram[507][7].CLK
-clk_in => vram[506][0].CLK
-clk_in => vram[506][1].CLK
-clk_in => vram[506][2].CLK
-clk_in => vram[506][3].CLK
-clk_in => vram[506][4].CLK
-clk_in => vram[506][5].CLK
-clk_in => vram[506][6].CLK
-clk_in => vram[506][7].CLK
-clk_in => vram[505][0].CLK
-clk_in => vram[505][1].CLK
-clk_in => vram[505][2].CLK
-clk_in => vram[505][3].CLK
-clk_in => vram[505][4].CLK
-clk_in => vram[505][5].CLK
-clk_in => vram[505][6].CLK
-clk_in => vram[505][7].CLK
-clk_in => vram[504][0].CLK
-clk_in => vram[504][1].CLK
-clk_in => vram[504][2].CLK
-clk_in => vram[504][3].CLK
-clk_in => vram[504][4].CLK
-clk_in => vram[504][5].CLK
-clk_in => vram[504][6].CLK
-clk_in => vram[504][7].CLK
-clk_in => vram[503][0].CLK
-clk_in => vram[503][1].CLK
-clk_in => vram[503][2].CLK
-clk_in => vram[503][3].CLK
-clk_in => vram[503][4].CLK
-clk_in => vram[503][5].CLK
-clk_in => vram[503][6].CLK
-clk_in => vram[503][7].CLK
-clk_in => vram[502][0].CLK
-clk_in => vram[502][1].CLK
-clk_in => vram[502][2].CLK
-clk_in => vram[502][3].CLK
-clk_in => vram[502][4].CLK
-clk_in => vram[502][5].CLK
-clk_in => vram[502][6].CLK
-clk_in => vram[502][7].CLK
-clk_in => vram[501][0].CLK
-clk_in => vram[501][1].CLK
-clk_in => vram[501][2].CLK
-clk_in => vram[501][3].CLK
-clk_in => vram[501][4].CLK
-clk_in => vram[501][5].CLK
-clk_in => vram[501][6].CLK
-clk_in => vram[501][7].CLK
-clk_in => vram[500][0].CLK
-clk_in => vram[500][1].CLK
-clk_in => vram[500][2].CLK
-clk_in => vram[500][3].CLK
-clk_in => vram[500][4].CLK
-clk_in => vram[500][5].CLK
-clk_in => vram[500][6].CLK
-clk_in => vram[500][7].CLK
-clk_in => vram[499][0].CLK
-clk_in => vram[499][1].CLK
-clk_in => vram[499][2].CLK
-clk_in => vram[499][3].CLK
-clk_in => vram[499][4].CLK
-clk_in => vram[499][5].CLK
-clk_in => vram[499][6].CLK
-clk_in => vram[499][7].CLK
-clk_in => vram[498][0].CLK
-clk_in => vram[498][1].CLK
-clk_in => vram[498][2].CLK
-clk_in => vram[498][3].CLK
-clk_in => vram[498][4].CLK
-clk_in => vram[498][5].CLK
-clk_in => vram[498][6].CLK
-clk_in => vram[498][7].CLK
-clk_in => vram[497][0].CLK
-clk_in => vram[497][1].CLK
-clk_in => vram[497][2].CLK
-clk_in => vram[497][3].CLK
-clk_in => vram[497][4].CLK
-clk_in => vram[497][5].CLK
-clk_in => vram[497][6].CLK
-clk_in => vram[497][7].CLK
-clk_in => vram[496][0].CLK
-clk_in => vram[496][1].CLK
-clk_in => vram[496][2].CLK
-clk_in => vram[496][3].CLK
-clk_in => vram[496][4].CLK
-clk_in => vram[496][5].CLK
-clk_in => vram[496][6].CLK
-clk_in => vram[496][7].CLK
-clk_in => vram[495][0].CLK
-clk_in => vram[495][1].CLK
-clk_in => vram[495][2].CLK
-clk_in => vram[495][3].CLK
-clk_in => vram[495][4].CLK
-clk_in => vram[495][5].CLK
-clk_in => vram[495][6].CLK
-clk_in => vram[495][7].CLK
-clk_in => vram[494][0].CLK
-clk_in => vram[494][1].CLK
-clk_in => vram[494][2].CLK
-clk_in => vram[494][3].CLK
-clk_in => vram[494][4].CLK
-clk_in => vram[494][5].CLK
-clk_in => vram[494][6].CLK
-clk_in => vram[494][7].CLK
-clk_in => vram[493][0].CLK
-clk_in => vram[493][1].CLK
-clk_in => vram[493][2].CLK
-clk_in => vram[493][3].CLK
-clk_in => vram[493][4].CLK
-clk_in => vram[493][5].CLK
-clk_in => vram[493][6].CLK
-clk_in => vram[493][7].CLK
-clk_in => vram[492][0].CLK
-clk_in => vram[492][1].CLK
-clk_in => vram[492][2].CLK
-clk_in => vram[492][3].CLK
-clk_in => vram[492][4].CLK
-clk_in => vram[492][5].CLK
-clk_in => vram[492][6].CLK
-clk_in => vram[492][7].CLK
-clk_in => vram[491][0].CLK
-clk_in => vram[491][1].CLK
-clk_in => vram[491][2].CLK
-clk_in => vram[491][3].CLK
-clk_in => vram[491][4].CLK
-clk_in => vram[491][5].CLK
-clk_in => vram[491][6].CLK
-clk_in => vram[491][7].CLK
-clk_in => vram[490][0].CLK
-clk_in => vram[490][1].CLK
-clk_in => vram[490][2].CLK
-clk_in => vram[490][3].CLK
-clk_in => vram[490][4].CLK
-clk_in => vram[490][5].CLK
-clk_in => vram[490][6].CLK
-clk_in => vram[490][7].CLK
-clk_in => vram[489][0].CLK
-clk_in => vram[489][1].CLK
-clk_in => vram[489][2].CLK
-clk_in => vram[489][3].CLK
-clk_in => vram[489][4].CLK
-clk_in => vram[489][5].CLK
-clk_in => vram[489][6].CLK
-clk_in => vram[489][7].CLK
-clk_in => vram[488][0].CLK
-clk_in => vram[488][1].CLK
-clk_in => vram[488][2].CLK
-clk_in => vram[488][3].CLK
-clk_in => vram[488][4].CLK
-clk_in => vram[488][5].CLK
-clk_in => vram[488][6].CLK
-clk_in => vram[488][7].CLK
-clk_in => vram[487][0].CLK
-clk_in => vram[487][1].CLK
-clk_in => vram[487][2].CLK
-clk_in => vram[487][3].CLK
-clk_in => vram[487][4].CLK
-clk_in => vram[487][5].CLK
-clk_in => vram[487][6].CLK
-clk_in => vram[487][7].CLK
-clk_in => vram[486][0].CLK
-clk_in => vram[486][1].CLK
-clk_in => vram[486][2].CLK
-clk_in => vram[486][3].CLK
-clk_in => vram[486][4].CLK
-clk_in => vram[486][5].CLK
-clk_in => vram[486][6].CLK
-clk_in => vram[486][7].CLK
-clk_in => vram[485][0].CLK
-clk_in => vram[485][1].CLK
-clk_in => vram[485][2].CLK
-clk_in => vram[485][3].CLK
-clk_in => vram[485][4].CLK
-clk_in => vram[485][5].CLK
-clk_in => vram[485][6].CLK
-clk_in => vram[485][7].CLK
-clk_in => vram[484][0].CLK
-clk_in => vram[484][1].CLK
-clk_in => vram[484][2].CLK
-clk_in => vram[484][3].CLK
-clk_in => vram[484][4].CLK
-clk_in => vram[484][5].CLK
-clk_in => vram[484][6].CLK
-clk_in => vram[484][7].CLK
-clk_in => vram[483][0].CLK
-clk_in => vram[483][1].CLK
-clk_in => vram[483][2].CLK
-clk_in => vram[483][3].CLK
-clk_in => vram[483][4].CLK
-clk_in => vram[483][5].CLK
-clk_in => vram[483][6].CLK
-clk_in => vram[483][7].CLK
-clk_in => vram[482][0].CLK
-clk_in => vram[482][1].CLK
-clk_in => vram[482][2].CLK
-clk_in => vram[482][3].CLK
-clk_in => vram[482][4].CLK
-clk_in => vram[482][5].CLK
-clk_in => vram[482][6].CLK
-clk_in => vram[482][7].CLK
-clk_in => vram[481][0].CLK
-clk_in => vram[481][1].CLK
-clk_in => vram[481][2].CLK
-clk_in => vram[481][3].CLK
-clk_in => vram[481][4].CLK
-clk_in => vram[481][5].CLK
-clk_in => vram[481][6].CLK
-clk_in => vram[481][7].CLK
-clk_in => vram[480][0].CLK
-clk_in => vram[480][1].CLK
-clk_in => vram[480][2].CLK
-clk_in => vram[480][3].CLK
-clk_in => vram[480][4].CLK
-clk_in => vram[480][5].CLK
-clk_in => vram[480][6].CLK
-clk_in => vram[480][7].CLK
-clk_in => vram[479][0].CLK
-clk_in => vram[479][1].CLK
-clk_in => vram[479][2].CLK
-clk_in => vram[479][3].CLK
-clk_in => vram[479][4].CLK
-clk_in => vram[479][5].CLK
-clk_in => vram[479][6].CLK
-clk_in => vram[479][7].CLK
-clk_in => vram[478][0].CLK
-clk_in => vram[478][1].CLK
-clk_in => vram[478][2].CLK
-clk_in => vram[478][3].CLK
-clk_in => vram[478][4].CLK
-clk_in => vram[478][5].CLK
-clk_in => vram[478][6].CLK
-clk_in => vram[478][7].CLK
-clk_in => vram[477][0].CLK
-clk_in => vram[477][1].CLK
-clk_in => vram[477][2].CLK
-clk_in => vram[477][3].CLK
-clk_in => vram[477][4].CLK
-clk_in => vram[477][5].CLK
-clk_in => vram[477][6].CLK
-clk_in => vram[477][7].CLK
-clk_in => vram[476][0].CLK
-clk_in => vram[476][1].CLK
-clk_in => vram[476][2].CLK
-clk_in => vram[476][3].CLK
-clk_in => vram[476][4].CLK
-clk_in => vram[476][5].CLK
-clk_in => vram[476][6].CLK
-clk_in => vram[476][7].CLK
-clk_in => vram[475][0].CLK
-clk_in => vram[475][1].CLK
-clk_in => vram[475][2].CLK
-clk_in => vram[475][3].CLK
-clk_in => vram[475][4].CLK
-clk_in => vram[475][5].CLK
-clk_in => vram[475][6].CLK
-clk_in => vram[475][7].CLK
-clk_in => vram[474][0].CLK
-clk_in => vram[474][1].CLK
-clk_in => vram[474][2].CLK
-clk_in => vram[474][3].CLK
-clk_in => vram[474][4].CLK
-clk_in => vram[474][5].CLK
-clk_in => vram[474][6].CLK
-clk_in => vram[474][7].CLK
-clk_in => vram[473][0].CLK
-clk_in => vram[473][1].CLK
-clk_in => vram[473][2].CLK
-clk_in => vram[473][3].CLK
-clk_in => vram[473][4].CLK
-clk_in => vram[473][5].CLK
-clk_in => vram[473][6].CLK
-clk_in => vram[473][7].CLK
-clk_in => vram[472][0].CLK
-clk_in => vram[472][1].CLK
-clk_in => vram[472][2].CLK
-clk_in => vram[472][3].CLK
-clk_in => vram[472][4].CLK
-clk_in => vram[472][5].CLK
-clk_in => vram[472][6].CLK
-clk_in => vram[472][7].CLK
-clk_in => vram[471][0].CLK
-clk_in => vram[471][1].CLK
-clk_in => vram[471][2].CLK
-clk_in => vram[471][3].CLK
-clk_in => vram[471][4].CLK
-clk_in => vram[471][5].CLK
-clk_in => vram[471][6].CLK
-clk_in => vram[471][7].CLK
-clk_in => vram[470][0].CLK
-clk_in => vram[470][1].CLK
-clk_in => vram[470][2].CLK
-clk_in => vram[470][3].CLK
-clk_in => vram[470][4].CLK
-clk_in => vram[470][5].CLK
-clk_in => vram[470][6].CLK
-clk_in => vram[470][7].CLK
-clk_in => vram[469][0].CLK
-clk_in => vram[469][1].CLK
-clk_in => vram[469][2].CLK
-clk_in => vram[469][3].CLK
-clk_in => vram[469][4].CLK
-clk_in => vram[469][5].CLK
-clk_in => vram[469][6].CLK
-clk_in => vram[469][7].CLK
-clk_in => vram[468][0].CLK
-clk_in => vram[468][1].CLK
-clk_in => vram[468][2].CLK
-clk_in => vram[468][3].CLK
-clk_in => vram[468][4].CLK
-clk_in => vram[468][5].CLK
-clk_in => vram[468][6].CLK
-clk_in => vram[468][7].CLK
-clk_in => vram[467][0].CLK
-clk_in => vram[467][1].CLK
-clk_in => vram[467][2].CLK
-clk_in => vram[467][3].CLK
-clk_in => vram[467][4].CLK
-clk_in => vram[467][5].CLK
-clk_in => vram[467][6].CLK
-clk_in => vram[467][7].CLK
-clk_in => vram[466][0].CLK
-clk_in => vram[466][1].CLK
-clk_in => vram[466][2].CLK
-clk_in => vram[466][3].CLK
-clk_in => vram[466][4].CLK
-clk_in => vram[466][5].CLK
-clk_in => vram[466][6].CLK
-clk_in => vram[466][7].CLK
-clk_in => vram[465][0].CLK
-clk_in => vram[465][1].CLK
-clk_in => vram[465][2].CLK
-clk_in => vram[465][3].CLK
-clk_in => vram[465][4].CLK
-clk_in => vram[465][5].CLK
-clk_in => vram[465][6].CLK
-clk_in => vram[465][7].CLK
-clk_in => vram[464][0].CLK
-clk_in => vram[464][1].CLK
-clk_in => vram[464][2].CLK
-clk_in => vram[464][3].CLK
-clk_in => vram[464][4].CLK
-clk_in => vram[464][5].CLK
-clk_in => vram[464][6].CLK
-clk_in => vram[464][7].CLK
-clk_in => vram[463][0].CLK
-clk_in => vram[463][1].CLK
-clk_in => vram[463][2].CLK
-clk_in => vram[463][3].CLK
-clk_in => vram[463][4].CLK
-clk_in => vram[463][5].CLK
-clk_in => vram[463][6].CLK
-clk_in => vram[463][7].CLK
-clk_in => vram[462][0].CLK
-clk_in => vram[462][1].CLK
-clk_in => vram[462][2].CLK
-clk_in => vram[462][3].CLK
-clk_in => vram[462][4].CLK
-clk_in => vram[462][5].CLK
-clk_in => vram[462][6].CLK
-clk_in => vram[462][7].CLK
-clk_in => vram[461][0].CLK
-clk_in => vram[461][1].CLK
-clk_in => vram[461][2].CLK
-clk_in => vram[461][3].CLK
-clk_in => vram[461][4].CLK
-clk_in => vram[461][5].CLK
-clk_in => vram[461][6].CLK
-clk_in => vram[461][7].CLK
-clk_in => vram[460][0].CLK
-clk_in => vram[460][1].CLK
-clk_in => vram[460][2].CLK
-clk_in => vram[460][3].CLK
-clk_in => vram[460][4].CLK
-clk_in => vram[460][5].CLK
-clk_in => vram[460][6].CLK
-clk_in => vram[460][7].CLK
-clk_in => vram[459][0].CLK
-clk_in => vram[459][1].CLK
-clk_in => vram[459][2].CLK
-clk_in => vram[459][3].CLK
-clk_in => vram[459][4].CLK
-clk_in => vram[459][5].CLK
-clk_in => vram[459][6].CLK
-clk_in => vram[459][7].CLK
-clk_in => vram[458][0].CLK
-clk_in => vram[458][1].CLK
-clk_in => vram[458][2].CLK
-clk_in => vram[458][3].CLK
-clk_in => vram[458][4].CLK
-clk_in => vram[458][5].CLK
-clk_in => vram[458][6].CLK
-clk_in => vram[458][7].CLK
-clk_in => vram[457][0].CLK
-clk_in => vram[457][1].CLK
-clk_in => vram[457][2].CLK
-clk_in => vram[457][3].CLK
-clk_in => vram[457][4].CLK
-clk_in => vram[457][5].CLK
-clk_in => vram[457][6].CLK
-clk_in => vram[457][7].CLK
-clk_in => vram[456][0].CLK
-clk_in => vram[456][1].CLK
-clk_in => vram[456][2].CLK
-clk_in => vram[456][3].CLK
-clk_in => vram[456][4].CLK
-clk_in => vram[456][5].CLK
-clk_in => vram[456][6].CLK
-clk_in => vram[456][7].CLK
-clk_in => vram[455][0].CLK
-clk_in => vram[455][1].CLK
-clk_in => vram[455][2].CLK
-clk_in => vram[455][3].CLK
-clk_in => vram[455][4].CLK
-clk_in => vram[455][5].CLK
-clk_in => vram[455][6].CLK
-clk_in => vram[455][7].CLK
-clk_in => vram[454][0].CLK
-clk_in => vram[454][1].CLK
-clk_in => vram[454][2].CLK
-clk_in => vram[454][3].CLK
-clk_in => vram[454][4].CLK
-clk_in => vram[454][5].CLK
-clk_in => vram[454][6].CLK
-clk_in => vram[454][7].CLK
-clk_in => vram[453][0].CLK
-clk_in => vram[453][1].CLK
-clk_in => vram[453][2].CLK
-clk_in => vram[453][3].CLK
-clk_in => vram[453][4].CLK
-clk_in => vram[453][5].CLK
-clk_in => vram[453][6].CLK
-clk_in => vram[453][7].CLK
-clk_in => vram[452][0].CLK
-clk_in => vram[452][1].CLK
-clk_in => vram[452][2].CLK
-clk_in => vram[452][3].CLK
-clk_in => vram[452][4].CLK
-clk_in => vram[452][5].CLK
-clk_in => vram[452][6].CLK
-clk_in => vram[452][7].CLK
-clk_in => vram[451][0].CLK
-clk_in => vram[451][1].CLK
-clk_in => vram[451][2].CLK
-clk_in => vram[451][3].CLK
-clk_in => vram[451][4].CLK
-clk_in => vram[451][5].CLK
-clk_in => vram[451][6].CLK
-clk_in => vram[451][7].CLK
-clk_in => vram[450][0].CLK
-clk_in => vram[450][1].CLK
-clk_in => vram[450][2].CLK
-clk_in => vram[450][3].CLK
-clk_in => vram[450][4].CLK
-clk_in => vram[450][5].CLK
-clk_in => vram[450][6].CLK
-clk_in => vram[450][7].CLK
-clk_in => vram[449][0].CLK
-clk_in => vram[449][1].CLK
-clk_in => vram[449][2].CLK
-clk_in => vram[449][3].CLK
-clk_in => vram[449][4].CLK
-clk_in => vram[449][5].CLK
-clk_in => vram[449][6].CLK
-clk_in => vram[449][7].CLK
-clk_in => vram[448][0].CLK
-clk_in => vram[448][1].CLK
-clk_in => vram[448][2].CLK
-clk_in => vram[448][3].CLK
-clk_in => vram[448][4].CLK
-clk_in => vram[448][5].CLK
-clk_in => vram[448][6].CLK
-clk_in => vram[448][7].CLK
-clk_in => vram[447][0].CLK
-clk_in => vram[447][1].CLK
-clk_in => vram[447][2].CLK
-clk_in => vram[447][3].CLK
-clk_in => vram[447][4].CLK
-clk_in => vram[447][5].CLK
-clk_in => vram[447][6].CLK
-clk_in => vram[447][7].CLK
-clk_in => vram[446][0].CLK
-clk_in => vram[446][1].CLK
-clk_in => vram[446][2].CLK
-clk_in => vram[446][3].CLK
-clk_in => vram[446][4].CLK
-clk_in => vram[446][5].CLK
-clk_in => vram[446][6].CLK
-clk_in => vram[446][7].CLK
-clk_in => vram[445][0].CLK
-clk_in => vram[445][1].CLK
-clk_in => vram[445][2].CLK
-clk_in => vram[445][3].CLK
-clk_in => vram[445][4].CLK
-clk_in => vram[445][5].CLK
-clk_in => vram[445][6].CLK
-clk_in => vram[445][7].CLK
-clk_in => vram[444][0].CLK
-clk_in => vram[444][1].CLK
-clk_in => vram[444][2].CLK
-clk_in => vram[444][3].CLK
-clk_in => vram[444][4].CLK
-clk_in => vram[444][5].CLK
-clk_in => vram[444][6].CLK
-clk_in => vram[444][7].CLK
-clk_in => vram[443][0].CLK
-clk_in => vram[443][1].CLK
-clk_in => vram[443][2].CLK
-clk_in => vram[443][3].CLK
-clk_in => vram[443][4].CLK
-clk_in => vram[443][5].CLK
-clk_in => vram[443][6].CLK
-clk_in => vram[443][7].CLK
-clk_in => vram[442][0].CLK
-clk_in => vram[442][1].CLK
-clk_in => vram[442][2].CLK
-clk_in => vram[442][3].CLK
-clk_in => vram[442][4].CLK
-clk_in => vram[442][5].CLK
-clk_in => vram[442][6].CLK
-clk_in => vram[442][7].CLK
-clk_in => vram[441][0].CLK
-clk_in => vram[441][1].CLK
-clk_in => vram[441][2].CLK
-clk_in => vram[441][3].CLK
-clk_in => vram[441][4].CLK
-clk_in => vram[441][5].CLK
-clk_in => vram[441][6].CLK
-clk_in => vram[441][7].CLK
-clk_in => vram[440][0].CLK
-clk_in => vram[440][1].CLK
-clk_in => vram[440][2].CLK
-clk_in => vram[440][3].CLK
-clk_in => vram[440][4].CLK
-clk_in => vram[440][5].CLK
-clk_in => vram[440][6].CLK
-clk_in => vram[440][7].CLK
-clk_in => vram[439][0].CLK
-clk_in => vram[439][1].CLK
-clk_in => vram[439][2].CLK
-clk_in => vram[439][3].CLK
-clk_in => vram[439][4].CLK
-clk_in => vram[439][5].CLK
-clk_in => vram[439][6].CLK
-clk_in => vram[439][7].CLK
-clk_in => vram[438][0].CLK
-clk_in => vram[438][1].CLK
-clk_in => vram[438][2].CLK
-clk_in => vram[438][3].CLK
-clk_in => vram[438][4].CLK
-clk_in => vram[438][5].CLK
-clk_in => vram[438][6].CLK
-clk_in => vram[438][7].CLK
-clk_in => vram[437][0].CLK
-clk_in => vram[437][1].CLK
-clk_in => vram[437][2].CLK
-clk_in => vram[437][3].CLK
-clk_in => vram[437][4].CLK
-clk_in => vram[437][5].CLK
-clk_in => vram[437][6].CLK
-clk_in => vram[437][7].CLK
-clk_in => vram[436][0].CLK
-clk_in => vram[436][1].CLK
-clk_in => vram[436][2].CLK
-clk_in => vram[436][3].CLK
-clk_in => vram[436][4].CLK
-clk_in => vram[436][5].CLK
-clk_in => vram[436][6].CLK
-clk_in => vram[436][7].CLK
-clk_in => vram[435][0].CLK
-clk_in => vram[435][1].CLK
-clk_in => vram[435][2].CLK
-clk_in => vram[435][3].CLK
-clk_in => vram[435][4].CLK
-clk_in => vram[435][5].CLK
-clk_in => vram[435][6].CLK
-clk_in => vram[435][7].CLK
-clk_in => vram[434][0].CLK
-clk_in => vram[434][1].CLK
-clk_in => vram[434][2].CLK
-clk_in => vram[434][3].CLK
-clk_in => vram[434][4].CLK
-clk_in => vram[434][5].CLK
-clk_in => vram[434][6].CLK
-clk_in => vram[434][7].CLK
-clk_in => vram[433][0].CLK
-clk_in => vram[433][1].CLK
-clk_in => vram[433][2].CLK
-clk_in => vram[433][3].CLK
-clk_in => vram[433][4].CLK
-clk_in => vram[433][5].CLK
-clk_in => vram[433][6].CLK
-clk_in => vram[433][7].CLK
-clk_in => vram[432][0].CLK
-clk_in => vram[432][1].CLK
-clk_in => vram[432][2].CLK
-clk_in => vram[432][3].CLK
-clk_in => vram[432][4].CLK
-clk_in => vram[432][5].CLK
-clk_in => vram[432][6].CLK
-clk_in => vram[432][7].CLK
-clk_in => vram[431][0].CLK
-clk_in => vram[431][1].CLK
-clk_in => vram[431][2].CLK
-clk_in => vram[431][3].CLK
-clk_in => vram[431][4].CLK
-clk_in => vram[431][5].CLK
-clk_in => vram[431][6].CLK
-clk_in => vram[431][7].CLK
-clk_in => vram[430][0].CLK
-clk_in => vram[430][1].CLK
-clk_in => vram[430][2].CLK
-clk_in => vram[430][3].CLK
-clk_in => vram[430][4].CLK
-clk_in => vram[430][5].CLK
-clk_in => vram[430][6].CLK
-clk_in => vram[430][7].CLK
-clk_in => vram[429][0].CLK
-clk_in => vram[429][1].CLK
-clk_in => vram[429][2].CLK
-clk_in => vram[429][3].CLK
-clk_in => vram[429][4].CLK
-clk_in => vram[429][5].CLK
-clk_in => vram[429][6].CLK
-clk_in => vram[429][7].CLK
-clk_in => vram[428][0].CLK
-clk_in => vram[428][1].CLK
-clk_in => vram[428][2].CLK
-clk_in => vram[428][3].CLK
-clk_in => vram[428][4].CLK
-clk_in => vram[428][5].CLK
-clk_in => vram[428][6].CLK
-clk_in => vram[428][7].CLK
-clk_in => vram[427][0].CLK
-clk_in => vram[427][1].CLK
-clk_in => vram[427][2].CLK
-clk_in => vram[427][3].CLK
-clk_in => vram[427][4].CLK
-clk_in => vram[427][5].CLK
-clk_in => vram[427][6].CLK
-clk_in => vram[427][7].CLK
-clk_in => vram[426][0].CLK
-clk_in => vram[426][1].CLK
-clk_in => vram[426][2].CLK
-clk_in => vram[426][3].CLK
-clk_in => vram[426][4].CLK
-clk_in => vram[426][5].CLK
-clk_in => vram[426][6].CLK
-clk_in => vram[426][7].CLK
-clk_in => vram[425][0].CLK
-clk_in => vram[425][1].CLK
-clk_in => vram[425][2].CLK
-clk_in => vram[425][3].CLK
-clk_in => vram[425][4].CLK
-clk_in => vram[425][5].CLK
-clk_in => vram[425][6].CLK
-clk_in => vram[425][7].CLK
-clk_in => vram[424][0].CLK
-clk_in => vram[424][1].CLK
-clk_in => vram[424][2].CLK
-clk_in => vram[424][3].CLK
-clk_in => vram[424][4].CLK
-clk_in => vram[424][5].CLK
-clk_in => vram[424][6].CLK
-clk_in => vram[424][7].CLK
-clk_in => vram[423][0].CLK
-clk_in => vram[423][1].CLK
-clk_in => vram[423][2].CLK
-clk_in => vram[423][3].CLK
-clk_in => vram[423][4].CLK
-clk_in => vram[423][5].CLK
-clk_in => vram[423][6].CLK
-clk_in => vram[423][7].CLK
-clk_in => vram[422][0].CLK
-clk_in => vram[422][1].CLK
-clk_in => vram[422][2].CLK
-clk_in => vram[422][3].CLK
-clk_in => vram[422][4].CLK
-clk_in => vram[422][5].CLK
-clk_in => vram[422][6].CLK
-clk_in => vram[422][7].CLK
-clk_in => vram[421][0].CLK
-clk_in => vram[421][1].CLK
-clk_in => vram[421][2].CLK
-clk_in => vram[421][3].CLK
-clk_in => vram[421][4].CLK
-clk_in => vram[421][5].CLK
-clk_in => vram[421][6].CLK
-clk_in => vram[421][7].CLK
-clk_in => vram[420][0].CLK
-clk_in => vram[420][1].CLK
-clk_in => vram[420][2].CLK
-clk_in => vram[420][3].CLK
-clk_in => vram[420][4].CLK
-clk_in => vram[420][5].CLK
-clk_in => vram[420][6].CLK
-clk_in => vram[420][7].CLK
-clk_in => vram[419][0].CLK
-clk_in => vram[419][1].CLK
-clk_in => vram[419][2].CLK
-clk_in => vram[419][3].CLK
-clk_in => vram[419][4].CLK
-clk_in => vram[419][5].CLK
-clk_in => vram[419][6].CLK
-clk_in => vram[419][7].CLK
-clk_in => vram[418][0].CLK
-clk_in => vram[418][1].CLK
-clk_in => vram[418][2].CLK
-clk_in => vram[418][3].CLK
-clk_in => vram[418][4].CLK
-clk_in => vram[418][5].CLK
-clk_in => vram[418][6].CLK
-clk_in => vram[418][7].CLK
-clk_in => vram[417][0].CLK
-clk_in => vram[417][1].CLK
-clk_in => vram[417][2].CLK
-clk_in => vram[417][3].CLK
-clk_in => vram[417][4].CLK
-clk_in => vram[417][5].CLK
-clk_in => vram[417][6].CLK
-clk_in => vram[417][7].CLK
-clk_in => vram[416][0].CLK
-clk_in => vram[416][1].CLK
-clk_in => vram[416][2].CLK
-clk_in => vram[416][3].CLK
-clk_in => vram[416][4].CLK
-clk_in => vram[416][5].CLK
-clk_in => vram[416][6].CLK
-clk_in => vram[416][7].CLK
-clk_in => vram[415][0].CLK
-clk_in => vram[415][1].CLK
-clk_in => vram[415][2].CLK
-clk_in => vram[415][3].CLK
-clk_in => vram[415][4].CLK
-clk_in => vram[415][5].CLK
-clk_in => vram[415][6].CLK
-clk_in => vram[415][7].CLK
-clk_in => vram[414][0].CLK
-clk_in => vram[414][1].CLK
-clk_in => vram[414][2].CLK
-clk_in => vram[414][3].CLK
-clk_in => vram[414][4].CLK
-clk_in => vram[414][5].CLK
-clk_in => vram[414][6].CLK
-clk_in => vram[414][7].CLK
-clk_in => vram[413][0].CLK
-clk_in => vram[413][1].CLK
-clk_in => vram[413][2].CLK
-clk_in => vram[413][3].CLK
-clk_in => vram[413][4].CLK
-clk_in => vram[413][5].CLK
-clk_in => vram[413][6].CLK
-clk_in => vram[413][7].CLK
-clk_in => vram[412][0].CLK
-clk_in => vram[412][1].CLK
-clk_in => vram[412][2].CLK
-clk_in => vram[412][3].CLK
-clk_in => vram[412][4].CLK
-clk_in => vram[412][5].CLK
-clk_in => vram[412][6].CLK
-clk_in => vram[412][7].CLK
-clk_in => vram[411][0].CLK
-clk_in => vram[411][1].CLK
-clk_in => vram[411][2].CLK
-clk_in => vram[411][3].CLK
-clk_in => vram[411][4].CLK
-clk_in => vram[411][5].CLK
-clk_in => vram[411][6].CLK
-clk_in => vram[411][7].CLK
-clk_in => vram[410][0].CLK
-clk_in => vram[410][1].CLK
-clk_in => vram[410][2].CLK
-clk_in => vram[410][3].CLK
-clk_in => vram[410][4].CLK
-clk_in => vram[410][5].CLK
-clk_in => vram[410][6].CLK
-clk_in => vram[410][7].CLK
-clk_in => vram[409][0].CLK
-clk_in => vram[409][1].CLK
-clk_in => vram[409][2].CLK
-clk_in => vram[409][3].CLK
-clk_in => vram[409][4].CLK
-clk_in => vram[409][5].CLK
-clk_in => vram[409][6].CLK
-clk_in => vram[409][7].CLK
-clk_in => vram[408][0].CLK
-clk_in => vram[408][1].CLK
-clk_in => vram[408][2].CLK
-clk_in => vram[408][3].CLK
-clk_in => vram[408][4].CLK
-clk_in => vram[408][5].CLK
-clk_in => vram[408][6].CLK
-clk_in => vram[408][7].CLK
-clk_in => vram[407][0].CLK
-clk_in => vram[407][1].CLK
-clk_in => vram[407][2].CLK
-clk_in => vram[407][3].CLK
-clk_in => vram[407][4].CLK
-clk_in => vram[407][5].CLK
-clk_in => vram[407][6].CLK
-clk_in => vram[407][7].CLK
-clk_in => vram[406][0].CLK
-clk_in => vram[406][1].CLK
-clk_in => vram[406][2].CLK
-clk_in => vram[406][3].CLK
-clk_in => vram[406][4].CLK
-clk_in => vram[406][5].CLK
-clk_in => vram[406][6].CLK
-clk_in => vram[406][7].CLK
-clk_in => vram[405][0].CLK
-clk_in => vram[405][1].CLK
-clk_in => vram[405][2].CLK
-clk_in => vram[405][3].CLK
-clk_in => vram[405][4].CLK
-clk_in => vram[405][5].CLK
-clk_in => vram[405][6].CLK
-clk_in => vram[405][7].CLK
-clk_in => vram[404][0].CLK
-clk_in => vram[404][1].CLK
-clk_in => vram[404][2].CLK
-clk_in => vram[404][3].CLK
-clk_in => vram[404][4].CLK
-clk_in => vram[404][5].CLK
-clk_in => vram[404][6].CLK
-clk_in => vram[404][7].CLK
-clk_in => vram[403][0].CLK
-clk_in => vram[403][1].CLK
-clk_in => vram[403][2].CLK
-clk_in => vram[403][3].CLK
-clk_in => vram[403][4].CLK
-clk_in => vram[403][5].CLK
-clk_in => vram[403][6].CLK
-clk_in => vram[403][7].CLK
-clk_in => vram[402][0].CLK
-clk_in => vram[402][1].CLK
-clk_in => vram[402][2].CLK
-clk_in => vram[402][3].CLK
-clk_in => vram[402][4].CLK
-clk_in => vram[402][5].CLK
-clk_in => vram[402][6].CLK
-clk_in => vram[402][7].CLK
-clk_in => vram[401][0].CLK
-clk_in => vram[401][1].CLK
-clk_in => vram[401][2].CLK
-clk_in => vram[401][3].CLK
-clk_in => vram[401][4].CLK
-clk_in => vram[401][5].CLK
-clk_in => vram[401][6].CLK
-clk_in => vram[401][7].CLK
-clk_in => vram[400][0].CLK
-clk_in => vram[400][1].CLK
-clk_in => vram[400][2].CLK
-clk_in => vram[400][3].CLK
-clk_in => vram[400][4].CLK
-clk_in => vram[400][5].CLK
-clk_in => vram[400][6].CLK
-clk_in => vram[400][7].CLK
-clk_in => vram[399][0].CLK
-clk_in => vram[399][1].CLK
-clk_in => vram[399][2].CLK
-clk_in => vram[399][3].CLK
-clk_in => vram[399][4].CLK
-clk_in => vram[399][5].CLK
-clk_in => vram[399][6].CLK
-clk_in => vram[399][7].CLK
-clk_in => vram[398][0].CLK
-clk_in => vram[398][1].CLK
-clk_in => vram[398][2].CLK
-clk_in => vram[398][3].CLK
-clk_in => vram[398][4].CLK
-clk_in => vram[398][5].CLK
-clk_in => vram[398][6].CLK
-clk_in => vram[398][7].CLK
-clk_in => vram[397][0].CLK
-clk_in => vram[397][1].CLK
-clk_in => vram[397][2].CLK
-clk_in => vram[397][3].CLK
-clk_in => vram[397][4].CLK
-clk_in => vram[397][5].CLK
-clk_in => vram[397][6].CLK
-clk_in => vram[397][7].CLK
-clk_in => vram[396][0].CLK
-clk_in => vram[396][1].CLK
-clk_in => vram[396][2].CLK
-clk_in => vram[396][3].CLK
-clk_in => vram[396][4].CLK
-clk_in => vram[396][5].CLK
-clk_in => vram[396][6].CLK
-clk_in => vram[396][7].CLK
-clk_in => vram[395][0].CLK
-clk_in => vram[395][1].CLK
-clk_in => vram[395][2].CLK
-clk_in => vram[395][3].CLK
-clk_in => vram[395][4].CLK
-clk_in => vram[395][5].CLK
-clk_in => vram[395][6].CLK
-clk_in => vram[395][7].CLK
-clk_in => vram[394][0].CLK
-clk_in => vram[394][1].CLK
-clk_in => vram[394][2].CLK
-clk_in => vram[394][3].CLK
-clk_in => vram[394][4].CLK
-clk_in => vram[394][5].CLK
-clk_in => vram[394][6].CLK
-clk_in => vram[394][7].CLK
-clk_in => vram[393][0].CLK
-clk_in => vram[393][1].CLK
-clk_in => vram[393][2].CLK
-clk_in => vram[393][3].CLK
-clk_in => vram[393][4].CLK
-clk_in => vram[393][5].CLK
-clk_in => vram[393][6].CLK
-clk_in => vram[393][7].CLK
-clk_in => vram[392][0].CLK
-clk_in => vram[392][1].CLK
-clk_in => vram[392][2].CLK
-clk_in => vram[392][3].CLK
-clk_in => vram[392][4].CLK
-clk_in => vram[392][5].CLK
-clk_in => vram[392][6].CLK
-clk_in => vram[392][7].CLK
-clk_in => vram[391][0].CLK
-clk_in => vram[391][1].CLK
-clk_in => vram[391][2].CLK
-clk_in => vram[391][3].CLK
-clk_in => vram[391][4].CLK
-clk_in => vram[391][5].CLK
-clk_in => vram[391][6].CLK
-clk_in => vram[391][7].CLK
-clk_in => vram[390][0].CLK
-clk_in => vram[390][1].CLK
-clk_in => vram[390][2].CLK
-clk_in => vram[390][3].CLK
-clk_in => vram[390][4].CLK
-clk_in => vram[390][5].CLK
-clk_in => vram[390][6].CLK
-clk_in => vram[390][7].CLK
-clk_in => vram[389][0].CLK
-clk_in => vram[389][1].CLK
-clk_in => vram[389][2].CLK
-clk_in => vram[389][3].CLK
-clk_in => vram[389][4].CLK
-clk_in => vram[389][5].CLK
-clk_in => vram[389][6].CLK
-clk_in => vram[389][7].CLK
-clk_in => vram[388][0].CLK
-clk_in => vram[388][1].CLK
-clk_in => vram[388][2].CLK
-clk_in => vram[388][3].CLK
-clk_in => vram[388][4].CLK
-clk_in => vram[388][5].CLK
-clk_in => vram[388][6].CLK
-clk_in => vram[388][7].CLK
-clk_in => vram[387][0].CLK
-clk_in => vram[387][1].CLK
-clk_in => vram[387][2].CLK
-clk_in => vram[387][3].CLK
-clk_in => vram[387][4].CLK
-clk_in => vram[387][5].CLK
-clk_in => vram[387][6].CLK
-clk_in => vram[387][7].CLK
-clk_in => vram[386][0].CLK
-clk_in => vram[386][1].CLK
-clk_in => vram[386][2].CLK
-clk_in => vram[386][3].CLK
-clk_in => vram[386][4].CLK
-clk_in => vram[386][5].CLK
-clk_in => vram[386][6].CLK
-clk_in => vram[386][7].CLK
-clk_in => vram[385][0].CLK
-clk_in => vram[385][1].CLK
-clk_in => vram[385][2].CLK
-clk_in => vram[385][3].CLK
-clk_in => vram[385][4].CLK
-clk_in => vram[385][5].CLK
-clk_in => vram[385][6].CLK
-clk_in => vram[385][7].CLK
-clk_in => vram[384][0].CLK
-clk_in => vram[384][1].CLK
-clk_in => vram[384][2].CLK
-clk_in => vram[384][3].CLK
-clk_in => vram[384][4].CLK
-clk_in => vram[384][5].CLK
-clk_in => vram[384][6].CLK
-clk_in => vram[384][7].CLK
-clk_in => vram[383][0].CLK
-clk_in => vram[383][1].CLK
-clk_in => vram[383][2].CLK
-clk_in => vram[383][3].CLK
-clk_in => vram[383][4].CLK
-clk_in => vram[383][5].CLK
-clk_in => vram[383][6].CLK
-clk_in => vram[383][7].CLK
-clk_in => vram[382][0].CLK
-clk_in => vram[382][1].CLK
-clk_in => vram[382][2].CLK
-clk_in => vram[382][3].CLK
-clk_in => vram[382][4].CLK
-clk_in => vram[382][5].CLK
-clk_in => vram[382][6].CLK
-clk_in => vram[382][7].CLK
-clk_in => vram[381][0].CLK
-clk_in => vram[381][1].CLK
-clk_in => vram[381][2].CLK
-clk_in => vram[381][3].CLK
-clk_in => vram[381][4].CLK
-clk_in => vram[381][5].CLK
-clk_in => vram[381][6].CLK
-clk_in => vram[381][7].CLK
-clk_in => vram[380][0].CLK
-clk_in => vram[380][1].CLK
-clk_in => vram[380][2].CLK
-clk_in => vram[380][3].CLK
-clk_in => vram[380][4].CLK
-clk_in => vram[380][5].CLK
-clk_in => vram[380][6].CLK
-clk_in => vram[380][7].CLK
-clk_in => vram[379][0].CLK
-clk_in => vram[379][1].CLK
-clk_in => vram[379][2].CLK
-clk_in => vram[379][3].CLK
-clk_in => vram[379][4].CLK
-clk_in => vram[379][5].CLK
-clk_in => vram[379][6].CLK
-clk_in => vram[379][7].CLK
-clk_in => vram[378][0].CLK
-clk_in => vram[378][1].CLK
-clk_in => vram[378][2].CLK
-clk_in => vram[378][3].CLK
-clk_in => vram[378][4].CLK
-clk_in => vram[378][5].CLK
-clk_in => vram[378][6].CLK
-clk_in => vram[378][7].CLK
-clk_in => vram[377][0].CLK
-clk_in => vram[377][1].CLK
-clk_in => vram[377][2].CLK
-clk_in => vram[377][3].CLK
-clk_in => vram[377][4].CLK
-clk_in => vram[377][5].CLK
-clk_in => vram[377][6].CLK
-clk_in => vram[377][7].CLK
-clk_in => vram[376][0].CLK
-clk_in => vram[376][1].CLK
-clk_in => vram[376][2].CLK
-clk_in => vram[376][3].CLK
-clk_in => vram[376][4].CLK
-clk_in => vram[376][5].CLK
-clk_in => vram[376][6].CLK
-clk_in => vram[376][7].CLK
-clk_in => vram[375][0].CLK
-clk_in => vram[375][1].CLK
-clk_in => vram[375][2].CLK
-clk_in => vram[375][3].CLK
-clk_in => vram[375][4].CLK
-clk_in => vram[375][5].CLK
-clk_in => vram[375][6].CLK
-clk_in => vram[375][7].CLK
-clk_in => vram[374][0].CLK
-clk_in => vram[374][1].CLK
-clk_in => vram[374][2].CLK
-clk_in => vram[374][3].CLK
-clk_in => vram[374][4].CLK
-clk_in => vram[374][5].CLK
-clk_in => vram[374][6].CLK
-clk_in => vram[374][7].CLK
-clk_in => vram[373][0].CLK
-clk_in => vram[373][1].CLK
-clk_in => vram[373][2].CLK
-clk_in => vram[373][3].CLK
-clk_in => vram[373][4].CLK
-clk_in => vram[373][5].CLK
-clk_in => vram[373][6].CLK
-clk_in => vram[373][7].CLK
-clk_in => vram[372][0].CLK
-clk_in => vram[372][1].CLK
-clk_in => vram[372][2].CLK
-clk_in => vram[372][3].CLK
-clk_in => vram[372][4].CLK
-clk_in => vram[372][5].CLK
-clk_in => vram[372][6].CLK
-clk_in => vram[372][7].CLK
-clk_in => vram[371][0].CLK
-clk_in => vram[371][1].CLK
-clk_in => vram[371][2].CLK
-clk_in => vram[371][3].CLK
-clk_in => vram[371][4].CLK
-clk_in => vram[371][5].CLK
-clk_in => vram[371][6].CLK
-clk_in => vram[371][7].CLK
-clk_in => vram[370][0].CLK
-clk_in => vram[370][1].CLK
-clk_in => vram[370][2].CLK
-clk_in => vram[370][3].CLK
-clk_in => vram[370][4].CLK
-clk_in => vram[370][5].CLK
-clk_in => vram[370][6].CLK
-clk_in => vram[370][7].CLK
-clk_in => vram[369][0].CLK
-clk_in => vram[369][1].CLK
-clk_in => vram[369][2].CLK
-clk_in => vram[369][3].CLK
-clk_in => vram[369][4].CLK
-clk_in => vram[369][5].CLK
-clk_in => vram[369][6].CLK
-clk_in => vram[369][7].CLK
-clk_in => vram[368][0].CLK
-clk_in => vram[368][1].CLK
-clk_in => vram[368][2].CLK
-clk_in => vram[368][3].CLK
-clk_in => vram[368][4].CLK
-clk_in => vram[368][5].CLK
-clk_in => vram[368][6].CLK
-clk_in => vram[368][7].CLK
-clk_in => vram[367][0].CLK
-clk_in => vram[367][1].CLK
-clk_in => vram[367][2].CLK
-clk_in => vram[367][3].CLK
-clk_in => vram[367][4].CLK
-clk_in => vram[367][5].CLK
-clk_in => vram[367][6].CLK
-clk_in => vram[367][7].CLK
-clk_in => vram[366][0].CLK
-clk_in => vram[366][1].CLK
-clk_in => vram[366][2].CLK
-clk_in => vram[366][3].CLK
-clk_in => vram[366][4].CLK
-clk_in => vram[366][5].CLK
-clk_in => vram[366][6].CLK
-clk_in => vram[366][7].CLK
-clk_in => vram[365][0].CLK
-clk_in => vram[365][1].CLK
-clk_in => vram[365][2].CLK
-clk_in => vram[365][3].CLK
-clk_in => vram[365][4].CLK
-clk_in => vram[365][5].CLK
-clk_in => vram[365][6].CLK
-clk_in => vram[365][7].CLK
-clk_in => vram[364][0].CLK
-clk_in => vram[364][1].CLK
-clk_in => vram[364][2].CLK
-clk_in => vram[364][3].CLK
-clk_in => vram[364][4].CLK
-clk_in => vram[364][5].CLK
-clk_in => vram[364][6].CLK
-clk_in => vram[364][7].CLK
-clk_in => vram[363][0].CLK
-clk_in => vram[363][1].CLK
-clk_in => vram[363][2].CLK
-clk_in => vram[363][3].CLK
-clk_in => vram[363][4].CLK
-clk_in => vram[363][5].CLK
-clk_in => vram[363][6].CLK
-clk_in => vram[363][7].CLK
-clk_in => vram[362][0].CLK
-clk_in => vram[362][1].CLK
-clk_in => vram[362][2].CLK
-clk_in => vram[362][3].CLK
-clk_in => vram[362][4].CLK
-clk_in => vram[362][5].CLK
-clk_in => vram[362][6].CLK
-clk_in => vram[362][7].CLK
-clk_in => vram[361][0].CLK
-clk_in => vram[361][1].CLK
-clk_in => vram[361][2].CLK
-clk_in => vram[361][3].CLK
-clk_in => vram[361][4].CLK
-clk_in => vram[361][5].CLK
-clk_in => vram[361][6].CLK
-clk_in => vram[361][7].CLK
-clk_in => vram[360][0].CLK
-clk_in => vram[360][1].CLK
-clk_in => vram[360][2].CLK
-clk_in => vram[360][3].CLK
-clk_in => vram[360][4].CLK
-clk_in => vram[360][5].CLK
-clk_in => vram[360][6].CLK
-clk_in => vram[360][7].CLK
-clk_in => vram[359][0].CLK
-clk_in => vram[359][1].CLK
-clk_in => vram[359][2].CLK
-clk_in => vram[359][3].CLK
-clk_in => vram[359][4].CLK
-clk_in => vram[359][5].CLK
-clk_in => vram[359][6].CLK
-clk_in => vram[359][7].CLK
-clk_in => vram[358][0].CLK
-clk_in => vram[358][1].CLK
-clk_in => vram[358][2].CLK
-clk_in => vram[358][3].CLK
-clk_in => vram[358][4].CLK
-clk_in => vram[358][5].CLK
-clk_in => vram[358][6].CLK
-clk_in => vram[358][7].CLK
-clk_in => vram[357][0].CLK
-clk_in => vram[357][1].CLK
-clk_in => vram[357][2].CLK
-clk_in => vram[357][3].CLK
-clk_in => vram[357][4].CLK
-clk_in => vram[357][5].CLK
-clk_in => vram[357][6].CLK
-clk_in => vram[357][7].CLK
-clk_in => vram[356][0].CLK
-clk_in => vram[356][1].CLK
-clk_in => vram[356][2].CLK
-clk_in => vram[356][3].CLK
-clk_in => vram[356][4].CLK
-clk_in => vram[356][5].CLK
-clk_in => vram[356][6].CLK
-clk_in => vram[356][7].CLK
-clk_in => vram[355][0].CLK
-clk_in => vram[355][1].CLK
-clk_in => vram[355][2].CLK
-clk_in => vram[355][3].CLK
-clk_in => vram[355][4].CLK
-clk_in => vram[355][5].CLK
-clk_in => vram[355][6].CLK
-clk_in => vram[355][7].CLK
-clk_in => vram[354][0].CLK
-clk_in => vram[354][1].CLK
-clk_in => vram[354][2].CLK
-clk_in => vram[354][3].CLK
-clk_in => vram[354][4].CLK
-clk_in => vram[354][5].CLK
-clk_in => vram[354][6].CLK
-clk_in => vram[354][7].CLK
-clk_in => vram[353][0].CLK
-clk_in => vram[353][1].CLK
-clk_in => vram[353][2].CLK
-clk_in => vram[353][3].CLK
-clk_in => vram[353][4].CLK
-clk_in => vram[353][5].CLK
-clk_in => vram[353][6].CLK
-clk_in => vram[353][7].CLK
-clk_in => vram[352][0].CLK
-clk_in => vram[352][1].CLK
-clk_in => vram[352][2].CLK
-clk_in => vram[352][3].CLK
-clk_in => vram[352][4].CLK
-clk_in => vram[352][5].CLK
-clk_in => vram[352][6].CLK
-clk_in => vram[352][7].CLK
-clk_in => vram[351][0].CLK
-clk_in => vram[351][1].CLK
-clk_in => vram[351][2].CLK
-clk_in => vram[351][3].CLK
-clk_in => vram[351][4].CLK
-clk_in => vram[351][5].CLK
-clk_in => vram[351][6].CLK
-clk_in => vram[351][7].CLK
-clk_in => vram[350][0].CLK
-clk_in => vram[350][1].CLK
-clk_in => vram[350][2].CLK
-clk_in => vram[350][3].CLK
-clk_in => vram[350][4].CLK
-clk_in => vram[350][5].CLK
-clk_in => vram[350][6].CLK
-clk_in => vram[350][7].CLK
-clk_in => vram[349][0].CLK
-clk_in => vram[349][1].CLK
-clk_in => vram[349][2].CLK
-clk_in => vram[349][3].CLK
-clk_in => vram[349][4].CLK
-clk_in => vram[349][5].CLK
-clk_in => vram[349][6].CLK
-clk_in => vram[349][7].CLK
-clk_in => vram[348][0].CLK
-clk_in => vram[348][1].CLK
-clk_in => vram[348][2].CLK
-clk_in => vram[348][3].CLK
-clk_in => vram[348][4].CLK
-clk_in => vram[348][5].CLK
-clk_in => vram[348][6].CLK
-clk_in => vram[348][7].CLK
-clk_in => vram[347][0].CLK
-clk_in => vram[347][1].CLK
-clk_in => vram[347][2].CLK
-clk_in => vram[347][3].CLK
-clk_in => vram[347][4].CLK
-clk_in => vram[347][5].CLK
-clk_in => vram[347][6].CLK
-clk_in => vram[347][7].CLK
-clk_in => vram[346][0].CLK
-clk_in => vram[346][1].CLK
-clk_in => vram[346][2].CLK
-clk_in => vram[346][3].CLK
-clk_in => vram[346][4].CLK
-clk_in => vram[346][5].CLK
-clk_in => vram[346][6].CLK
-clk_in => vram[346][7].CLK
-clk_in => vram[345][0].CLK
-clk_in => vram[345][1].CLK
-clk_in => vram[345][2].CLK
-clk_in => vram[345][3].CLK
-clk_in => vram[345][4].CLK
-clk_in => vram[345][5].CLK
-clk_in => vram[345][6].CLK
-clk_in => vram[345][7].CLK
-clk_in => vram[344][0].CLK
-clk_in => vram[344][1].CLK
-clk_in => vram[344][2].CLK
-clk_in => vram[344][3].CLK
-clk_in => vram[344][4].CLK
-clk_in => vram[344][5].CLK
-clk_in => vram[344][6].CLK
-clk_in => vram[344][7].CLK
-clk_in => vram[343][0].CLK
-clk_in => vram[343][1].CLK
-clk_in => vram[343][2].CLK
-clk_in => vram[343][3].CLK
-clk_in => vram[343][4].CLK
-clk_in => vram[343][5].CLK
-clk_in => vram[343][6].CLK
-clk_in => vram[343][7].CLK
-clk_in => vram[342][0].CLK
-clk_in => vram[342][1].CLK
-clk_in => vram[342][2].CLK
-clk_in => vram[342][3].CLK
-clk_in => vram[342][4].CLK
-clk_in => vram[342][5].CLK
-clk_in => vram[342][6].CLK
-clk_in => vram[342][7].CLK
-clk_in => vram[341][0].CLK
-clk_in => vram[341][1].CLK
-clk_in => vram[341][2].CLK
-clk_in => vram[341][3].CLK
-clk_in => vram[341][4].CLK
-clk_in => vram[341][5].CLK
-clk_in => vram[341][6].CLK
-clk_in => vram[341][7].CLK
-clk_in => vram[340][0].CLK
-clk_in => vram[340][1].CLK
-clk_in => vram[340][2].CLK
-clk_in => vram[340][3].CLK
-clk_in => vram[340][4].CLK
-clk_in => vram[340][5].CLK
-clk_in => vram[340][6].CLK
-clk_in => vram[340][7].CLK
-clk_in => vram[339][0].CLK
-clk_in => vram[339][1].CLK
-clk_in => vram[339][2].CLK
-clk_in => vram[339][3].CLK
-clk_in => vram[339][4].CLK
-clk_in => vram[339][5].CLK
-clk_in => vram[339][6].CLK
-clk_in => vram[339][7].CLK
-clk_in => vram[338][0].CLK
-clk_in => vram[338][1].CLK
-clk_in => vram[338][2].CLK
-clk_in => vram[338][3].CLK
-clk_in => vram[338][4].CLK
-clk_in => vram[338][5].CLK
-clk_in => vram[338][6].CLK
-clk_in => vram[338][7].CLK
-clk_in => vram[337][0].CLK
-clk_in => vram[337][1].CLK
-clk_in => vram[337][2].CLK
-clk_in => vram[337][3].CLK
-clk_in => vram[337][4].CLK
-clk_in => vram[337][5].CLK
-clk_in => vram[337][6].CLK
-clk_in => vram[337][7].CLK
-clk_in => vram[336][0].CLK
-clk_in => vram[336][1].CLK
-clk_in => vram[336][2].CLK
-clk_in => vram[336][3].CLK
-clk_in => vram[336][4].CLK
-clk_in => vram[336][5].CLK
-clk_in => vram[336][6].CLK
-clk_in => vram[336][7].CLK
-clk_in => vram[335][0].CLK
-clk_in => vram[335][1].CLK
-clk_in => vram[335][2].CLK
-clk_in => vram[335][3].CLK
-clk_in => vram[335][4].CLK
-clk_in => vram[335][5].CLK
-clk_in => vram[335][6].CLK
-clk_in => vram[335][7].CLK
-clk_in => vram[334][0].CLK
-clk_in => vram[334][1].CLK
-clk_in => vram[334][2].CLK
-clk_in => vram[334][3].CLK
-clk_in => vram[334][4].CLK
-clk_in => vram[334][5].CLK
-clk_in => vram[334][6].CLK
-clk_in => vram[334][7].CLK
-clk_in => vram[333][0].CLK
-clk_in => vram[333][1].CLK
-clk_in => vram[333][2].CLK
-clk_in => vram[333][3].CLK
-clk_in => vram[333][4].CLK
-clk_in => vram[333][5].CLK
-clk_in => vram[333][6].CLK
-clk_in => vram[333][7].CLK
-clk_in => vram[332][0].CLK
-clk_in => vram[332][1].CLK
-clk_in => vram[332][2].CLK
-clk_in => vram[332][3].CLK
-clk_in => vram[332][4].CLK
-clk_in => vram[332][5].CLK
-clk_in => vram[332][6].CLK
-clk_in => vram[332][7].CLK
-clk_in => vram[331][0].CLK
-clk_in => vram[331][1].CLK
-clk_in => vram[331][2].CLK
-clk_in => vram[331][3].CLK
-clk_in => vram[331][4].CLK
-clk_in => vram[331][5].CLK
-clk_in => vram[331][6].CLK
-clk_in => vram[331][7].CLK
-clk_in => vram[330][0].CLK
-clk_in => vram[330][1].CLK
-clk_in => vram[330][2].CLK
-clk_in => vram[330][3].CLK
-clk_in => vram[330][4].CLK
-clk_in => vram[330][5].CLK
-clk_in => vram[330][6].CLK
-clk_in => vram[330][7].CLK
-clk_in => vram[329][0].CLK
-clk_in => vram[329][1].CLK
-clk_in => vram[329][2].CLK
-clk_in => vram[329][3].CLK
-clk_in => vram[329][4].CLK
-clk_in => vram[329][5].CLK
-clk_in => vram[329][6].CLK
-clk_in => vram[329][7].CLK
-clk_in => vram[328][0].CLK
-clk_in => vram[328][1].CLK
-clk_in => vram[328][2].CLK
-clk_in => vram[328][3].CLK
-clk_in => vram[328][4].CLK
-clk_in => vram[328][5].CLK
-clk_in => vram[328][6].CLK
-clk_in => vram[328][7].CLK
-clk_in => vram[327][0].CLK
-clk_in => vram[327][1].CLK
-clk_in => vram[327][2].CLK
-clk_in => vram[327][3].CLK
-clk_in => vram[327][4].CLK
-clk_in => vram[327][5].CLK
-clk_in => vram[327][6].CLK
-clk_in => vram[327][7].CLK
-clk_in => vram[326][0].CLK
-clk_in => vram[326][1].CLK
-clk_in => vram[326][2].CLK
-clk_in => vram[326][3].CLK
-clk_in => vram[326][4].CLK
-clk_in => vram[326][5].CLK
-clk_in => vram[326][6].CLK
-clk_in => vram[326][7].CLK
-clk_in => vram[325][0].CLK
-clk_in => vram[325][1].CLK
-clk_in => vram[325][2].CLK
-clk_in => vram[325][3].CLK
-clk_in => vram[325][4].CLK
-clk_in => vram[325][5].CLK
-clk_in => vram[325][6].CLK
-clk_in => vram[325][7].CLK
-clk_in => vram[324][0].CLK
-clk_in => vram[324][1].CLK
-clk_in => vram[324][2].CLK
-clk_in => vram[324][3].CLK
-clk_in => vram[324][4].CLK
-clk_in => vram[324][5].CLK
-clk_in => vram[324][6].CLK
-clk_in => vram[324][7].CLK
-clk_in => vram[323][0].CLK
-clk_in => vram[323][1].CLK
-clk_in => vram[323][2].CLK
-clk_in => vram[323][3].CLK
-clk_in => vram[323][4].CLK
-clk_in => vram[323][5].CLK
-clk_in => vram[323][6].CLK
-clk_in => vram[323][7].CLK
-clk_in => vram[322][0].CLK
-clk_in => vram[322][1].CLK
-clk_in => vram[322][2].CLK
-clk_in => vram[322][3].CLK
-clk_in => vram[322][4].CLK
-clk_in => vram[322][5].CLK
-clk_in => vram[322][6].CLK
-clk_in => vram[322][7].CLK
-clk_in => vram[321][0].CLK
-clk_in => vram[321][1].CLK
-clk_in => vram[321][2].CLK
-clk_in => vram[321][3].CLK
-clk_in => vram[321][4].CLK
-clk_in => vram[321][5].CLK
-clk_in => vram[321][6].CLK
-clk_in => vram[321][7].CLK
-clk_in => vram[320][0].CLK
-clk_in => vram[320][1].CLK
-clk_in => vram[320][2].CLK
-clk_in => vram[320][3].CLK
-clk_in => vram[320][4].CLK
-clk_in => vram[320][5].CLK
-clk_in => vram[320][6].CLK
-clk_in => vram[320][7].CLK
-clk_in => vram[319][0].CLK
-clk_in => vram[319][1].CLK
-clk_in => vram[319][2].CLK
-clk_in => vram[319][3].CLK
-clk_in => vram[319][4].CLK
-clk_in => vram[319][5].CLK
-clk_in => vram[319][6].CLK
-clk_in => vram[319][7].CLK
-clk_in => vram[318][0].CLK
-clk_in => vram[318][1].CLK
-clk_in => vram[318][2].CLK
-clk_in => vram[318][3].CLK
-clk_in => vram[318][4].CLK
-clk_in => vram[318][5].CLK
-clk_in => vram[318][6].CLK
-clk_in => vram[318][7].CLK
-clk_in => vram[317][0].CLK
-clk_in => vram[317][1].CLK
-clk_in => vram[317][2].CLK
-clk_in => vram[317][3].CLK
-clk_in => vram[317][4].CLK
-clk_in => vram[317][5].CLK
-clk_in => vram[317][6].CLK
-clk_in => vram[317][7].CLK
-clk_in => vram[316][0].CLK
-clk_in => vram[316][1].CLK
-clk_in => vram[316][2].CLK
-clk_in => vram[316][3].CLK
-clk_in => vram[316][4].CLK
-clk_in => vram[316][5].CLK
-clk_in => vram[316][6].CLK
-clk_in => vram[316][7].CLK
-clk_in => vram[315][0].CLK
-clk_in => vram[315][1].CLK
-clk_in => vram[315][2].CLK
-clk_in => vram[315][3].CLK
-clk_in => vram[315][4].CLK
-clk_in => vram[315][5].CLK
-clk_in => vram[315][6].CLK
-clk_in => vram[315][7].CLK
-clk_in => vram[314][0].CLK
-clk_in => vram[314][1].CLK
-clk_in => vram[314][2].CLK
-clk_in => vram[314][3].CLK
-clk_in => vram[314][4].CLK
-clk_in => vram[314][5].CLK
-clk_in => vram[314][6].CLK
-clk_in => vram[314][7].CLK
-clk_in => vram[313][0].CLK
-clk_in => vram[313][1].CLK
-clk_in => vram[313][2].CLK
-clk_in => vram[313][3].CLK
-clk_in => vram[313][4].CLK
-clk_in => vram[313][5].CLK
-clk_in => vram[313][6].CLK
-clk_in => vram[313][7].CLK
-clk_in => vram[312][0].CLK
-clk_in => vram[312][1].CLK
-clk_in => vram[312][2].CLK
-clk_in => vram[312][3].CLK
-clk_in => vram[312][4].CLK
-clk_in => vram[312][5].CLK
-clk_in => vram[312][6].CLK
-clk_in => vram[312][7].CLK
-clk_in => vram[311][0].CLK
-clk_in => vram[311][1].CLK
-clk_in => vram[311][2].CLK
-clk_in => vram[311][3].CLK
-clk_in => vram[311][4].CLK
-clk_in => vram[311][5].CLK
-clk_in => vram[311][6].CLK
-clk_in => vram[311][7].CLK
-clk_in => vram[310][0].CLK
-clk_in => vram[310][1].CLK
-clk_in => vram[310][2].CLK
-clk_in => vram[310][3].CLK
-clk_in => vram[310][4].CLK
-clk_in => vram[310][5].CLK
-clk_in => vram[310][6].CLK
-clk_in => vram[310][7].CLK
-clk_in => vram[309][0].CLK
-clk_in => vram[309][1].CLK
-clk_in => vram[309][2].CLK
-clk_in => vram[309][3].CLK
-clk_in => vram[309][4].CLK
-clk_in => vram[309][5].CLK
-clk_in => vram[309][6].CLK
-clk_in => vram[309][7].CLK
-clk_in => vram[308][0].CLK
-clk_in => vram[308][1].CLK
-clk_in => vram[308][2].CLK
-clk_in => vram[308][3].CLK
-clk_in => vram[308][4].CLK
-clk_in => vram[308][5].CLK
-clk_in => vram[308][6].CLK
-clk_in => vram[308][7].CLK
-clk_in => vram[307][0].CLK
-clk_in => vram[307][1].CLK
-clk_in => vram[307][2].CLK
-clk_in => vram[307][3].CLK
-clk_in => vram[307][4].CLK
-clk_in => vram[307][5].CLK
-clk_in => vram[307][6].CLK
-clk_in => vram[307][7].CLK
-clk_in => vram[306][0].CLK
-clk_in => vram[306][1].CLK
-clk_in => vram[306][2].CLK
-clk_in => vram[306][3].CLK
-clk_in => vram[306][4].CLK
-clk_in => vram[306][5].CLK
-clk_in => vram[306][6].CLK
-clk_in => vram[306][7].CLK
-clk_in => vram[305][0].CLK
-clk_in => vram[305][1].CLK
-clk_in => vram[305][2].CLK
-clk_in => vram[305][3].CLK
-clk_in => vram[305][4].CLK
-clk_in => vram[305][5].CLK
-clk_in => vram[305][6].CLK
-clk_in => vram[305][7].CLK
-clk_in => vram[304][0].CLK
-clk_in => vram[304][1].CLK
-clk_in => vram[304][2].CLK
-clk_in => vram[304][3].CLK
-clk_in => vram[304][4].CLK
-clk_in => vram[304][5].CLK
-clk_in => vram[304][6].CLK
-clk_in => vram[304][7].CLK
-clk_in => vram[303][0].CLK
-clk_in => vram[303][1].CLK
-clk_in => vram[303][2].CLK
-clk_in => vram[303][3].CLK
-clk_in => vram[303][4].CLK
-clk_in => vram[303][5].CLK
-clk_in => vram[303][6].CLK
-clk_in => vram[303][7].CLK
-clk_in => vram[302][0].CLK
-clk_in => vram[302][1].CLK
-clk_in => vram[302][2].CLK
-clk_in => vram[302][3].CLK
-clk_in => vram[302][4].CLK
-clk_in => vram[302][5].CLK
-clk_in => vram[302][6].CLK
-clk_in => vram[302][7].CLK
-clk_in => vram[301][0].CLK
-clk_in => vram[301][1].CLK
-clk_in => vram[301][2].CLK
-clk_in => vram[301][3].CLK
-clk_in => vram[301][4].CLK
-clk_in => vram[301][5].CLK
-clk_in => vram[301][6].CLK
-clk_in => vram[301][7].CLK
-clk_in => vram[300][0].CLK
-clk_in => vram[300][1].CLK
-clk_in => vram[300][2].CLK
-clk_in => vram[300][3].CLK
-clk_in => vram[300][4].CLK
-clk_in => vram[300][5].CLK
-clk_in => vram[300][6].CLK
-clk_in => vram[300][7].CLK
-clk_in => vram[299][0].CLK
-clk_in => vram[299][1].CLK
-clk_in => vram[299][2].CLK
-clk_in => vram[299][3].CLK
-clk_in => vram[299][4].CLK
-clk_in => vram[299][5].CLK
-clk_in => vram[299][6].CLK
-clk_in => vram[299][7].CLK
-clk_in => vram[298][0].CLK
-clk_in => vram[298][1].CLK
-clk_in => vram[298][2].CLK
-clk_in => vram[298][3].CLK
-clk_in => vram[298][4].CLK
-clk_in => vram[298][5].CLK
-clk_in => vram[298][6].CLK
-clk_in => vram[298][7].CLK
-clk_in => vram[297][0].CLK
-clk_in => vram[297][1].CLK
-clk_in => vram[297][2].CLK
-clk_in => vram[297][3].CLK
-clk_in => vram[297][4].CLK
-clk_in => vram[297][5].CLK
-clk_in => vram[297][6].CLK
-clk_in => vram[297][7].CLK
-clk_in => vram[296][0].CLK
-clk_in => vram[296][1].CLK
-clk_in => vram[296][2].CLK
-clk_in => vram[296][3].CLK
-clk_in => vram[296][4].CLK
-clk_in => vram[296][5].CLK
-clk_in => vram[296][6].CLK
-clk_in => vram[296][7].CLK
-clk_in => vram[295][0].CLK
-clk_in => vram[295][1].CLK
-clk_in => vram[295][2].CLK
-clk_in => vram[295][3].CLK
-clk_in => vram[295][4].CLK
-clk_in => vram[295][5].CLK
-clk_in => vram[295][6].CLK
-clk_in => vram[295][7].CLK
-clk_in => vram[294][0].CLK
-clk_in => vram[294][1].CLK
-clk_in => vram[294][2].CLK
-clk_in => vram[294][3].CLK
-clk_in => vram[294][4].CLK
-clk_in => vram[294][5].CLK
-clk_in => vram[294][6].CLK
-clk_in => vram[294][7].CLK
-clk_in => vram[293][0].CLK
-clk_in => vram[293][1].CLK
-clk_in => vram[293][2].CLK
-clk_in => vram[293][3].CLK
-clk_in => vram[293][4].CLK
-clk_in => vram[293][5].CLK
-clk_in => vram[293][6].CLK
-clk_in => vram[293][7].CLK
-clk_in => vram[292][0].CLK
-clk_in => vram[292][1].CLK
-clk_in => vram[292][2].CLK
-clk_in => vram[292][3].CLK
-clk_in => vram[292][4].CLK
-clk_in => vram[292][5].CLK
-clk_in => vram[292][6].CLK
-clk_in => vram[292][7].CLK
-clk_in => vram[291][0].CLK
-clk_in => vram[291][1].CLK
-clk_in => vram[291][2].CLK
-clk_in => vram[291][3].CLK
-clk_in => vram[291][4].CLK
-clk_in => vram[291][5].CLK
-clk_in => vram[291][6].CLK
-clk_in => vram[291][7].CLK
-clk_in => vram[290][0].CLK
-clk_in => vram[290][1].CLK
-clk_in => vram[290][2].CLK
-clk_in => vram[290][3].CLK
-clk_in => vram[290][4].CLK
-clk_in => vram[290][5].CLK
-clk_in => vram[290][6].CLK
-clk_in => vram[290][7].CLK
-clk_in => vram[289][0].CLK
-clk_in => vram[289][1].CLK
-clk_in => vram[289][2].CLK
-clk_in => vram[289][3].CLK
-clk_in => vram[289][4].CLK
-clk_in => vram[289][5].CLK
-clk_in => vram[289][6].CLK
-clk_in => vram[289][7].CLK
-clk_in => vram[288][0].CLK
-clk_in => vram[288][1].CLK
-clk_in => vram[288][2].CLK
-clk_in => vram[288][3].CLK
-clk_in => vram[288][4].CLK
-clk_in => vram[288][5].CLK
-clk_in => vram[288][6].CLK
-clk_in => vram[288][7].CLK
-clk_in => vram[287][0].CLK
-clk_in => vram[287][1].CLK
-clk_in => vram[287][2].CLK
-clk_in => vram[287][3].CLK
-clk_in => vram[287][4].CLK
-clk_in => vram[287][5].CLK
-clk_in => vram[287][6].CLK
-clk_in => vram[287][7].CLK
-clk_in => vram[286][0].CLK
-clk_in => vram[286][1].CLK
-clk_in => vram[286][2].CLK
-clk_in => vram[286][3].CLK
-clk_in => vram[286][4].CLK
-clk_in => vram[286][5].CLK
-clk_in => vram[286][6].CLK
-clk_in => vram[286][7].CLK
-clk_in => vram[285][0].CLK
-clk_in => vram[285][1].CLK
-clk_in => vram[285][2].CLK
-clk_in => vram[285][3].CLK
-clk_in => vram[285][4].CLK
-clk_in => vram[285][5].CLK
-clk_in => vram[285][6].CLK
-clk_in => vram[285][7].CLK
-clk_in => vram[284][0].CLK
-clk_in => vram[284][1].CLK
-clk_in => vram[284][2].CLK
-clk_in => vram[284][3].CLK
-clk_in => vram[284][4].CLK
-clk_in => vram[284][5].CLK
-clk_in => vram[284][6].CLK
-clk_in => vram[284][7].CLK
-clk_in => vram[283][0].CLK
-clk_in => vram[283][1].CLK
-clk_in => vram[283][2].CLK
-clk_in => vram[283][3].CLK
-clk_in => vram[283][4].CLK
-clk_in => vram[283][5].CLK
-clk_in => vram[283][6].CLK
-clk_in => vram[283][7].CLK
-clk_in => vram[282][0].CLK
-clk_in => vram[282][1].CLK
-clk_in => vram[282][2].CLK
-clk_in => vram[282][3].CLK
-clk_in => vram[282][4].CLK
-clk_in => vram[282][5].CLK
-clk_in => vram[282][6].CLK
-clk_in => vram[282][7].CLK
-clk_in => vram[281][0].CLK
-clk_in => vram[281][1].CLK
-clk_in => vram[281][2].CLK
-clk_in => vram[281][3].CLK
-clk_in => vram[281][4].CLK
-clk_in => vram[281][5].CLK
-clk_in => vram[281][6].CLK
-clk_in => vram[281][7].CLK
-clk_in => vram[280][0].CLK
-clk_in => vram[280][1].CLK
-clk_in => vram[280][2].CLK
-clk_in => vram[280][3].CLK
-clk_in => vram[280][4].CLK
-clk_in => vram[280][5].CLK
-clk_in => vram[280][6].CLK
-clk_in => vram[280][7].CLK
-clk_in => vram[279][0].CLK
-clk_in => vram[279][1].CLK
-clk_in => vram[279][2].CLK
-clk_in => vram[279][3].CLK
-clk_in => vram[279][4].CLK
-clk_in => vram[279][5].CLK
-clk_in => vram[279][6].CLK
-clk_in => vram[279][7].CLK
-clk_in => vram[278][0].CLK
-clk_in => vram[278][1].CLK
-clk_in => vram[278][2].CLK
-clk_in => vram[278][3].CLK
-clk_in => vram[278][4].CLK
-clk_in => vram[278][5].CLK
-clk_in => vram[278][6].CLK
-clk_in => vram[278][7].CLK
-clk_in => vram[277][0].CLK
-clk_in => vram[277][1].CLK
-clk_in => vram[277][2].CLK
-clk_in => vram[277][3].CLK
-clk_in => vram[277][4].CLK
-clk_in => vram[277][5].CLK
-clk_in => vram[277][6].CLK
-clk_in => vram[277][7].CLK
-clk_in => vram[276][0].CLK
-clk_in => vram[276][1].CLK
-clk_in => vram[276][2].CLK
-clk_in => vram[276][3].CLK
-clk_in => vram[276][4].CLK
-clk_in => vram[276][5].CLK
-clk_in => vram[276][6].CLK
-clk_in => vram[276][7].CLK
-clk_in => vram[275][0].CLK
-clk_in => vram[275][1].CLK
-clk_in => vram[275][2].CLK
-clk_in => vram[275][3].CLK
-clk_in => vram[275][4].CLK
-clk_in => vram[275][5].CLK
-clk_in => vram[275][6].CLK
-clk_in => vram[275][7].CLK
-clk_in => vram[274][0].CLK
-clk_in => vram[274][1].CLK
-clk_in => vram[274][2].CLK
-clk_in => vram[274][3].CLK
-clk_in => vram[274][4].CLK
-clk_in => vram[274][5].CLK
-clk_in => vram[274][6].CLK
-clk_in => vram[274][7].CLK
-clk_in => vram[273][0].CLK
-clk_in => vram[273][1].CLK
-clk_in => vram[273][2].CLK
-clk_in => vram[273][3].CLK
-clk_in => vram[273][4].CLK
-clk_in => vram[273][5].CLK
-clk_in => vram[273][6].CLK
-clk_in => vram[273][7].CLK
-clk_in => vram[272][0].CLK
-clk_in => vram[272][1].CLK
-clk_in => vram[272][2].CLK
-clk_in => vram[272][3].CLK
-clk_in => vram[272][4].CLK
-clk_in => vram[272][5].CLK
-clk_in => vram[272][6].CLK
-clk_in => vram[272][7].CLK
-clk_in => vram[271][0].CLK
-clk_in => vram[271][1].CLK
-clk_in => vram[271][2].CLK
-clk_in => vram[271][3].CLK
-clk_in => vram[271][4].CLK
-clk_in => vram[271][5].CLK
-clk_in => vram[271][6].CLK
-clk_in => vram[271][7].CLK
-clk_in => vram[270][0].CLK
-clk_in => vram[270][1].CLK
-clk_in => vram[270][2].CLK
-clk_in => vram[270][3].CLK
-clk_in => vram[270][4].CLK
-clk_in => vram[270][5].CLK
-clk_in => vram[270][6].CLK
-clk_in => vram[270][7].CLK
-clk_in => vram[269][0].CLK
-clk_in => vram[269][1].CLK
-clk_in => vram[269][2].CLK
-clk_in => vram[269][3].CLK
-clk_in => vram[269][4].CLK
-clk_in => vram[269][5].CLK
-clk_in => vram[269][6].CLK
-clk_in => vram[269][7].CLK
-clk_in => vram[268][0].CLK
-clk_in => vram[268][1].CLK
-clk_in => vram[268][2].CLK
-clk_in => vram[268][3].CLK
-clk_in => vram[268][4].CLK
-clk_in => vram[268][5].CLK
-clk_in => vram[268][6].CLK
-clk_in => vram[268][7].CLK
-clk_in => vram[267][0].CLK
-clk_in => vram[267][1].CLK
-clk_in => vram[267][2].CLK
-clk_in => vram[267][3].CLK
-clk_in => vram[267][4].CLK
-clk_in => vram[267][5].CLK
-clk_in => vram[267][6].CLK
-clk_in => vram[267][7].CLK
-clk_in => vram[266][0].CLK
-clk_in => vram[266][1].CLK
-clk_in => vram[266][2].CLK
-clk_in => vram[266][3].CLK
-clk_in => vram[266][4].CLK
-clk_in => vram[266][5].CLK
-clk_in => vram[266][6].CLK
-clk_in => vram[266][7].CLK
-clk_in => vram[265][0].CLK
-clk_in => vram[265][1].CLK
-clk_in => vram[265][2].CLK
-clk_in => vram[265][3].CLK
-clk_in => vram[265][4].CLK
-clk_in => vram[265][5].CLK
-clk_in => vram[265][6].CLK
-clk_in => vram[265][7].CLK
-clk_in => vram[264][0].CLK
-clk_in => vram[264][1].CLK
-clk_in => vram[264][2].CLK
-clk_in => vram[264][3].CLK
-clk_in => vram[264][4].CLK
-clk_in => vram[264][5].CLK
-clk_in => vram[264][6].CLK
-clk_in => vram[264][7].CLK
-clk_in => vram[263][0].CLK
-clk_in => vram[263][1].CLK
-clk_in => vram[263][2].CLK
-clk_in => vram[263][3].CLK
-clk_in => vram[263][4].CLK
-clk_in => vram[263][5].CLK
-clk_in => vram[263][6].CLK
-clk_in => vram[263][7].CLK
-clk_in => vram[262][0].CLK
-clk_in => vram[262][1].CLK
-clk_in => vram[262][2].CLK
-clk_in => vram[262][3].CLK
-clk_in => vram[262][4].CLK
-clk_in => vram[262][5].CLK
-clk_in => vram[262][6].CLK
-clk_in => vram[262][7].CLK
-clk_in => vram[261][0].CLK
-clk_in => vram[261][1].CLK
-clk_in => vram[261][2].CLK
-clk_in => vram[261][3].CLK
-clk_in => vram[261][4].CLK
-clk_in => vram[261][5].CLK
-clk_in => vram[261][6].CLK
-clk_in => vram[261][7].CLK
-clk_in => vram[260][0].CLK
-clk_in => vram[260][1].CLK
-clk_in => vram[260][2].CLK
-clk_in => vram[260][3].CLK
-clk_in => vram[260][4].CLK
-clk_in => vram[260][5].CLK
-clk_in => vram[260][6].CLK
-clk_in => vram[260][7].CLK
-clk_in => vram[259][0].CLK
-clk_in => vram[259][1].CLK
-clk_in => vram[259][2].CLK
-clk_in => vram[259][3].CLK
-clk_in => vram[259][4].CLK
-clk_in => vram[259][5].CLK
-clk_in => vram[259][6].CLK
-clk_in => vram[259][7].CLK
-clk_in => vram[258][0].CLK
-clk_in => vram[258][1].CLK
-clk_in => vram[258][2].CLK
-clk_in => vram[258][3].CLK
-clk_in => vram[258][4].CLK
-clk_in => vram[258][5].CLK
-clk_in => vram[258][6].CLK
-clk_in => vram[258][7].CLK
-clk_in => vram[257][0].CLK
-clk_in => vram[257][1].CLK
-clk_in => vram[257][2].CLK
-clk_in => vram[257][3].CLK
-clk_in => vram[257][4].CLK
-clk_in => vram[257][5].CLK
-clk_in => vram[257][6].CLK
-clk_in => vram[257][7].CLK
-clk_in => vram[256][0].CLK
-clk_in => vram[256][1].CLK
-clk_in => vram[256][2].CLK
-clk_in => vram[256][3].CLK
-clk_in => vram[256][4].CLK
-clk_in => vram[256][5].CLK
-clk_in => vram[256][6].CLK
-clk_in => vram[256][7].CLK
-clk_in => vram[255][0].CLK
-clk_in => vram[255][1].CLK
-clk_in => vram[255][2].CLK
-clk_in => vram[255][3].CLK
-clk_in => vram[255][4].CLK
-clk_in => vram[255][5].CLK
-clk_in => vram[255][6].CLK
-clk_in => vram[255][7].CLK
-clk_in => vram[254][0].CLK
-clk_in => vram[254][1].CLK
-clk_in => vram[254][2].CLK
-clk_in => vram[254][3].CLK
-clk_in => vram[254][4].CLK
-clk_in => vram[254][5].CLK
-clk_in => vram[254][6].CLK
-clk_in => vram[254][7].CLK
-clk_in => vram[253][0].CLK
-clk_in => vram[253][1].CLK
-clk_in => vram[253][2].CLK
-clk_in => vram[253][3].CLK
-clk_in => vram[253][4].CLK
-clk_in => vram[253][5].CLK
-clk_in => vram[253][6].CLK
-clk_in => vram[253][7].CLK
-clk_in => vram[252][0].CLK
-clk_in => vram[252][1].CLK
-clk_in => vram[252][2].CLK
-clk_in => vram[252][3].CLK
-clk_in => vram[252][4].CLK
-clk_in => vram[252][5].CLK
-clk_in => vram[252][6].CLK
-clk_in => vram[252][7].CLK
-clk_in => vram[251][0].CLK
-clk_in => vram[251][1].CLK
-clk_in => vram[251][2].CLK
-clk_in => vram[251][3].CLK
-clk_in => vram[251][4].CLK
-clk_in => vram[251][5].CLK
-clk_in => vram[251][6].CLK
-clk_in => vram[251][7].CLK
-clk_in => vram[250][0].CLK
-clk_in => vram[250][1].CLK
-clk_in => vram[250][2].CLK
-clk_in => vram[250][3].CLK
-clk_in => vram[250][4].CLK
-clk_in => vram[250][5].CLK
-clk_in => vram[250][6].CLK
-clk_in => vram[250][7].CLK
-clk_in => vram[249][0].CLK
-clk_in => vram[249][1].CLK
-clk_in => vram[249][2].CLK
-clk_in => vram[249][3].CLK
-clk_in => vram[249][4].CLK
-clk_in => vram[249][5].CLK
-clk_in => vram[249][6].CLK
-clk_in => vram[249][7].CLK
-clk_in => vram[248][0].CLK
-clk_in => vram[248][1].CLK
-clk_in => vram[248][2].CLK
-clk_in => vram[248][3].CLK
-clk_in => vram[248][4].CLK
-clk_in => vram[248][5].CLK
-clk_in => vram[248][6].CLK
-clk_in => vram[248][7].CLK
-clk_in => vram[247][0].CLK
-clk_in => vram[247][1].CLK
-clk_in => vram[247][2].CLK
-clk_in => vram[247][3].CLK
-clk_in => vram[247][4].CLK
-clk_in => vram[247][5].CLK
-clk_in => vram[247][6].CLK
-clk_in => vram[247][7].CLK
-clk_in => vram[246][0].CLK
-clk_in => vram[246][1].CLK
-clk_in => vram[246][2].CLK
-clk_in => vram[246][3].CLK
-clk_in => vram[246][4].CLK
-clk_in => vram[246][5].CLK
-clk_in => vram[246][6].CLK
-clk_in => vram[246][7].CLK
-clk_in => vram[245][0].CLK
-clk_in => vram[245][1].CLK
-clk_in => vram[245][2].CLK
-clk_in => vram[245][3].CLK
-clk_in => vram[245][4].CLK
-clk_in => vram[245][5].CLK
-clk_in => vram[245][6].CLK
-clk_in => vram[245][7].CLK
-clk_in => vram[244][0].CLK
-clk_in => vram[244][1].CLK
-clk_in => vram[244][2].CLK
-clk_in => vram[244][3].CLK
-clk_in => vram[244][4].CLK
-clk_in => vram[244][5].CLK
-clk_in => vram[244][6].CLK
-clk_in => vram[244][7].CLK
-clk_in => vram[243][0].CLK
-clk_in => vram[243][1].CLK
-clk_in => vram[243][2].CLK
-clk_in => vram[243][3].CLK
-clk_in => vram[243][4].CLK
-clk_in => vram[243][5].CLK
-clk_in => vram[243][6].CLK
-clk_in => vram[243][7].CLK
-clk_in => vram[242][0].CLK
-clk_in => vram[242][1].CLK
-clk_in => vram[242][2].CLK
-clk_in => vram[242][3].CLK
-clk_in => vram[242][4].CLK
-clk_in => vram[242][5].CLK
-clk_in => vram[242][6].CLK
-clk_in => vram[242][7].CLK
-clk_in => vram[241][0].CLK
-clk_in => vram[241][1].CLK
-clk_in => vram[241][2].CLK
-clk_in => vram[241][3].CLK
-clk_in => vram[241][4].CLK
-clk_in => vram[241][5].CLK
-clk_in => vram[241][6].CLK
-clk_in => vram[241][7].CLK
-clk_in => vram[240][0].CLK
-clk_in => vram[240][1].CLK
-clk_in => vram[240][2].CLK
-clk_in => vram[240][3].CLK
-clk_in => vram[240][4].CLK
-clk_in => vram[240][5].CLK
-clk_in => vram[240][6].CLK
-clk_in => vram[240][7].CLK
-clk_in => vram[239][0].CLK
-clk_in => vram[239][1].CLK
-clk_in => vram[239][2].CLK
-clk_in => vram[239][3].CLK
-clk_in => vram[239][4].CLK
-clk_in => vram[239][5].CLK
-clk_in => vram[239][6].CLK
-clk_in => vram[239][7].CLK
-clk_in => vram[238][0].CLK
-clk_in => vram[238][1].CLK
-clk_in => vram[238][2].CLK
-clk_in => vram[238][3].CLK
-clk_in => vram[238][4].CLK
-clk_in => vram[238][5].CLK
-clk_in => vram[238][6].CLK
-clk_in => vram[238][7].CLK
-clk_in => vram[237][0].CLK
-clk_in => vram[237][1].CLK
-clk_in => vram[237][2].CLK
-clk_in => vram[237][3].CLK
-clk_in => vram[237][4].CLK
-clk_in => vram[237][5].CLK
-clk_in => vram[237][6].CLK
-clk_in => vram[237][7].CLK
-clk_in => vram[236][0].CLK
-clk_in => vram[236][1].CLK
-clk_in => vram[236][2].CLK
-clk_in => vram[236][3].CLK
-clk_in => vram[236][4].CLK
-clk_in => vram[236][5].CLK
-clk_in => vram[236][6].CLK
-clk_in => vram[236][7].CLK
-clk_in => vram[235][0].CLK
-clk_in => vram[235][1].CLK
-clk_in => vram[235][2].CLK
-clk_in => vram[235][3].CLK
-clk_in => vram[235][4].CLK
-clk_in => vram[235][5].CLK
-clk_in => vram[235][6].CLK
-clk_in => vram[235][7].CLK
-clk_in => vram[234][0].CLK
-clk_in => vram[234][1].CLK
-clk_in => vram[234][2].CLK
-clk_in => vram[234][3].CLK
-clk_in => vram[234][4].CLK
-clk_in => vram[234][5].CLK
-clk_in => vram[234][6].CLK
-clk_in => vram[234][7].CLK
-clk_in => vram[233][0].CLK
-clk_in => vram[233][1].CLK
-clk_in => vram[233][2].CLK
-clk_in => vram[233][3].CLK
-clk_in => vram[233][4].CLK
-clk_in => vram[233][5].CLK
-clk_in => vram[233][6].CLK
-clk_in => vram[233][7].CLK
-clk_in => vram[232][0].CLK
-clk_in => vram[232][1].CLK
-clk_in => vram[232][2].CLK
-clk_in => vram[232][3].CLK
-clk_in => vram[232][4].CLK
-clk_in => vram[232][5].CLK
-clk_in => vram[232][6].CLK
-clk_in => vram[232][7].CLK
-clk_in => vram[231][0].CLK
-clk_in => vram[231][1].CLK
-clk_in => vram[231][2].CLK
-clk_in => vram[231][3].CLK
-clk_in => vram[231][4].CLK
-clk_in => vram[231][5].CLK
-clk_in => vram[231][6].CLK
-clk_in => vram[231][7].CLK
-clk_in => vram[230][0].CLK
-clk_in => vram[230][1].CLK
-clk_in => vram[230][2].CLK
-clk_in => vram[230][3].CLK
-clk_in => vram[230][4].CLK
-clk_in => vram[230][5].CLK
-clk_in => vram[230][6].CLK
-clk_in => vram[230][7].CLK
-clk_in => vram[229][0].CLK
-clk_in => vram[229][1].CLK
-clk_in => vram[229][2].CLK
-clk_in => vram[229][3].CLK
-clk_in => vram[229][4].CLK
-clk_in => vram[229][5].CLK
-clk_in => vram[229][6].CLK
-clk_in => vram[229][7].CLK
-clk_in => vram[228][0].CLK
-clk_in => vram[228][1].CLK
-clk_in => vram[228][2].CLK
-clk_in => vram[228][3].CLK
-clk_in => vram[228][4].CLK
-clk_in => vram[228][5].CLK
-clk_in => vram[228][6].CLK
-clk_in => vram[228][7].CLK
-clk_in => vram[227][0].CLK
-clk_in => vram[227][1].CLK
-clk_in => vram[227][2].CLK
-clk_in => vram[227][3].CLK
-clk_in => vram[227][4].CLK
-clk_in => vram[227][5].CLK
-clk_in => vram[227][6].CLK
-clk_in => vram[227][7].CLK
-clk_in => vram[226][0].CLK
-clk_in => vram[226][1].CLK
-clk_in => vram[226][2].CLK
-clk_in => vram[226][3].CLK
-clk_in => vram[226][4].CLK
-clk_in => vram[226][5].CLK
-clk_in => vram[226][6].CLK
-clk_in => vram[226][7].CLK
-clk_in => vram[225][0].CLK
-clk_in => vram[225][1].CLK
-clk_in => vram[225][2].CLK
-clk_in => vram[225][3].CLK
-clk_in => vram[225][4].CLK
-clk_in => vram[225][5].CLK
-clk_in => vram[225][6].CLK
-clk_in => vram[225][7].CLK
-clk_in => vram[224][0].CLK
-clk_in => vram[224][1].CLK
-clk_in => vram[224][2].CLK
-clk_in => vram[224][3].CLK
-clk_in => vram[224][4].CLK
-clk_in => vram[224][5].CLK
-clk_in => vram[224][6].CLK
-clk_in => vram[224][7].CLK
-clk_in => vram[223][0].CLK
-clk_in => vram[223][1].CLK
-clk_in => vram[223][2].CLK
-clk_in => vram[223][3].CLK
-clk_in => vram[223][4].CLK
-clk_in => vram[223][5].CLK
-clk_in => vram[223][6].CLK
-clk_in => vram[223][7].CLK
-clk_in => vram[222][0].CLK
-clk_in => vram[222][1].CLK
-clk_in => vram[222][2].CLK
-clk_in => vram[222][3].CLK
-clk_in => vram[222][4].CLK
-clk_in => vram[222][5].CLK
-clk_in => vram[222][6].CLK
-clk_in => vram[222][7].CLK
-clk_in => vram[221][0].CLK
-clk_in => vram[221][1].CLK
-clk_in => vram[221][2].CLK
-clk_in => vram[221][3].CLK
-clk_in => vram[221][4].CLK
-clk_in => vram[221][5].CLK
-clk_in => vram[221][6].CLK
-clk_in => vram[221][7].CLK
-clk_in => vram[220][0].CLK
-clk_in => vram[220][1].CLK
-clk_in => vram[220][2].CLK
-clk_in => vram[220][3].CLK
-clk_in => vram[220][4].CLK
-clk_in => vram[220][5].CLK
-clk_in => vram[220][6].CLK
-clk_in => vram[220][7].CLK
-clk_in => vram[219][0].CLK
-clk_in => vram[219][1].CLK
-clk_in => vram[219][2].CLK
-clk_in => vram[219][3].CLK
-clk_in => vram[219][4].CLK
-clk_in => vram[219][5].CLK
-clk_in => vram[219][6].CLK
-clk_in => vram[219][7].CLK
-clk_in => vram[218][0].CLK
-clk_in => vram[218][1].CLK
-clk_in => vram[218][2].CLK
-clk_in => vram[218][3].CLK
-clk_in => vram[218][4].CLK
-clk_in => vram[218][5].CLK
-clk_in => vram[218][6].CLK
-clk_in => vram[218][7].CLK
-clk_in => vram[217][0].CLK
-clk_in => vram[217][1].CLK
-clk_in => vram[217][2].CLK
-clk_in => vram[217][3].CLK
-clk_in => vram[217][4].CLK
-clk_in => vram[217][5].CLK
-clk_in => vram[217][6].CLK
-clk_in => vram[217][7].CLK
-clk_in => vram[216][0].CLK
-clk_in => vram[216][1].CLK
-clk_in => vram[216][2].CLK
-clk_in => vram[216][3].CLK
-clk_in => vram[216][4].CLK
-clk_in => vram[216][5].CLK
-clk_in => vram[216][6].CLK
-clk_in => vram[216][7].CLK
-clk_in => vram[215][0].CLK
-clk_in => vram[215][1].CLK
-clk_in => vram[215][2].CLK
-clk_in => vram[215][3].CLK
-clk_in => vram[215][4].CLK
-clk_in => vram[215][5].CLK
-clk_in => vram[215][6].CLK
-clk_in => vram[215][7].CLK
-clk_in => vram[214][0].CLK
-clk_in => vram[214][1].CLK
-clk_in => vram[214][2].CLK
-clk_in => vram[214][3].CLK
-clk_in => vram[214][4].CLK
-clk_in => vram[214][5].CLK
-clk_in => vram[214][6].CLK
-clk_in => vram[214][7].CLK
-clk_in => vram[213][0].CLK
-clk_in => vram[213][1].CLK
-clk_in => vram[213][2].CLK
-clk_in => vram[213][3].CLK
-clk_in => vram[213][4].CLK
-clk_in => vram[213][5].CLK
-clk_in => vram[213][6].CLK
-clk_in => vram[213][7].CLK
-clk_in => vram[212][0].CLK
-clk_in => vram[212][1].CLK
-clk_in => vram[212][2].CLK
-clk_in => vram[212][3].CLK
-clk_in => vram[212][4].CLK
-clk_in => vram[212][5].CLK
-clk_in => vram[212][6].CLK
-clk_in => vram[212][7].CLK
-clk_in => vram[211][0].CLK
-clk_in => vram[211][1].CLK
-clk_in => vram[211][2].CLK
-clk_in => vram[211][3].CLK
-clk_in => vram[211][4].CLK
-clk_in => vram[211][5].CLK
-clk_in => vram[211][6].CLK
-clk_in => vram[211][7].CLK
-clk_in => vram[210][0].CLK
-clk_in => vram[210][1].CLK
-clk_in => vram[210][2].CLK
-clk_in => vram[210][3].CLK
-clk_in => vram[210][4].CLK
-clk_in => vram[210][5].CLK
-clk_in => vram[210][6].CLK
-clk_in => vram[210][7].CLK
-clk_in => vram[209][0].CLK
-clk_in => vram[209][1].CLK
-clk_in => vram[209][2].CLK
-clk_in => vram[209][3].CLK
-clk_in => vram[209][4].CLK
-clk_in => vram[209][5].CLK
-clk_in => vram[209][6].CLK
-clk_in => vram[209][7].CLK
-clk_in => vram[208][0].CLK
-clk_in => vram[208][1].CLK
-clk_in => vram[208][2].CLK
-clk_in => vram[208][3].CLK
-clk_in => vram[208][4].CLK
-clk_in => vram[208][5].CLK
-clk_in => vram[208][6].CLK
-clk_in => vram[208][7].CLK
-clk_in => vram[207][0].CLK
-clk_in => vram[207][1].CLK
-clk_in => vram[207][2].CLK
-clk_in => vram[207][3].CLK
-clk_in => vram[207][4].CLK
-clk_in => vram[207][5].CLK
-clk_in => vram[207][6].CLK
-clk_in => vram[207][7].CLK
-clk_in => vram[206][0].CLK
-clk_in => vram[206][1].CLK
-clk_in => vram[206][2].CLK
-clk_in => vram[206][3].CLK
-clk_in => vram[206][4].CLK
-clk_in => vram[206][5].CLK
-clk_in => vram[206][6].CLK
-clk_in => vram[206][7].CLK
-clk_in => vram[205][0].CLK
-clk_in => vram[205][1].CLK
-clk_in => vram[205][2].CLK
-clk_in => vram[205][3].CLK
-clk_in => vram[205][4].CLK
-clk_in => vram[205][5].CLK
-clk_in => vram[205][6].CLK
-clk_in => vram[205][7].CLK
-clk_in => vram[204][0].CLK
-clk_in => vram[204][1].CLK
-clk_in => vram[204][2].CLK
-clk_in => vram[204][3].CLK
-clk_in => vram[204][4].CLK
-clk_in => vram[204][5].CLK
-clk_in => vram[204][6].CLK
-clk_in => vram[204][7].CLK
-clk_in => vram[203][0].CLK
-clk_in => vram[203][1].CLK
-clk_in => vram[203][2].CLK
-clk_in => vram[203][3].CLK
-clk_in => vram[203][4].CLK
-clk_in => vram[203][5].CLK
-clk_in => vram[203][6].CLK
-clk_in => vram[203][7].CLK
-clk_in => vram[202][0].CLK
-clk_in => vram[202][1].CLK
-clk_in => vram[202][2].CLK
-clk_in => vram[202][3].CLK
-clk_in => vram[202][4].CLK
-clk_in => vram[202][5].CLK
-clk_in => vram[202][6].CLK
-clk_in => vram[202][7].CLK
-clk_in => vram[201][0].CLK
-clk_in => vram[201][1].CLK
-clk_in => vram[201][2].CLK
-clk_in => vram[201][3].CLK
-clk_in => vram[201][4].CLK
-clk_in => vram[201][5].CLK
-clk_in => vram[201][6].CLK
-clk_in => vram[201][7].CLK
-clk_in => vram[200][0].CLK
-clk_in => vram[200][1].CLK
-clk_in => vram[200][2].CLK
-clk_in => vram[200][3].CLK
-clk_in => vram[200][4].CLK
-clk_in => vram[200][5].CLK
-clk_in => vram[200][6].CLK
-clk_in => vram[200][7].CLK
-clk_in => vram[199][0].CLK
-clk_in => vram[199][1].CLK
-clk_in => vram[199][2].CLK
-clk_in => vram[199][3].CLK
-clk_in => vram[199][4].CLK
-clk_in => vram[199][5].CLK
-clk_in => vram[199][6].CLK
-clk_in => vram[199][7].CLK
-clk_in => vram[198][0].CLK
-clk_in => vram[198][1].CLK
-clk_in => vram[198][2].CLK
-clk_in => vram[198][3].CLK
-clk_in => vram[198][4].CLK
-clk_in => vram[198][5].CLK
-clk_in => vram[198][6].CLK
-clk_in => vram[198][7].CLK
-clk_in => vram[197][0].CLK
-clk_in => vram[197][1].CLK
-clk_in => vram[197][2].CLK
-clk_in => vram[197][3].CLK
-clk_in => vram[197][4].CLK
-clk_in => vram[197][5].CLK
-clk_in => vram[197][6].CLK
-clk_in => vram[197][7].CLK
-clk_in => vram[196][0].CLK
-clk_in => vram[196][1].CLK
-clk_in => vram[196][2].CLK
-clk_in => vram[196][3].CLK
-clk_in => vram[196][4].CLK
-clk_in => vram[196][5].CLK
-clk_in => vram[196][6].CLK
-clk_in => vram[196][7].CLK
-clk_in => vram[195][0].CLK
-clk_in => vram[195][1].CLK
-clk_in => vram[195][2].CLK
-clk_in => vram[195][3].CLK
-clk_in => vram[195][4].CLK
-clk_in => vram[195][5].CLK
-clk_in => vram[195][6].CLK
-clk_in => vram[195][7].CLK
-clk_in => vram[194][0].CLK
-clk_in => vram[194][1].CLK
-clk_in => vram[194][2].CLK
-clk_in => vram[194][3].CLK
-clk_in => vram[194][4].CLK
-clk_in => vram[194][5].CLK
-clk_in => vram[194][6].CLK
-clk_in => vram[194][7].CLK
-clk_in => vram[193][0].CLK
-clk_in => vram[193][1].CLK
-clk_in => vram[193][2].CLK
-clk_in => vram[193][3].CLK
-clk_in => vram[193][4].CLK
-clk_in => vram[193][5].CLK
-clk_in => vram[193][6].CLK
-clk_in => vram[193][7].CLK
-clk_in => vram[192][0].CLK
-clk_in => vram[192][1].CLK
-clk_in => vram[192][2].CLK
-clk_in => vram[192][3].CLK
-clk_in => vram[192][4].CLK
-clk_in => vram[192][5].CLK
-clk_in => vram[192][6].CLK
-clk_in => vram[192][7].CLK
-clk_in => vram[191][0].CLK
-clk_in => vram[191][1].CLK
-clk_in => vram[191][2].CLK
-clk_in => vram[191][3].CLK
-clk_in => vram[191][4].CLK
-clk_in => vram[191][5].CLK
-clk_in => vram[191][6].CLK
-clk_in => vram[191][7].CLK
-clk_in => vram[190][0].CLK
-clk_in => vram[190][1].CLK
-clk_in => vram[190][2].CLK
-clk_in => vram[190][3].CLK
-clk_in => vram[190][4].CLK
-clk_in => vram[190][5].CLK
-clk_in => vram[190][6].CLK
-clk_in => vram[190][7].CLK
-clk_in => vram[189][0].CLK
-clk_in => vram[189][1].CLK
-clk_in => vram[189][2].CLK
-clk_in => vram[189][3].CLK
-clk_in => vram[189][4].CLK
-clk_in => vram[189][5].CLK
-clk_in => vram[189][6].CLK
-clk_in => vram[189][7].CLK
-clk_in => vram[188][0].CLK
-clk_in => vram[188][1].CLK
-clk_in => vram[188][2].CLK
-clk_in => vram[188][3].CLK
-clk_in => vram[188][4].CLK
-clk_in => vram[188][5].CLK
-clk_in => vram[188][6].CLK
-clk_in => vram[188][7].CLK
-clk_in => vram[187][0].CLK
-clk_in => vram[187][1].CLK
-clk_in => vram[187][2].CLK
-clk_in => vram[187][3].CLK
-clk_in => vram[187][4].CLK
-clk_in => vram[187][5].CLK
-clk_in => vram[187][6].CLK
-clk_in => vram[187][7].CLK
-clk_in => vram[186][0].CLK
-clk_in => vram[186][1].CLK
-clk_in => vram[186][2].CLK
-clk_in => vram[186][3].CLK
-clk_in => vram[186][4].CLK
-clk_in => vram[186][5].CLK
-clk_in => vram[186][6].CLK
-clk_in => vram[186][7].CLK
-clk_in => vram[185][0].CLK
-clk_in => vram[185][1].CLK
-clk_in => vram[185][2].CLK
-clk_in => vram[185][3].CLK
-clk_in => vram[185][4].CLK
-clk_in => vram[185][5].CLK
-clk_in => vram[185][6].CLK
-clk_in => vram[185][7].CLK
-clk_in => vram[184][0].CLK
-clk_in => vram[184][1].CLK
-clk_in => vram[184][2].CLK
-clk_in => vram[184][3].CLK
-clk_in => vram[184][4].CLK
-clk_in => vram[184][5].CLK
-clk_in => vram[184][6].CLK
-clk_in => vram[184][7].CLK
-clk_in => vram[183][0].CLK
-clk_in => vram[183][1].CLK
-clk_in => vram[183][2].CLK
-clk_in => vram[183][3].CLK
-clk_in => vram[183][4].CLK
-clk_in => vram[183][5].CLK
-clk_in => vram[183][6].CLK
-clk_in => vram[183][7].CLK
-clk_in => vram[182][0].CLK
-clk_in => vram[182][1].CLK
-clk_in => vram[182][2].CLK
-clk_in => vram[182][3].CLK
-clk_in => vram[182][4].CLK
-clk_in => vram[182][5].CLK
-clk_in => vram[182][6].CLK
-clk_in => vram[182][7].CLK
-clk_in => vram[181][0].CLK
-clk_in => vram[181][1].CLK
-clk_in => vram[181][2].CLK
-clk_in => vram[181][3].CLK
-clk_in => vram[181][4].CLK
-clk_in => vram[181][5].CLK
-clk_in => vram[181][6].CLK
-clk_in => vram[181][7].CLK
-clk_in => vram[180][0].CLK
-clk_in => vram[180][1].CLK
-clk_in => vram[180][2].CLK
-clk_in => vram[180][3].CLK
-clk_in => vram[180][4].CLK
-clk_in => vram[180][5].CLK
-clk_in => vram[180][6].CLK
-clk_in => vram[180][7].CLK
-clk_in => vram[179][0].CLK
-clk_in => vram[179][1].CLK
-clk_in => vram[179][2].CLK
-clk_in => vram[179][3].CLK
-clk_in => vram[179][4].CLK
-clk_in => vram[179][5].CLK
-clk_in => vram[179][6].CLK
-clk_in => vram[179][7].CLK
-clk_in => vram[178][0].CLK
-clk_in => vram[178][1].CLK
-clk_in => vram[178][2].CLK
-clk_in => vram[178][3].CLK
-clk_in => vram[178][4].CLK
-clk_in => vram[178][5].CLK
-clk_in => vram[178][6].CLK
-clk_in => vram[178][7].CLK
-clk_in => vram[177][0].CLK
-clk_in => vram[177][1].CLK
-clk_in => vram[177][2].CLK
-clk_in => vram[177][3].CLK
-clk_in => vram[177][4].CLK
-clk_in => vram[177][5].CLK
-clk_in => vram[177][6].CLK
-clk_in => vram[177][7].CLK
-clk_in => vram[176][0].CLK
-clk_in => vram[176][1].CLK
-clk_in => vram[176][2].CLK
-clk_in => vram[176][3].CLK
-clk_in => vram[176][4].CLK
-clk_in => vram[176][5].CLK
-clk_in => vram[176][6].CLK
-clk_in => vram[176][7].CLK
-clk_in => vram[175][0].CLK
-clk_in => vram[175][1].CLK
-clk_in => vram[175][2].CLK
-clk_in => vram[175][3].CLK
-clk_in => vram[175][4].CLK
-clk_in => vram[175][5].CLK
-clk_in => vram[175][6].CLK
-clk_in => vram[175][7].CLK
-clk_in => vram[174][0].CLK
-clk_in => vram[174][1].CLK
-clk_in => vram[174][2].CLK
-clk_in => vram[174][3].CLK
-clk_in => vram[174][4].CLK
-clk_in => vram[174][5].CLK
-clk_in => vram[174][6].CLK
-clk_in => vram[174][7].CLK
-clk_in => vram[173][0].CLK
-clk_in => vram[173][1].CLK
-clk_in => vram[173][2].CLK
-clk_in => vram[173][3].CLK
-clk_in => vram[173][4].CLK
-clk_in => vram[173][5].CLK
-clk_in => vram[173][6].CLK
-clk_in => vram[173][7].CLK
-clk_in => vram[172][0].CLK
-clk_in => vram[172][1].CLK
-clk_in => vram[172][2].CLK
-clk_in => vram[172][3].CLK
-clk_in => vram[172][4].CLK
-clk_in => vram[172][5].CLK
-clk_in => vram[172][6].CLK
-clk_in => vram[172][7].CLK
-clk_in => vram[171][0].CLK
-clk_in => vram[171][1].CLK
-clk_in => vram[171][2].CLK
-clk_in => vram[171][3].CLK
-clk_in => vram[171][4].CLK
-clk_in => vram[171][5].CLK
-clk_in => vram[171][6].CLK
-clk_in => vram[171][7].CLK
-clk_in => vram[170][0].CLK
-clk_in => vram[170][1].CLK
-clk_in => vram[170][2].CLK
-clk_in => vram[170][3].CLK
-clk_in => vram[170][4].CLK
-clk_in => vram[170][5].CLK
-clk_in => vram[170][6].CLK
-clk_in => vram[170][7].CLK
-clk_in => vram[169][0].CLK
-clk_in => vram[169][1].CLK
-clk_in => vram[169][2].CLK
-clk_in => vram[169][3].CLK
-clk_in => vram[169][4].CLK
-clk_in => vram[169][5].CLK
-clk_in => vram[169][6].CLK
-clk_in => vram[169][7].CLK
-clk_in => vram[168][0].CLK
-clk_in => vram[168][1].CLK
-clk_in => vram[168][2].CLK
-clk_in => vram[168][3].CLK
-clk_in => vram[168][4].CLK
-clk_in => vram[168][5].CLK
-clk_in => vram[168][6].CLK
-clk_in => vram[168][7].CLK
-clk_in => vram[167][0].CLK
-clk_in => vram[167][1].CLK
-clk_in => vram[167][2].CLK
-clk_in => vram[167][3].CLK
-clk_in => vram[167][4].CLK
-clk_in => vram[167][5].CLK
-clk_in => vram[167][6].CLK
-clk_in => vram[167][7].CLK
-clk_in => vram[166][0].CLK
-clk_in => vram[166][1].CLK
-clk_in => vram[166][2].CLK
-clk_in => vram[166][3].CLK
-clk_in => vram[166][4].CLK
-clk_in => vram[166][5].CLK
-clk_in => vram[166][6].CLK
-clk_in => vram[166][7].CLK
-clk_in => vram[165][0].CLK
-clk_in => vram[165][1].CLK
-clk_in => vram[165][2].CLK
-clk_in => vram[165][3].CLK
-clk_in => vram[165][4].CLK
-clk_in => vram[165][5].CLK
-clk_in => vram[165][6].CLK
-clk_in => vram[165][7].CLK
-clk_in => vram[164][0].CLK
-clk_in => vram[164][1].CLK
-clk_in => vram[164][2].CLK
-clk_in => vram[164][3].CLK
-clk_in => vram[164][4].CLK
-clk_in => vram[164][5].CLK
-clk_in => vram[164][6].CLK
-clk_in => vram[164][7].CLK
-clk_in => vram[163][0].CLK
-clk_in => vram[163][1].CLK
-clk_in => vram[163][2].CLK
-clk_in => vram[163][3].CLK
-clk_in => vram[163][4].CLK
-clk_in => vram[163][5].CLK
-clk_in => vram[163][6].CLK
-clk_in => vram[163][7].CLK
-clk_in => vram[162][0].CLK
-clk_in => vram[162][1].CLK
-clk_in => vram[162][2].CLK
-clk_in => vram[162][3].CLK
-clk_in => vram[162][4].CLK
-clk_in => vram[162][5].CLK
-clk_in => vram[162][6].CLK
-clk_in => vram[162][7].CLK
-clk_in => vram[161][0].CLK
-clk_in => vram[161][1].CLK
-clk_in => vram[161][2].CLK
-clk_in => vram[161][3].CLK
-clk_in => vram[161][4].CLK
-clk_in => vram[161][5].CLK
-clk_in => vram[161][6].CLK
-clk_in => vram[161][7].CLK
-clk_in => vram[160][0].CLK
-clk_in => vram[160][1].CLK
-clk_in => vram[160][2].CLK
-clk_in => vram[160][3].CLK
-clk_in => vram[160][4].CLK
-clk_in => vram[160][5].CLK
-clk_in => vram[160][6].CLK
-clk_in => vram[160][7].CLK
-clk_in => vram[159][0].CLK
-clk_in => vram[159][1].CLK
-clk_in => vram[159][2].CLK
-clk_in => vram[159][3].CLK
-clk_in => vram[159][4].CLK
-clk_in => vram[159][5].CLK
-clk_in => vram[159][6].CLK
-clk_in => vram[159][7].CLK
-clk_in => vram[158][0].CLK
-clk_in => vram[158][1].CLK
-clk_in => vram[158][2].CLK
-clk_in => vram[158][3].CLK
-clk_in => vram[158][4].CLK
-clk_in => vram[158][5].CLK
-clk_in => vram[158][6].CLK
-clk_in => vram[158][7].CLK
-clk_in => vram[157][0].CLK
-clk_in => vram[157][1].CLK
-clk_in => vram[157][2].CLK
-clk_in => vram[157][3].CLK
-clk_in => vram[157][4].CLK
-clk_in => vram[157][5].CLK
-clk_in => vram[157][6].CLK
-clk_in => vram[157][7].CLK
-clk_in => vram[156][0].CLK
-clk_in => vram[156][1].CLK
-clk_in => vram[156][2].CLK
-clk_in => vram[156][3].CLK
-clk_in => vram[156][4].CLK
-clk_in => vram[156][5].CLK
-clk_in => vram[156][6].CLK
-clk_in => vram[156][7].CLK
-clk_in => vram[155][0].CLK
-clk_in => vram[155][1].CLK
-clk_in => vram[155][2].CLK
-clk_in => vram[155][3].CLK
-clk_in => vram[155][4].CLK
-clk_in => vram[155][5].CLK
-clk_in => vram[155][6].CLK
-clk_in => vram[155][7].CLK
-clk_in => vram[154][0].CLK
-clk_in => vram[154][1].CLK
-clk_in => vram[154][2].CLK
-clk_in => vram[154][3].CLK
-clk_in => vram[154][4].CLK
-clk_in => vram[154][5].CLK
-clk_in => vram[154][6].CLK
-clk_in => vram[154][7].CLK
-clk_in => vram[153][0].CLK
-clk_in => vram[153][1].CLK
-clk_in => vram[153][2].CLK
-clk_in => vram[153][3].CLK
-clk_in => vram[153][4].CLK
-clk_in => vram[153][5].CLK
-clk_in => vram[153][6].CLK
-clk_in => vram[153][7].CLK
-clk_in => vram[152][0].CLK
-clk_in => vram[152][1].CLK
-clk_in => vram[152][2].CLK
-clk_in => vram[152][3].CLK
-clk_in => vram[152][4].CLK
-clk_in => vram[152][5].CLK
-clk_in => vram[152][6].CLK
-clk_in => vram[152][7].CLK
-clk_in => vram[151][0].CLK
-clk_in => vram[151][1].CLK
-clk_in => vram[151][2].CLK
-clk_in => vram[151][3].CLK
-clk_in => vram[151][4].CLK
-clk_in => vram[151][5].CLK
-clk_in => vram[151][6].CLK
-clk_in => vram[151][7].CLK
-clk_in => vram[150][0].CLK
-clk_in => vram[150][1].CLK
-clk_in => vram[150][2].CLK
-clk_in => vram[150][3].CLK
-clk_in => vram[150][4].CLK
-clk_in => vram[150][5].CLK
-clk_in => vram[150][6].CLK
-clk_in => vram[150][7].CLK
-clk_in => vram[149][0].CLK
-clk_in => vram[149][1].CLK
-clk_in => vram[149][2].CLK
-clk_in => vram[149][3].CLK
-clk_in => vram[149][4].CLK
-clk_in => vram[149][5].CLK
-clk_in => vram[149][6].CLK
-clk_in => vram[149][7].CLK
-clk_in => vram[148][0].CLK
-clk_in => vram[148][1].CLK
-clk_in => vram[148][2].CLK
-clk_in => vram[148][3].CLK
-clk_in => vram[148][4].CLK
-clk_in => vram[148][5].CLK
-clk_in => vram[148][6].CLK
-clk_in => vram[148][7].CLK
-clk_in => vram[147][0].CLK
-clk_in => vram[147][1].CLK
-clk_in => vram[147][2].CLK
-clk_in => vram[147][3].CLK
-clk_in => vram[147][4].CLK
-clk_in => vram[147][5].CLK
-clk_in => vram[147][6].CLK
-clk_in => vram[147][7].CLK
-clk_in => vram[146][0].CLK
-clk_in => vram[146][1].CLK
-clk_in => vram[146][2].CLK
-clk_in => vram[146][3].CLK
-clk_in => vram[146][4].CLK
-clk_in => vram[146][5].CLK
-clk_in => vram[146][6].CLK
-clk_in => vram[146][7].CLK
-clk_in => vram[145][0].CLK
-clk_in => vram[145][1].CLK
-clk_in => vram[145][2].CLK
-clk_in => vram[145][3].CLK
-clk_in => vram[145][4].CLK
-clk_in => vram[145][5].CLK
-clk_in => vram[145][6].CLK
-clk_in => vram[145][7].CLK
-clk_in => vram[144][0].CLK
-clk_in => vram[144][1].CLK
-clk_in => vram[144][2].CLK
-clk_in => vram[144][3].CLK
-clk_in => vram[144][4].CLK
-clk_in => vram[144][5].CLK
-clk_in => vram[144][6].CLK
-clk_in => vram[144][7].CLK
-clk_in => vram[143][0].CLK
-clk_in => vram[143][1].CLK
-clk_in => vram[143][2].CLK
-clk_in => vram[143][3].CLK
-clk_in => vram[143][4].CLK
-clk_in => vram[143][5].CLK
-clk_in => vram[143][6].CLK
-clk_in => vram[143][7].CLK
-clk_in => vram[142][0].CLK
-clk_in => vram[142][1].CLK
-clk_in => vram[142][2].CLK
-clk_in => vram[142][3].CLK
-clk_in => vram[142][4].CLK
-clk_in => vram[142][5].CLK
-clk_in => vram[142][6].CLK
-clk_in => vram[142][7].CLK
-clk_in => vram[141][0].CLK
-clk_in => vram[141][1].CLK
-clk_in => vram[141][2].CLK
-clk_in => vram[141][3].CLK
-clk_in => vram[141][4].CLK
-clk_in => vram[141][5].CLK
-clk_in => vram[141][6].CLK
-clk_in => vram[141][7].CLK
-clk_in => vram[140][0].CLK
-clk_in => vram[140][1].CLK
-clk_in => vram[140][2].CLK
-clk_in => vram[140][3].CLK
-clk_in => vram[140][4].CLK
-clk_in => vram[140][5].CLK
-clk_in => vram[140][6].CLK
-clk_in => vram[140][7].CLK
-clk_in => vram[139][0].CLK
-clk_in => vram[139][1].CLK
-clk_in => vram[139][2].CLK
-clk_in => vram[139][3].CLK
-clk_in => vram[139][4].CLK
-clk_in => vram[139][5].CLK
-clk_in => vram[139][6].CLK
-clk_in => vram[139][7].CLK
-clk_in => vram[138][0].CLK
-clk_in => vram[138][1].CLK
-clk_in => vram[138][2].CLK
-clk_in => vram[138][3].CLK
-clk_in => vram[138][4].CLK
-clk_in => vram[138][5].CLK
-clk_in => vram[138][6].CLK
-clk_in => vram[138][7].CLK
-clk_in => vram[137][0].CLK
-clk_in => vram[137][1].CLK
-clk_in => vram[137][2].CLK
-clk_in => vram[137][3].CLK
-clk_in => vram[137][4].CLK
-clk_in => vram[137][5].CLK
-clk_in => vram[137][6].CLK
-clk_in => vram[137][7].CLK
-clk_in => vram[136][0].CLK
-clk_in => vram[136][1].CLK
-clk_in => vram[136][2].CLK
-clk_in => vram[136][3].CLK
-clk_in => vram[136][4].CLK
-clk_in => vram[136][5].CLK
-clk_in => vram[136][6].CLK
-clk_in => vram[136][7].CLK
-clk_in => vram[135][0].CLK
-clk_in => vram[135][1].CLK
-clk_in => vram[135][2].CLK
-clk_in => vram[135][3].CLK
-clk_in => vram[135][4].CLK
-clk_in => vram[135][5].CLK
-clk_in => vram[135][6].CLK
-clk_in => vram[135][7].CLK
-clk_in => vram[134][0].CLK
-clk_in => vram[134][1].CLK
-clk_in => vram[134][2].CLK
-clk_in => vram[134][3].CLK
-clk_in => vram[134][4].CLK
-clk_in => vram[134][5].CLK
-clk_in => vram[134][6].CLK
-clk_in => vram[134][7].CLK
-clk_in => vram[133][0].CLK
-clk_in => vram[133][1].CLK
-clk_in => vram[133][2].CLK
-clk_in => vram[133][3].CLK
-clk_in => vram[133][4].CLK
-clk_in => vram[133][5].CLK
-clk_in => vram[133][6].CLK
-clk_in => vram[133][7].CLK
-clk_in => vram[132][0].CLK
-clk_in => vram[132][1].CLK
-clk_in => vram[132][2].CLK
-clk_in => vram[132][3].CLK
-clk_in => vram[132][4].CLK
-clk_in => vram[132][5].CLK
-clk_in => vram[132][6].CLK
-clk_in => vram[132][7].CLK
-clk_in => vram[131][0].CLK
-clk_in => vram[131][1].CLK
-clk_in => vram[131][2].CLK
-clk_in => vram[131][3].CLK
-clk_in => vram[131][4].CLK
-clk_in => vram[131][5].CLK
-clk_in => vram[131][6].CLK
-clk_in => vram[131][7].CLK
-clk_in => vram[130][0].CLK
-clk_in => vram[130][1].CLK
-clk_in => vram[130][2].CLK
-clk_in => vram[130][3].CLK
-clk_in => vram[130][4].CLK
-clk_in => vram[130][5].CLK
-clk_in => vram[130][6].CLK
-clk_in => vram[130][7].CLK
-clk_in => vram[129][0].CLK
-clk_in => vram[129][1].CLK
-clk_in => vram[129][2].CLK
-clk_in => vram[129][3].CLK
-clk_in => vram[129][4].CLK
-clk_in => vram[129][5].CLK
-clk_in => vram[129][6].CLK
-clk_in => vram[129][7].CLK
-clk_in => vram[128][0].CLK
-clk_in => vram[128][1].CLK
-clk_in => vram[128][2].CLK
-clk_in => vram[128][3].CLK
-clk_in => vram[128][4].CLK
-clk_in => vram[128][5].CLK
-clk_in => vram[128][6].CLK
-clk_in => vram[128][7].CLK
-clk_in => vram[127][0].CLK
-clk_in => vram[127][1].CLK
-clk_in => vram[127][2].CLK
-clk_in => vram[127][3].CLK
-clk_in => vram[127][4].CLK
-clk_in => vram[127][5].CLK
-clk_in => vram[127][6].CLK
-clk_in => vram[127][7].CLK
-clk_in => vram[126][0].CLK
-clk_in => vram[126][1].CLK
-clk_in => vram[126][2].CLK
-clk_in => vram[126][3].CLK
-clk_in => vram[126][4].CLK
-clk_in => vram[126][5].CLK
-clk_in => vram[126][6].CLK
-clk_in => vram[126][7].CLK
-clk_in => vram[125][0].CLK
-clk_in => vram[125][1].CLK
-clk_in => vram[125][2].CLK
-clk_in => vram[125][3].CLK
-clk_in => vram[125][4].CLK
-clk_in => vram[125][5].CLK
-clk_in => vram[125][6].CLK
-clk_in => vram[125][7].CLK
-clk_in => vram[124][0].CLK
-clk_in => vram[124][1].CLK
-clk_in => vram[124][2].CLK
-clk_in => vram[124][3].CLK
-clk_in => vram[124][4].CLK
-clk_in => vram[124][5].CLK
-clk_in => vram[124][6].CLK
-clk_in => vram[124][7].CLK
-clk_in => vram[123][0].CLK
-clk_in => vram[123][1].CLK
-clk_in => vram[123][2].CLK
-clk_in => vram[123][3].CLK
-clk_in => vram[123][4].CLK
-clk_in => vram[123][5].CLK
-clk_in => vram[123][6].CLK
-clk_in => vram[123][7].CLK
-clk_in => vram[122][0].CLK
-clk_in => vram[122][1].CLK
-clk_in => vram[122][2].CLK
-clk_in => vram[122][3].CLK
-clk_in => vram[122][4].CLK
-clk_in => vram[122][5].CLK
-clk_in => vram[122][6].CLK
-clk_in => vram[122][7].CLK
-clk_in => vram[121][0].CLK
-clk_in => vram[121][1].CLK
-clk_in => vram[121][2].CLK
-clk_in => vram[121][3].CLK
-clk_in => vram[121][4].CLK
-clk_in => vram[121][5].CLK
-clk_in => vram[121][6].CLK
-clk_in => vram[121][7].CLK
-clk_in => vram[120][0].CLK
-clk_in => vram[120][1].CLK
-clk_in => vram[120][2].CLK
-clk_in => vram[120][3].CLK
-clk_in => vram[120][4].CLK
-clk_in => vram[120][5].CLK
-clk_in => vram[120][6].CLK
-clk_in => vram[120][7].CLK
-clk_in => vram[119][0].CLK
-clk_in => vram[119][1].CLK
-clk_in => vram[119][2].CLK
-clk_in => vram[119][3].CLK
-clk_in => vram[119][4].CLK
-clk_in => vram[119][5].CLK
-clk_in => vram[119][6].CLK
-clk_in => vram[119][7].CLK
-clk_in => vram[118][0].CLK
-clk_in => vram[118][1].CLK
-clk_in => vram[118][2].CLK
-clk_in => vram[118][3].CLK
-clk_in => vram[118][4].CLK
-clk_in => vram[118][5].CLK
-clk_in => vram[118][6].CLK
-clk_in => vram[118][7].CLK
-clk_in => vram[117][0].CLK
-clk_in => vram[117][1].CLK
-clk_in => vram[117][2].CLK
-clk_in => vram[117][3].CLK
-clk_in => vram[117][4].CLK
-clk_in => vram[117][5].CLK
-clk_in => vram[117][6].CLK
-clk_in => vram[117][7].CLK
-clk_in => vram[116][0].CLK
-clk_in => vram[116][1].CLK
-clk_in => vram[116][2].CLK
-clk_in => vram[116][3].CLK
-clk_in => vram[116][4].CLK
-clk_in => vram[116][5].CLK
-clk_in => vram[116][6].CLK
-clk_in => vram[116][7].CLK
-clk_in => vram[115][0].CLK
-clk_in => vram[115][1].CLK
-clk_in => vram[115][2].CLK
-clk_in => vram[115][3].CLK
-clk_in => vram[115][4].CLK
-clk_in => vram[115][5].CLK
-clk_in => vram[115][6].CLK
-clk_in => vram[115][7].CLK
-clk_in => vram[114][0].CLK
-clk_in => vram[114][1].CLK
-clk_in => vram[114][2].CLK
-clk_in => vram[114][3].CLK
-clk_in => vram[114][4].CLK
-clk_in => vram[114][5].CLK
-clk_in => vram[114][6].CLK
-clk_in => vram[114][7].CLK
-clk_in => vram[113][0].CLK
-clk_in => vram[113][1].CLK
-clk_in => vram[113][2].CLK
-clk_in => vram[113][3].CLK
-clk_in => vram[113][4].CLK
-clk_in => vram[113][5].CLK
-clk_in => vram[113][6].CLK
-clk_in => vram[113][7].CLK
-clk_in => vram[112][0].CLK
-clk_in => vram[112][1].CLK
-clk_in => vram[112][2].CLK
-clk_in => vram[112][3].CLK
-clk_in => vram[112][4].CLK
-clk_in => vram[112][5].CLK
-clk_in => vram[112][6].CLK
-clk_in => vram[112][7].CLK
-clk_in => vram[111][0].CLK
-clk_in => vram[111][1].CLK
-clk_in => vram[111][2].CLK
-clk_in => vram[111][3].CLK
-clk_in => vram[111][4].CLK
-clk_in => vram[111][5].CLK
-clk_in => vram[111][6].CLK
-clk_in => vram[111][7].CLK
-clk_in => vram[110][0].CLK
-clk_in => vram[110][1].CLK
-clk_in => vram[110][2].CLK
-clk_in => vram[110][3].CLK
-clk_in => vram[110][4].CLK
-clk_in => vram[110][5].CLK
-clk_in => vram[110][6].CLK
-clk_in => vram[110][7].CLK
-clk_in => vram[109][0].CLK
-clk_in => vram[109][1].CLK
-clk_in => vram[109][2].CLK
-clk_in => vram[109][3].CLK
-clk_in => vram[109][4].CLK
-clk_in => vram[109][5].CLK
-clk_in => vram[109][6].CLK
-clk_in => vram[109][7].CLK
-clk_in => vram[108][0].CLK
-clk_in => vram[108][1].CLK
-clk_in => vram[108][2].CLK
-clk_in => vram[108][3].CLK
-clk_in => vram[108][4].CLK
-clk_in => vram[108][5].CLK
-clk_in => vram[108][6].CLK
-clk_in => vram[108][7].CLK
-clk_in => vram[107][0].CLK
-clk_in => vram[107][1].CLK
-clk_in => vram[107][2].CLK
-clk_in => vram[107][3].CLK
-clk_in => vram[107][4].CLK
-clk_in => vram[107][5].CLK
-clk_in => vram[107][6].CLK
-clk_in => vram[107][7].CLK
-clk_in => vram[106][0].CLK
-clk_in => vram[106][1].CLK
-clk_in => vram[106][2].CLK
-clk_in => vram[106][3].CLK
-clk_in => vram[106][4].CLK
-clk_in => vram[106][5].CLK
-clk_in => vram[106][6].CLK
-clk_in => vram[106][7].CLK
-clk_in => vram[105][0].CLK
-clk_in => vram[105][1].CLK
-clk_in => vram[105][2].CLK
-clk_in => vram[105][3].CLK
-clk_in => vram[105][4].CLK
-clk_in => vram[105][5].CLK
-clk_in => vram[105][6].CLK
-clk_in => vram[105][7].CLK
-clk_in => vram[104][0].CLK
-clk_in => vram[104][1].CLK
-clk_in => vram[104][2].CLK
-clk_in => vram[104][3].CLK
-clk_in => vram[104][4].CLK
-clk_in => vram[104][5].CLK
-clk_in => vram[104][6].CLK
-clk_in => vram[104][7].CLK
-clk_in => vram[103][0].CLK
-clk_in => vram[103][1].CLK
-clk_in => vram[103][2].CLK
-clk_in => vram[103][3].CLK
-clk_in => vram[103][4].CLK
-clk_in => vram[103][5].CLK
-clk_in => vram[103][6].CLK
-clk_in => vram[103][7].CLK
-clk_in => vram[102][0].CLK
-clk_in => vram[102][1].CLK
-clk_in => vram[102][2].CLK
-clk_in => vram[102][3].CLK
-clk_in => vram[102][4].CLK
-clk_in => vram[102][5].CLK
-clk_in => vram[102][6].CLK
-clk_in => vram[102][7].CLK
-clk_in => vram[101][0].CLK
-clk_in => vram[101][1].CLK
-clk_in => vram[101][2].CLK
-clk_in => vram[101][3].CLK
-clk_in => vram[101][4].CLK
-clk_in => vram[101][5].CLK
-clk_in => vram[101][6].CLK
-clk_in => vram[101][7].CLK
-clk_in => vram[100][0].CLK
-clk_in => vram[100][1].CLK
-clk_in => vram[100][2].CLK
-clk_in => vram[100][3].CLK
-clk_in => vram[100][4].CLK
-clk_in => vram[100][5].CLK
-clk_in => vram[100][6].CLK
-clk_in => vram[100][7].CLK
-clk_in => vram[99][0].CLK
-clk_in => vram[99][1].CLK
-clk_in => vram[99][2].CLK
-clk_in => vram[99][3].CLK
-clk_in => vram[99][4].CLK
-clk_in => vram[99][5].CLK
-clk_in => vram[99][6].CLK
-clk_in => vram[99][7].CLK
-clk_in => vram[98][0].CLK
-clk_in => vram[98][1].CLK
-clk_in => vram[98][2].CLK
-clk_in => vram[98][3].CLK
-clk_in => vram[98][4].CLK
-clk_in => vram[98][5].CLK
-clk_in => vram[98][6].CLK
-clk_in => vram[98][7].CLK
-clk_in => vram[97][0].CLK
-clk_in => vram[97][1].CLK
-clk_in => vram[97][2].CLK
-clk_in => vram[97][3].CLK
-clk_in => vram[97][4].CLK
-clk_in => vram[97][5].CLK
-clk_in => vram[97][6].CLK
-clk_in => vram[97][7].CLK
-clk_in => vram[96][0].CLK
-clk_in => vram[96][1].CLK
-clk_in => vram[96][2].CLK
-clk_in => vram[96][3].CLK
-clk_in => vram[96][4].CLK
-clk_in => vram[96][5].CLK
-clk_in => vram[96][6].CLK
-clk_in => vram[96][7].CLK
-clk_in => vram[95][0].CLK
-clk_in => vram[95][1].CLK
-clk_in => vram[95][2].CLK
-clk_in => vram[95][3].CLK
-clk_in => vram[95][4].CLK
-clk_in => vram[95][5].CLK
-clk_in => vram[95][6].CLK
-clk_in => vram[95][7].CLK
-clk_in => vram[94][0].CLK
-clk_in => vram[94][1].CLK
-clk_in => vram[94][2].CLK
-clk_in => vram[94][3].CLK
-clk_in => vram[94][4].CLK
-clk_in => vram[94][5].CLK
-clk_in => vram[94][6].CLK
-clk_in => vram[94][7].CLK
-clk_in => vram[93][0].CLK
-clk_in => vram[93][1].CLK
-clk_in => vram[93][2].CLK
-clk_in => vram[93][3].CLK
-clk_in => vram[93][4].CLK
-clk_in => vram[93][5].CLK
-clk_in => vram[93][6].CLK
-clk_in => vram[93][7].CLK
-clk_in => vram[92][0].CLK
-clk_in => vram[92][1].CLK
-clk_in => vram[92][2].CLK
-clk_in => vram[92][3].CLK
-clk_in => vram[92][4].CLK
-clk_in => vram[92][5].CLK
-clk_in => vram[92][6].CLK
-clk_in => vram[92][7].CLK
-clk_in => vram[91][0].CLK
-clk_in => vram[91][1].CLK
-clk_in => vram[91][2].CLK
-clk_in => vram[91][3].CLK
-clk_in => vram[91][4].CLK
-clk_in => vram[91][5].CLK
-clk_in => vram[91][6].CLK
-clk_in => vram[91][7].CLK
-clk_in => vram[90][0].CLK
-clk_in => vram[90][1].CLK
-clk_in => vram[90][2].CLK
-clk_in => vram[90][3].CLK
-clk_in => vram[90][4].CLK
-clk_in => vram[90][5].CLK
-clk_in => vram[90][6].CLK
-clk_in => vram[90][7].CLK
-clk_in => vram[89][0].CLK
-clk_in => vram[89][1].CLK
-clk_in => vram[89][2].CLK
-clk_in => vram[89][3].CLK
-clk_in => vram[89][4].CLK
-clk_in => vram[89][5].CLK
-clk_in => vram[89][6].CLK
-clk_in => vram[89][7].CLK
-clk_in => vram[88][0].CLK
-clk_in => vram[88][1].CLK
-clk_in => vram[88][2].CLK
-clk_in => vram[88][3].CLK
-clk_in => vram[88][4].CLK
-clk_in => vram[88][5].CLK
-clk_in => vram[88][6].CLK
-clk_in => vram[88][7].CLK
-clk_in => vram[87][0].CLK
-clk_in => vram[87][1].CLK
-clk_in => vram[87][2].CLK
-clk_in => vram[87][3].CLK
-clk_in => vram[87][4].CLK
-clk_in => vram[87][5].CLK
-clk_in => vram[87][6].CLK
-clk_in => vram[87][7].CLK
-clk_in => vram[86][0].CLK
-clk_in => vram[86][1].CLK
-clk_in => vram[86][2].CLK
-clk_in => vram[86][3].CLK
-clk_in => vram[86][4].CLK
-clk_in => vram[86][5].CLK
-clk_in => vram[86][6].CLK
-clk_in => vram[86][7].CLK
-clk_in => vram[85][0].CLK
-clk_in => vram[85][1].CLK
-clk_in => vram[85][2].CLK
-clk_in => vram[85][3].CLK
-clk_in => vram[85][4].CLK
-clk_in => vram[85][5].CLK
-clk_in => vram[85][6].CLK
-clk_in => vram[85][7].CLK
-clk_in => vram[84][0].CLK
-clk_in => vram[84][1].CLK
-clk_in => vram[84][2].CLK
-clk_in => vram[84][3].CLK
-clk_in => vram[84][4].CLK
-clk_in => vram[84][5].CLK
-clk_in => vram[84][6].CLK
-clk_in => vram[84][7].CLK
-clk_in => vram[83][0].CLK
-clk_in => vram[83][1].CLK
-clk_in => vram[83][2].CLK
-clk_in => vram[83][3].CLK
-clk_in => vram[83][4].CLK
-clk_in => vram[83][5].CLK
-clk_in => vram[83][6].CLK
-clk_in => vram[83][7].CLK
-clk_in => vram[82][0].CLK
-clk_in => vram[82][1].CLK
-clk_in => vram[82][2].CLK
-clk_in => vram[82][3].CLK
-clk_in => vram[82][4].CLK
-clk_in => vram[82][5].CLK
-clk_in => vram[82][6].CLK
-clk_in => vram[82][7].CLK
-clk_in => vram[81][0].CLK
-clk_in => vram[81][1].CLK
-clk_in => vram[81][2].CLK
-clk_in => vram[81][3].CLK
-clk_in => vram[81][4].CLK
-clk_in => vram[81][5].CLK
-clk_in => vram[81][6].CLK
-clk_in => vram[81][7].CLK
-clk_in => vram[80][0].CLK
-clk_in => vram[80][1].CLK
-clk_in => vram[80][2].CLK
-clk_in => vram[80][3].CLK
-clk_in => vram[80][4].CLK
-clk_in => vram[80][5].CLK
-clk_in => vram[80][6].CLK
-clk_in => vram[80][7].CLK
-clk_in => vram[79][0].CLK
-clk_in => vram[79][1].CLK
-clk_in => vram[79][2].CLK
-clk_in => vram[79][3].CLK
-clk_in => vram[79][4].CLK
-clk_in => vram[79][5].CLK
-clk_in => vram[79][6].CLK
-clk_in => vram[79][7].CLK
-clk_in => vram[78][0].CLK
-clk_in => vram[78][1].CLK
-clk_in => vram[78][2].CLK
-clk_in => vram[78][3].CLK
-clk_in => vram[78][4].CLK
-clk_in => vram[78][5].CLK
-clk_in => vram[78][6].CLK
-clk_in => vram[78][7].CLK
-clk_in => vram[77][0].CLK
-clk_in => vram[77][1].CLK
-clk_in => vram[77][2].CLK
-clk_in => vram[77][3].CLK
-clk_in => vram[77][4].CLK
-clk_in => vram[77][5].CLK
-clk_in => vram[77][6].CLK
-clk_in => vram[77][7].CLK
-clk_in => vram[76][0].CLK
-clk_in => vram[76][1].CLK
-clk_in => vram[76][2].CLK
-clk_in => vram[76][3].CLK
-clk_in => vram[76][4].CLK
-clk_in => vram[76][5].CLK
-clk_in => vram[76][6].CLK
-clk_in => vram[76][7].CLK
-clk_in => vram[75][0].CLK
-clk_in => vram[75][1].CLK
-clk_in => vram[75][2].CLK
-clk_in => vram[75][3].CLK
-clk_in => vram[75][4].CLK
-clk_in => vram[75][5].CLK
-clk_in => vram[75][6].CLK
-clk_in => vram[75][7].CLK
-clk_in => vram[74][0].CLK
-clk_in => vram[74][1].CLK
-clk_in => vram[74][2].CLK
-clk_in => vram[74][3].CLK
-clk_in => vram[74][4].CLK
-clk_in => vram[74][5].CLK
-clk_in => vram[74][6].CLK
-clk_in => vram[74][7].CLK
-clk_in => vram[73][0].CLK
-clk_in => vram[73][1].CLK
-clk_in => vram[73][2].CLK
-clk_in => vram[73][3].CLK
-clk_in => vram[73][4].CLK
-clk_in => vram[73][5].CLK
-clk_in => vram[73][6].CLK
-clk_in => vram[73][7].CLK
-clk_in => vram[72][0].CLK
-clk_in => vram[72][1].CLK
-clk_in => vram[72][2].CLK
-clk_in => vram[72][3].CLK
-clk_in => vram[72][4].CLK
-clk_in => vram[72][5].CLK
-clk_in => vram[72][6].CLK
-clk_in => vram[72][7].CLK
-clk_in => vram[71][0].CLK
-clk_in => vram[71][1].CLK
-clk_in => vram[71][2].CLK
-clk_in => vram[71][3].CLK
-clk_in => vram[71][4].CLK
-clk_in => vram[71][5].CLK
-clk_in => vram[71][6].CLK
-clk_in => vram[71][7].CLK
-clk_in => vram[70][0].CLK
-clk_in => vram[70][1].CLK
-clk_in => vram[70][2].CLK
-clk_in => vram[70][3].CLK
-clk_in => vram[70][4].CLK
-clk_in => vram[70][5].CLK
-clk_in => vram[70][6].CLK
-clk_in => vram[70][7].CLK
-clk_in => vram[69][0].CLK
-clk_in => vram[69][1].CLK
-clk_in => vram[69][2].CLK
-clk_in => vram[69][3].CLK
-clk_in => vram[69][4].CLK
-clk_in => vram[69][5].CLK
-clk_in => vram[69][6].CLK
-clk_in => vram[69][7].CLK
-clk_in => vram[68][0].CLK
-clk_in => vram[68][1].CLK
-clk_in => vram[68][2].CLK
-clk_in => vram[68][3].CLK
-clk_in => vram[68][4].CLK
-clk_in => vram[68][5].CLK
-clk_in => vram[68][6].CLK
-clk_in => vram[68][7].CLK
-clk_in => vram[67][0].CLK
-clk_in => vram[67][1].CLK
-clk_in => vram[67][2].CLK
-clk_in => vram[67][3].CLK
-clk_in => vram[67][4].CLK
-clk_in => vram[67][5].CLK
-clk_in => vram[67][6].CLK
-clk_in => vram[67][7].CLK
-clk_in => vram[66][0].CLK
-clk_in => vram[66][1].CLK
-clk_in => vram[66][2].CLK
-clk_in => vram[66][3].CLK
-clk_in => vram[66][4].CLK
-clk_in => vram[66][5].CLK
-clk_in => vram[66][6].CLK
-clk_in => vram[66][7].CLK
-clk_in => vram[65][0].CLK
-clk_in => vram[65][1].CLK
-clk_in => vram[65][2].CLK
-clk_in => vram[65][3].CLK
-clk_in => vram[65][4].CLK
-clk_in => vram[65][5].CLK
-clk_in => vram[65][6].CLK
-clk_in => vram[65][7].CLK
-clk_in => vram[64][0].CLK
-clk_in => vram[64][1].CLK
-clk_in => vram[64][2].CLK
-clk_in => vram[64][3].CLK
-clk_in => vram[64][4].CLK
-clk_in => vram[64][5].CLK
-clk_in => vram[64][6].CLK
-clk_in => vram[64][7].CLK
-clk_in => vram[63][0].CLK
-clk_in => vram[63][1].CLK
-clk_in => vram[63][2].CLK
-clk_in => vram[63][3].CLK
-clk_in => vram[63][4].CLK
-clk_in => vram[63][5].CLK
-clk_in => vram[63][6].CLK
-clk_in => vram[63][7].CLK
-clk_in => vram[62][0].CLK
-clk_in => vram[62][1].CLK
-clk_in => vram[62][2].CLK
-clk_in => vram[62][3].CLK
-clk_in => vram[62][4].CLK
-clk_in => vram[62][5].CLK
-clk_in => vram[62][6].CLK
-clk_in => vram[62][7].CLK
-clk_in => vram[61][0].CLK
-clk_in => vram[61][1].CLK
-clk_in => vram[61][2].CLK
-clk_in => vram[61][3].CLK
-clk_in => vram[61][4].CLK
-clk_in => vram[61][5].CLK
-clk_in => vram[61][6].CLK
-clk_in => vram[61][7].CLK
-clk_in => vram[60][0].CLK
-clk_in => vram[60][1].CLK
-clk_in => vram[60][2].CLK
-clk_in => vram[60][3].CLK
-clk_in => vram[60][4].CLK
-clk_in => vram[60][5].CLK
-clk_in => vram[60][6].CLK
-clk_in => vram[60][7].CLK
-clk_in => vram[59][0].CLK
-clk_in => vram[59][1].CLK
-clk_in => vram[59][2].CLK
-clk_in => vram[59][3].CLK
-clk_in => vram[59][4].CLK
-clk_in => vram[59][5].CLK
-clk_in => vram[59][6].CLK
-clk_in => vram[59][7].CLK
-clk_in => vram[58][0].CLK
-clk_in => vram[58][1].CLK
-clk_in => vram[58][2].CLK
-clk_in => vram[58][3].CLK
-clk_in => vram[58][4].CLK
-clk_in => vram[58][5].CLK
-clk_in => vram[58][6].CLK
-clk_in => vram[58][7].CLK
-clk_in => vram[57][0].CLK
-clk_in => vram[57][1].CLK
-clk_in => vram[57][2].CLK
-clk_in => vram[57][3].CLK
-clk_in => vram[57][4].CLK
-clk_in => vram[57][5].CLK
-clk_in => vram[57][6].CLK
-clk_in => vram[57][7].CLK
-clk_in => vram[56][0].CLK
-clk_in => vram[56][1].CLK
-clk_in => vram[56][2].CLK
-clk_in => vram[56][3].CLK
-clk_in => vram[56][4].CLK
-clk_in => vram[56][5].CLK
-clk_in => vram[56][6].CLK
-clk_in => vram[56][7].CLK
-clk_in => vram[55][0].CLK
-clk_in => vram[55][1].CLK
-clk_in => vram[55][2].CLK
-clk_in => vram[55][3].CLK
-clk_in => vram[55][4].CLK
-clk_in => vram[55][5].CLK
-clk_in => vram[55][6].CLK
-clk_in => vram[55][7].CLK
-clk_in => vram[54][0].CLK
-clk_in => vram[54][1].CLK
-clk_in => vram[54][2].CLK
-clk_in => vram[54][3].CLK
-clk_in => vram[54][4].CLK
-clk_in => vram[54][5].CLK
-clk_in => vram[54][6].CLK
-clk_in => vram[54][7].CLK
-clk_in => vram[53][0].CLK
-clk_in => vram[53][1].CLK
-clk_in => vram[53][2].CLK
-clk_in => vram[53][3].CLK
-clk_in => vram[53][4].CLK
-clk_in => vram[53][5].CLK
-clk_in => vram[53][6].CLK
-clk_in => vram[53][7].CLK
-clk_in => vram[52][0].CLK
-clk_in => vram[52][1].CLK
-clk_in => vram[52][2].CLK
-clk_in => vram[52][3].CLK
-clk_in => vram[52][4].CLK
-clk_in => vram[52][5].CLK
-clk_in => vram[52][6].CLK
-clk_in => vram[52][7].CLK
-clk_in => vram[51][0].CLK
-clk_in => vram[51][1].CLK
-clk_in => vram[51][2].CLK
-clk_in => vram[51][3].CLK
-clk_in => vram[51][4].CLK
-clk_in => vram[51][5].CLK
-clk_in => vram[51][6].CLK
-clk_in => vram[51][7].CLK
-clk_in => vram[50][0].CLK
-clk_in => vram[50][1].CLK
-clk_in => vram[50][2].CLK
-clk_in => vram[50][3].CLK
-clk_in => vram[50][4].CLK
-clk_in => vram[50][5].CLK
-clk_in => vram[50][6].CLK
-clk_in => vram[50][7].CLK
-clk_in => vram[49][0].CLK
-clk_in => vram[49][1].CLK
-clk_in => vram[49][2].CLK
-clk_in => vram[49][3].CLK
-clk_in => vram[49][4].CLK
-clk_in => vram[49][5].CLK
-clk_in => vram[49][6].CLK
-clk_in => vram[49][7].CLK
-clk_in => vram[48][0].CLK
-clk_in => vram[48][1].CLK
-clk_in => vram[48][2].CLK
-clk_in => vram[48][3].CLK
-clk_in => vram[48][4].CLK
-clk_in => vram[48][5].CLK
-clk_in => vram[48][6].CLK
-clk_in => vram[48][7].CLK
-clk_in => vram[47][0].CLK
-clk_in => vram[47][1].CLK
-clk_in => vram[47][2].CLK
-clk_in => vram[47][3].CLK
-clk_in => vram[47][4].CLK
-clk_in => vram[47][5].CLK
-clk_in => vram[47][6].CLK
-clk_in => vram[47][7].CLK
-clk_in => vram[46][0].CLK
-clk_in => vram[46][1].CLK
-clk_in => vram[46][2].CLK
-clk_in => vram[46][3].CLK
-clk_in => vram[46][4].CLK
-clk_in => vram[46][5].CLK
-clk_in => vram[46][6].CLK
-clk_in => vram[46][7].CLK
-clk_in => vram[45][0].CLK
-clk_in => vram[45][1].CLK
-clk_in => vram[45][2].CLK
-clk_in => vram[45][3].CLK
-clk_in => vram[45][4].CLK
-clk_in => vram[45][5].CLK
-clk_in => vram[45][6].CLK
-clk_in => vram[45][7].CLK
-clk_in => vram[44][0].CLK
-clk_in => vram[44][1].CLK
-clk_in => vram[44][2].CLK
-clk_in => vram[44][3].CLK
-clk_in => vram[44][4].CLK
-clk_in => vram[44][5].CLK
-clk_in => vram[44][6].CLK
-clk_in => vram[44][7].CLK
-clk_in => vram[43][0].CLK
-clk_in => vram[43][1].CLK
-clk_in => vram[43][2].CLK
-clk_in => vram[43][3].CLK
-clk_in => vram[43][4].CLK
-clk_in => vram[43][5].CLK
-clk_in => vram[43][6].CLK
-clk_in => vram[43][7].CLK
-clk_in => vram[42][0].CLK
-clk_in => vram[42][1].CLK
-clk_in => vram[42][2].CLK
-clk_in => vram[42][3].CLK
-clk_in => vram[42][4].CLK
-clk_in => vram[42][5].CLK
-clk_in => vram[42][6].CLK
-clk_in => vram[42][7].CLK
-clk_in => vram[41][0].CLK
-clk_in => vram[41][1].CLK
-clk_in => vram[41][2].CLK
-clk_in => vram[41][3].CLK
-clk_in => vram[41][4].CLK
-clk_in => vram[41][5].CLK
-clk_in => vram[41][6].CLK
-clk_in => vram[41][7].CLK
-clk_in => vram[40][0].CLK
-clk_in => vram[40][1].CLK
-clk_in => vram[40][2].CLK
-clk_in => vram[40][3].CLK
-clk_in => vram[40][4].CLK
-clk_in => vram[40][5].CLK
-clk_in => vram[40][6].CLK
-clk_in => vram[40][7].CLK
-clk_in => vram[39][0].CLK
-clk_in => vram[39][1].CLK
-clk_in => vram[39][2].CLK
-clk_in => vram[39][3].CLK
-clk_in => vram[39][4].CLK
-clk_in => vram[39][5].CLK
-clk_in => vram[39][6].CLK
-clk_in => vram[39][7].CLK
-clk_in => vram[38][0].CLK
-clk_in => vram[38][1].CLK
-clk_in => vram[38][2].CLK
-clk_in => vram[38][3].CLK
-clk_in => vram[38][4].CLK
-clk_in => vram[38][5].CLK
-clk_in => vram[38][6].CLK
-clk_in => vram[38][7].CLK
-clk_in => vram[37][0].CLK
-clk_in => vram[37][1].CLK
-clk_in => vram[37][2].CLK
-clk_in => vram[37][3].CLK
-clk_in => vram[37][4].CLK
-clk_in => vram[37][5].CLK
-clk_in => vram[37][6].CLK
-clk_in => vram[37][7].CLK
-clk_in => vram[36][0].CLK
-clk_in => vram[36][1].CLK
-clk_in => vram[36][2].CLK
-clk_in => vram[36][3].CLK
-clk_in => vram[36][4].CLK
-clk_in => vram[36][5].CLK
-clk_in => vram[36][6].CLK
-clk_in => vram[36][7].CLK
-clk_in => vram[35][0].CLK
-clk_in => vram[35][1].CLK
-clk_in => vram[35][2].CLK
-clk_in => vram[35][3].CLK
-clk_in => vram[35][4].CLK
-clk_in => vram[35][5].CLK
-clk_in => vram[35][6].CLK
-clk_in => vram[35][7].CLK
-clk_in => vram[34][0].CLK
-clk_in => vram[34][1].CLK
-clk_in => vram[34][2].CLK
-clk_in => vram[34][3].CLK
-clk_in => vram[34][4].CLK
-clk_in => vram[34][5].CLK
-clk_in => vram[34][6].CLK
-clk_in => vram[34][7].CLK
-clk_in => vram[33][0].CLK
-clk_in => vram[33][1].CLK
-clk_in => vram[33][2].CLK
-clk_in => vram[33][3].CLK
-clk_in => vram[33][4].CLK
-clk_in => vram[33][5].CLK
-clk_in => vram[33][6].CLK
-clk_in => vram[33][7].CLK
-clk_in => vram[32][0].CLK
-clk_in => vram[32][1].CLK
-clk_in => vram[32][2].CLK
-clk_in => vram[32][3].CLK
-clk_in => vram[32][4].CLK
-clk_in => vram[32][5].CLK
-clk_in => vram[32][6].CLK
-clk_in => vram[32][7].CLK
-clk_in => vram[31][0].CLK
-clk_in => vram[31][1].CLK
-clk_in => vram[31][2].CLK
-clk_in => vram[31][3].CLK
-clk_in => vram[31][4].CLK
-clk_in => vram[31][5].CLK
-clk_in => vram[31][6].CLK
-clk_in => vram[31][7].CLK
-clk_in => vram[30][0].CLK
-clk_in => vram[30][1].CLK
-clk_in => vram[30][2].CLK
-clk_in => vram[30][3].CLK
-clk_in => vram[30][4].CLK
-clk_in => vram[30][5].CLK
-clk_in => vram[30][6].CLK
-clk_in => vram[30][7].CLK
-clk_in => vram[29][0].CLK
-clk_in => vram[29][1].CLK
-clk_in => vram[29][2].CLK
-clk_in => vram[29][3].CLK
-clk_in => vram[29][4].CLK
-clk_in => vram[29][5].CLK
-clk_in => vram[29][6].CLK
-clk_in => vram[29][7].CLK
-clk_in => vram[28][0].CLK
-clk_in => vram[28][1].CLK
-clk_in => vram[28][2].CLK
-clk_in => vram[28][3].CLK
-clk_in => vram[28][4].CLK
-clk_in => vram[28][5].CLK
-clk_in => vram[28][6].CLK
-clk_in => vram[28][7].CLK
-clk_in => vram[27][0].CLK
-clk_in => vram[27][1].CLK
-clk_in => vram[27][2].CLK
-clk_in => vram[27][3].CLK
-clk_in => vram[27][4].CLK
-clk_in => vram[27][5].CLK
-clk_in => vram[27][6].CLK
-clk_in => vram[27][7].CLK
-clk_in => vram[26][0].CLK
-clk_in => vram[26][1].CLK
-clk_in => vram[26][2].CLK
-clk_in => vram[26][3].CLK
-clk_in => vram[26][4].CLK
-clk_in => vram[26][5].CLK
-clk_in => vram[26][6].CLK
-clk_in => vram[26][7].CLK
-clk_in => vram[25][0].CLK
-clk_in => vram[25][1].CLK
-clk_in => vram[25][2].CLK
-clk_in => vram[25][3].CLK
-clk_in => vram[25][4].CLK
-clk_in => vram[25][5].CLK
-clk_in => vram[25][6].CLK
-clk_in => vram[25][7].CLK
-clk_in => vram[24][0].CLK
-clk_in => vram[24][1].CLK
-clk_in => vram[24][2].CLK
-clk_in => vram[24][3].CLK
-clk_in => vram[24][4].CLK
-clk_in => vram[24][5].CLK
-clk_in => vram[24][6].CLK
-clk_in => vram[24][7].CLK
-clk_in => vram[23][0].CLK
-clk_in => vram[23][1].CLK
-clk_in => vram[23][2].CLK
-clk_in => vram[23][3].CLK
-clk_in => vram[23][4].CLK
-clk_in => vram[23][5].CLK
-clk_in => vram[23][6].CLK
-clk_in => vram[23][7].CLK
-clk_in => vram[22][0].CLK
-clk_in => vram[22][1].CLK
-clk_in => vram[22][2].CLK
-clk_in => vram[22][3].CLK
-clk_in => vram[22][4].CLK
-clk_in => vram[22][5].CLK
-clk_in => vram[22][6].CLK
-clk_in => vram[22][7].CLK
-clk_in => vram[21][0].CLK
-clk_in => vram[21][1].CLK
-clk_in => vram[21][2].CLK
-clk_in => vram[21][3].CLK
-clk_in => vram[21][4].CLK
-clk_in => vram[21][5].CLK
-clk_in => vram[21][6].CLK
-clk_in => vram[21][7].CLK
-clk_in => vram[20][0].CLK
-clk_in => vram[20][1].CLK
-clk_in => vram[20][2].CLK
-clk_in => vram[20][3].CLK
-clk_in => vram[20][4].CLK
-clk_in => vram[20][5].CLK
-clk_in => vram[20][6].CLK
-clk_in => vram[20][7].CLK
-clk_in => vram[19][0].CLK
-clk_in => vram[19][1].CLK
-clk_in => vram[19][2].CLK
-clk_in => vram[19][3].CLK
-clk_in => vram[19][4].CLK
-clk_in => vram[19][5].CLK
-clk_in => vram[19][6].CLK
-clk_in => vram[19][7].CLK
-clk_in => vram[18][0].CLK
-clk_in => vram[18][1].CLK
-clk_in => vram[18][2].CLK
-clk_in => vram[18][3].CLK
-clk_in => vram[18][4].CLK
-clk_in => vram[18][5].CLK
-clk_in => vram[18][6].CLK
-clk_in => vram[18][7].CLK
-clk_in => vram[17][0].CLK
-clk_in => vram[17][1].CLK
-clk_in => vram[17][2].CLK
-clk_in => vram[17][3].CLK
-clk_in => vram[17][4].CLK
-clk_in => vram[17][5].CLK
-clk_in => vram[17][6].CLK
-clk_in => vram[17][7].CLK
-clk_in => vram[16][0].CLK
-clk_in => vram[16][1].CLK
-clk_in => vram[16][2].CLK
-clk_in => vram[16][3].CLK
-clk_in => vram[16][4].CLK
-clk_in => vram[16][5].CLK
-clk_in => vram[16][6].CLK
-clk_in => vram[16][7].CLK
-clk_in => vram[15][0].CLK
-clk_in => vram[15][1].CLK
-clk_in => vram[15][2].CLK
-clk_in => vram[15][3].CLK
-clk_in => vram[15][4].CLK
-clk_in => vram[15][5].CLK
-clk_in => vram[15][6].CLK
-clk_in => vram[15][7].CLK
-clk_in => vram[14][0].CLK
-clk_in => vram[14][1].CLK
-clk_in => vram[14][2].CLK
-clk_in => vram[14][3].CLK
-clk_in => vram[14][4].CLK
-clk_in => vram[14][5].CLK
-clk_in => vram[14][6].CLK
-clk_in => vram[14][7].CLK
-clk_in => vram[13][0].CLK
-clk_in => vram[13][1].CLK
-clk_in => vram[13][2].CLK
-clk_in => vram[13][3].CLK
-clk_in => vram[13][4].CLK
-clk_in => vram[13][5].CLK
-clk_in => vram[13][6].CLK
-clk_in => vram[13][7].CLK
-clk_in => vram[12][0].CLK
-clk_in => vram[12][1].CLK
-clk_in => vram[12][2].CLK
-clk_in => vram[12][3].CLK
-clk_in => vram[12][4].CLK
-clk_in => vram[12][5].CLK
-clk_in => vram[12][6].CLK
-clk_in => vram[12][7].CLK
-clk_in => vram[11][0].CLK
-clk_in => vram[11][1].CLK
-clk_in => vram[11][2].CLK
-clk_in => vram[11][3].CLK
-clk_in => vram[11][4].CLK
-clk_in => vram[11][5].CLK
-clk_in => vram[11][6].CLK
-clk_in => vram[11][7].CLK
-clk_in => vram[10][0].CLK
-clk_in => vram[10][1].CLK
-clk_in => vram[10][2].CLK
-clk_in => vram[10][3].CLK
-clk_in => vram[10][4].CLK
-clk_in => vram[10][5].CLK
-clk_in => vram[10][6].CLK
-clk_in => vram[10][7].CLK
-clk_in => vram[9][0].CLK
-clk_in => vram[9][1].CLK
-clk_in => vram[9][2].CLK
-clk_in => vram[9][3].CLK
-clk_in => vram[9][4].CLK
-clk_in => vram[9][5].CLK
-clk_in => vram[9][6].CLK
-clk_in => vram[9][7].CLK
-clk_in => vram[8][0].CLK
-clk_in => vram[8][1].CLK
-clk_in => vram[8][2].CLK
-clk_in => vram[8][3].CLK
-clk_in => vram[8][4].CLK
-clk_in => vram[8][5].CLK
-clk_in => vram[8][6].CLK
-clk_in => vram[8][7].CLK
-clk_in => vram[7][0].CLK
-clk_in => vram[7][1].CLK
-clk_in => vram[7][2].CLK
-clk_in => vram[7][3].CLK
-clk_in => vram[7][4].CLK
-clk_in => vram[7][5].CLK
-clk_in => vram[7][6].CLK
-clk_in => vram[7][7].CLK
-clk_in => vram[6][0].CLK
-clk_in => vram[6][1].CLK
-clk_in => vram[6][2].CLK
-clk_in => vram[6][3].CLK
-clk_in => vram[6][4].CLK
-clk_in => vram[6][5].CLK
-clk_in => vram[6][6].CLK
-clk_in => vram[6][7].CLK
-clk_in => vram[5][0].CLK
-clk_in => vram[5][1].CLK
-clk_in => vram[5][2].CLK
-clk_in => vram[5][3].CLK
-clk_in => vram[5][4].CLK
-clk_in => vram[5][5].CLK
-clk_in => vram[5][6].CLK
-clk_in => vram[5][7].CLK
-clk_in => vram[4][0].CLK
-clk_in => vram[4][1].CLK
-clk_in => vram[4][2].CLK
-clk_in => vram[4][3].CLK
-clk_in => vram[4][4].CLK
-clk_in => vram[4][5].CLK
-clk_in => vram[4][6].CLK
-clk_in => vram[4][7].CLK
-clk_in => vram[3][0].CLK
-clk_in => vram[3][1].CLK
-clk_in => vram[3][2].CLK
-clk_in => vram[3][3].CLK
-clk_in => vram[3][4].CLK
-clk_in => vram[3][5].CLK
-clk_in => vram[3][6].CLK
-clk_in => vram[3][7].CLK
-clk_in => vram[2][0].CLK
-clk_in => vram[2][1].CLK
-clk_in => vram[2][2].CLK
-clk_in => vram[2][3].CLK
-clk_in => vram[2][4].CLK
-clk_in => vram[2][5].CLK
-clk_in => vram[2][6].CLK
-clk_in => vram[2][7].CLK
-clk_in => vram[1][0].CLK
-clk_in => vram[1][1].CLK
-clk_in => vram[1][2].CLK
-clk_in => vram[1][3].CLK
-clk_in => vram[1][4].CLK
-clk_in => vram[1][5].CLK
-clk_in => vram[1][6].CLK
-clk_in => vram[1][7].CLK
-clk_in => vram[0][0].CLK
-clk_in => vram[0][1].CLK
-clk_in => vram[0][2].CLK
-clk_in => vram[0][3].CLK
-clk_in => vram[0][4].CLK
-clk_in => vram[0][5].CLK
-clk_in => vram[0][6].CLK
-clk_in => vram[0][7].CLK
-clk_in => registers[15][0].CLK
-clk_in => registers[15][1].CLK
-clk_in => registers[15][2].CLK
-clk_in => registers[15][3].CLK
-clk_in => registers[15][4].CLK
-clk_in => registers[15][5].CLK
-clk_in => registers[15][6].CLK
-clk_in => registers[15][7].CLK
-clk_in => registers[14][0].CLK
-clk_in => registers[14][1].CLK
-clk_in => registers[14][2].CLK
-clk_in => registers[14][3].CLK
-clk_in => registers[14][4].CLK
-clk_in => registers[14][5].CLK
-clk_in => registers[14][6].CLK
-clk_in => registers[14][7].CLK
-clk_in => registers[13][0].CLK
-clk_in => registers[13][1].CLK
-clk_in => registers[13][2].CLK
-clk_in => registers[13][3].CLK
-clk_in => registers[13][4].CLK
-clk_in => registers[13][5].CLK
-clk_in => registers[13][6].CLK
-clk_in => registers[13][7].CLK
-clk_in => registers[12][0].CLK
-clk_in => registers[12][1].CLK
-clk_in => registers[12][2].CLK
-clk_in => registers[12][3].CLK
-clk_in => registers[12][4].CLK
-clk_in => registers[12][5].CLK
-clk_in => registers[12][6].CLK
-clk_in => registers[12][7].CLK
-clk_in => registers[11][0].CLK
-clk_in => registers[11][1].CLK
-clk_in => registers[11][2].CLK
-clk_in => registers[11][3].CLK
-clk_in => registers[11][4].CLK
-clk_in => registers[11][5].CLK
-clk_in => registers[11][6].CLK
-clk_in => registers[11][7].CLK
-clk_in => registers[10][0].CLK
-clk_in => registers[10][1].CLK
-clk_in => registers[10][2].CLK
-clk_in => registers[10][3].CLK
-clk_in => registers[10][4].CLK
-clk_in => registers[10][5].CLK
-clk_in => registers[10][6].CLK
-clk_in => registers[10][7].CLK
-clk_in => registers[9][0].CLK
-clk_in => registers[9][1].CLK
-clk_in => registers[9][2].CLK
-clk_in => registers[9][3].CLK
-clk_in => registers[9][4].CLK
-clk_in => registers[9][5].CLK
-clk_in => registers[9][6].CLK
-clk_in => registers[9][7].CLK
-clk_in => registers[8][0].CLK
-clk_in => registers[8][1].CLK
-clk_in => registers[8][2].CLK
-clk_in => registers[8][3].CLK
-clk_in => registers[8][4].CLK
-clk_in => registers[8][5].CLK
-clk_in => registers[8][6].CLK
-clk_in => registers[8][7].CLK
-clk_in => registers[7][0].CLK
-clk_in => registers[7][1].CLK
-clk_in => registers[7][2].CLK
-clk_in => registers[7][3].CLK
-clk_in => registers[7][4].CLK
-clk_in => registers[7][5].CLK
-clk_in => registers[7][6].CLK
-clk_in => registers[7][7].CLK
-clk_in => registers[6][0].CLK
-clk_in => registers[6][1].CLK
-clk_in => registers[6][2].CLK
-clk_in => registers[6][3].CLK
-clk_in => registers[6][4].CLK
-clk_in => registers[6][5].CLK
-clk_in => registers[6][6].CLK
-clk_in => registers[6][7].CLK
-clk_in => registers[5][0].CLK
-clk_in => registers[5][1].CLK
-clk_in => registers[5][2].CLK
-clk_in => registers[5][3].CLK
-clk_in => registers[5][4].CLK
-clk_in => registers[5][5].CLK
-clk_in => registers[5][6].CLK
-clk_in => registers[5][7].CLK
-clk_in => registers[4][0].CLK
-clk_in => registers[4][1].CLK
-clk_in => registers[4][2].CLK
-clk_in => registers[4][3].CLK
-clk_in => registers[4][4].CLK
-clk_in => registers[4][5].CLK
-clk_in => registers[4][6].CLK
-clk_in => registers[4][7].CLK
-clk_in => registers[3][0].CLK
-clk_in => registers[3][1].CLK
-clk_in => registers[3][2].CLK
-clk_in => registers[3][3].CLK
-clk_in => registers[3][4].CLK
-clk_in => registers[3][5].CLK
-clk_in => registers[3][6].CLK
-clk_in => registers[3][7].CLK
-clk_in => registers[2][0].CLK
-clk_in => registers[2][1].CLK
-clk_in => registers[2][2].CLK
-clk_in => registers[2][3].CLK
-clk_in => registers[2][4].CLK
-clk_in => registers[2][5].CLK
-clk_in => registers[2][6].CLK
-clk_in => registers[2][7].CLK
-clk_in => registers[1][0].CLK
-clk_in => registers[1][1].CLK
-clk_in => registers[1][2].CLK
-clk_in => registers[1][3].CLK
-clk_in => registers[1][4].CLK
-clk_in => registers[1][5].CLK
-clk_in => registers[1][6].CLK
-clk_in => registers[1][7].CLK
-clk_in => registers[0][0].CLK
-clk_in => registers[0][1].CLK
-clk_in => registers[0][2].CLK
-clk_in => registers[0][3].CLK
-clk_in => registers[0][4].CLK
-clk_in => registers[0][5].CLK
-clk_in => registers[0][6].CLK
-clk_in => registers[0][7].CLK
-clk_in => draw_state.c[0].CLK
-clk_in => draw_state.c[1].CLK
-clk_in => draw_state.c[2].CLK
-clk_in => draw_state.c[3].CLK
-clk_in => draw_state.c[4].CLK
-clk_in => draw_state.r[0].CLK
-clk_in => draw_state.r[1].CLK
-clk_in => draw_state.r[2].CLK
-clk_in => draw_state.r[3].CLK
-clk_in => draw_state.r[4].CLK
-clk_in => draw_state.stage[0].CLK
-clk_in => draw_state.stage[1].CLK
-clk_in => draw_state.stage[2].CLK
-clk_in => draw_state.stage[3].CLK
-clk_in => draw_state.stage[4].CLK
-clk_in => draw_state.stage[5].CLK
-clk_in => draw_state.stage[6].CLK
-clk_in => draw_state.stage[7].CLK
-clk_in => draw_state.stage[8].CLK
-clk_in => draw_state.stage[9].CLK
-clk_in => draw_state.stage[10].CLK
-clk_in => draw_state.stage[11].CLK
-clk_in => draw_state.stage[12].CLK
-clk_in => draw_state.stage[13].CLK
-clk_in => draw_state.stage[14].CLK
-clk_in => draw_state.stage[15].CLK
-clk_in => draw_state.stage[16].CLK
-clk_in => draw_state.stage[17].CLK
-clk_in => draw_state.stage[18].CLK
-clk_in => draw_state.stage[19].CLK
-clk_in => draw_state.stage[20].CLK
-clk_in => draw_state.stage[21].CLK
-clk_in => draw_state.stage[22].CLK
-clk_in => draw_state.stage[23].CLK
-clk_in => draw_state.stage[24].CLK
-clk_in => draw_state.stage[25].CLK
-clk_in => draw_state.stage[26].CLK
-clk_in => draw_state.stage[27].CLK
-clk_in => draw_state.stage[28].CLK
-clk_in => draw_state.stage[29].CLK
-clk_in => draw_state.stage[30].CLK
-clk_in => draw_state.stage[31].CLK
-clk_in => compute_of.CLK
-clk_in => instr.src_sprite_idx[0].CLK
-clk_in => instr.src_sprite_idx[1].CLK
-clk_in => instr.src_sprite_idx[2].CLK
-clk_in => instr.src_sprite_idx[3].CLK
-clk_in => instr.src_sprite_idx[4].CLK
-clk_in => instr.src_sprite_sz[0].CLK
-clk_in => instr.src_sprite_sz[1].CLK
-clk_in => instr.src_sprite_sz[2].CLK
-clk_in => instr.src_sprite_sz[3].CLK
-clk_in => instr.src_sprite_sz[4].CLK
-clk_in => instr.src_sprite_y[0].CLK
-clk_in => instr.src_sprite_y[1].CLK
-clk_in => instr.src_sprite_y[2].CLK
-clk_in => instr.src_sprite_y[3].CLK
-clk_in => instr.src_sprite_y[4].CLK
-clk_in => instr.src_sprite_y[5].CLK
-clk_in => instr.src_sprite_y[6].CLK
-clk_in => instr.src_sprite_y[7].CLK
-clk_in => instr.src_sprite_x[0].CLK
-clk_in => instr.src_sprite_x[1].CLK
-clk_in => instr.src_sprite_x[2].CLK
-clk_in => instr.src_sprite_x[3].CLK
-clk_in => instr.src_sprite_x[4].CLK
-clk_in => instr.src_sprite_x[5].CLK
-clk_in => instr.src_sprite_x[6].CLK
-clk_in => instr.src_sprite_x[7].CLK
-clk_in => instr.src_sprite_vy[0].CLK
-clk_in => instr.src_sprite_vy[1].CLK
-clk_in => instr.src_sprite_vy[2].CLK
-clk_in => instr.src_sprite_vy[3].CLK
-clk_in => instr.src_sprite_vx[0].CLK
-clk_in => instr.src_sprite_vx[1].CLK
-clk_in => instr.src_sprite_vx[2].CLK
-clk_in => instr.src_sprite_vx[3].CLK
-clk_in => instr.src_sprite_addr[0].CLK
-clk_in => instr.src_sprite_addr[1].CLK
-clk_in => instr.src_sprite_addr[2].CLK
-clk_in => instr.src_sprite_addr[3].CLK
-clk_in => instr.src_sprite_addr[4].CLK
-clk_in => instr.src_sprite_addr[5].CLK
-clk_in => instr.src_sprite_addr[6].CLK
-clk_in => instr.src_sprite_addr[7].CLK
-clk_in => instr.src_sprite_addr[8].CLK
-clk_in => instr.src_sprite_addr[9].CLK
-clk_in => instr.src_sprite_addr[10].CLK
-clk_in => instr.src_sprite_addr[11].CLK
-clk_in => instr.src_sprite[0].CLK
-clk_in => instr.src_sprite[1].CLK
-clk_in => instr.src_sprite[2].CLK
-clk_in => instr.src_sprite[3].CLK
-clk_in => instr.src_sprite[4].CLK
-clk_in => instr.src_sprite[5].CLK
-clk_in => instr.src_sprite[6].CLK
-clk_in => instr.src_sprite[7].CLK
-clk_in => instr.src_sprite[8].CLK
-clk_in => instr.src_sprite[9].CLK
-clk_in => instr.src_sprite[10].CLK
-clk_in => instr.src_sprite[11].CLK
-clk_in => instr.src_sprite[12].CLK
-clk_in => instr.src_sprite[13].CLK
-clk_in => instr.src_sprite[14].CLK
-clk_in => instr.src_sprite[15].CLK
-clk_in => instr.src_sprite[16].CLK
-clk_in => instr.src_sprite[17].CLK
-clk_in => instr.src_sprite[18].CLK
-clk_in => instr.src_sprite[19].CLK
-clk_in => instr.src_sprite[20].CLK
-clk_in => instr.src_sprite[21].CLK
-clk_in => instr.src_sprite[22].CLK
-clk_in => instr.src_sprite[23].CLK
-clk_in => instr.src_sprite[24].CLK
-clk_in => instr.src_sprite[25].CLK
-clk_in => instr.src_sprite[26].CLK
-clk_in => instr.src_sprite[27].CLK
-clk_in => instr.src_sprite[28].CLK
-clk_in => instr.src_sprite[29].CLK
-clk_in => instr.src_sprite[30].CLK
-clk_in => instr.src_sprite[31].CLK
-clk_in => instr.src_sprite[32].CLK
-clk_in => instr.src_sprite[33].CLK
-clk_in => instr.src_sprite[34].CLK
-clk_in => instr.src_sprite[35].CLK
-clk_in => instr.src_sprite[36].CLK
-clk_in => instr.src_sprite[37].CLK
-clk_in => instr.src_sprite[38].CLK
-clk_in => instr.src_sprite[39].CLK
-clk_in => instr.src_sprite[40].CLK
-clk_in => instr.src_sprite[41].CLK
-clk_in => instr.src_sprite[42].CLK
-clk_in => instr.src_sprite[43].CLK
-clk_in => instr.src_sprite[44].CLK
-clk_in => instr.src_sprite[45].CLK
-clk_in => instr.src_sprite[46].CLK
-clk_in => instr.src_sprite[47].CLK
-clk_in => instr.src_sprite[48].CLK
-clk_in => instr.src_sprite[49].CLK
-clk_in => instr.src_sprite[50].CLK
-clk_in => instr.src_sprite[51].CLK
-clk_in => instr.src_sprite[52].CLK
-clk_in => instr.src_sprite[53].CLK
-clk_in => instr.src_sprite[54].CLK
-clk_in => instr.src_sprite[55].CLK
-clk_in => instr.src_sprite[56].CLK
-clk_in => instr.src_sprite[57].CLK
-clk_in => instr.src_sprite[58].CLK
-clk_in => instr.src_sprite[59].CLK
-clk_in => instr.src_sprite[60].CLK
-clk_in => instr.src_sprite[61].CLK
-clk_in => instr.src_sprite[62].CLK
-clk_in => instr.src_sprite[63].CLK
-clk_in => instr.src_sprite[64].CLK
-clk_in => instr.src_sprite[65].CLK
-clk_in => instr.src_sprite[66].CLK
-clk_in => instr.src_sprite[67].CLK
-clk_in => instr.src_sprite[68].CLK
-clk_in => instr.src_sprite[69].CLK
-clk_in => instr.src_sprite[70].CLK
-clk_in => instr.src_sprite[71].CLK
-clk_in => instr.src_sprite[72].CLK
-clk_in => instr.src_sprite[73].CLK
-clk_in => instr.src_sprite[74].CLK
-clk_in => instr.src_sprite[75].CLK
-clk_in => instr.src_sprite[76].CLK
-clk_in => instr.src_sprite[77].CLK
-clk_in => instr.src_sprite[78].CLK
-clk_in => instr.src_sprite[79].CLK
-clk_in => instr.src_sprite[80].CLK
-clk_in => instr.src_sprite[81].CLK
-clk_in => instr.src_sprite[82].CLK
-clk_in => instr.src_sprite[83].CLK
-clk_in => instr.src_sprite[84].CLK
-clk_in => instr.src_sprite[85].CLK
-clk_in => instr.src_sprite[86].CLK
-clk_in => instr.src_sprite[87].CLK
-clk_in => instr.src_sprite[88].CLK
-clk_in => instr.src_sprite[89].CLK
-clk_in => instr.src_sprite[90].CLK
-clk_in => instr.src_sprite[91].CLK
-clk_in => instr.src_sprite[92].CLK
-clk_in => instr.src_sprite[93].CLK
-clk_in => instr.src_sprite[94].CLK
-clk_in => instr.src_sprite[95].CLK
-clk_in => instr.src_sprite[96].CLK
-clk_in => instr.src_sprite[97].CLK
-clk_in => instr.src_sprite[98].CLK
-clk_in => instr.src_sprite[99].CLK
-clk_in => instr.src_sprite[100].CLK
-clk_in => instr.src_sprite[101].CLK
-clk_in => instr.src_sprite[102].CLK
-clk_in => instr.src_sprite[103].CLK
-clk_in => instr.src_sprite[104].CLK
-clk_in => instr.src_sprite[105].CLK
-clk_in => instr.src_sprite[106].CLK
-clk_in => instr.src_sprite[107].CLK
-clk_in => instr.src_sprite[108].CLK
-clk_in => instr.src_sprite[109].CLK
-clk_in => instr.src_sprite[110].CLK
-clk_in => instr.src_sprite[111].CLK
-clk_in => instr.src_sprite[112].CLK
-clk_in => instr.src_sprite[113].CLK
-clk_in => instr.src_sprite[114].CLK
-clk_in => instr.src_sprite[115].CLK
-clk_in => instr.src_sprite[116].CLK
-clk_in => instr.src_sprite[117].CLK
-clk_in => instr.src_sprite[118].CLK
-clk_in => instr.src_sprite[119].CLK
-clk_in => instr.src_sprite[120].CLK
-clk_in => instr.src_sprite[121].CLK
-clk_in => instr.src_sprite[122].CLK
-clk_in => instr.src_sprite[123].CLK
-clk_in => instr.src_sprite[124].CLK
-clk_in => instr.src_sprite[125].CLK
-clk_in => instr.src_sprite[126].CLK
-clk_in => instr.src_sprite[127].CLK
-clk_in => instr.src_byte[0].CLK
-clk_in => instr.src_byte[1].CLK
-clk_in => instr.src_byte[2].CLK
-clk_in => instr.src_byte[3].CLK
-clk_in => instr.src_byte[4].CLK
-clk_in => instr.src_byte[5].CLK
-clk_in => instr.src_byte[6].CLK
-clk_in => instr.src_byte[7].CLK
-clk_in => instr.src_byte[8].CLK
-clk_in => instr.src_byte[9].CLK
-clk_in => instr.src_byte[10].CLK
-clk_in => instr.src_byte[11].CLK
-clk_in => instr.alu_i.op[0].CLK
-clk_in => instr.alu_i.op[1].CLK
-clk_in => instr.alu_i.op[2].CLK
-clk_in => instr.alu_i.op[3].CLK
-clk_in => instr.alu_i.op[4].CLK
-clk_in => instr.alu_i.op[5].CLK
-clk_in => instr.alu_i.op[6].CLK
-clk_in => instr.alu_i.op[7].CLK
-clk_in => instr.alu_i.op[8].CLK
-clk_in => instr.alu_i.op[9].CLK
-clk_in => instr.alu_i.op[10].CLK
-clk_in => instr.alu_i.op[11].CLK
-clk_in => instr.alu_i.op[12].CLK
-clk_in => instr.alu_i.op[13].CLK
-clk_in => instr.alu_i.op[14].CLK
-clk_in => instr.alu_i.op[15].CLK
-clk_in => instr.alu_i.op[16].CLK
-clk_in => instr.alu_i.op[17].CLK
-clk_in => instr.alu_i.op[18].CLK
-clk_in => instr.alu_i.op[19].CLK
-clk_in => instr.alu_i.op[20].CLK
-clk_in => instr.alu_i.op[21].CLK
-clk_in => instr.alu_i.op[22].CLK
-clk_in => instr.alu_i.op[23].CLK
-clk_in => instr.alu_i.op[24].CLK
-clk_in => instr.alu_i.op[25].CLK
-clk_in => instr.alu_i.op[26].CLK
-clk_in => instr.alu_i.op[27].CLK
-clk_in => instr.alu_i.op[28].CLK
-clk_in => instr.alu_i.op[29].CLK
-clk_in => instr.alu_i.op[30].CLK
-clk_in => instr.alu_i.op[31].CLK
-clk_in => instr.alu_i.operand_b[0].CLK
-clk_in => instr.alu_i.operand_b[1].CLK
-clk_in => instr.alu_i.operand_b[2].CLK
-clk_in => instr.alu_i.operand_b[3].CLK
-clk_in => instr.alu_i.operand_b[4].CLK
-clk_in => instr.alu_i.operand_b[5].CLK
-clk_in => instr.alu_i.operand_b[6].CLK
-clk_in => instr.alu_i.operand_b[7].CLK
-clk_in => instr.alu_i.operand_a[0].CLK
-clk_in => instr.alu_i.operand_a[1].CLK
-clk_in => instr.alu_i.operand_a[2].CLK
-clk_in => instr.alu_i.operand_a[3].CLK
-clk_in => instr.alu_i.operand_a[4].CLK
-clk_in => instr.alu_i.operand_a[5].CLK
-clk_in => instr.alu_i.operand_a[6].CLK
-clk_in => instr.alu_i.operand_a[7].CLK
-clk_in => instr.dst_reg[0].CLK
-clk_in => instr.dst_reg[1].CLK
-clk_in => instr.dst_reg[2].CLK
-clk_in => instr.dst_reg[3].CLK
-clk_in => instr.dst[0].CLK
-clk_in => instr.dst[1].CLK
-clk_in => instr.dst[2].CLK
-clk_in => instr.dst[3].CLK
-clk_in => instr.dst[4].CLK
-clk_in => instr.dst[5].CLK
-clk_in => instr.dst[6].CLK
-clk_in => instr.dst[7].CLK
-clk_in => instr.dst[8].CLK
-clk_in => instr.dst[9].CLK
-clk_in => instr.dst[10].CLK
-clk_in => instr.dst[11].CLK
-clk_in => instr.dst[12].CLK
-clk_in => instr.dst[13].CLK
-clk_in => instr.dst[14].CLK
-clk_in => instr.dst[15].CLK
-clk_in => instr.dst[16].CLK
-clk_in => instr.dst[17].CLK
-clk_in => instr.dst[18].CLK
-clk_in => instr.dst[19].CLK
-clk_in => instr.dst[20].CLK
-clk_in => instr.dst[21].CLK
-clk_in => instr.dst[22].CLK
-clk_in => instr.dst[23].CLK
-clk_in => instr.dst[24].CLK
-clk_in => instr.dst[25].CLK
-clk_in => instr.dst[26].CLK
-clk_in => instr.dst[27].CLK
-clk_in => instr.dst[28].CLK
-clk_in => instr.dst[29].CLK
-clk_in => instr.dst[30].CLK
-clk_in => instr.dst[31].CLK
-clk_in => instr.src[0].CLK
-clk_in => instr.src[1].CLK
-clk_in => instr.src[2].CLK
-clk_in => instr.src[3].CLK
-clk_in => instr.src[4].CLK
-clk_in => instr.src[5].CLK
-clk_in => instr.src[6].CLK
-clk_in => instr.src[7].CLK
-clk_in => instr.src[8].CLK
-clk_in => instr.src[9].CLK
-clk_in => instr.src[10].CLK
-clk_in => instr.src[11].CLK
-clk_in => instr.src[12].CLK
-clk_in => instr.src[13].CLK
-clk_in => instr.src[14].CLK
-clk_in => instr.src[15].CLK
-clk_in => instr.src[16].CLK
-clk_in => instr.src[17].CLK
-clk_in => instr.src[18].CLK
-clk_in => instr.src[19].CLK
-clk_in => instr.src[20].CLK
-clk_in => instr.src[21].CLK
-clk_in => instr.src[22].CLK
-clk_in => instr.src[23].CLK
-clk_in => instr.src[24].CLK
-clk_in => instr.src[25].CLK
-clk_in => instr.src[26].CLK
-clk_in => instr.src[27].CLK
-clk_in => instr.src[28].CLK
-clk_in => instr.src[29].CLK
-clk_in => instr.src[30].CLK
-clk_in => instr.src[31].CLK
-clk_in => instr.op[0].CLK
-clk_in => instr.op[1].CLK
-clk_in => instr.op[2].CLK
-clk_in => instr.op[3].CLK
-clk_in => instr.op[4].CLK
-clk_in => instr.op[5].CLK
-clk_in => instr.op[6].CLK
-clk_in => instr.op[7].CLK
-clk_in => instr.op[8].CLK
-clk_in => instr.op[9].CLK
-clk_in => instr.op[10].CLK
-clk_in => instr.op[11].CLK
-clk_in => instr.op[12].CLK
-clk_in => instr.op[13].CLK
-clk_in => instr.op[14].CLK
-clk_in => instr.op[15].CLK
-clk_in => instr.op[16].CLK
-clk_in => instr.op[17].CLK
-clk_in => instr.op[18].CLK
-clk_in => instr.op[19].CLK
-clk_in => instr.op[20].CLK
-clk_in => instr.op[21].CLK
-clk_in => instr.op[22].CLK
-clk_in => instr.op[23].CLK
-clk_in => instr.op[24].CLK
-clk_in => instr.op[25].CLK
-clk_in => instr.op[26].CLK
-clk_in => instr.op[27].CLK
-clk_in => instr.op[28].CLK
-clk_in => instr.op[29].CLK
-clk_in => instr.op[30].CLK
-clk_in => instr.op[31].CLK
-clk_in => opcode[0].CLK
-clk_in => opcode[1].CLK
-clk_in => opcode[2].CLK
-clk_in => opcode[3].CLK
-clk_in => opcode[4].CLK
-clk_in => opcode[5].CLK
-clk_in => opcode[6].CLK
-clk_in => opcode[7].CLK
-clk_in => opcode[8].CLK
-clk_in => opcode[9].CLK
-clk_in => opcode[10].CLK
-clk_in => opcode[11].CLK
-clk_in => opcode[12].CLK
-clk_in => opcode[13].CLK
-clk_in => opcode[14].CLK
-clk_in => opcode[15].CLK
-clk_in => state[0].CLK
-clk_in => state[1].CLK
-clk_in => state[2].CLK
-clk_in => state[3].CLK
-clk_in => state[4].CLK
-clk_in => state[5].CLK
-clk_in => state[6].CLK
-clk_in => state[7].CLK
-clk_in => state[8].CLK
-clk_in => state[9].CLK
-clk_in => state[10].CLK
-clk_in => state[11].CLK
-clk_in => state[12].CLK
-clk_in => state[13].CLK
-clk_in => state[14].CLK
-clk_in => state[15].CLK
-clk_in => state[16].CLK
-clk_in => state[17].CLK
-clk_in => state[18].CLK
-clk_in => state[19].CLK
-clk_in => state[20].CLK
-clk_in => state[21].CLK
-clk_in => state[22].CLK
-clk_in => state[23].CLK
-clk_in => state[24].CLK
-clk_in => state[25].CLK
-clk_in => state[26].CLK
-clk_in => state[27].CLK
-clk_in => state[28].CLK
-clk_in => state[29].CLK
-clk_in => state[30].CLK
-clk_in => state[31].CLK
-clk_in => program_counter[0].CLK
-clk_in => program_counter[1].CLK
-clk_in => program_counter[2].CLK
-clk_in => program_counter[3].CLK
-clk_in => program_counter[4].CLK
-clk_in => program_counter[5].CLK
-clk_in => program_counter[6].CLK
-clk_in => program_counter[7].CLK
-clk_in => program_counter[8].CLK
-clk_in => program_counter[9].CLK
-clk_in => program_counter[10].CLK
-clk_in => program_counter[11].CLK
-clk_in => program_counter[12].CLK
-clk_in => program_counter[13].CLK
-clk_in => program_counter[14].CLK
-clk_in => program_counter[15].CLK
-clk_in => rd_memory_address[0]~reg0.CLK
-clk_in => rd_memory_address[1]~reg0.CLK
-clk_in => rd_memory_address[2]~reg0.CLK
-clk_in => rd_memory_address[3]~reg0.CLK
-clk_in => rd_memory_address[4]~reg0.CLK
-clk_in => rd_memory_address[5]~reg0.CLK
-clk_in => rd_memory_address[6]~reg0.CLK
-clk_in => rd_memory_address[7]~reg0.CLK
-clk_in => rd_memory_address[8]~reg0.CLK
-clk_in => rd_memory_address[9]~reg0.CLK
-clk_in => rd_memory_address[10]~reg0.CLK
-clk_in => rd_memory_address[11]~reg0.CLK
-fpga_clk => st7920_serial_driver:gpu.sys_clk
-rd_memory_data[0] => instr.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => src_sprite.DATAB
-rd_memory_data[0] => Selector171.IN4
-rd_memory_data[0] => opcode[8].DATAIN
-rd_memory_data[1] => instr.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => src_sprite.DATAB
-rd_memory_data[1] => Selector170.IN4
-rd_memory_data[1] => opcode[9].DATAIN
-rd_memory_data[2] => instr.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => src_sprite.DATAB
-rd_memory_data[2] => Selector169.IN4
-rd_memory_data[2] => opcode[10].DATAIN
-rd_memory_data[3] => instr.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => src_sprite.DATAB
-rd_memory_data[3] => Selector168.IN4
-rd_memory_data[3] => opcode[11].DATAIN
-rd_memory_data[4] => instr.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => src_sprite.DATAB
-rd_memory_data[4] => Selector167.IN4
-rd_memory_data[4] => opcode[12].DATAIN
-rd_memory_data[5] => instr.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => src_sprite.DATAB
-rd_memory_data[5] => Selector166.IN4
-rd_memory_data[5] => opcode[13].DATAIN
-rd_memory_data[6] => instr.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => src_sprite.DATAB
-rd_memory_data[6] => Selector165.IN4
-rd_memory_data[6] => opcode[14].DATAIN
-rd_memory_data[7] => instr.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => src_sprite.DATAB
-rd_memory_data[7] => Selector164.IN4
-rd_memory_data[7] => opcode[15].DATAIN
-cycle_counter[0] <= cycle_counter[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[1] <= cycle_counter[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[2] <= cycle_counter[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[3] <= cycle_counter[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[4] <= cycle_counter[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[5] <= cycle_counter[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[6] <= cycle_counter[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[7] <= cycle_counter[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[8] <= cycle_counter[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[9] <= cycle_counter[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[10] <= cycle_counter[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[11] <= cycle_counter[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[12] <= cycle_counter[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[13] <= cycle_counter[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[14] <= cycle_counter[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[15] <= cycle_counter[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[16] <= cycle_counter[16]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[17] <= cycle_counter[17]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[18] <= cycle_counter[18]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[19] <= cycle_counter[19]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[20] <= cycle_counter[20]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[21] <= cycle_counter[21]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[22] <= cycle_counter[22]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[23] <= cycle_counter[23]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[24] <= cycle_counter[24]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[25] <= cycle_counter[25]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[26] <= cycle_counter[26]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[27] <= cycle_counter[27]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[28] <= cycle_counter[28]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[29] <= cycle_counter[29]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[30] <= cycle_counter[30]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-cycle_counter[31] <= cycle_counter[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[0] <= rd_memory_address[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[1] <= rd_memory_address[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[2] <= rd_memory_address[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[3] <= rd_memory_address[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[4] <= rd_memory_address[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[5] <= rd_memory_address[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[6] <= rd_memory_address[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[7] <= rd_memory_address[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[8] <= rd_memory_address[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[9] <= rd_memory_address[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[10] <= rd_memory_address[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-rd_memory_address[11] <= rd_memory_address[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[0] <= wr_memory_address[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[1] <= wr_memory_address[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[2] <= wr_memory_address[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[3] <= wr_memory_address[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[4] <= wr_memory_address[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[5] <= wr_memory_address[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[6] <= wr_memory_address[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[7] <= wr_memory_address[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[8] <= wr_memory_address[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[9] <= wr_memory_address[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[10] <= wr_memory_address[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_address[11] <= wr_memory_address[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[0] <= wr_memory_data[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[1] <= wr_memory_data[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[2] <= wr_memory_data[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[3] <= wr_memory_data[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[4] <= wr_memory_data[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[5] <= wr_memory_data[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[6] <= wr_memory_data[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_memory_data[7] <= wr_memory_data[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-wr_go <= wr_go~reg0.DB_MAX_OUTPUT_PORT_TYPE
-lcd_clk <= st7920_serial_driver:gpu.lcd_clk
-lcd_data <= st7920_serial_driver:gpu.lcd_data
-led[0] <= state[0].DB_MAX_OUTPUT_PORT_TYPE
-led[1] <= state[1].DB_MAX_OUTPUT_PORT_TYPE
-led[2] <= state[2].DB_MAX_OUTPUT_PORT_TYPE
-led[3] <= state[3].DB_MAX_OUTPUT_PORT_TYPE
-led[4] <= state[4].DB_MAX_OUTPUT_PORT_TYPE
-led[5] <= state[5].DB_MAX_OUTPUT_PORT_TYPE
-
-
-|chip8|cpu:cpu|alu:alu
-rst_in => done.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-rst_in => cnt.OUTPUTSELECT
-clk_in => cnt[0].CLK
-clk_in => cnt[1].CLK
-clk_in => cnt[2].CLK
-clk_in => cnt[3].CLK
-clk_in => cnt[4].CLK
-clk_in => cnt[5].CLK
-clk_in => cnt[6].CLK
-clk_in => cnt[7].CLK
-clk_in => cnt[8].CLK
-clk_in => cnt[9].CLK
-clk_in => cnt[10].CLK
-clk_in => cnt[11].CLK
-clk_in => cnt[12].CLK
-clk_in => cnt[13].CLK
-clk_in => cnt[14].CLK
-clk_in => cnt[15].CLK
-clk_in => cnt[16].CLK
-clk_in => cnt[17].CLK
-clk_in => cnt[18].CLK
-clk_in => cnt[19].CLK
-clk_in => cnt[20].CLK
-clk_in => cnt[21].CLK
-clk_in => cnt[22].CLK
-clk_in => cnt[23].CLK
-clk_in => cnt[24].CLK
-clk_in => cnt[25].CLK
-clk_in => cnt[26].CLK
-clk_in => cnt[27].CLK
-clk_in => cnt[28].CLK
-clk_in => cnt[29].CLK
-clk_in => cnt[30].CLK
-clk_in => cnt[31].CLK
-clk_in => result_int[0].CLK
-clk_in => result_int[1].CLK
-clk_in => result_int[2].CLK
-clk_in => result_int[3].CLK
-clk_in => result_int[4].CLK
-clk_in => result_int[5].CLK
-clk_in => result_int[6].CLK
-clk_in => result_int[7].CLK
-clk_in => result_int[8].CLK
-clk_in => result[0]~reg0.CLK
-clk_in => result[1]~reg0.CLK
-clk_in => result[2]~reg0.CLK
-clk_in => result[3]~reg0.CLK
-clk_in => result[4]~reg0.CLK
-clk_in => result[5]~reg0.CLK
-clk_in => result[6]~reg0.CLK
-clk_in => result[7]~reg0.CLK
-clk_in => overflow~reg0.CLK
-clk_in => done~reg0.CLK
-in.op[0] => ~NO_FANOUT~
-in.op[1] => ~NO_FANOUT~
-in.op[2] => ~NO_FANOUT~
-in.op[3] => ~NO_FANOUT~
-in.op[4] => ~NO_FANOUT~
-in.op[5] => ~NO_FANOUT~
-in.op[6] => ~NO_FANOUT~
-in.op[7] => ~NO_FANOUT~
-in.op[8] => ~NO_FANOUT~
-in.op[9] => ~NO_FANOUT~
-in.op[10] => ~NO_FANOUT~
-in.op[11] => ~NO_FANOUT~
-in.op[12] => ~NO_FANOUT~
-in.op[13] => ~NO_FANOUT~
-in.op[14] => ~NO_FANOUT~
-in.op[15] => ~NO_FANOUT~
-in.op[16] => ~NO_FANOUT~
-in.op[17] => ~NO_FANOUT~
-in.op[18] => ~NO_FANOUT~
-in.op[19] => ~NO_FANOUT~
-in.op[20] => ~NO_FANOUT~
-in.op[21] => ~NO_FANOUT~
-in.op[22] => ~NO_FANOUT~
-in.op[23] => ~NO_FANOUT~
-in.op[24] => ~NO_FANOUT~
-in.op[25] => ~NO_FANOUT~
-in.op[26] => ~NO_FANOUT~
-in.op[27] => ~NO_FANOUT~
-in.op[28] => ~NO_FANOUT~
-in.op[29] => ~NO_FANOUT~
-in.op[30] => ~NO_FANOUT~
-in.op[31] => ~NO_FANOUT~
-in.operand_b[0] => Add0.IN16
-in.operand_b[1] => Add0.IN15
-in.operand_b[2] => Add0.IN14
-in.operand_b[3] => Add0.IN13
-in.operand_b[4] => Add0.IN12
-in.operand_b[5] => Add0.IN11
-in.operand_b[6] => Add0.IN10
-in.operand_b[7] => Add0.IN9
-in.operand_a[0] => Add0.IN8
-in.operand_a[1] => Add0.IN7
-in.operand_a[2] => Add0.IN6
-in.operand_a[3] => Add0.IN5
-in.operand_a[4] => Add0.IN4
-in.operand_a[5] => Add0.IN3
-in.operand_a[6] => Add0.IN2
-in.operand_a[7] => Add0.IN1
-result[0] <= result[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[1] <= result[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[2] <= result[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[3] <= result[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[4] <= result[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[5] <= result[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[6] <= result[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-result[7] <= result[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
-overflow <= overflow~reg0.DB_MAX_OUTPUT_PORT_TYPE
-done <= done~reg0.DB_MAX_OUTPUT_PORT_TYPE
-
-
-|chip8|cpu:cpu|st7920_serial_driver:gpu
-sys_clk => sys_clk.IN1
-sys_rst_n_ms => sys_rst_n_ms.IN1
-memory[1023][0] => Mux16.IN1032
-memory[1023][0] => Mux24.IN1032
-memory[1023][1] => Mux15.IN1032
-memory[1023][1] => Mux23.IN1032
-memory[1023][2] => Mux14.IN1032
-memory[1023][2] => Mux22.IN1032
-memory[1023][3] => Mux13.IN1032
-memory[1023][3] => Mux21.IN1032
-memory[1023][4] => Mux12.IN1032
-memory[1023][4] => Mux20.IN1032
-memory[1023][5] => Mux11.IN1032
-memory[1023][5] => Mux19.IN1032
-memory[1023][6] => Mux10.IN1032
-memory[1023][6] => Mux18.IN1032
-memory[1023][7] => Mux9.IN1032
-memory[1023][7] => Mux17.IN1032
-memory[1022][0] => Mux16.IN1031
-memory[1022][0] => Mux24.IN1031
-memory[1022][1] => Mux15.IN1031
-memory[1022][1] => Mux23.IN1031
-memory[1022][2] => Mux14.IN1031
-memory[1022][2] => Mux22.IN1031
-memory[1022][3] => Mux13.IN1031
-memory[1022][3] => Mux21.IN1031
-memory[1022][4] => Mux12.IN1031
-memory[1022][4] => Mux20.IN1031
-memory[1022][5] => Mux11.IN1031
-memory[1022][5] => Mux19.IN1031
-memory[1022][6] => Mux10.IN1031
-memory[1022][6] => Mux18.IN1031
-memory[1022][7] => Mux9.IN1031
-memory[1022][7] => Mux17.IN1031
-memory[1021][0] => Mux16.IN1030
-memory[1021][0] => Mux24.IN1030
-memory[1021][1] => Mux15.IN1030
-memory[1021][1] => Mux23.IN1030
-memory[1021][2] => Mux14.IN1030
-memory[1021][2] => Mux22.IN1030
-memory[1021][3] => Mux13.IN1030
-memory[1021][3] => Mux21.IN1030
-memory[1021][4] => Mux12.IN1030
-memory[1021][4] => Mux20.IN1030
-memory[1021][5] => Mux11.IN1030
-memory[1021][5] => Mux19.IN1030
-memory[1021][6] => Mux10.IN1030
-memory[1021][6] => Mux18.IN1030
-memory[1021][7] => Mux9.IN1030
-memory[1021][7] => Mux17.IN1030
-memory[1020][0] => Mux16.IN1029
-memory[1020][0] => Mux24.IN1029
-memory[1020][1] => Mux15.IN1029
-memory[1020][1] => Mux23.IN1029
-memory[1020][2] => Mux14.IN1029
-memory[1020][2] => Mux22.IN1029
-memory[1020][3] => Mux13.IN1029
-memory[1020][3] => Mux21.IN1029
-memory[1020][4] => Mux12.IN1029
-memory[1020][4] => Mux20.IN1029
-memory[1020][5] => Mux11.IN1029
-memory[1020][5] => Mux19.IN1029
-memory[1020][6] => Mux10.IN1029
-memory[1020][6] => Mux18.IN1029
-memory[1020][7] => Mux9.IN1029
-memory[1020][7] => Mux17.IN1029
-memory[1019][0] => Mux16.IN1028
-memory[1019][0] => Mux24.IN1028
-memory[1019][1] => Mux15.IN1028
-memory[1019][1] => Mux23.IN1028
-memory[1019][2] => Mux14.IN1028
-memory[1019][2] => Mux22.IN1028
-memory[1019][3] => Mux13.IN1028
-memory[1019][3] => Mux21.IN1028
-memory[1019][4] => Mux12.IN1028
-memory[1019][4] => Mux20.IN1028
-memory[1019][5] => Mux11.IN1028
-memory[1019][5] => Mux19.IN1028
-memory[1019][6] => Mux10.IN1028
-memory[1019][6] => Mux18.IN1028
-memory[1019][7] => Mux9.IN1028
-memory[1019][7] => Mux17.IN1028
-memory[1018][0] => Mux16.IN1027
-memory[1018][0] => Mux24.IN1027
-memory[1018][1] => Mux15.IN1027
-memory[1018][1] => Mux23.IN1027
-memory[1018][2] => Mux14.IN1027
-memory[1018][2] => Mux22.IN1027
-memory[1018][3] => Mux13.IN1027
-memory[1018][3] => Mux21.IN1027
-memory[1018][4] => Mux12.IN1027
-memory[1018][4] => Mux20.IN1027
-memory[1018][5] => Mux11.IN1027
-memory[1018][5] => Mux19.IN1027
-memory[1018][6] => Mux10.IN1027
-memory[1018][6] => Mux18.IN1027
-memory[1018][7] => Mux9.IN1027
-memory[1018][7] => Mux17.IN1027
-memory[1017][0] => Mux16.IN1026
-memory[1017][0] => Mux24.IN1026
-memory[1017][1] => Mux15.IN1026
-memory[1017][1] => Mux23.IN1026
-memory[1017][2] => Mux14.IN1026
-memory[1017][2] => Mux22.IN1026
-memory[1017][3] => Mux13.IN1026
-memory[1017][3] => Mux21.IN1026
-memory[1017][4] => Mux12.IN1026
-memory[1017][4] => Mux20.IN1026
-memory[1017][5] => Mux11.IN1026
-memory[1017][5] => Mux19.IN1026
-memory[1017][6] => Mux10.IN1026
-memory[1017][6] => Mux18.IN1026
-memory[1017][7] => Mux9.IN1026
-memory[1017][7] => Mux17.IN1026
-memory[1016][0] => Mux16.IN1025
-memory[1016][0] => Mux24.IN1025
-memory[1016][1] => Mux15.IN1025
-memory[1016][1] => Mux23.IN1025
-memory[1016][2] => Mux14.IN1025
-memory[1016][2] => Mux22.IN1025
-memory[1016][3] => Mux13.IN1025
-memory[1016][3] => Mux21.IN1025
-memory[1016][4] => Mux12.IN1025
-memory[1016][4] => Mux20.IN1025
-memory[1016][5] => Mux11.IN1025
-memory[1016][5] => Mux19.IN1025
-memory[1016][6] => Mux10.IN1025
-memory[1016][6] => Mux18.IN1025
-memory[1016][7] => Mux9.IN1025
-memory[1016][7] => Mux17.IN1025
-memory[1015][0] => Mux16.IN1024
-memory[1015][0] => Mux24.IN1024
-memory[1015][1] => Mux15.IN1024
-memory[1015][1] => Mux23.IN1024
-memory[1015][2] => Mux14.IN1024
-memory[1015][2] => Mux22.IN1024
-memory[1015][3] => Mux13.IN1024
-memory[1015][3] => Mux21.IN1024
-memory[1015][4] => Mux12.IN1024
-memory[1015][4] => Mux20.IN1024
-memory[1015][5] => Mux11.IN1024
-memory[1015][5] => Mux19.IN1024
-memory[1015][6] => Mux10.IN1024
-memory[1015][6] => Mux18.IN1024
-memory[1015][7] => Mux9.IN1024
-memory[1015][7] => Mux17.IN1024
-memory[1014][0] => Mux16.IN1023
-memory[1014][0] => Mux24.IN1023
-memory[1014][1] => Mux15.IN1023
-memory[1014][1] => Mux23.IN1023
-memory[1014][2] => Mux14.IN1023
-memory[1014][2] => Mux22.IN1023
-memory[1014][3] => Mux13.IN1023
-memory[1014][3] => Mux21.IN1023
-memory[1014][4] => Mux12.IN1023
-memory[1014][4] => Mux20.IN1023
-memory[1014][5] => Mux11.IN1023
-memory[1014][5] => Mux19.IN1023
-memory[1014][6] => Mux10.IN1023
-memory[1014][6] => Mux18.IN1023
-memory[1014][7] => Mux9.IN1023
-memory[1014][7] => Mux17.IN1023
-memory[1013][0] => Mux16.IN1022
-memory[1013][0] => Mux24.IN1022
-memory[1013][1] => Mux15.IN1022
-memory[1013][1] => Mux23.IN1022
-memory[1013][2] => Mux14.IN1022
-memory[1013][2] => Mux22.IN1022
-memory[1013][3] => Mux13.IN1022
-memory[1013][3] => Mux21.IN1022
-memory[1013][4] => Mux12.IN1022
-memory[1013][4] => Mux20.IN1022
-memory[1013][5] => Mux11.IN1022
-memory[1013][5] => Mux19.IN1022
-memory[1013][6] => Mux10.IN1022
-memory[1013][6] => Mux18.IN1022
-memory[1013][7] => Mux9.IN1022
-memory[1013][7] => Mux17.IN1022
-memory[1012][0] => Mux16.IN1021
-memory[1012][0] => Mux24.IN1021
-memory[1012][1] => Mux15.IN1021
-memory[1012][1] => Mux23.IN1021
-memory[1012][2] => Mux14.IN1021
-memory[1012][2] => Mux22.IN1021
-memory[1012][3] => Mux13.IN1021
-memory[1012][3] => Mux21.IN1021
-memory[1012][4] => Mux12.IN1021
-memory[1012][4] => Mux20.IN1021
-memory[1012][5] => Mux11.IN1021
-memory[1012][5] => Mux19.IN1021
-memory[1012][6] => Mux10.IN1021
-memory[1012][6] => Mux18.IN1021
-memory[1012][7] => Mux9.IN1021
-memory[1012][7] => Mux17.IN1021
-memory[1011][0] => Mux16.IN1020
-memory[1011][0] => Mux24.IN1020
-memory[1011][1] => Mux15.IN1020
-memory[1011][1] => Mux23.IN1020
-memory[1011][2] => Mux14.IN1020
-memory[1011][2] => Mux22.IN1020
-memory[1011][3] => Mux13.IN1020
-memory[1011][3] => Mux21.IN1020
-memory[1011][4] => Mux12.IN1020
-memory[1011][4] => Mux20.IN1020
-memory[1011][5] => Mux11.IN1020
-memory[1011][5] => Mux19.IN1020
-memory[1011][6] => Mux10.IN1020
-memory[1011][6] => Mux18.IN1020
-memory[1011][7] => Mux9.IN1020
-memory[1011][7] => Mux17.IN1020
-memory[1010][0] => Mux16.IN1019
-memory[1010][0] => Mux24.IN1019
-memory[1010][1] => Mux15.IN1019
-memory[1010][1] => Mux23.IN1019
-memory[1010][2] => Mux14.IN1019
-memory[1010][2] => Mux22.IN1019
-memory[1010][3] => Mux13.IN1019
-memory[1010][3] => Mux21.IN1019
-memory[1010][4] => Mux12.IN1019
-memory[1010][4] => Mux20.IN1019
-memory[1010][5] => Mux11.IN1019
-memory[1010][5] => Mux19.IN1019
-memory[1010][6] => Mux10.IN1019
-memory[1010][6] => Mux18.IN1019
-memory[1010][7] => Mux9.IN1019
-memory[1010][7] => Mux17.IN1019
-memory[1009][0] => Mux16.IN1018
-memory[1009][0] => Mux24.IN1018
-memory[1009][1] => Mux15.IN1018
-memory[1009][1] => Mux23.IN1018
-memory[1009][2] => Mux14.IN1018
-memory[1009][2] => Mux22.IN1018
-memory[1009][3] => Mux13.IN1018
-memory[1009][3] => Mux21.IN1018
-memory[1009][4] => Mux12.IN1018
-memory[1009][4] => Mux20.IN1018
-memory[1009][5] => Mux11.IN1018
-memory[1009][5] => Mux19.IN1018
-memory[1009][6] => Mux10.IN1018
-memory[1009][6] => Mux18.IN1018
-memory[1009][7] => Mux9.IN1018
-memory[1009][7] => Mux17.IN1018
-memory[1008][0] => Mux16.IN1017
-memory[1008][0] => Mux24.IN1017
-memory[1008][1] => Mux15.IN1017
-memory[1008][1] => Mux23.IN1017
-memory[1008][2] => Mux14.IN1017
-memory[1008][2] => Mux22.IN1017
-memory[1008][3] => Mux13.IN1017
-memory[1008][3] => Mux21.IN1017
-memory[1008][4] => Mux12.IN1017
-memory[1008][4] => Mux20.IN1017
-memory[1008][5] => Mux11.IN1017
-memory[1008][5] => Mux19.IN1017
-memory[1008][6] => Mux10.IN1017
-memory[1008][6] => Mux18.IN1017
-memory[1008][7] => Mux9.IN1017
-memory[1008][7] => Mux17.IN1017
-memory[1007][0] => Mux16.IN1016
-memory[1007][0] => Mux24.IN1016
-memory[1007][1] => Mux15.IN1016
-memory[1007][1] => Mux23.IN1016
-memory[1007][2] => Mux14.IN1016
-memory[1007][2] => Mux22.IN1016
-memory[1007][3] => Mux13.IN1016
-memory[1007][3] => Mux21.IN1016
-memory[1007][4] => Mux12.IN1016
-memory[1007][4] => Mux20.IN1016
-memory[1007][5] => Mux11.IN1016
-memory[1007][5] => Mux19.IN1016
-memory[1007][6] => Mux10.IN1016
-memory[1007][6] => Mux18.IN1016
-memory[1007][7] => Mux9.IN1016
-memory[1007][7] => Mux17.IN1016
-memory[1006][0] => Mux16.IN1015
-memory[1006][0] => Mux24.IN1015
-memory[1006][1] => Mux15.IN1015
-memory[1006][1] => Mux23.IN1015
-memory[1006][2] => Mux14.IN1015
-memory[1006][2] => Mux22.IN1015
-memory[1006][3] => Mux13.IN1015
-memory[1006][3] => Mux21.IN1015
-memory[1006][4] => Mux12.IN1015
-memory[1006][4] => Mux20.IN1015
-memory[1006][5] => Mux11.IN1015
-memory[1006][5] => Mux19.IN1015
-memory[1006][6] => Mux10.IN1015
-memory[1006][6] => Mux18.IN1015
-memory[1006][7] => Mux9.IN1015
-memory[1006][7] => Mux17.IN1015
-memory[1005][0] => Mux16.IN1014
-memory[1005][0] => Mux24.IN1014
-memory[1005][1] => Mux15.IN1014
-memory[1005][1] => Mux23.IN1014
-memory[1005][2] => Mux14.IN1014
-memory[1005][2] => Mux22.IN1014
-memory[1005][3] => Mux13.IN1014
-memory[1005][3] => Mux21.IN1014
-memory[1005][4] => Mux12.IN1014
-memory[1005][4] => Mux20.IN1014
-memory[1005][5] => Mux11.IN1014
-memory[1005][5] => Mux19.IN1014
-memory[1005][6] => Mux10.IN1014
-memory[1005][6] => Mux18.IN1014
-memory[1005][7] => Mux9.IN1014
-memory[1005][7] => Mux17.IN1014
-memory[1004][0] => Mux16.IN1013
-memory[1004][0] => Mux24.IN1013
-memory[1004][1] => Mux15.IN1013
-memory[1004][1] => Mux23.IN1013
-memory[1004][2] => Mux14.IN1013
-memory[1004][2] => Mux22.IN1013
-memory[1004][3] => Mux13.IN1013
-memory[1004][3] => Mux21.IN1013
-memory[1004][4] => Mux12.IN1013
-memory[1004][4] => Mux20.IN1013
-memory[1004][5] => Mux11.IN1013
-memory[1004][5] => Mux19.IN1013
-memory[1004][6] => Mux10.IN1013
-memory[1004][6] => Mux18.IN1013
-memory[1004][7] => Mux9.IN1013
-memory[1004][7] => Mux17.IN1013
-memory[1003][0] => Mux16.IN1012
-memory[1003][0] => Mux24.IN1012
-memory[1003][1] => Mux15.IN1012
-memory[1003][1] => Mux23.IN1012
-memory[1003][2] => Mux14.IN1012
-memory[1003][2] => Mux22.IN1012
-memory[1003][3] => Mux13.IN1012
-memory[1003][3] => Mux21.IN1012
-memory[1003][4] => Mux12.IN1012
-memory[1003][4] => Mux20.IN1012
-memory[1003][5] => Mux11.IN1012
-memory[1003][5] => Mux19.IN1012
-memory[1003][6] => Mux10.IN1012
-memory[1003][6] => Mux18.IN1012
-memory[1003][7] => Mux9.IN1012
-memory[1003][7] => Mux17.IN1012
-memory[1002][0] => Mux16.IN1011
-memory[1002][0] => Mux24.IN1011
-memory[1002][1] => Mux15.IN1011
-memory[1002][1] => Mux23.IN1011
-memory[1002][2] => Mux14.IN1011
-memory[1002][2] => Mux22.IN1011
-memory[1002][3] => Mux13.IN1011
-memory[1002][3] => Mux21.IN1011
-memory[1002][4] => Mux12.IN1011
-memory[1002][4] => Mux20.IN1011
-memory[1002][5] => Mux11.IN1011
-memory[1002][5] => Mux19.IN1011
-memory[1002][6] => Mux10.IN1011
-memory[1002][6] => Mux18.IN1011
-memory[1002][7] => Mux9.IN1011
-memory[1002][7] => Mux17.IN1011
-memory[1001][0] => Mux16.IN1010
-memory[1001][0] => Mux24.IN1010
-memory[1001][1] => Mux15.IN1010
-memory[1001][1] => Mux23.IN1010
-memory[1001][2] => Mux14.IN1010
-memory[1001][2] => Mux22.IN1010
-memory[1001][3] => Mux13.IN1010
-memory[1001][3] => Mux21.IN1010
-memory[1001][4] => Mux12.IN1010
-memory[1001][4] => Mux20.IN1010
-memory[1001][5] => Mux11.IN1010
-memory[1001][5] => Mux19.IN1010
-memory[1001][6] => Mux10.IN1010
-memory[1001][6] => Mux18.IN1010
-memory[1001][7] => Mux9.IN1010
-memory[1001][7] => Mux17.IN1010
-memory[1000][0] => Mux16.IN1009
-memory[1000][0] => Mux24.IN1009
-memory[1000][1] => Mux15.IN1009
-memory[1000][1] => Mux23.IN1009
-memory[1000][2] => Mux14.IN1009
-memory[1000][2] => Mux22.IN1009
-memory[1000][3] => Mux13.IN1009
-memory[1000][3] => Mux21.IN1009
-memory[1000][4] => Mux12.IN1009
-memory[1000][4] => Mux20.IN1009
-memory[1000][5] => Mux11.IN1009
-memory[1000][5] => Mux19.IN1009
-memory[1000][6] => Mux10.IN1009
-memory[1000][6] => Mux18.IN1009
-memory[1000][7] => Mux9.IN1009
-memory[1000][7] => Mux17.IN1009
-memory[999][0] => Mux16.IN1008
-memory[999][0] => Mux24.IN1008
-memory[999][1] => Mux15.IN1008
-memory[999][1] => Mux23.IN1008
-memory[999][2] => Mux14.IN1008
-memory[999][2] => Mux22.IN1008
-memory[999][3] => Mux13.IN1008
-memory[999][3] => Mux21.IN1008
-memory[999][4] => Mux12.IN1008
-memory[999][4] => Mux20.IN1008
-memory[999][5] => Mux11.IN1008
-memory[999][5] => Mux19.IN1008
-memory[999][6] => Mux10.IN1008
-memory[999][6] => Mux18.IN1008
-memory[999][7] => Mux9.IN1008
-memory[999][7] => Mux17.IN1008
-memory[998][0] => Mux16.IN1007
-memory[998][0] => Mux24.IN1007
-memory[998][1] => Mux15.IN1007
-memory[998][1] => Mux23.IN1007
-memory[998][2] => Mux14.IN1007
-memory[998][2] => Mux22.IN1007
-memory[998][3] => Mux13.IN1007
-memory[998][3] => Mux21.IN1007
-memory[998][4] => Mux12.IN1007
-memory[998][4] => Mux20.IN1007
-memory[998][5] => Mux11.IN1007
-memory[998][5] => Mux19.IN1007
-memory[998][6] => Mux10.IN1007
-memory[998][6] => Mux18.IN1007
-memory[998][7] => Mux9.IN1007
-memory[998][7] => Mux17.IN1007
-memory[997][0] => Mux16.IN1006
-memory[997][0] => Mux24.IN1006
-memory[997][1] => Mux15.IN1006
-memory[997][1] => Mux23.IN1006
-memory[997][2] => Mux14.IN1006
-memory[997][2] => Mux22.IN1006
-memory[997][3] => Mux13.IN1006
-memory[997][3] => Mux21.IN1006
-memory[997][4] => Mux12.IN1006
-memory[997][4] => Mux20.IN1006
-memory[997][5] => Mux11.IN1006
-memory[997][5] => Mux19.IN1006
-memory[997][6] => Mux10.IN1006
-memory[997][6] => Mux18.IN1006
-memory[997][7] => Mux9.IN1006
-memory[997][7] => Mux17.IN1006
-memory[996][0] => Mux16.IN1005
-memory[996][0] => Mux24.IN1005
-memory[996][1] => Mux15.IN1005
-memory[996][1] => Mux23.IN1005
-memory[996][2] => Mux14.IN1005
-memory[996][2] => Mux22.IN1005
-memory[996][3] => Mux13.IN1005
-memory[996][3] => Mux21.IN1005
-memory[996][4] => Mux12.IN1005
-memory[996][4] => Mux20.IN1005
-memory[996][5] => Mux11.IN1005
-memory[996][5] => Mux19.IN1005
-memory[996][6] => Mux10.IN1005
-memory[996][6] => Mux18.IN1005
-memory[996][7] => Mux9.IN1005
-memory[996][7] => Mux17.IN1005
-memory[995][0] => Mux16.IN1004
-memory[995][0] => Mux24.IN1004
-memory[995][1] => Mux15.IN1004
-memory[995][1] => Mux23.IN1004
-memory[995][2] => Mux14.IN1004
-memory[995][2] => Mux22.IN1004
-memory[995][3] => Mux13.IN1004
-memory[995][3] => Mux21.IN1004
-memory[995][4] => Mux12.IN1004
-memory[995][4] => Mux20.IN1004
-memory[995][5] => Mux11.IN1004
-memory[995][5] => Mux19.IN1004
-memory[995][6] => Mux10.IN1004
-memory[995][6] => Mux18.IN1004
-memory[995][7] => Mux9.IN1004
-memory[995][7] => Mux17.IN1004
-memory[994][0] => Mux16.IN1003
-memory[994][0] => Mux24.IN1003
-memory[994][1] => Mux15.IN1003
-memory[994][1] => Mux23.IN1003
-memory[994][2] => Mux14.IN1003
-memory[994][2] => Mux22.IN1003
-memory[994][3] => Mux13.IN1003
-memory[994][3] => Mux21.IN1003
-memory[994][4] => Mux12.IN1003
-memory[994][4] => Mux20.IN1003
-memory[994][5] => Mux11.IN1003
-memory[994][5] => Mux19.IN1003
-memory[994][6] => Mux10.IN1003
-memory[994][6] => Mux18.IN1003
-memory[994][7] => Mux9.IN1003
-memory[994][7] => Mux17.IN1003
-memory[993][0] => Mux16.IN1002
-memory[993][0] => Mux24.IN1002
-memory[993][1] => Mux15.IN1002
-memory[993][1] => Mux23.IN1002
-memory[993][2] => Mux14.IN1002
-memory[993][2] => Mux22.IN1002
-memory[993][3] => Mux13.IN1002
-memory[993][3] => Mux21.IN1002
-memory[993][4] => Mux12.IN1002
-memory[993][4] => Mux20.IN1002
-memory[993][5] => Mux11.IN1002
-memory[993][5] => Mux19.IN1002
-memory[993][6] => Mux10.IN1002
-memory[993][6] => Mux18.IN1002
-memory[993][7] => Mux9.IN1002
-memory[993][7] => Mux17.IN1002
-memory[992][0] => Mux16.IN1001
-memory[992][0] => Mux24.IN1001
-memory[992][1] => Mux15.IN1001
-memory[992][1] => Mux23.IN1001
-memory[992][2] => Mux14.IN1001
-memory[992][2] => Mux22.IN1001
-memory[992][3] => Mux13.IN1001
-memory[992][3] => Mux21.IN1001
-memory[992][4] => Mux12.IN1001
-memory[992][4] => Mux20.IN1001
-memory[992][5] => Mux11.IN1001
-memory[992][5] => Mux19.IN1001
-memory[992][6] => Mux10.IN1001
-memory[992][6] => Mux18.IN1001
-memory[992][7] => Mux9.IN1001
-memory[992][7] => Mux17.IN1001
-memory[991][0] => Mux16.IN1000
-memory[991][0] => Mux24.IN1000
-memory[991][1] => Mux15.IN1000
-memory[991][1] => Mux23.IN1000
-memory[991][2] => Mux14.IN1000
-memory[991][2] => Mux22.IN1000
-memory[991][3] => Mux13.IN1000
-memory[991][3] => Mux21.IN1000
-memory[991][4] => Mux12.IN1000
-memory[991][4] => Mux20.IN1000
-memory[991][5] => Mux11.IN1000
-memory[991][5] => Mux19.IN1000
-memory[991][6] => Mux10.IN1000
-memory[991][6] => Mux18.IN1000
-memory[991][7] => Mux9.IN1000
-memory[991][7] => Mux17.IN1000
-memory[990][0] => Mux16.IN999
-memory[990][0] => Mux24.IN999
-memory[990][1] => Mux15.IN999
-memory[990][1] => Mux23.IN999
-memory[990][2] => Mux14.IN999
-memory[990][2] => Mux22.IN999
-memory[990][3] => Mux13.IN999
-memory[990][3] => Mux21.IN999
-memory[990][4] => Mux12.IN999
-memory[990][4] => Mux20.IN999
-memory[990][5] => Mux11.IN999
-memory[990][5] => Mux19.IN999
-memory[990][6] => Mux10.IN999
-memory[990][6] => Mux18.IN999
-memory[990][7] => Mux9.IN999
-memory[990][7] => Mux17.IN999
-memory[989][0] => Mux16.IN998
-memory[989][0] => Mux24.IN998
-memory[989][1] => Mux15.IN998
-memory[989][1] => Mux23.IN998
-memory[989][2] => Mux14.IN998
-memory[989][2] => Mux22.IN998
-memory[989][3] => Mux13.IN998
-memory[989][3] => Mux21.IN998
-memory[989][4] => Mux12.IN998
-memory[989][4] => Mux20.IN998
-memory[989][5] => Mux11.IN998
-memory[989][5] => Mux19.IN998
-memory[989][6] => Mux10.IN998
-memory[989][6] => Mux18.IN998
-memory[989][7] => Mux9.IN998
-memory[989][7] => Mux17.IN998
-memory[988][0] => Mux16.IN997
-memory[988][0] => Mux24.IN997
-memory[988][1] => Mux15.IN997
-memory[988][1] => Mux23.IN997
-memory[988][2] => Mux14.IN997
-memory[988][2] => Mux22.IN997
-memory[988][3] => Mux13.IN997
-memory[988][3] => Mux21.IN997
-memory[988][4] => Mux12.IN997
-memory[988][4] => Mux20.IN997
-memory[988][5] => Mux11.IN997
-memory[988][5] => Mux19.IN997
-memory[988][6] => Mux10.IN997
-memory[988][6] => Mux18.IN997
-memory[988][7] => Mux9.IN997
-memory[988][7] => Mux17.IN997
-memory[987][0] => Mux16.IN996
-memory[987][0] => Mux24.IN996
-memory[987][1] => Mux15.IN996
-memory[987][1] => Mux23.IN996
-memory[987][2] => Mux14.IN996
-memory[987][2] => Mux22.IN996
-memory[987][3] => Mux13.IN996
-memory[987][3] => Mux21.IN996
-memory[987][4] => Mux12.IN996
-memory[987][4] => Mux20.IN996
-memory[987][5] => Mux11.IN996
-memory[987][5] => Mux19.IN996
-memory[987][6] => Mux10.IN996
-memory[987][6] => Mux18.IN996
-memory[987][7] => Mux9.IN996
-memory[987][7] => Mux17.IN996
-memory[986][0] => Mux16.IN995
-memory[986][0] => Mux24.IN995
-memory[986][1] => Mux15.IN995
-memory[986][1] => Mux23.IN995
-memory[986][2] => Mux14.IN995
-memory[986][2] => Mux22.IN995
-memory[986][3] => Mux13.IN995
-memory[986][3] => Mux21.IN995
-memory[986][4] => Mux12.IN995
-memory[986][4] => Mux20.IN995
-memory[986][5] => Mux11.IN995
-memory[986][5] => Mux19.IN995
-memory[986][6] => Mux10.IN995
-memory[986][6] => Mux18.IN995
-memory[986][7] => Mux9.IN995
-memory[986][7] => Mux17.IN995
-memory[985][0] => Mux16.IN994
-memory[985][0] => Mux24.IN994
-memory[985][1] => Mux15.IN994
-memory[985][1] => Mux23.IN994
-memory[985][2] => Mux14.IN994
-memory[985][2] => Mux22.IN994
-memory[985][3] => Mux13.IN994
-memory[985][3] => Mux21.IN994
-memory[985][4] => Mux12.IN994
-memory[985][4] => Mux20.IN994
-memory[985][5] => Mux11.IN994
-memory[985][5] => Mux19.IN994
-memory[985][6] => Mux10.IN994
-memory[985][6] => Mux18.IN994
-memory[985][7] => Mux9.IN994
-memory[985][7] => Mux17.IN994
-memory[984][0] => Mux16.IN993
-memory[984][0] => Mux24.IN993
-memory[984][1] => Mux15.IN993
-memory[984][1] => Mux23.IN993
-memory[984][2] => Mux14.IN993
-memory[984][2] => Mux22.IN993
-memory[984][3] => Mux13.IN993
-memory[984][3] => Mux21.IN993
-memory[984][4] => Mux12.IN993
-memory[984][4] => Mux20.IN993
-memory[984][5] => Mux11.IN993
-memory[984][5] => Mux19.IN993
-memory[984][6] => Mux10.IN993
-memory[984][6] => Mux18.IN993
-memory[984][7] => Mux9.IN993
-memory[984][7] => Mux17.IN993
-memory[983][0] => Mux16.IN992
-memory[983][0] => Mux24.IN992
-memory[983][1] => Mux15.IN992
-memory[983][1] => Mux23.IN992
-memory[983][2] => Mux14.IN992
-memory[983][2] => Mux22.IN992
-memory[983][3] => Mux13.IN992
-memory[983][3] => Mux21.IN992
-memory[983][4] => Mux12.IN992
-memory[983][4] => Mux20.IN992
-memory[983][5] => Mux11.IN992
-memory[983][5] => Mux19.IN992
-memory[983][6] => Mux10.IN992
-memory[983][6] => Mux18.IN992
-memory[983][7] => Mux9.IN992
-memory[983][7] => Mux17.IN992
-memory[982][0] => Mux16.IN991
-memory[982][0] => Mux24.IN991
-memory[982][1] => Mux15.IN991
-memory[982][1] => Mux23.IN991
-memory[982][2] => Mux14.IN991
-memory[982][2] => Mux22.IN991
-memory[982][3] => Mux13.IN991
-memory[982][3] => Mux21.IN991
-memory[982][4] => Mux12.IN991
-memory[982][4] => Mux20.IN991
-memory[982][5] => Mux11.IN991
-memory[982][5] => Mux19.IN991
-memory[982][6] => Mux10.IN991
-memory[982][6] => Mux18.IN991
-memory[982][7] => Mux9.IN991
-memory[982][7] => Mux17.IN991
-memory[981][0] => Mux16.IN990
-memory[981][0] => Mux24.IN990
-memory[981][1] => Mux15.IN990
-memory[981][1] => Mux23.IN990
-memory[981][2] => Mux14.IN990
-memory[981][2] => Mux22.IN990
-memory[981][3] => Mux13.IN990
-memory[981][3] => Mux21.IN990
-memory[981][4] => Mux12.IN990
-memory[981][4] => Mux20.IN990
-memory[981][5] => Mux11.IN990
-memory[981][5] => Mux19.IN990
-memory[981][6] => Mux10.IN990
-memory[981][6] => Mux18.IN990
-memory[981][7] => Mux9.IN990
-memory[981][7] => Mux17.IN990
-memory[980][0] => Mux16.IN989
-memory[980][0] => Mux24.IN989
-memory[980][1] => Mux15.IN989
-memory[980][1] => Mux23.IN989
-memory[980][2] => Mux14.IN989
-memory[980][2] => Mux22.IN989
-memory[980][3] => Mux13.IN989
-memory[980][3] => Mux21.IN989
-memory[980][4] => Mux12.IN989
-memory[980][4] => Mux20.IN989
-memory[980][5] => Mux11.IN989
-memory[980][5] => Mux19.IN989
-memory[980][6] => Mux10.IN989
-memory[980][6] => Mux18.IN989
-memory[980][7] => Mux9.IN989
-memory[980][7] => Mux17.IN989
-memory[979][0] => Mux16.IN988
-memory[979][0] => Mux24.IN988
-memory[979][1] => Mux15.IN988
-memory[979][1] => Mux23.IN988
-memory[979][2] => Mux14.IN988
-memory[979][2] => Mux22.IN988
-memory[979][3] => Mux13.IN988
-memory[979][3] => Mux21.IN988
-memory[979][4] => Mux12.IN988
-memory[979][4] => Mux20.IN988
-memory[979][5] => Mux11.IN988
-memory[979][5] => Mux19.IN988
-memory[979][6] => Mux10.IN988
-memory[979][6] => Mux18.IN988
-memory[979][7] => Mux9.IN988
-memory[979][7] => Mux17.IN988
-memory[978][0] => Mux16.IN987
-memory[978][0] => Mux24.IN987
-memory[978][1] => Mux15.IN987
-memory[978][1] => Mux23.IN987
-memory[978][2] => Mux14.IN987
-memory[978][2] => Mux22.IN987
-memory[978][3] => Mux13.IN987
-memory[978][3] => Mux21.IN987
-memory[978][4] => Mux12.IN987
-memory[978][4] => Mux20.IN987
-memory[978][5] => Mux11.IN987
-memory[978][5] => Mux19.IN987
-memory[978][6] => Mux10.IN987
-memory[978][6] => Mux18.IN987
-memory[978][7] => Mux9.IN987
-memory[978][7] => Mux17.IN987
-memory[977][0] => Mux16.IN986
-memory[977][0] => Mux24.IN986
-memory[977][1] => Mux15.IN986
-memory[977][1] => Mux23.IN986
-memory[977][2] => Mux14.IN986
-memory[977][2] => Mux22.IN986
-memory[977][3] => Mux13.IN986
-memory[977][3] => Mux21.IN986
-memory[977][4] => Mux12.IN986
-memory[977][4] => Mux20.IN986
-memory[977][5] => Mux11.IN986
-memory[977][5] => Mux19.IN986
-memory[977][6] => Mux10.IN986
-memory[977][6] => Mux18.IN986
-memory[977][7] => Mux9.IN986
-memory[977][7] => Mux17.IN986
-memory[976][0] => Mux16.IN985
-memory[976][0] => Mux24.IN985
-memory[976][1] => Mux15.IN985
-memory[976][1] => Mux23.IN985
-memory[976][2] => Mux14.IN985
-memory[976][2] => Mux22.IN985
-memory[976][3] => Mux13.IN985
-memory[976][3] => Mux21.IN985
-memory[976][4] => Mux12.IN985
-memory[976][4] => Mux20.IN985
-memory[976][5] => Mux11.IN985
-memory[976][5] => Mux19.IN985
-memory[976][6] => Mux10.IN985
-memory[976][6] => Mux18.IN985
-memory[976][7] => Mux9.IN985
-memory[976][7] => Mux17.IN985
-memory[975][0] => Mux16.IN984
-memory[975][0] => Mux24.IN984
-memory[975][1] => Mux15.IN984
-memory[975][1] => Mux23.IN984
-memory[975][2] => Mux14.IN984
-memory[975][2] => Mux22.IN984
-memory[975][3] => Mux13.IN984
-memory[975][3] => Mux21.IN984
-memory[975][4] => Mux12.IN984
-memory[975][4] => Mux20.IN984
-memory[975][5] => Mux11.IN984
-memory[975][5] => Mux19.IN984
-memory[975][6] => Mux10.IN984
-memory[975][6] => Mux18.IN984
-memory[975][7] => Mux9.IN984
-memory[975][7] => Mux17.IN984
-memory[974][0] => Mux16.IN983
-memory[974][0] => Mux24.IN983
-memory[974][1] => Mux15.IN983
-memory[974][1] => Mux23.IN983
-memory[974][2] => Mux14.IN983
-memory[974][2] => Mux22.IN983
-memory[974][3] => Mux13.IN983
-memory[974][3] => Mux21.IN983
-memory[974][4] => Mux12.IN983
-memory[974][4] => Mux20.IN983
-memory[974][5] => Mux11.IN983
-memory[974][5] => Mux19.IN983
-memory[974][6] => Mux10.IN983
-memory[974][6] => Mux18.IN983
-memory[974][7] => Mux9.IN983
-memory[974][7] => Mux17.IN983
-memory[973][0] => Mux16.IN982
-memory[973][0] => Mux24.IN982
-memory[973][1] => Mux15.IN982
-memory[973][1] => Mux23.IN982
-memory[973][2] => Mux14.IN982
-memory[973][2] => Mux22.IN982
-memory[973][3] => Mux13.IN982
-memory[973][3] => Mux21.IN982
-memory[973][4] => Mux12.IN982
-memory[973][4] => Mux20.IN982
-memory[973][5] => Mux11.IN982
-memory[973][5] => Mux19.IN982
-memory[973][6] => Mux10.IN982
-memory[973][6] => Mux18.IN982
-memory[973][7] => Mux9.IN982
-memory[973][7] => Mux17.IN982
-memory[972][0] => Mux16.IN981
-memory[972][0] => Mux24.IN981
-memory[972][1] => Mux15.IN981
-memory[972][1] => Mux23.IN981
-memory[972][2] => Mux14.IN981
-memory[972][2] => Mux22.IN981
-memory[972][3] => Mux13.IN981
-memory[972][3] => Mux21.IN981
-memory[972][4] => Mux12.IN981
-memory[972][4] => Mux20.IN981
-memory[972][5] => Mux11.IN981
-memory[972][5] => Mux19.IN981
-memory[972][6] => Mux10.IN981
-memory[972][6] => Mux18.IN981
-memory[972][7] => Mux9.IN981
-memory[972][7] => Mux17.IN981
-memory[971][0] => Mux16.IN980
-memory[971][0] => Mux24.IN980
-memory[971][1] => Mux15.IN980
-memory[971][1] => Mux23.IN980
-memory[971][2] => Mux14.IN980
-memory[971][2] => Mux22.IN980
-memory[971][3] => Mux13.IN980
-memory[971][3] => Mux21.IN980
-memory[971][4] => Mux12.IN980
-memory[971][4] => Mux20.IN980
-memory[971][5] => Mux11.IN980
-memory[971][5] => Mux19.IN980
-memory[971][6] => Mux10.IN980
-memory[971][6] => Mux18.IN980
-memory[971][7] => Mux9.IN980
-memory[971][7] => Mux17.IN980
-memory[970][0] => Mux16.IN979
-memory[970][0] => Mux24.IN979
-memory[970][1] => Mux15.IN979
-memory[970][1] => Mux23.IN979
-memory[970][2] => Mux14.IN979
-memory[970][2] => Mux22.IN979
-memory[970][3] => Mux13.IN979
-memory[970][3] => Mux21.IN979
-memory[970][4] => Mux12.IN979
-memory[970][4] => Mux20.IN979
-memory[970][5] => Mux11.IN979
-memory[970][5] => Mux19.IN979
-memory[970][6] => Mux10.IN979
-memory[970][6] => Mux18.IN979
-memory[970][7] => Mux9.IN979
-memory[970][7] => Mux17.IN979
-memory[969][0] => Mux16.IN978
-memory[969][0] => Mux24.IN978
-memory[969][1] => Mux15.IN978
-memory[969][1] => Mux23.IN978
-memory[969][2] => Mux14.IN978
-memory[969][2] => Mux22.IN978
-memory[969][3] => Mux13.IN978
-memory[969][3] => Mux21.IN978
-memory[969][4] => Mux12.IN978
-memory[969][4] => Mux20.IN978
-memory[969][5] => Mux11.IN978
-memory[969][5] => Mux19.IN978
-memory[969][6] => Mux10.IN978
-memory[969][6] => Mux18.IN978
-memory[969][7] => Mux9.IN978
-memory[969][7] => Mux17.IN978
-memory[968][0] => Mux16.IN977
-memory[968][0] => Mux24.IN977
-memory[968][1] => Mux15.IN977
-memory[968][1] => Mux23.IN977
-memory[968][2] => Mux14.IN977
-memory[968][2] => Mux22.IN977
-memory[968][3] => Mux13.IN977
-memory[968][3] => Mux21.IN977
-memory[968][4] => Mux12.IN977
-memory[968][4] => Mux20.IN977
-memory[968][5] => Mux11.IN977
-memory[968][5] => Mux19.IN977
-memory[968][6] => Mux10.IN977
-memory[968][6] => Mux18.IN977
-memory[968][7] => Mux9.IN977
-memory[968][7] => Mux17.IN977
-memory[967][0] => Mux16.IN976
-memory[967][0] => Mux24.IN976
-memory[967][1] => Mux15.IN976
-memory[967][1] => Mux23.IN976
-memory[967][2] => Mux14.IN976
-memory[967][2] => Mux22.IN976
-memory[967][3] => Mux13.IN976
-memory[967][3] => Mux21.IN976
-memory[967][4] => Mux12.IN976
-memory[967][4] => Mux20.IN976
-memory[967][5] => Mux11.IN976
-memory[967][5] => Mux19.IN976
-memory[967][6] => Mux10.IN976
-memory[967][6] => Mux18.IN976
-memory[967][7] => Mux9.IN976
-memory[967][7] => Mux17.IN976
-memory[966][0] => Mux16.IN975
-memory[966][0] => Mux24.IN975
-memory[966][1] => Mux15.IN975
-memory[966][1] => Mux23.IN975
-memory[966][2] => Mux14.IN975
-memory[966][2] => Mux22.IN975
-memory[966][3] => Mux13.IN975
-memory[966][3] => Mux21.IN975
-memory[966][4] => Mux12.IN975
-memory[966][4] => Mux20.IN975
-memory[966][5] => Mux11.IN975
-memory[966][5] => Mux19.IN975
-memory[966][6] => Mux10.IN975
-memory[966][6] => Mux18.IN975
-memory[966][7] => Mux9.IN975
-memory[966][7] => Mux17.IN975
-memory[965][0] => Mux16.IN974
-memory[965][0] => Mux24.IN974
-memory[965][1] => Mux15.IN974
-memory[965][1] => Mux23.IN974
-memory[965][2] => Mux14.IN974
-memory[965][2] => Mux22.IN974
-memory[965][3] => Mux13.IN974
-memory[965][3] => Mux21.IN974
-memory[965][4] => Mux12.IN974
-memory[965][4] => Mux20.IN974
-memory[965][5] => Mux11.IN974
-memory[965][5] => Mux19.IN974
-memory[965][6] => Mux10.IN974
-memory[965][6] => Mux18.IN974
-memory[965][7] => Mux9.IN974
-memory[965][7] => Mux17.IN974
-memory[964][0] => Mux16.IN973
-memory[964][0] => Mux24.IN973
-memory[964][1] => Mux15.IN973
-memory[964][1] => Mux23.IN973
-memory[964][2] => Mux14.IN973
-memory[964][2] => Mux22.IN973
-memory[964][3] => Mux13.IN973
-memory[964][3] => Mux21.IN973
-memory[964][4] => Mux12.IN973
-memory[964][4] => Mux20.IN973
-memory[964][5] => Mux11.IN973
-memory[964][5] => Mux19.IN973
-memory[964][6] => Mux10.IN973
-memory[964][6] => Mux18.IN973
-memory[964][7] => Mux9.IN973
-memory[964][7] => Mux17.IN973
-memory[963][0] => Mux16.IN972
-memory[963][0] => Mux24.IN972
-memory[963][1] => Mux15.IN972
-memory[963][1] => Mux23.IN972
-memory[963][2] => Mux14.IN972
-memory[963][2] => Mux22.IN972
-memory[963][3] => Mux13.IN972
-memory[963][3] => Mux21.IN972
-memory[963][4] => Mux12.IN972
-memory[963][4] => Mux20.IN972
-memory[963][5] => Mux11.IN972
-memory[963][5] => Mux19.IN972
-memory[963][6] => Mux10.IN972
-memory[963][6] => Mux18.IN972
-memory[963][7] => Mux9.IN972
-memory[963][7] => Mux17.IN972
-memory[962][0] => Mux16.IN971
-memory[962][0] => Mux24.IN971
-memory[962][1] => Mux15.IN971
-memory[962][1] => Mux23.IN971
-memory[962][2] => Mux14.IN971
-memory[962][2] => Mux22.IN971
-memory[962][3] => Mux13.IN971
-memory[962][3] => Mux21.IN971
-memory[962][4] => Mux12.IN971
-memory[962][4] => Mux20.IN971
-memory[962][5] => Mux11.IN971
-memory[962][5] => Mux19.IN971
-memory[962][6] => Mux10.IN971
-memory[962][6] => Mux18.IN971
-memory[962][7] => Mux9.IN971
-memory[962][7] => Mux17.IN971
-memory[961][0] => Mux16.IN970
-memory[961][0] => Mux24.IN970
-memory[961][1] => Mux15.IN970
-memory[961][1] => Mux23.IN970
-memory[961][2] => Mux14.IN970
-memory[961][2] => Mux22.IN970
-memory[961][3] => Mux13.IN970
-memory[961][3] => Mux21.IN970
-memory[961][4] => Mux12.IN970
-memory[961][4] => Mux20.IN970
-memory[961][5] => Mux11.IN970
-memory[961][5] => Mux19.IN970
-memory[961][6] => Mux10.IN970
-memory[961][6] => Mux18.IN970
-memory[961][7] => Mux9.IN970
-memory[961][7] => Mux17.IN970
-memory[960][0] => Mux16.IN969
-memory[960][0] => Mux24.IN969
-memory[960][1] => Mux15.IN969
-memory[960][1] => Mux23.IN969
-memory[960][2] => Mux14.IN969
-memory[960][2] => Mux22.IN969
-memory[960][3] => Mux13.IN969
-memory[960][3] => Mux21.IN969
-memory[960][4] => Mux12.IN969
-memory[960][4] => Mux20.IN969
-memory[960][5] => Mux11.IN969
-memory[960][5] => Mux19.IN969
-memory[960][6] => Mux10.IN969
-memory[960][6] => Mux18.IN969
-memory[960][7] => Mux9.IN969
-memory[960][7] => Mux17.IN969
-memory[959][0] => Mux16.IN968
-memory[959][0] => Mux24.IN968
-memory[959][1] => Mux15.IN968
-memory[959][1] => Mux23.IN968
-memory[959][2] => Mux14.IN968
-memory[959][2] => Mux22.IN968
-memory[959][3] => Mux13.IN968
-memory[959][3] => Mux21.IN968
-memory[959][4] => Mux12.IN968
-memory[959][4] => Mux20.IN968
-memory[959][5] => Mux11.IN968
-memory[959][5] => Mux19.IN968
-memory[959][6] => Mux10.IN968
-memory[959][6] => Mux18.IN968
-memory[959][7] => Mux9.IN968
-memory[959][7] => Mux17.IN968
-memory[958][0] => Mux16.IN967
-memory[958][0] => Mux24.IN967
-memory[958][1] => Mux15.IN967
-memory[958][1] => Mux23.IN967
-memory[958][2] => Mux14.IN967
-memory[958][2] => Mux22.IN967
-memory[958][3] => Mux13.IN967
-memory[958][3] => Mux21.IN967
-memory[958][4] => Mux12.IN967
-memory[958][4] => Mux20.IN967
-memory[958][5] => Mux11.IN967
-memory[958][5] => Mux19.IN967
-memory[958][6] => Mux10.IN967
-memory[958][6] => Mux18.IN967
-memory[958][7] => Mux9.IN967
-memory[958][7] => Mux17.IN967
-memory[957][0] => Mux16.IN966
-memory[957][0] => Mux24.IN966
-memory[957][1] => Mux15.IN966
-memory[957][1] => Mux23.IN966
-memory[957][2] => Mux14.IN966
-memory[957][2] => Mux22.IN966
-memory[957][3] => Mux13.IN966
-memory[957][3] => Mux21.IN966
-memory[957][4] => Mux12.IN966
-memory[957][4] => Mux20.IN966
-memory[957][5] => Mux11.IN966
-memory[957][5] => Mux19.IN966
-memory[957][6] => Mux10.IN966
-memory[957][6] => Mux18.IN966
-memory[957][7] => Mux9.IN966
-memory[957][7] => Mux17.IN966
-memory[956][0] => Mux16.IN965
-memory[956][0] => Mux24.IN965
-memory[956][1] => Mux15.IN965
-memory[956][1] => Mux23.IN965
-memory[956][2] => Mux14.IN965
-memory[956][2] => Mux22.IN965
-memory[956][3] => Mux13.IN965
-memory[956][3] => Mux21.IN965
-memory[956][4] => Mux12.IN965
-memory[956][4] => Mux20.IN965
-memory[956][5] => Mux11.IN965
-memory[956][5] => Mux19.IN965
-memory[956][6] => Mux10.IN965
-memory[956][6] => Mux18.IN965
-memory[956][7] => Mux9.IN965
-memory[956][7] => Mux17.IN965
-memory[955][0] => Mux16.IN964
-memory[955][0] => Mux24.IN964
-memory[955][1] => Mux15.IN964
-memory[955][1] => Mux23.IN964
-memory[955][2] => Mux14.IN964
-memory[955][2] => Mux22.IN964
-memory[955][3] => Mux13.IN964
-memory[955][3] => Mux21.IN964
-memory[955][4] => Mux12.IN964
-memory[955][4] => Mux20.IN964
-memory[955][5] => Mux11.IN964
-memory[955][5] => Mux19.IN964
-memory[955][6] => Mux10.IN964
-memory[955][6] => Mux18.IN964
-memory[955][7] => Mux9.IN964
-memory[955][7] => Mux17.IN964
-memory[954][0] => Mux16.IN963
-memory[954][0] => Mux24.IN963
-memory[954][1] => Mux15.IN963
-memory[954][1] => Mux23.IN963
-memory[954][2] => Mux14.IN963
-memory[954][2] => Mux22.IN963
-memory[954][3] => Mux13.IN963
-memory[954][3] => Mux21.IN963
-memory[954][4] => Mux12.IN963
-memory[954][4] => Mux20.IN963
-memory[954][5] => Mux11.IN963
-memory[954][5] => Mux19.IN963
-memory[954][6] => Mux10.IN963
-memory[954][6] => Mux18.IN963
-memory[954][7] => Mux9.IN963
-memory[954][7] => Mux17.IN963
-memory[953][0] => Mux16.IN962
-memory[953][0] => Mux24.IN962
-memory[953][1] => Mux15.IN962
-memory[953][1] => Mux23.IN962
-memory[953][2] => Mux14.IN962
-memory[953][2] => Mux22.IN962
-memory[953][3] => Mux13.IN962
-memory[953][3] => Mux21.IN962
-memory[953][4] => Mux12.IN962
-memory[953][4] => Mux20.IN962
-memory[953][5] => Mux11.IN962
-memory[953][5] => Mux19.IN962
-memory[953][6] => Mux10.IN962
-memory[953][6] => Mux18.IN962
-memory[953][7] => Mux9.IN962
-memory[953][7] => Mux17.IN962
-memory[952][0] => Mux16.IN961
-memory[952][0] => Mux24.IN961
-memory[952][1] => Mux15.IN961
-memory[952][1] => Mux23.IN961
-memory[952][2] => Mux14.IN961
-memory[952][2] => Mux22.IN961
-memory[952][3] => Mux13.IN961
-memory[952][3] => Mux21.IN961
-memory[952][4] => Mux12.IN961
-memory[952][4] => Mux20.IN961
-memory[952][5] => Mux11.IN961
-memory[952][5] => Mux19.IN961
-memory[952][6] => Mux10.IN961
-memory[952][6] => Mux18.IN961
-memory[952][7] => Mux9.IN961
-memory[952][7] => Mux17.IN961
-memory[951][0] => Mux16.IN960
-memory[951][0] => Mux24.IN960
-memory[951][1] => Mux15.IN960
-memory[951][1] => Mux23.IN960
-memory[951][2] => Mux14.IN960
-memory[951][2] => Mux22.IN960
-memory[951][3] => Mux13.IN960
-memory[951][3] => Mux21.IN960
-memory[951][4] => Mux12.IN960
-memory[951][4] => Mux20.IN960
-memory[951][5] => Mux11.IN960
-memory[951][5] => Mux19.IN960
-memory[951][6] => Mux10.IN960
-memory[951][6] => Mux18.IN960
-memory[951][7] => Mux9.IN960
-memory[951][7] => Mux17.IN960
-memory[950][0] => Mux16.IN959
-memory[950][0] => Mux24.IN959
-memory[950][1] => Mux15.IN959
-memory[950][1] => Mux23.IN959
-memory[950][2] => Mux14.IN959
-memory[950][2] => Mux22.IN959
-memory[950][3] => Mux13.IN959
-memory[950][3] => Mux21.IN959
-memory[950][4] => Mux12.IN959
-memory[950][4] => Mux20.IN959
-memory[950][5] => Mux11.IN959
-memory[950][5] => Mux19.IN959
-memory[950][6] => Mux10.IN959
-memory[950][6] => Mux18.IN959
-memory[950][7] => Mux9.IN959
-memory[950][7] => Mux17.IN959
-memory[949][0] => Mux16.IN958
-memory[949][0] => Mux24.IN958
-memory[949][1] => Mux15.IN958
-memory[949][1] => Mux23.IN958
-memory[949][2] => Mux14.IN958
-memory[949][2] => Mux22.IN958
-memory[949][3] => Mux13.IN958
-memory[949][3] => Mux21.IN958
-memory[949][4] => Mux12.IN958
-memory[949][4] => Mux20.IN958
-memory[949][5] => Mux11.IN958
-memory[949][5] => Mux19.IN958
-memory[949][6] => Mux10.IN958
-memory[949][6] => Mux18.IN958
-memory[949][7] => Mux9.IN958
-memory[949][7] => Mux17.IN958
-memory[948][0] => Mux16.IN957
-memory[948][0] => Mux24.IN957
-memory[948][1] => Mux15.IN957
-memory[948][1] => Mux23.IN957
-memory[948][2] => Mux14.IN957
-memory[948][2] => Mux22.IN957
-memory[948][3] => Mux13.IN957
-memory[948][3] => Mux21.IN957
-memory[948][4] => Mux12.IN957
-memory[948][4] => Mux20.IN957
-memory[948][5] => Mux11.IN957
-memory[948][5] => Mux19.IN957
-memory[948][6] => Mux10.IN957
-memory[948][6] => Mux18.IN957
-memory[948][7] => Mux9.IN957
-memory[948][7] => Mux17.IN957
-memory[947][0] => Mux16.IN956
-memory[947][0] => Mux24.IN956
-memory[947][1] => Mux15.IN956
-memory[947][1] => Mux23.IN956
-memory[947][2] => Mux14.IN956
-memory[947][2] => Mux22.IN956
-memory[947][3] => Mux13.IN956
-memory[947][3] => Mux21.IN956
-memory[947][4] => Mux12.IN956
-memory[947][4] => Mux20.IN956
-memory[947][5] => Mux11.IN956
-memory[947][5] => Mux19.IN956
-memory[947][6] => Mux10.IN956
-memory[947][6] => Mux18.IN956
-memory[947][7] => Mux9.IN956
-memory[947][7] => Mux17.IN956
-memory[946][0] => Mux16.IN955
-memory[946][0] => Mux24.IN955
-memory[946][1] => Mux15.IN955
-memory[946][1] => Mux23.IN955
-memory[946][2] => Mux14.IN955
-memory[946][2] => Mux22.IN955
-memory[946][3] => Mux13.IN955
-memory[946][3] => Mux21.IN955
-memory[946][4] => Mux12.IN955
-memory[946][4] => Mux20.IN955
-memory[946][5] => Mux11.IN955
-memory[946][5] => Mux19.IN955
-memory[946][6] => Mux10.IN955
-memory[946][6] => Mux18.IN955
-memory[946][7] => Mux9.IN955
-memory[946][7] => Mux17.IN955
-memory[945][0] => Mux16.IN954
-memory[945][0] => Mux24.IN954
-memory[945][1] => Mux15.IN954
-memory[945][1] => Mux23.IN954
-memory[945][2] => Mux14.IN954
-memory[945][2] => Mux22.IN954
-memory[945][3] => Mux13.IN954
-memory[945][3] => Mux21.IN954
-memory[945][4] => Mux12.IN954
-memory[945][4] => Mux20.IN954
-memory[945][5] => Mux11.IN954
-memory[945][5] => Mux19.IN954
-memory[945][6] => Mux10.IN954
-memory[945][6] => Mux18.IN954
-memory[945][7] => Mux9.IN954
-memory[945][7] => Mux17.IN954
-memory[944][0] => Mux16.IN953
-memory[944][0] => Mux24.IN953
-memory[944][1] => Mux15.IN953
-memory[944][1] => Mux23.IN953
-memory[944][2] => Mux14.IN953
-memory[944][2] => Mux22.IN953
-memory[944][3] => Mux13.IN953
-memory[944][3] => Mux21.IN953
-memory[944][4] => Mux12.IN953
-memory[944][4] => Mux20.IN953
-memory[944][5] => Mux11.IN953
-memory[944][5] => Mux19.IN953
-memory[944][6] => Mux10.IN953
-memory[944][6] => Mux18.IN953
-memory[944][7] => Mux9.IN953
-memory[944][7] => Mux17.IN953
-memory[943][0] => Mux16.IN952
-memory[943][0] => Mux24.IN952
-memory[943][1] => Mux15.IN952
-memory[943][1] => Mux23.IN952
-memory[943][2] => Mux14.IN952
-memory[943][2] => Mux22.IN952
-memory[943][3] => Mux13.IN952
-memory[943][3] => Mux21.IN952
-memory[943][4] => Mux12.IN952
-memory[943][4] => Mux20.IN952
-memory[943][5] => Mux11.IN952
-memory[943][5] => Mux19.IN952
-memory[943][6] => Mux10.IN952
-memory[943][6] => Mux18.IN952
-memory[943][7] => Mux9.IN952
-memory[943][7] => Mux17.IN952
-memory[942][0] => Mux16.IN951
-memory[942][0] => Mux24.IN951
-memory[942][1] => Mux15.IN951
-memory[942][1] => Mux23.IN951
-memory[942][2] => Mux14.IN951
-memory[942][2] => Mux22.IN951
-memory[942][3] => Mux13.IN951
-memory[942][3] => Mux21.IN951
-memory[942][4] => Mux12.IN951
-memory[942][4] => Mux20.IN951
-memory[942][5] => Mux11.IN951
-memory[942][5] => Mux19.IN951
-memory[942][6] => Mux10.IN951
-memory[942][6] => Mux18.IN951
-memory[942][7] => Mux9.IN951
-memory[942][7] => Mux17.IN951
-memory[941][0] => Mux16.IN950
-memory[941][0] => Mux24.IN950
-memory[941][1] => Mux15.IN950
-memory[941][1] => Mux23.IN950
-memory[941][2] => Mux14.IN950
-memory[941][2] => Mux22.IN950
-memory[941][3] => Mux13.IN950
-memory[941][3] => Mux21.IN950
-memory[941][4] => Mux12.IN950
-memory[941][4] => Mux20.IN950
-memory[941][5] => Mux11.IN950
-memory[941][5] => Mux19.IN950
-memory[941][6] => Mux10.IN950
-memory[941][6] => Mux18.IN950
-memory[941][7] => Mux9.IN950
-memory[941][7] => Mux17.IN950
-memory[940][0] => Mux16.IN949
-memory[940][0] => Mux24.IN949
-memory[940][1] => Mux15.IN949
-memory[940][1] => Mux23.IN949
-memory[940][2] => Mux14.IN949
-memory[940][2] => Mux22.IN949
-memory[940][3] => Mux13.IN949
-memory[940][3] => Mux21.IN949
-memory[940][4] => Mux12.IN949
-memory[940][4] => Mux20.IN949
-memory[940][5] => Mux11.IN949
-memory[940][5] => Mux19.IN949
-memory[940][6] => Mux10.IN949
-memory[940][6] => Mux18.IN949
-memory[940][7] => Mux9.IN949
-memory[940][7] => Mux17.IN949
-memory[939][0] => Mux16.IN948
-memory[939][0] => Mux24.IN948
-memory[939][1] => Mux15.IN948
-memory[939][1] => Mux23.IN948
-memory[939][2] => Mux14.IN948
-memory[939][2] => Mux22.IN948
-memory[939][3] => Mux13.IN948
-memory[939][3] => Mux21.IN948
-memory[939][4] => Mux12.IN948
-memory[939][4] => Mux20.IN948
-memory[939][5] => Mux11.IN948
-memory[939][5] => Mux19.IN948
-memory[939][6] => Mux10.IN948
-memory[939][6] => Mux18.IN948
-memory[939][7] => Mux9.IN948
-memory[939][7] => Mux17.IN948
-memory[938][0] => Mux16.IN947
-memory[938][0] => Mux24.IN947
-memory[938][1] => Mux15.IN947
-memory[938][1] => Mux23.IN947
-memory[938][2] => Mux14.IN947
-memory[938][2] => Mux22.IN947
-memory[938][3] => Mux13.IN947
-memory[938][3] => Mux21.IN947
-memory[938][4] => Mux12.IN947
-memory[938][4] => Mux20.IN947
-memory[938][5] => Mux11.IN947
-memory[938][5] => Mux19.IN947
-memory[938][6] => Mux10.IN947
-memory[938][6] => Mux18.IN947
-memory[938][7] => Mux9.IN947
-memory[938][7] => Mux17.IN947
-memory[937][0] => Mux16.IN946
-memory[937][0] => Mux24.IN946
-memory[937][1] => Mux15.IN946
-memory[937][1] => Mux23.IN946
-memory[937][2] => Mux14.IN946
-memory[937][2] => Mux22.IN946
-memory[937][3] => Mux13.IN946
-memory[937][3] => Mux21.IN946
-memory[937][4] => Mux12.IN946
-memory[937][4] => Mux20.IN946
-memory[937][5] => Mux11.IN946
-memory[937][5] => Mux19.IN946
-memory[937][6] => Mux10.IN946
-memory[937][6] => Mux18.IN946
-memory[937][7] => Mux9.IN946
-memory[937][7] => Mux17.IN946
-memory[936][0] => Mux16.IN945
-memory[936][0] => Mux24.IN945
-memory[936][1] => Mux15.IN945
-memory[936][1] => Mux23.IN945
-memory[936][2] => Mux14.IN945
-memory[936][2] => Mux22.IN945
-memory[936][3] => Mux13.IN945
-memory[936][3] => Mux21.IN945
-memory[936][4] => Mux12.IN945
-memory[936][4] => Mux20.IN945
-memory[936][5] => Mux11.IN945
-memory[936][5] => Mux19.IN945
-memory[936][6] => Mux10.IN945
-memory[936][6] => Mux18.IN945
-memory[936][7] => Mux9.IN945
-memory[936][7] => Mux17.IN945
-memory[935][0] => Mux16.IN944
-memory[935][0] => Mux24.IN944
-memory[935][1] => Mux15.IN944
-memory[935][1] => Mux23.IN944
-memory[935][2] => Mux14.IN944
-memory[935][2] => Mux22.IN944
-memory[935][3] => Mux13.IN944
-memory[935][3] => Mux21.IN944
-memory[935][4] => Mux12.IN944
-memory[935][4] => Mux20.IN944
-memory[935][5] => Mux11.IN944
-memory[935][5] => Mux19.IN944
-memory[935][6] => Mux10.IN944
-memory[935][6] => Mux18.IN944
-memory[935][7] => Mux9.IN944
-memory[935][7] => Mux17.IN944
-memory[934][0] => Mux16.IN943
-memory[934][0] => Mux24.IN943
-memory[934][1] => Mux15.IN943
-memory[934][1] => Mux23.IN943
-memory[934][2] => Mux14.IN943
-memory[934][2] => Mux22.IN943
-memory[934][3] => Mux13.IN943
-memory[934][3] => Mux21.IN943
-memory[934][4] => Mux12.IN943
-memory[934][4] => Mux20.IN943
-memory[934][5] => Mux11.IN943
-memory[934][5] => Mux19.IN943
-memory[934][6] => Mux10.IN943
-memory[934][6] => Mux18.IN943
-memory[934][7] => Mux9.IN943
-memory[934][7] => Mux17.IN943
-memory[933][0] => Mux16.IN942
-memory[933][0] => Mux24.IN942
-memory[933][1] => Mux15.IN942
-memory[933][1] => Mux23.IN942
-memory[933][2] => Mux14.IN942
-memory[933][2] => Mux22.IN942
-memory[933][3] => Mux13.IN942
-memory[933][3] => Mux21.IN942
-memory[933][4] => Mux12.IN942
-memory[933][4] => Mux20.IN942
-memory[933][5] => Mux11.IN942
-memory[933][5] => Mux19.IN942
-memory[933][6] => Mux10.IN942
-memory[933][6] => Mux18.IN942
-memory[933][7] => Mux9.IN942
-memory[933][7] => Mux17.IN942
-memory[932][0] => Mux16.IN941
-memory[932][0] => Mux24.IN941
-memory[932][1] => Mux15.IN941
-memory[932][1] => Mux23.IN941
-memory[932][2] => Mux14.IN941
-memory[932][2] => Mux22.IN941
-memory[932][3] => Mux13.IN941
-memory[932][3] => Mux21.IN941
-memory[932][4] => Mux12.IN941
-memory[932][4] => Mux20.IN941
-memory[932][5] => Mux11.IN941
-memory[932][5] => Mux19.IN941
-memory[932][6] => Mux10.IN941
-memory[932][6] => Mux18.IN941
-memory[932][7] => Mux9.IN941
-memory[932][7] => Mux17.IN941
-memory[931][0] => Mux16.IN940
-memory[931][0] => Mux24.IN940
-memory[931][1] => Mux15.IN940
-memory[931][1] => Mux23.IN940
-memory[931][2] => Mux14.IN940
-memory[931][2] => Mux22.IN940
-memory[931][3] => Mux13.IN940
-memory[931][3] => Mux21.IN940
-memory[931][4] => Mux12.IN940
-memory[931][4] => Mux20.IN940
-memory[931][5] => Mux11.IN940
-memory[931][5] => Mux19.IN940
-memory[931][6] => Mux10.IN940
-memory[931][6] => Mux18.IN940
-memory[931][7] => Mux9.IN940
-memory[931][7] => Mux17.IN940
-memory[930][0] => Mux16.IN939
-memory[930][0] => Mux24.IN939
-memory[930][1] => Mux15.IN939
-memory[930][1] => Mux23.IN939
-memory[930][2] => Mux14.IN939
-memory[930][2] => Mux22.IN939
-memory[930][3] => Mux13.IN939
-memory[930][3] => Mux21.IN939
-memory[930][4] => Mux12.IN939
-memory[930][4] => Mux20.IN939
-memory[930][5] => Mux11.IN939
-memory[930][5] => Mux19.IN939
-memory[930][6] => Mux10.IN939
-memory[930][6] => Mux18.IN939
-memory[930][7] => Mux9.IN939
-memory[930][7] => Mux17.IN939
-memory[929][0] => Mux16.IN938
-memory[929][0] => Mux24.IN938
-memory[929][1] => Mux15.IN938
-memory[929][1] => Mux23.IN938
-memory[929][2] => Mux14.IN938
-memory[929][2] => Mux22.IN938
-memory[929][3] => Mux13.IN938
-memory[929][3] => Mux21.IN938
-memory[929][4] => Mux12.IN938
-memory[929][4] => Mux20.IN938
-memory[929][5] => Mux11.IN938
-memory[929][5] => Mux19.IN938
-memory[929][6] => Mux10.IN938
-memory[929][6] => Mux18.IN938
-memory[929][7] => Mux9.IN938
-memory[929][7] => Mux17.IN938
-memory[928][0] => Mux16.IN937
-memory[928][0] => Mux24.IN937
-memory[928][1] => Mux15.IN937
-memory[928][1] => Mux23.IN937
-memory[928][2] => Mux14.IN937
-memory[928][2] => Mux22.IN937
-memory[928][3] => Mux13.IN937
-memory[928][3] => Mux21.IN937
-memory[928][4] => Mux12.IN937
-memory[928][4] => Mux20.IN937
-memory[928][5] => Mux11.IN937
-memory[928][5] => Mux19.IN937
-memory[928][6] => Mux10.IN937
-memory[928][6] => Mux18.IN937
-memory[928][7] => Mux9.IN937
-memory[928][7] => Mux17.IN937
-memory[927][0] => Mux16.IN936
-memory[927][0] => Mux24.IN936
-memory[927][1] => Mux15.IN936
-memory[927][1] => Mux23.IN936
-memory[927][2] => Mux14.IN936
-memory[927][2] => Mux22.IN936
-memory[927][3] => Mux13.IN936
-memory[927][3] => Mux21.IN936
-memory[927][4] => Mux12.IN936
-memory[927][4] => Mux20.IN936
-memory[927][5] => Mux11.IN936
-memory[927][5] => Mux19.IN936
-memory[927][6] => Mux10.IN936
-memory[927][6] => Mux18.IN936
-memory[927][7] => Mux9.IN936
-memory[927][7] => Mux17.IN936
-memory[926][0] => Mux16.IN935
-memory[926][0] => Mux24.IN935
-memory[926][1] => Mux15.IN935
-memory[926][1] => Mux23.IN935
-memory[926][2] => Mux14.IN935
-memory[926][2] => Mux22.IN935
-memory[926][3] => Mux13.IN935
-memory[926][3] => Mux21.IN935
-memory[926][4] => Mux12.IN935
-memory[926][4] => Mux20.IN935
-memory[926][5] => Mux11.IN935
-memory[926][5] => Mux19.IN935
-memory[926][6] => Mux10.IN935
-memory[926][6] => Mux18.IN935
-memory[926][7] => Mux9.IN935
-memory[926][7] => Mux17.IN935
-memory[925][0] => Mux16.IN934
-memory[925][0] => Mux24.IN934
-memory[925][1] => Mux15.IN934
-memory[925][1] => Mux23.IN934
-memory[925][2] => Mux14.IN934
-memory[925][2] => Mux22.IN934
-memory[925][3] => Mux13.IN934
-memory[925][3] => Mux21.IN934
-memory[925][4] => Mux12.IN934
-memory[925][4] => Mux20.IN934
-memory[925][5] => Mux11.IN934
-memory[925][5] => Mux19.IN934
-memory[925][6] => Mux10.IN934
-memory[925][6] => Mux18.IN934
-memory[925][7] => Mux9.IN934
-memory[925][7] => Mux17.IN934
-memory[924][0] => Mux16.IN933
-memory[924][0] => Mux24.IN933
-memory[924][1] => Mux15.IN933
-memory[924][1] => Mux23.IN933
-memory[924][2] => Mux14.IN933
-memory[924][2] => Mux22.IN933
-memory[924][3] => Mux13.IN933
-memory[924][3] => Mux21.IN933
-memory[924][4] => Mux12.IN933
-memory[924][4] => Mux20.IN933
-memory[924][5] => Mux11.IN933
-memory[924][5] => Mux19.IN933
-memory[924][6] => Mux10.IN933
-memory[924][6] => Mux18.IN933
-memory[924][7] => Mux9.IN933
-memory[924][7] => Mux17.IN933
-memory[923][0] => Mux16.IN932
-memory[923][0] => Mux24.IN932
-memory[923][1] => Mux15.IN932
-memory[923][1] => Mux23.IN932
-memory[923][2] => Mux14.IN932
-memory[923][2] => Mux22.IN932
-memory[923][3] => Mux13.IN932
-memory[923][3] => Mux21.IN932
-memory[923][4] => Mux12.IN932
-memory[923][4] => Mux20.IN932
-memory[923][5] => Mux11.IN932
-memory[923][5] => Mux19.IN932
-memory[923][6] => Mux10.IN932
-memory[923][6] => Mux18.IN932
-memory[923][7] => Mux9.IN932
-memory[923][7] => Mux17.IN932
-memory[922][0] => Mux16.IN931
-memory[922][0] => Mux24.IN931
-memory[922][1] => Mux15.IN931
-memory[922][1] => Mux23.IN931
-memory[922][2] => Mux14.IN931
-memory[922][2] => Mux22.IN931
-memory[922][3] => Mux13.IN931
-memory[922][3] => Mux21.IN931
-memory[922][4] => Mux12.IN931
-memory[922][4] => Mux20.IN931
-memory[922][5] => Mux11.IN931
-memory[922][5] => Mux19.IN931
-memory[922][6] => Mux10.IN931
-memory[922][6] => Mux18.IN931
-memory[922][7] => Mux9.IN931
-memory[922][7] => Mux17.IN931
-memory[921][0] => Mux16.IN930
-memory[921][0] => Mux24.IN930
-memory[921][1] => Mux15.IN930
-memory[921][1] => Mux23.IN930
-memory[921][2] => Mux14.IN930
-memory[921][2] => Mux22.IN930
-memory[921][3] => Mux13.IN930
-memory[921][3] => Mux21.IN930
-memory[921][4] => Mux12.IN930
-memory[921][4] => Mux20.IN930
-memory[921][5] => Mux11.IN930
-memory[921][5] => Mux19.IN930
-memory[921][6] => Mux10.IN930
-memory[921][6] => Mux18.IN930
-memory[921][7] => Mux9.IN930
-memory[921][7] => Mux17.IN930
-memory[920][0] => Mux16.IN929
-memory[920][0] => Mux24.IN929
-memory[920][1] => Mux15.IN929
-memory[920][1] => Mux23.IN929
-memory[920][2] => Mux14.IN929
-memory[920][2] => Mux22.IN929
-memory[920][3] => Mux13.IN929
-memory[920][3] => Mux21.IN929
-memory[920][4] => Mux12.IN929
-memory[920][4] => Mux20.IN929
-memory[920][5] => Mux11.IN929
-memory[920][5] => Mux19.IN929
-memory[920][6] => Mux10.IN929
-memory[920][6] => Mux18.IN929
-memory[920][7] => Mux9.IN929
-memory[920][7] => Mux17.IN929
-memory[919][0] => Mux16.IN928
-memory[919][0] => Mux24.IN928
-memory[919][1] => Mux15.IN928
-memory[919][1] => Mux23.IN928
-memory[919][2] => Mux14.IN928
-memory[919][2] => Mux22.IN928
-memory[919][3] => Mux13.IN928
-memory[919][3] => Mux21.IN928
-memory[919][4] => Mux12.IN928
-memory[919][4] => Mux20.IN928
-memory[919][5] => Mux11.IN928
-memory[919][5] => Mux19.IN928
-memory[919][6] => Mux10.IN928
-memory[919][6] => Mux18.IN928
-memory[919][7] => Mux9.IN928
-memory[919][7] => Mux17.IN928
-memory[918][0] => Mux16.IN927
-memory[918][0] => Mux24.IN927
-memory[918][1] => Mux15.IN927
-memory[918][1] => Mux23.IN927
-memory[918][2] => Mux14.IN927
-memory[918][2] => Mux22.IN927
-memory[918][3] => Mux13.IN927
-memory[918][3] => Mux21.IN927
-memory[918][4] => Mux12.IN927
-memory[918][4] => Mux20.IN927
-memory[918][5] => Mux11.IN927
-memory[918][5] => Mux19.IN927
-memory[918][6] => Mux10.IN927
-memory[918][6] => Mux18.IN927
-memory[918][7] => Mux9.IN927
-memory[918][7] => Mux17.IN927
-memory[917][0] => Mux16.IN926
-memory[917][0] => Mux24.IN926
-memory[917][1] => Mux15.IN926
-memory[917][1] => Mux23.IN926
-memory[917][2] => Mux14.IN926
-memory[917][2] => Mux22.IN926
-memory[917][3] => Mux13.IN926
-memory[917][3] => Mux21.IN926
-memory[917][4] => Mux12.IN926
-memory[917][4] => Mux20.IN926
-memory[917][5] => Mux11.IN926
-memory[917][5] => Mux19.IN926
-memory[917][6] => Mux10.IN926
-memory[917][6] => Mux18.IN926
-memory[917][7] => Mux9.IN926
-memory[917][7] => Mux17.IN926
-memory[916][0] => Mux16.IN925
-memory[916][0] => Mux24.IN925
-memory[916][1] => Mux15.IN925
-memory[916][1] => Mux23.IN925
-memory[916][2] => Mux14.IN925
-memory[916][2] => Mux22.IN925
-memory[916][3] => Mux13.IN925
-memory[916][3] => Mux21.IN925
-memory[916][4] => Mux12.IN925
-memory[916][4] => Mux20.IN925
-memory[916][5] => Mux11.IN925
-memory[916][5] => Mux19.IN925
-memory[916][6] => Mux10.IN925
-memory[916][6] => Mux18.IN925
-memory[916][7] => Mux9.IN925
-memory[916][7] => Mux17.IN925
-memory[915][0] => Mux16.IN924
-memory[915][0] => Mux24.IN924
-memory[915][1] => Mux15.IN924
-memory[915][1] => Mux23.IN924
-memory[915][2] => Mux14.IN924
-memory[915][2] => Mux22.IN924
-memory[915][3] => Mux13.IN924
-memory[915][3] => Mux21.IN924
-memory[915][4] => Mux12.IN924
-memory[915][4] => Mux20.IN924
-memory[915][5] => Mux11.IN924
-memory[915][5] => Mux19.IN924
-memory[915][6] => Mux10.IN924
-memory[915][6] => Mux18.IN924
-memory[915][7] => Mux9.IN924
-memory[915][7] => Mux17.IN924
-memory[914][0] => Mux16.IN923
-memory[914][0] => Mux24.IN923
-memory[914][1] => Mux15.IN923
-memory[914][1] => Mux23.IN923
-memory[914][2] => Mux14.IN923
-memory[914][2] => Mux22.IN923
-memory[914][3] => Mux13.IN923
-memory[914][3] => Mux21.IN923
-memory[914][4] => Mux12.IN923
-memory[914][4] => Mux20.IN923
-memory[914][5] => Mux11.IN923
-memory[914][5] => Mux19.IN923
-memory[914][6] => Mux10.IN923
-memory[914][6] => Mux18.IN923
-memory[914][7] => Mux9.IN923
-memory[914][7] => Mux17.IN923
-memory[913][0] => Mux16.IN922
-memory[913][0] => Mux24.IN922
-memory[913][1] => Mux15.IN922
-memory[913][1] => Mux23.IN922
-memory[913][2] => Mux14.IN922
-memory[913][2] => Mux22.IN922
-memory[913][3] => Mux13.IN922
-memory[913][3] => Mux21.IN922
-memory[913][4] => Mux12.IN922
-memory[913][4] => Mux20.IN922
-memory[913][5] => Mux11.IN922
-memory[913][5] => Mux19.IN922
-memory[913][6] => Mux10.IN922
-memory[913][6] => Mux18.IN922
-memory[913][7] => Mux9.IN922
-memory[913][7] => Mux17.IN922
-memory[912][0] => Mux16.IN921
-memory[912][0] => Mux24.IN921
-memory[912][1] => Mux15.IN921
-memory[912][1] => Mux23.IN921
-memory[912][2] => Mux14.IN921
-memory[912][2] => Mux22.IN921
-memory[912][3] => Mux13.IN921
-memory[912][3] => Mux21.IN921
-memory[912][4] => Mux12.IN921
-memory[912][4] => Mux20.IN921
-memory[912][5] => Mux11.IN921
-memory[912][5] => Mux19.IN921
-memory[912][6] => Mux10.IN921
-memory[912][6] => Mux18.IN921
-memory[912][7] => Mux9.IN921
-memory[912][7] => Mux17.IN921
-memory[911][0] => Mux16.IN920
-memory[911][0] => Mux24.IN920
-memory[911][1] => Mux15.IN920
-memory[911][1] => Mux23.IN920
-memory[911][2] => Mux14.IN920
-memory[911][2] => Mux22.IN920
-memory[911][3] => Mux13.IN920
-memory[911][3] => Mux21.IN920
-memory[911][4] => Mux12.IN920
-memory[911][4] => Mux20.IN920
-memory[911][5] => Mux11.IN920
-memory[911][5] => Mux19.IN920
-memory[911][6] => Mux10.IN920
-memory[911][6] => Mux18.IN920
-memory[911][7] => Mux9.IN920
-memory[911][7] => Mux17.IN920
-memory[910][0] => Mux16.IN919
-memory[910][0] => Mux24.IN919
-memory[910][1] => Mux15.IN919
-memory[910][1] => Mux23.IN919
-memory[910][2] => Mux14.IN919
-memory[910][2] => Mux22.IN919
-memory[910][3] => Mux13.IN919
-memory[910][3] => Mux21.IN919
-memory[910][4] => Mux12.IN919
-memory[910][4] => Mux20.IN919
-memory[910][5] => Mux11.IN919
-memory[910][5] => Mux19.IN919
-memory[910][6] => Mux10.IN919
-memory[910][6] => Mux18.IN919
-memory[910][7] => Mux9.IN919
-memory[910][7] => Mux17.IN919
-memory[909][0] => Mux16.IN918
-memory[909][0] => Mux24.IN918
-memory[909][1] => Mux15.IN918
-memory[909][1] => Mux23.IN918
-memory[909][2] => Mux14.IN918
-memory[909][2] => Mux22.IN918
-memory[909][3] => Mux13.IN918
-memory[909][3] => Mux21.IN918
-memory[909][4] => Mux12.IN918
-memory[909][4] => Mux20.IN918
-memory[909][5] => Mux11.IN918
-memory[909][5] => Mux19.IN918
-memory[909][6] => Mux10.IN918
-memory[909][6] => Mux18.IN918
-memory[909][7] => Mux9.IN918
-memory[909][7] => Mux17.IN918
-memory[908][0] => Mux16.IN917
-memory[908][0] => Mux24.IN917
-memory[908][1] => Mux15.IN917
-memory[908][1] => Mux23.IN917
-memory[908][2] => Mux14.IN917
-memory[908][2] => Mux22.IN917
-memory[908][3] => Mux13.IN917
-memory[908][3] => Mux21.IN917
-memory[908][4] => Mux12.IN917
-memory[908][4] => Mux20.IN917
-memory[908][5] => Mux11.IN917
-memory[908][5] => Mux19.IN917
-memory[908][6] => Mux10.IN917
-memory[908][6] => Mux18.IN917
-memory[908][7] => Mux9.IN917
-memory[908][7] => Mux17.IN917
-memory[907][0] => Mux16.IN916
-memory[907][0] => Mux24.IN916
-memory[907][1] => Mux15.IN916
-memory[907][1] => Mux23.IN916
-memory[907][2] => Mux14.IN916
-memory[907][2] => Mux22.IN916
-memory[907][3] => Mux13.IN916
-memory[907][3] => Mux21.IN916
-memory[907][4] => Mux12.IN916
-memory[907][4] => Mux20.IN916
-memory[907][5] => Mux11.IN916
-memory[907][5] => Mux19.IN916
-memory[907][6] => Mux10.IN916
-memory[907][6] => Mux18.IN916
-memory[907][7] => Mux9.IN916
-memory[907][7] => Mux17.IN916
-memory[906][0] => Mux16.IN915
-memory[906][0] => Mux24.IN915
-memory[906][1] => Mux15.IN915
-memory[906][1] => Mux23.IN915
-memory[906][2] => Mux14.IN915
-memory[906][2] => Mux22.IN915
-memory[906][3] => Mux13.IN915
-memory[906][3] => Mux21.IN915
-memory[906][4] => Mux12.IN915
-memory[906][4] => Mux20.IN915
-memory[906][5] => Mux11.IN915
-memory[906][5] => Mux19.IN915
-memory[906][6] => Mux10.IN915
-memory[906][6] => Mux18.IN915
-memory[906][7] => Mux9.IN915
-memory[906][7] => Mux17.IN915
-memory[905][0] => Mux16.IN914
-memory[905][0] => Mux24.IN914
-memory[905][1] => Mux15.IN914
-memory[905][1] => Mux23.IN914
-memory[905][2] => Mux14.IN914
-memory[905][2] => Mux22.IN914
-memory[905][3] => Mux13.IN914
-memory[905][3] => Mux21.IN914
-memory[905][4] => Mux12.IN914
-memory[905][4] => Mux20.IN914
-memory[905][5] => Mux11.IN914
-memory[905][5] => Mux19.IN914
-memory[905][6] => Mux10.IN914
-memory[905][6] => Mux18.IN914
-memory[905][7] => Mux9.IN914
-memory[905][7] => Mux17.IN914
-memory[904][0] => Mux16.IN913
-memory[904][0] => Mux24.IN913
-memory[904][1] => Mux15.IN913
-memory[904][1] => Mux23.IN913
-memory[904][2] => Mux14.IN913
-memory[904][2] => Mux22.IN913
-memory[904][3] => Mux13.IN913
-memory[904][3] => Mux21.IN913
-memory[904][4] => Mux12.IN913
-memory[904][4] => Mux20.IN913
-memory[904][5] => Mux11.IN913
-memory[904][5] => Mux19.IN913
-memory[904][6] => Mux10.IN913
-memory[904][6] => Mux18.IN913
-memory[904][7] => Mux9.IN913
-memory[904][7] => Mux17.IN913
-memory[903][0] => Mux16.IN912
-memory[903][0] => Mux24.IN912
-memory[903][1] => Mux15.IN912
-memory[903][1] => Mux23.IN912
-memory[903][2] => Mux14.IN912
-memory[903][2] => Mux22.IN912
-memory[903][3] => Mux13.IN912
-memory[903][3] => Mux21.IN912
-memory[903][4] => Mux12.IN912
-memory[903][4] => Mux20.IN912
-memory[903][5] => Mux11.IN912
-memory[903][5] => Mux19.IN912
-memory[903][6] => Mux10.IN912
-memory[903][6] => Mux18.IN912
-memory[903][7] => Mux9.IN912
-memory[903][7] => Mux17.IN912
-memory[902][0] => Mux16.IN911
-memory[902][0] => Mux24.IN911
-memory[902][1] => Mux15.IN911
-memory[902][1] => Mux23.IN911
-memory[902][2] => Mux14.IN911
-memory[902][2] => Mux22.IN911
-memory[902][3] => Mux13.IN911
-memory[902][3] => Mux21.IN911
-memory[902][4] => Mux12.IN911
-memory[902][4] => Mux20.IN911
-memory[902][5] => Mux11.IN911
-memory[902][5] => Mux19.IN911
-memory[902][6] => Mux10.IN911
-memory[902][6] => Mux18.IN911
-memory[902][7] => Mux9.IN911
-memory[902][7] => Mux17.IN911
-memory[901][0] => Mux16.IN910
-memory[901][0] => Mux24.IN910
-memory[901][1] => Mux15.IN910
-memory[901][1] => Mux23.IN910
-memory[901][2] => Mux14.IN910
-memory[901][2] => Mux22.IN910
-memory[901][3] => Mux13.IN910
-memory[901][3] => Mux21.IN910
-memory[901][4] => Mux12.IN910
-memory[901][4] => Mux20.IN910
-memory[901][5] => Mux11.IN910
-memory[901][5] => Mux19.IN910
-memory[901][6] => Mux10.IN910
-memory[901][6] => Mux18.IN910
-memory[901][7] => Mux9.IN910
-memory[901][7] => Mux17.IN910
-memory[900][0] => Mux16.IN909
-memory[900][0] => Mux24.IN909
-memory[900][1] => Mux15.IN909
-memory[900][1] => Mux23.IN909
-memory[900][2] => Mux14.IN909
-memory[900][2] => Mux22.IN909
-memory[900][3] => Mux13.IN909
-memory[900][3] => Mux21.IN909
-memory[900][4] => Mux12.IN909
-memory[900][4] => Mux20.IN909
-memory[900][5] => Mux11.IN909
-memory[900][5] => Mux19.IN909
-memory[900][6] => Mux10.IN909
-memory[900][6] => Mux18.IN909
-memory[900][7] => Mux9.IN909
-memory[900][7] => Mux17.IN909
-memory[899][0] => Mux16.IN908
-memory[899][0] => Mux24.IN908
-memory[899][1] => Mux15.IN908
-memory[899][1] => Mux23.IN908
-memory[899][2] => Mux14.IN908
-memory[899][2] => Mux22.IN908
-memory[899][3] => Mux13.IN908
-memory[899][3] => Mux21.IN908
-memory[899][4] => Mux12.IN908
-memory[899][4] => Mux20.IN908
-memory[899][5] => Mux11.IN908
-memory[899][5] => Mux19.IN908
-memory[899][6] => Mux10.IN908
-memory[899][6] => Mux18.IN908
-memory[899][7] => Mux9.IN908
-memory[899][7] => Mux17.IN908
-memory[898][0] => Mux16.IN907
-memory[898][0] => Mux24.IN907
-memory[898][1] => Mux15.IN907
-memory[898][1] => Mux23.IN907
-memory[898][2] => Mux14.IN907
-memory[898][2] => Mux22.IN907
-memory[898][3] => Mux13.IN907
-memory[898][3] => Mux21.IN907
-memory[898][4] => Mux12.IN907
-memory[898][4] => Mux20.IN907
-memory[898][5] => Mux11.IN907
-memory[898][5] => Mux19.IN907
-memory[898][6] => Mux10.IN907
-memory[898][6] => Mux18.IN907
-memory[898][7] => Mux9.IN907
-memory[898][7] => Mux17.IN907
-memory[897][0] => Mux16.IN906
-memory[897][0] => Mux24.IN906
-memory[897][1] => Mux15.IN906
-memory[897][1] => Mux23.IN906
-memory[897][2] => Mux14.IN906
-memory[897][2] => Mux22.IN906
-memory[897][3] => Mux13.IN906
-memory[897][3] => Mux21.IN906
-memory[897][4] => Mux12.IN906
-memory[897][4] => Mux20.IN906
-memory[897][5] => Mux11.IN906
-memory[897][5] => Mux19.IN906
-memory[897][6] => Mux10.IN906
-memory[897][6] => Mux18.IN906
-memory[897][7] => Mux9.IN906
-memory[897][7] => Mux17.IN906
-memory[896][0] => Mux16.IN905
-memory[896][0] => Mux24.IN905
-memory[896][1] => Mux15.IN905
-memory[896][1] => Mux23.IN905
-memory[896][2] => Mux14.IN905
-memory[896][2] => Mux22.IN905
-memory[896][3] => Mux13.IN905
-memory[896][3] => Mux21.IN905
-memory[896][4] => Mux12.IN905
-memory[896][4] => Mux20.IN905
-memory[896][5] => Mux11.IN905
-memory[896][5] => Mux19.IN905
-memory[896][6] => Mux10.IN905
-memory[896][6] => Mux18.IN905
-memory[896][7] => Mux9.IN905
-memory[896][7] => Mux17.IN905
-memory[895][0] => Mux16.IN904
-memory[895][0] => Mux24.IN904
-memory[895][1] => Mux15.IN904
-memory[895][1] => Mux23.IN904
-memory[895][2] => Mux14.IN904
-memory[895][2] => Mux22.IN904
-memory[895][3] => Mux13.IN904
-memory[895][3] => Mux21.IN904
-memory[895][4] => Mux12.IN904
-memory[895][4] => Mux20.IN904
-memory[895][5] => Mux11.IN904
-memory[895][5] => Mux19.IN904
-memory[895][6] => Mux10.IN904
-memory[895][6] => Mux18.IN904
-memory[895][7] => Mux9.IN904
-memory[895][7] => Mux17.IN904
-memory[894][0] => Mux16.IN903
-memory[894][0] => Mux24.IN903
-memory[894][1] => Mux15.IN903
-memory[894][1] => Mux23.IN903
-memory[894][2] => Mux14.IN903
-memory[894][2] => Mux22.IN903
-memory[894][3] => Mux13.IN903
-memory[894][3] => Mux21.IN903
-memory[894][4] => Mux12.IN903
-memory[894][4] => Mux20.IN903
-memory[894][5] => Mux11.IN903
-memory[894][5] => Mux19.IN903
-memory[894][6] => Mux10.IN903
-memory[894][6] => Mux18.IN903
-memory[894][7] => Mux9.IN903
-memory[894][7] => Mux17.IN903
-memory[893][0] => Mux16.IN902
-memory[893][0] => Mux24.IN902
-memory[893][1] => Mux15.IN902
-memory[893][1] => Mux23.IN902
-memory[893][2] => Mux14.IN902
-memory[893][2] => Mux22.IN902
-memory[893][3] => Mux13.IN902
-memory[893][3] => Mux21.IN902
-memory[893][4] => Mux12.IN902
-memory[893][4] => Mux20.IN902
-memory[893][5] => Mux11.IN902
-memory[893][5] => Mux19.IN902
-memory[893][6] => Mux10.IN902
-memory[893][6] => Mux18.IN902
-memory[893][7] => Mux9.IN902
-memory[893][7] => Mux17.IN902
-memory[892][0] => Mux16.IN901
-memory[892][0] => Mux24.IN901
-memory[892][1] => Mux15.IN901
-memory[892][1] => Mux23.IN901
-memory[892][2] => Mux14.IN901
-memory[892][2] => Mux22.IN901
-memory[892][3] => Mux13.IN901
-memory[892][3] => Mux21.IN901
-memory[892][4] => Mux12.IN901
-memory[892][4] => Mux20.IN901
-memory[892][5] => Mux11.IN901
-memory[892][5] => Mux19.IN901
-memory[892][6] => Mux10.IN901
-memory[892][6] => Mux18.IN901
-memory[892][7] => Mux9.IN901
-memory[892][7] => Mux17.IN901
-memory[891][0] => Mux16.IN900
-memory[891][0] => Mux24.IN900
-memory[891][1] => Mux15.IN900
-memory[891][1] => Mux23.IN900
-memory[891][2] => Mux14.IN900
-memory[891][2] => Mux22.IN900
-memory[891][3] => Mux13.IN900
-memory[891][3] => Mux21.IN900
-memory[891][4] => Mux12.IN900
-memory[891][4] => Mux20.IN900
-memory[891][5] => Mux11.IN900
-memory[891][5] => Mux19.IN900
-memory[891][6] => Mux10.IN900
-memory[891][6] => Mux18.IN900
-memory[891][7] => Mux9.IN900
-memory[891][7] => Mux17.IN900
-memory[890][0] => Mux16.IN899
-memory[890][0] => Mux24.IN899
-memory[890][1] => Mux15.IN899
-memory[890][1] => Mux23.IN899
-memory[890][2] => Mux14.IN899
-memory[890][2] => Mux22.IN899
-memory[890][3] => Mux13.IN899
-memory[890][3] => Mux21.IN899
-memory[890][4] => Mux12.IN899
-memory[890][4] => Mux20.IN899
-memory[890][5] => Mux11.IN899
-memory[890][5] => Mux19.IN899
-memory[890][6] => Mux10.IN899
-memory[890][6] => Mux18.IN899
-memory[890][7] => Mux9.IN899
-memory[890][7] => Mux17.IN899
-memory[889][0] => Mux16.IN898
-memory[889][0] => Mux24.IN898
-memory[889][1] => Mux15.IN898
-memory[889][1] => Mux23.IN898
-memory[889][2] => Mux14.IN898
-memory[889][2] => Mux22.IN898
-memory[889][3] => Mux13.IN898
-memory[889][3] => Mux21.IN898
-memory[889][4] => Mux12.IN898
-memory[889][4] => Mux20.IN898
-memory[889][5] => Mux11.IN898
-memory[889][5] => Mux19.IN898
-memory[889][6] => Mux10.IN898
-memory[889][6] => Mux18.IN898
-memory[889][7] => Mux9.IN898
-memory[889][7] => Mux17.IN898
-memory[888][0] => Mux16.IN897
-memory[888][0] => Mux24.IN897
-memory[888][1] => Mux15.IN897
-memory[888][1] => Mux23.IN897
-memory[888][2] => Mux14.IN897
-memory[888][2] => Mux22.IN897
-memory[888][3] => Mux13.IN897
-memory[888][3] => Mux21.IN897
-memory[888][4] => Mux12.IN897
-memory[888][4] => Mux20.IN897
-memory[888][5] => Mux11.IN897
-memory[888][5] => Mux19.IN897
-memory[888][6] => Mux10.IN897
-memory[888][6] => Mux18.IN897
-memory[888][7] => Mux9.IN897
-memory[888][7] => Mux17.IN897
-memory[887][0] => Mux16.IN896
-memory[887][0] => Mux24.IN896
-memory[887][1] => Mux15.IN896
-memory[887][1] => Mux23.IN896
-memory[887][2] => Mux14.IN896
-memory[887][2] => Mux22.IN896
-memory[887][3] => Mux13.IN896
-memory[887][3] => Mux21.IN896
-memory[887][4] => Mux12.IN896
-memory[887][4] => Mux20.IN896
-memory[887][5] => Mux11.IN896
-memory[887][5] => Mux19.IN896
-memory[887][6] => Mux10.IN896
-memory[887][6] => Mux18.IN896
-memory[887][7] => Mux9.IN896
-memory[887][7] => Mux17.IN896
-memory[886][0] => Mux16.IN895
-memory[886][0] => Mux24.IN895
-memory[886][1] => Mux15.IN895
-memory[886][1] => Mux23.IN895
-memory[886][2] => Mux14.IN895
-memory[886][2] => Mux22.IN895
-memory[886][3] => Mux13.IN895
-memory[886][3] => Mux21.IN895
-memory[886][4] => Mux12.IN895
-memory[886][4] => Mux20.IN895
-memory[886][5] => Mux11.IN895
-memory[886][5] => Mux19.IN895
-memory[886][6] => Mux10.IN895
-memory[886][6] => Mux18.IN895
-memory[886][7] => Mux9.IN895
-memory[886][7] => Mux17.IN895
-memory[885][0] => Mux16.IN894
-memory[885][0] => Mux24.IN894
-memory[885][1] => Mux15.IN894
-memory[885][1] => Mux23.IN894
-memory[885][2] => Mux14.IN894
-memory[885][2] => Mux22.IN894
-memory[885][3] => Mux13.IN894
-memory[885][3] => Mux21.IN894
-memory[885][4] => Mux12.IN894
-memory[885][4] => Mux20.IN894
-memory[885][5] => Mux11.IN894
-memory[885][5] => Mux19.IN894
-memory[885][6] => Mux10.IN894
-memory[885][6] => Mux18.IN894
-memory[885][7] => Mux9.IN894
-memory[885][7] => Mux17.IN894
-memory[884][0] => Mux16.IN893
-memory[884][0] => Mux24.IN893
-memory[884][1] => Mux15.IN893
-memory[884][1] => Mux23.IN893
-memory[884][2] => Mux14.IN893
-memory[884][2] => Mux22.IN893
-memory[884][3] => Mux13.IN893
-memory[884][3] => Mux21.IN893
-memory[884][4] => Mux12.IN893
-memory[884][4] => Mux20.IN893
-memory[884][5] => Mux11.IN893
-memory[884][5] => Mux19.IN893
-memory[884][6] => Mux10.IN893
-memory[884][6] => Mux18.IN893
-memory[884][7] => Mux9.IN893
-memory[884][7] => Mux17.IN893
-memory[883][0] => Mux16.IN892
-memory[883][0] => Mux24.IN892
-memory[883][1] => Mux15.IN892
-memory[883][1] => Mux23.IN892
-memory[883][2] => Mux14.IN892
-memory[883][2] => Mux22.IN892
-memory[883][3] => Mux13.IN892
-memory[883][3] => Mux21.IN892
-memory[883][4] => Mux12.IN892
-memory[883][4] => Mux20.IN892
-memory[883][5] => Mux11.IN892
-memory[883][5] => Mux19.IN892
-memory[883][6] => Mux10.IN892
-memory[883][6] => Mux18.IN892
-memory[883][7] => Mux9.IN892
-memory[883][7] => Mux17.IN892
-memory[882][0] => Mux16.IN891
-memory[882][0] => Mux24.IN891
-memory[882][1] => Mux15.IN891
-memory[882][1] => Mux23.IN891
-memory[882][2] => Mux14.IN891
-memory[882][2] => Mux22.IN891
-memory[882][3] => Mux13.IN891
-memory[882][3] => Mux21.IN891
-memory[882][4] => Mux12.IN891
-memory[882][4] => Mux20.IN891
-memory[882][5] => Mux11.IN891
-memory[882][5] => Mux19.IN891
-memory[882][6] => Mux10.IN891
-memory[882][6] => Mux18.IN891
-memory[882][7] => Mux9.IN891
-memory[882][7] => Mux17.IN891
-memory[881][0] => Mux16.IN890
-memory[881][0] => Mux24.IN890
-memory[881][1] => Mux15.IN890
-memory[881][1] => Mux23.IN890
-memory[881][2] => Mux14.IN890
-memory[881][2] => Mux22.IN890
-memory[881][3] => Mux13.IN890
-memory[881][3] => Mux21.IN890
-memory[881][4] => Mux12.IN890
-memory[881][4] => Mux20.IN890
-memory[881][5] => Mux11.IN890
-memory[881][5] => Mux19.IN890
-memory[881][6] => Mux10.IN890
-memory[881][6] => Mux18.IN890
-memory[881][7] => Mux9.IN890
-memory[881][7] => Mux17.IN890
-memory[880][0] => Mux16.IN889
-memory[880][0] => Mux24.IN889
-memory[880][1] => Mux15.IN889
-memory[880][1] => Mux23.IN889
-memory[880][2] => Mux14.IN889
-memory[880][2] => Mux22.IN889
-memory[880][3] => Mux13.IN889
-memory[880][3] => Mux21.IN889
-memory[880][4] => Mux12.IN889
-memory[880][4] => Mux20.IN889
-memory[880][5] => Mux11.IN889
-memory[880][5] => Mux19.IN889
-memory[880][6] => Mux10.IN889
-memory[880][6] => Mux18.IN889
-memory[880][7] => Mux9.IN889
-memory[880][7] => Mux17.IN889
-memory[879][0] => Mux16.IN888
-memory[879][0] => Mux24.IN888
-memory[879][1] => Mux15.IN888
-memory[879][1] => Mux23.IN888
-memory[879][2] => Mux14.IN888
-memory[879][2] => Mux22.IN888
-memory[879][3] => Mux13.IN888
-memory[879][3] => Mux21.IN888
-memory[879][4] => Mux12.IN888
-memory[879][4] => Mux20.IN888
-memory[879][5] => Mux11.IN888
-memory[879][5] => Mux19.IN888
-memory[879][6] => Mux10.IN888
-memory[879][6] => Mux18.IN888
-memory[879][7] => Mux9.IN888
-memory[879][7] => Mux17.IN888
-memory[878][0] => Mux16.IN887
-memory[878][0] => Mux24.IN887
-memory[878][1] => Mux15.IN887
-memory[878][1] => Mux23.IN887
-memory[878][2] => Mux14.IN887
-memory[878][2] => Mux22.IN887
-memory[878][3] => Mux13.IN887
-memory[878][3] => Mux21.IN887
-memory[878][4] => Mux12.IN887
-memory[878][4] => Mux20.IN887
-memory[878][5] => Mux11.IN887
-memory[878][5] => Mux19.IN887
-memory[878][6] => Mux10.IN887
-memory[878][6] => Mux18.IN887
-memory[878][7] => Mux9.IN887
-memory[878][7] => Mux17.IN887
-memory[877][0] => Mux16.IN886
-memory[877][0] => Mux24.IN886
-memory[877][1] => Mux15.IN886
-memory[877][1] => Mux23.IN886
-memory[877][2] => Mux14.IN886
-memory[877][2] => Mux22.IN886
-memory[877][3] => Mux13.IN886
-memory[877][3] => Mux21.IN886
-memory[877][4] => Mux12.IN886
-memory[877][4] => Mux20.IN886
-memory[877][5] => Mux11.IN886
-memory[877][5] => Mux19.IN886
-memory[877][6] => Mux10.IN886
-memory[877][6] => Mux18.IN886
-memory[877][7] => Mux9.IN886
-memory[877][7] => Mux17.IN886
-memory[876][0] => Mux16.IN885
-memory[876][0] => Mux24.IN885
-memory[876][1] => Mux15.IN885
-memory[876][1] => Mux23.IN885
-memory[876][2] => Mux14.IN885
-memory[876][2] => Mux22.IN885
-memory[876][3] => Mux13.IN885
-memory[876][3] => Mux21.IN885
-memory[876][4] => Mux12.IN885
-memory[876][4] => Mux20.IN885
-memory[876][5] => Mux11.IN885
-memory[876][5] => Mux19.IN885
-memory[876][6] => Mux10.IN885
-memory[876][6] => Mux18.IN885
-memory[876][7] => Mux9.IN885
-memory[876][7] => Mux17.IN885
-memory[875][0] => Mux16.IN884
-memory[875][0] => Mux24.IN884
-memory[875][1] => Mux15.IN884
-memory[875][1] => Mux23.IN884
-memory[875][2] => Mux14.IN884
-memory[875][2] => Mux22.IN884
-memory[875][3] => Mux13.IN884
-memory[875][3] => Mux21.IN884
-memory[875][4] => Mux12.IN884
-memory[875][4] => Mux20.IN884
-memory[875][5] => Mux11.IN884
-memory[875][5] => Mux19.IN884
-memory[875][6] => Mux10.IN884
-memory[875][6] => Mux18.IN884
-memory[875][7] => Mux9.IN884
-memory[875][7] => Mux17.IN884
-memory[874][0] => Mux16.IN883
-memory[874][0] => Mux24.IN883
-memory[874][1] => Mux15.IN883
-memory[874][1] => Mux23.IN883
-memory[874][2] => Mux14.IN883
-memory[874][2] => Mux22.IN883
-memory[874][3] => Mux13.IN883
-memory[874][3] => Mux21.IN883
-memory[874][4] => Mux12.IN883
-memory[874][4] => Mux20.IN883
-memory[874][5] => Mux11.IN883
-memory[874][5] => Mux19.IN883
-memory[874][6] => Mux10.IN883
-memory[874][6] => Mux18.IN883
-memory[874][7] => Mux9.IN883
-memory[874][7] => Mux17.IN883
-memory[873][0] => Mux16.IN882
-memory[873][0] => Mux24.IN882
-memory[873][1] => Mux15.IN882
-memory[873][1] => Mux23.IN882
-memory[873][2] => Mux14.IN882
-memory[873][2] => Mux22.IN882
-memory[873][3] => Mux13.IN882
-memory[873][3] => Mux21.IN882
-memory[873][4] => Mux12.IN882
-memory[873][4] => Mux20.IN882
-memory[873][5] => Mux11.IN882
-memory[873][5] => Mux19.IN882
-memory[873][6] => Mux10.IN882
-memory[873][6] => Mux18.IN882
-memory[873][7] => Mux9.IN882
-memory[873][7] => Mux17.IN882
-memory[872][0] => Mux16.IN881
-memory[872][0] => Mux24.IN881
-memory[872][1] => Mux15.IN881
-memory[872][1] => Mux23.IN881
-memory[872][2] => Mux14.IN881
-memory[872][2] => Mux22.IN881
-memory[872][3] => Mux13.IN881
-memory[872][3] => Mux21.IN881
-memory[872][4] => Mux12.IN881
-memory[872][4] => Mux20.IN881
-memory[872][5] => Mux11.IN881
-memory[872][5] => Mux19.IN881
-memory[872][6] => Mux10.IN881
-memory[872][6] => Mux18.IN881
-memory[872][7] => Mux9.IN881
-memory[872][7] => Mux17.IN881
-memory[871][0] => Mux16.IN880
-memory[871][0] => Mux24.IN880
-memory[871][1] => Mux15.IN880
-memory[871][1] => Mux23.IN880
-memory[871][2] => Mux14.IN880
-memory[871][2] => Mux22.IN880
-memory[871][3] => Mux13.IN880
-memory[871][3] => Mux21.IN880
-memory[871][4] => Mux12.IN880
-memory[871][4] => Mux20.IN880
-memory[871][5] => Mux11.IN880
-memory[871][5] => Mux19.IN880
-memory[871][6] => Mux10.IN880
-memory[871][6] => Mux18.IN880
-memory[871][7] => Mux9.IN880
-memory[871][7] => Mux17.IN880
-memory[870][0] => Mux16.IN879
-memory[870][0] => Mux24.IN879
-memory[870][1] => Mux15.IN879
-memory[870][1] => Mux23.IN879
-memory[870][2] => Mux14.IN879
-memory[870][2] => Mux22.IN879
-memory[870][3] => Mux13.IN879
-memory[870][3] => Mux21.IN879
-memory[870][4] => Mux12.IN879
-memory[870][4] => Mux20.IN879
-memory[870][5] => Mux11.IN879
-memory[870][5] => Mux19.IN879
-memory[870][6] => Mux10.IN879
-memory[870][6] => Mux18.IN879
-memory[870][7] => Mux9.IN879
-memory[870][7] => Mux17.IN879
-memory[869][0] => Mux16.IN878
-memory[869][0] => Mux24.IN878
-memory[869][1] => Mux15.IN878
-memory[869][1] => Mux23.IN878
-memory[869][2] => Mux14.IN878
-memory[869][2] => Mux22.IN878
-memory[869][3] => Mux13.IN878
-memory[869][3] => Mux21.IN878
-memory[869][4] => Mux12.IN878
-memory[869][4] => Mux20.IN878
-memory[869][5] => Mux11.IN878
-memory[869][5] => Mux19.IN878
-memory[869][6] => Mux10.IN878
-memory[869][6] => Mux18.IN878
-memory[869][7] => Mux9.IN878
-memory[869][7] => Mux17.IN878
-memory[868][0] => Mux16.IN877
-memory[868][0] => Mux24.IN877
-memory[868][1] => Mux15.IN877
-memory[868][1] => Mux23.IN877
-memory[868][2] => Mux14.IN877
-memory[868][2] => Mux22.IN877
-memory[868][3] => Mux13.IN877
-memory[868][3] => Mux21.IN877
-memory[868][4] => Mux12.IN877
-memory[868][4] => Mux20.IN877
-memory[868][5] => Mux11.IN877
-memory[868][5] => Mux19.IN877
-memory[868][6] => Mux10.IN877
-memory[868][6] => Mux18.IN877
-memory[868][7] => Mux9.IN877
-memory[868][7] => Mux17.IN877
-memory[867][0] => Mux16.IN876
-memory[867][0] => Mux24.IN876
-memory[867][1] => Mux15.IN876
-memory[867][1] => Mux23.IN876
-memory[867][2] => Mux14.IN876
-memory[867][2] => Mux22.IN876
-memory[867][3] => Mux13.IN876
-memory[867][3] => Mux21.IN876
-memory[867][4] => Mux12.IN876
-memory[867][4] => Mux20.IN876
-memory[867][5] => Mux11.IN876
-memory[867][5] => Mux19.IN876
-memory[867][6] => Mux10.IN876
-memory[867][6] => Mux18.IN876
-memory[867][7] => Mux9.IN876
-memory[867][7] => Mux17.IN876
-memory[866][0] => Mux16.IN875
-memory[866][0] => Mux24.IN875
-memory[866][1] => Mux15.IN875
-memory[866][1] => Mux23.IN875
-memory[866][2] => Mux14.IN875
-memory[866][2] => Mux22.IN875
-memory[866][3] => Mux13.IN875
-memory[866][3] => Mux21.IN875
-memory[866][4] => Mux12.IN875
-memory[866][4] => Mux20.IN875
-memory[866][5] => Mux11.IN875
-memory[866][5] => Mux19.IN875
-memory[866][6] => Mux10.IN875
-memory[866][6] => Mux18.IN875
-memory[866][7] => Mux9.IN875
-memory[866][7] => Mux17.IN875
-memory[865][0] => Mux16.IN874
-memory[865][0] => Mux24.IN874
-memory[865][1] => Mux15.IN874
-memory[865][1] => Mux23.IN874
-memory[865][2] => Mux14.IN874
-memory[865][2] => Mux22.IN874
-memory[865][3] => Mux13.IN874
-memory[865][3] => Mux21.IN874
-memory[865][4] => Mux12.IN874
-memory[865][4] => Mux20.IN874
-memory[865][5] => Mux11.IN874
-memory[865][5] => Mux19.IN874
-memory[865][6] => Mux10.IN874
-memory[865][6] => Mux18.IN874
-memory[865][7] => Mux9.IN874
-memory[865][7] => Mux17.IN874
-memory[864][0] => Mux16.IN873
-memory[864][0] => Mux24.IN873
-memory[864][1] => Mux15.IN873
-memory[864][1] => Mux23.IN873
-memory[864][2] => Mux14.IN873
-memory[864][2] => Mux22.IN873
-memory[864][3] => Mux13.IN873
-memory[864][3] => Mux21.IN873
-memory[864][4] => Mux12.IN873
-memory[864][4] => Mux20.IN873
-memory[864][5] => Mux11.IN873
-memory[864][5] => Mux19.IN873
-memory[864][6] => Mux10.IN873
-memory[864][6] => Mux18.IN873
-memory[864][7] => Mux9.IN873
-memory[864][7] => Mux17.IN873
-memory[863][0] => Mux16.IN872
-memory[863][0] => Mux24.IN872
-memory[863][1] => Mux15.IN872
-memory[863][1] => Mux23.IN872
-memory[863][2] => Mux14.IN872
-memory[863][2] => Mux22.IN872
-memory[863][3] => Mux13.IN872
-memory[863][3] => Mux21.IN872
-memory[863][4] => Mux12.IN872
-memory[863][4] => Mux20.IN872
-memory[863][5] => Mux11.IN872
-memory[863][5] => Mux19.IN872
-memory[863][6] => Mux10.IN872
-memory[863][6] => Mux18.IN872
-memory[863][7] => Mux9.IN872
-memory[863][7] => Mux17.IN872
-memory[862][0] => Mux16.IN871
-memory[862][0] => Mux24.IN871
-memory[862][1] => Mux15.IN871
-memory[862][1] => Mux23.IN871
-memory[862][2] => Mux14.IN871
-memory[862][2] => Mux22.IN871
-memory[862][3] => Mux13.IN871
-memory[862][3] => Mux21.IN871
-memory[862][4] => Mux12.IN871
-memory[862][4] => Mux20.IN871
-memory[862][5] => Mux11.IN871
-memory[862][5] => Mux19.IN871
-memory[862][6] => Mux10.IN871
-memory[862][6] => Mux18.IN871
-memory[862][7] => Mux9.IN871
-memory[862][7] => Mux17.IN871
-memory[861][0] => Mux16.IN870
-memory[861][0] => Mux24.IN870
-memory[861][1] => Mux15.IN870
-memory[861][1] => Mux23.IN870
-memory[861][2] => Mux14.IN870
-memory[861][2] => Mux22.IN870
-memory[861][3] => Mux13.IN870
-memory[861][3] => Mux21.IN870
-memory[861][4] => Mux12.IN870
-memory[861][4] => Mux20.IN870
-memory[861][5] => Mux11.IN870
-memory[861][5] => Mux19.IN870
-memory[861][6] => Mux10.IN870
-memory[861][6] => Mux18.IN870
-memory[861][7] => Mux9.IN870
-memory[861][7] => Mux17.IN870
-memory[860][0] => Mux16.IN869
-memory[860][0] => Mux24.IN869
-memory[860][1] => Mux15.IN869
-memory[860][1] => Mux23.IN869
-memory[860][2] => Mux14.IN869
-memory[860][2] => Mux22.IN869
-memory[860][3] => Mux13.IN869
-memory[860][3] => Mux21.IN869
-memory[860][4] => Mux12.IN869
-memory[860][4] => Mux20.IN869
-memory[860][5] => Mux11.IN869
-memory[860][5] => Mux19.IN869
-memory[860][6] => Mux10.IN869
-memory[860][6] => Mux18.IN869
-memory[860][7] => Mux9.IN869
-memory[860][7] => Mux17.IN869
-memory[859][0] => Mux16.IN868
-memory[859][0] => Mux24.IN868
-memory[859][1] => Mux15.IN868
-memory[859][1] => Mux23.IN868
-memory[859][2] => Mux14.IN868
-memory[859][2] => Mux22.IN868
-memory[859][3] => Mux13.IN868
-memory[859][3] => Mux21.IN868
-memory[859][4] => Mux12.IN868
-memory[859][4] => Mux20.IN868
-memory[859][5] => Mux11.IN868
-memory[859][5] => Mux19.IN868
-memory[859][6] => Mux10.IN868
-memory[859][6] => Mux18.IN868
-memory[859][7] => Mux9.IN868
-memory[859][7] => Mux17.IN868
-memory[858][0] => Mux16.IN867
-memory[858][0] => Mux24.IN867
-memory[858][1] => Mux15.IN867
-memory[858][1] => Mux23.IN867
-memory[858][2] => Mux14.IN867
-memory[858][2] => Mux22.IN867
-memory[858][3] => Mux13.IN867
-memory[858][3] => Mux21.IN867
-memory[858][4] => Mux12.IN867
-memory[858][4] => Mux20.IN867
-memory[858][5] => Mux11.IN867
-memory[858][5] => Mux19.IN867
-memory[858][6] => Mux10.IN867
-memory[858][6] => Mux18.IN867
-memory[858][7] => Mux9.IN867
-memory[858][7] => Mux17.IN867
-memory[857][0] => Mux16.IN866
-memory[857][0] => Mux24.IN866
-memory[857][1] => Mux15.IN866
-memory[857][1] => Mux23.IN866
-memory[857][2] => Mux14.IN866
-memory[857][2] => Mux22.IN866
-memory[857][3] => Mux13.IN866
-memory[857][3] => Mux21.IN866
-memory[857][4] => Mux12.IN866
-memory[857][4] => Mux20.IN866
-memory[857][5] => Mux11.IN866
-memory[857][5] => Mux19.IN866
-memory[857][6] => Mux10.IN866
-memory[857][6] => Mux18.IN866
-memory[857][7] => Mux9.IN866
-memory[857][7] => Mux17.IN866
-memory[856][0] => Mux16.IN865
-memory[856][0] => Mux24.IN865
-memory[856][1] => Mux15.IN865
-memory[856][1] => Mux23.IN865
-memory[856][2] => Mux14.IN865
-memory[856][2] => Mux22.IN865
-memory[856][3] => Mux13.IN865
-memory[856][3] => Mux21.IN865
-memory[856][4] => Mux12.IN865
-memory[856][4] => Mux20.IN865
-memory[856][5] => Mux11.IN865
-memory[856][5] => Mux19.IN865
-memory[856][6] => Mux10.IN865
-memory[856][6] => Mux18.IN865
-memory[856][7] => Mux9.IN865
-memory[856][7] => Mux17.IN865
-memory[855][0] => Mux16.IN864
-memory[855][0] => Mux24.IN864
-memory[855][1] => Mux15.IN864
-memory[855][1] => Mux23.IN864
-memory[855][2] => Mux14.IN864
-memory[855][2] => Mux22.IN864
-memory[855][3] => Mux13.IN864
-memory[855][3] => Mux21.IN864
-memory[855][4] => Mux12.IN864
-memory[855][4] => Mux20.IN864
-memory[855][5] => Mux11.IN864
-memory[855][5] => Mux19.IN864
-memory[855][6] => Mux10.IN864
-memory[855][6] => Mux18.IN864
-memory[855][7] => Mux9.IN864
-memory[855][7] => Mux17.IN864
-memory[854][0] => Mux16.IN863
-memory[854][0] => Mux24.IN863
-memory[854][1] => Mux15.IN863
-memory[854][1] => Mux23.IN863
-memory[854][2] => Mux14.IN863
-memory[854][2] => Mux22.IN863
-memory[854][3] => Mux13.IN863
-memory[854][3] => Mux21.IN863
-memory[854][4] => Mux12.IN863
-memory[854][4] => Mux20.IN863
-memory[854][5] => Mux11.IN863
-memory[854][5] => Mux19.IN863
-memory[854][6] => Mux10.IN863
-memory[854][6] => Mux18.IN863
-memory[854][7] => Mux9.IN863
-memory[854][7] => Mux17.IN863
-memory[853][0] => Mux16.IN862
-memory[853][0] => Mux24.IN862
-memory[853][1] => Mux15.IN862
-memory[853][1] => Mux23.IN862
-memory[853][2] => Mux14.IN862
-memory[853][2] => Mux22.IN862
-memory[853][3] => Mux13.IN862
-memory[853][3] => Mux21.IN862
-memory[853][4] => Mux12.IN862
-memory[853][4] => Mux20.IN862
-memory[853][5] => Mux11.IN862
-memory[853][5] => Mux19.IN862
-memory[853][6] => Mux10.IN862
-memory[853][6] => Mux18.IN862
-memory[853][7] => Mux9.IN862
-memory[853][7] => Mux17.IN862
-memory[852][0] => Mux16.IN861
-memory[852][0] => Mux24.IN861
-memory[852][1] => Mux15.IN861
-memory[852][1] => Mux23.IN861
-memory[852][2] => Mux14.IN861
-memory[852][2] => Mux22.IN861
-memory[852][3] => Mux13.IN861
-memory[852][3] => Mux21.IN861
-memory[852][4] => Mux12.IN861
-memory[852][4] => Mux20.IN861
-memory[852][5] => Mux11.IN861
-memory[852][5] => Mux19.IN861
-memory[852][6] => Mux10.IN861
-memory[852][6] => Mux18.IN861
-memory[852][7] => Mux9.IN861
-memory[852][7] => Mux17.IN861
-memory[851][0] => Mux16.IN860
-memory[851][0] => Mux24.IN860
-memory[851][1] => Mux15.IN860
-memory[851][1] => Mux23.IN860
-memory[851][2] => Mux14.IN860
-memory[851][2] => Mux22.IN860
-memory[851][3] => Mux13.IN860
-memory[851][3] => Mux21.IN860
-memory[851][4] => Mux12.IN860
-memory[851][4] => Mux20.IN860
-memory[851][5] => Mux11.IN860
-memory[851][5] => Mux19.IN860
-memory[851][6] => Mux10.IN860
-memory[851][6] => Mux18.IN860
-memory[851][7] => Mux9.IN860
-memory[851][7] => Mux17.IN860
-memory[850][0] => Mux16.IN859
-memory[850][0] => Mux24.IN859
-memory[850][1] => Mux15.IN859
-memory[850][1] => Mux23.IN859
-memory[850][2] => Mux14.IN859
-memory[850][2] => Mux22.IN859
-memory[850][3] => Mux13.IN859
-memory[850][3] => Mux21.IN859
-memory[850][4] => Mux12.IN859
-memory[850][4] => Mux20.IN859
-memory[850][5] => Mux11.IN859
-memory[850][5] => Mux19.IN859
-memory[850][6] => Mux10.IN859
-memory[850][6] => Mux18.IN859
-memory[850][7] => Mux9.IN859
-memory[850][7] => Mux17.IN859
-memory[849][0] => Mux16.IN858
-memory[849][0] => Mux24.IN858
-memory[849][1] => Mux15.IN858
-memory[849][1] => Mux23.IN858
-memory[849][2] => Mux14.IN858
-memory[849][2] => Mux22.IN858
-memory[849][3] => Mux13.IN858
-memory[849][3] => Mux21.IN858
-memory[849][4] => Mux12.IN858
-memory[849][4] => Mux20.IN858
-memory[849][5] => Mux11.IN858
-memory[849][5] => Mux19.IN858
-memory[849][6] => Mux10.IN858
-memory[849][6] => Mux18.IN858
-memory[849][7] => Mux9.IN858
-memory[849][7] => Mux17.IN858
-memory[848][0] => Mux16.IN857
-memory[848][0] => Mux24.IN857
-memory[848][1] => Mux15.IN857
-memory[848][1] => Mux23.IN857
-memory[848][2] => Mux14.IN857
-memory[848][2] => Mux22.IN857
-memory[848][3] => Mux13.IN857
-memory[848][3] => Mux21.IN857
-memory[848][4] => Mux12.IN857
-memory[848][4] => Mux20.IN857
-memory[848][5] => Mux11.IN857
-memory[848][5] => Mux19.IN857
-memory[848][6] => Mux10.IN857
-memory[848][6] => Mux18.IN857
-memory[848][7] => Mux9.IN857
-memory[848][7] => Mux17.IN857
-memory[847][0] => Mux16.IN856
-memory[847][0] => Mux24.IN856
-memory[847][1] => Mux15.IN856
-memory[847][1] => Mux23.IN856
-memory[847][2] => Mux14.IN856
-memory[847][2] => Mux22.IN856
-memory[847][3] => Mux13.IN856
-memory[847][3] => Mux21.IN856
-memory[847][4] => Mux12.IN856
-memory[847][4] => Mux20.IN856
-memory[847][5] => Mux11.IN856
-memory[847][5] => Mux19.IN856
-memory[847][6] => Mux10.IN856
-memory[847][6] => Mux18.IN856
-memory[847][7] => Mux9.IN856
-memory[847][7] => Mux17.IN856
-memory[846][0] => Mux16.IN855
-memory[846][0] => Mux24.IN855
-memory[846][1] => Mux15.IN855
-memory[846][1] => Mux23.IN855
-memory[846][2] => Mux14.IN855
-memory[846][2] => Mux22.IN855
-memory[846][3] => Mux13.IN855
-memory[846][3] => Mux21.IN855
-memory[846][4] => Mux12.IN855
-memory[846][4] => Mux20.IN855
-memory[846][5] => Mux11.IN855
-memory[846][5] => Mux19.IN855
-memory[846][6] => Mux10.IN855
-memory[846][6] => Mux18.IN855
-memory[846][7] => Mux9.IN855
-memory[846][7] => Mux17.IN855
-memory[845][0] => Mux16.IN854
-memory[845][0] => Mux24.IN854
-memory[845][1] => Mux15.IN854
-memory[845][1] => Mux23.IN854
-memory[845][2] => Mux14.IN854
-memory[845][2] => Mux22.IN854
-memory[845][3] => Mux13.IN854
-memory[845][3] => Mux21.IN854
-memory[845][4] => Mux12.IN854
-memory[845][4] => Mux20.IN854
-memory[845][5] => Mux11.IN854
-memory[845][5] => Mux19.IN854
-memory[845][6] => Mux10.IN854
-memory[845][6] => Mux18.IN854
-memory[845][7] => Mux9.IN854
-memory[845][7] => Mux17.IN854
-memory[844][0] => Mux16.IN853
-memory[844][0] => Mux24.IN853
-memory[844][1] => Mux15.IN853
-memory[844][1] => Mux23.IN853
-memory[844][2] => Mux14.IN853
-memory[844][2] => Mux22.IN853
-memory[844][3] => Mux13.IN853
-memory[844][3] => Mux21.IN853
-memory[844][4] => Mux12.IN853
-memory[844][4] => Mux20.IN853
-memory[844][5] => Mux11.IN853
-memory[844][5] => Mux19.IN853
-memory[844][6] => Mux10.IN853
-memory[844][6] => Mux18.IN853
-memory[844][7] => Mux9.IN853
-memory[844][7] => Mux17.IN853
-memory[843][0] => Mux16.IN852
-memory[843][0] => Mux24.IN852
-memory[843][1] => Mux15.IN852
-memory[843][1] => Mux23.IN852
-memory[843][2] => Mux14.IN852
-memory[843][2] => Mux22.IN852
-memory[843][3] => Mux13.IN852
-memory[843][3] => Mux21.IN852
-memory[843][4] => Mux12.IN852
-memory[843][4] => Mux20.IN852
-memory[843][5] => Mux11.IN852
-memory[843][5] => Mux19.IN852
-memory[843][6] => Mux10.IN852
-memory[843][6] => Mux18.IN852
-memory[843][7] => Mux9.IN852
-memory[843][7] => Mux17.IN852
-memory[842][0] => Mux16.IN851
-memory[842][0] => Mux24.IN851
-memory[842][1] => Mux15.IN851
-memory[842][1] => Mux23.IN851
-memory[842][2] => Mux14.IN851
-memory[842][2] => Mux22.IN851
-memory[842][3] => Mux13.IN851
-memory[842][3] => Mux21.IN851
-memory[842][4] => Mux12.IN851
-memory[842][4] => Mux20.IN851
-memory[842][5] => Mux11.IN851
-memory[842][5] => Mux19.IN851
-memory[842][6] => Mux10.IN851
-memory[842][6] => Mux18.IN851
-memory[842][7] => Mux9.IN851
-memory[842][7] => Mux17.IN851
-memory[841][0] => Mux16.IN850
-memory[841][0] => Mux24.IN850
-memory[841][1] => Mux15.IN850
-memory[841][1] => Mux23.IN850
-memory[841][2] => Mux14.IN850
-memory[841][2] => Mux22.IN850
-memory[841][3] => Mux13.IN850
-memory[841][3] => Mux21.IN850
-memory[841][4] => Mux12.IN850
-memory[841][4] => Mux20.IN850
-memory[841][5] => Mux11.IN850
-memory[841][5] => Mux19.IN850
-memory[841][6] => Mux10.IN850
-memory[841][6] => Mux18.IN850
-memory[841][7] => Mux9.IN850
-memory[841][7] => Mux17.IN850
-memory[840][0] => Mux16.IN849
-memory[840][0] => Mux24.IN849
-memory[840][1] => Mux15.IN849
-memory[840][1] => Mux23.IN849
-memory[840][2] => Mux14.IN849
-memory[840][2] => Mux22.IN849
-memory[840][3] => Mux13.IN849
-memory[840][3] => Mux21.IN849
-memory[840][4] => Mux12.IN849
-memory[840][4] => Mux20.IN849
-memory[840][5] => Mux11.IN849
-memory[840][5] => Mux19.IN849
-memory[840][6] => Mux10.IN849
-memory[840][6] => Mux18.IN849
-memory[840][7] => Mux9.IN849
-memory[840][7] => Mux17.IN849
-memory[839][0] => Mux16.IN848
-memory[839][0] => Mux24.IN848
-memory[839][1] => Mux15.IN848
-memory[839][1] => Mux23.IN848
-memory[839][2] => Mux14.IN848
-memory[839][2] => Mux22.IN848
-memory[839][3] => Mux13.IN848
-memory[839][3] => Mux21.IN848
-memory[839][4] => Mux12.IN848
-memory[839][4] => Mux20.IN848
-memory[839][5] => Mux11.IN848
-memory[839][5] => Mux19.IN848
-memory[839][6] => Mux10.IN848
-memory[839][6] => Mux18.IN848
-memory[839][7] => Mux9.IN848
-memory[839][7] => Mux17.IN848
-memory[838][0] => Mux16.IN847
-memory[838][0] => Mux24.IN847
-memory[838][1] => Mux15.IN847
-memory[838][1] => Mux23.IN847
-memory[838][2] => Mux14.IN847
-memory[838][2] => Mux22.IN847
-memory[838][3] => Mux13.IN847
-memory[838][3] => Mux21.IN847
-memory[838][4] => Mux12.IN847
-memory[838][4] => Mux20.IN847
-memory[838][5] => Mux11.IN847
-memory[838][5] => Mux19.IN847
-memory[838][6] => Mux10.IN847
-memory[838][6] => Mux18.IN847
-memory[838][7] => Mux9.IN847
-memory[838][7] => Mux17.IN847
-memory[837][0] => Mux16.IN846
-memory[837][0] => Mux24.IN846
-memory[837][1] => Mux15.IN846
-memory[837][1] => Mux23.IN846
-memory[837][2] => Mux14.IN846
-memory[837][2] => Mux22.IN846
-memory[837][3] => Mux13.IN846
-memory[837][3] => Mux21.IN846
-memory[837][4] => Mux12.IN846
-memory[837][4] => Mux20.IN846
-memory[837][5] => Mux11.IN846
-memory[837][5] => Mux19.IN846
-memory[837][6] => Mux10.IN846
-memory[837][6] => Mux18.IN846
-memory[837][7] => Mux9.IN846
-memory[837][7] => Mux17.IN846
-memory[836][0] => Mux16.IN845
-memory[836][0] => Mux24.IN845
-memory[836][1] => Mux15.IN845
-memory[836][1] => Mux23.IN845
-memory[836][2] => Mux14.IN845
-memory[836][2] => Mux22.IN845
-memory[836][3] => Mux13.IN845
-memory[836][3] => Mux21.IN845
-memory[836][4] => Mux12.IN845
-memory[836][4] => Mux20.IN845
-memory[836][5] => Mux11.IN845
-memory[836][5] => Mux19.IN845
-memory[836][6] => Mux10.IN845
-memory[836][6] => Mux18.IN845
-memory[836][7] => Mux9.IN845
-memory[836][7] => Mux17.IN845
-memory[835][0] => Mux16.IN844
-memory[835][0] => Mux24.IN844
-memory[835][1] => Mux15.IN844
-memory[835][1] => Mux23.IN844
-memory[835][2] => Mux14.IN844
-memory[835][2] => Mux22.IN844
-memory[835][3] => Mux13.IN844
-memory[835][3] => Mux21.IN844
-memory[835][4] => Mux12.IN844
-memory[835][4] => Mux20.IN844
-memory[835][5] => Mux11.IN844
-memory[835][5] => Mux19.IN844
-memory[835][6] => Mux10.IN844
-memory[835][6] => Mux18.IN844
-memory[835][7] => Mux9.IN844
-memory[835][7] => Mux17.IN844
-memory[834][0] => Mux16.IN843
-memory[834][0] => Mux24.IN843
-memory[834][1] => Mux15.IN843
-memory[834][1] => Mux23.IN843
-memory[834][2] => Mux14.IN843
-memory[834][2] => Mux22.IN843
-memory[834][3] => Mux13.IN843
-memory[834][3] => Mux21.IN843
-memory[834][4] => Mux12.IN843
-memory[834][4] => Mux20.IN843
-memory[834][5] => Mux11.IN843
-memory[834][5] => Mux19.IN843
-memory[834][6] => Mux10.IN843
-memory[834][6] => Mux18.IN843
-memory[834][7] => Mux9.IN843
-memory[834][7] => Mux17.IN843
-memory[833][0] => Mux16.IN842
-memory[833][0] => Mux24.IN842
-memory[833][1] => Mux15.IN842
-memory[833][1] => Mux23.IN842
-memory[833][2] => Mux14.IN842
-memory[833][2] => Mux22.IN842
-memory[833][3] => Mux13.IN842
-memory[833][3] => Mux21.IN842
-memory[833][4] => Mux12.IN842
-memory[833][4] => Mux20.IN842
-memory[833][5] => Mux11.IN842
-memory[833][5] => Mux19.IN842
-memory[833][6] => Mux10.IN842
-memory[833][6] => Mux18.IN842
-memory[833][7] => Mux9.IN842
-memory[833][7] => Mux17.IN842
-memory[832][0] => Mux16.IN841
-memory[832][0] => Mux24.IN841
-memory[832][1] => Mux15.IN841
-memory[832][1] => Mux23.IN841
-memory[832][2] => Mux14.IN841
-memory[832][2] => Mux22.IN841
-memory[832][3] => Mux13.IN841
-memory[832][3] => Mux21.IN841
-memory[832][4] => Mux12.IN841
-memory[832][4] => Mux20.IN841
-memory[832][5] => Mux11.IN841
-memory[832][5] => Mux19.IN841
-memory[832][6] => Mux10.IN841
-memory[832][6] => Mux18.IN841
-memory[832][7] => Mux9.IN841
-memory[832][7] => Mux17.IN841
-memory[831][0] => Mux16.IN840
-memory[831][0] => Mux24.IN840
-memory[831][1] => Mux15.IN840
-memory[831][1] => Mux23.IN840
-memory[831][2] => Mux14.IN840
-memory[831][2] => Mux22.IN840
-memory[831][3] => Mux13.IN840
-memory[831][3] => Mux21.IN840
-memory[831][4] => Mux12.IN840
-memory[831][4] => Mux20.IN840
-memory[831][5] => Mux11.IN840
-memory[831][5] => Mux19.IN840
-memory[831][6] => Mux10.IN840
-memory[831][6] => Mux18.IN840
-memory[831][7] => Mux9.IN840
-memory[831][7] => Mux17.IN840
-memory[830][0] => Mux16.IN839
-memory[830][0] => Mux24.IN839
-memory[830][1] => Mux15.IN839
-memory[830][1] => Mux23.IN839
-memory[830][2] => Mux14.IN839
-memory[830][2] => Mux22.IN839
-memory[830][3] => Mux13.IN839
-memory[830][3] => Mux21.IN839
-memory[830][4] => Mux12.IN839
-memory[830][4] => Mux20.IN839
-memory[830][5] => Mux11.IN839
-memory[830][5] => Mux19.IN839
-memory[830][6] => Mux10.IN839
-memory[830][6] => Mux18.IN839
-memory[830][7] => Mux9.IN839
-memory[830][7] => Mux17.IN839
-memory[829][0] => Mux16.IN838
-memory[829][0] => Mux24.IN838
-memory[829][1] => Mux15.IN838
-memory[829][1] => Mux23.IN838
-memory[829][2] => Mux14.IN838
-memory[829][2] => Mux22.IN838
-memory[829][3] => Mux13.IN838
-memory[829][3] => Mux21.IN838
-memory[829][4] => Mux12.IN838
-memory[829][4] => Mux20.IN838
-memory[829][5] => Mux11.IN838
-memory[829][5] => Mux19.IN838
-memory[829][6] => Mux10.IN838
-memory[829][6] => Mux18.IN838
-memory[829][7] => Mux9.IN838
-memory[829][7] => Mux17.IN838
-memory[828][0] => Mux16.IN837
-memory[828][0] => Mux24.IN837
-memory[828][1] => Mux15.IN837
-memory[828][1] => Mux23.IN837
-memory[828][2] => Mux14.IN837
-memory[828][2] => Mux22.IN837
-memory[828][3] => Mux13.IN837
-memory[828][3] => Mux21.IN837
-memory[828][4] => Mux12.IN837
-memory[828][4] => Mux20.IN837
-memory[828][5] => Mux11.IN837
-memory[828][5] => Mux19.IN837
-memory[828][6] => Mux10.IN837
-memory[828][6] => Mux18.IN837
-memory[828][7] => Mux9.IN837
-memory[828][7] => Mux17.IN837
-memory[827][0] => Mux16.IN836
-memory[827][0] => Mux24.IN836
-memory[827][1] => Mux15.IN836
-memory[827][1] => Mux23.IN836
-memory[827][2] => Mux14.IN836
-memory[827][2] => Mux22.IN836
-memory[827][3] => Mux13.IN836
-memory[827][3] => Mux21.IN836
-memory[827][4] => Mux12.IN836
-memory[827][4] => Mux20.IN836
-memory[827][5] => Mux11.IN836
-memory[827][5] => Mux19.IN836
-memory[827][6] => Mux10.IN836
-memory[827][6] => Mux18.IN836
-memory[827][7] => Mux9.IN836
-memory[827][7] => Mux17.IN836
-memory[826][0] => Mux16.IN835
-memory[826][0] => Mux24.IN835
-memory[826][1] => Mux15.IN835
-memory[826][1] => Mux23.IN835
-memory[826][2] => Mux14.IN835
-memory[826][2] => Mux22.IN835
-memory[826][3] => Mux13.IN835
-memory[826][3] => Mux21.IN835
-memory[826][4] => Mux12.IN835
-memory[826][4] => Mux20.IN835
-memory[826][5] => Mux11.IN835
-memory[826][5] => Mux19.IN835
-memory[826][6] => Mux10.IN835
-memory[826][6] => Mux18.IN835
-memory[826][7] => Mux9.IN835
-memory[826][7] => Mux17.IN835
-memory[825][0] => Mux16.IN834
-memory[825][0] => Mux24.IN834
-memory[825][1] => Mux15.IN834
-memory[825][1] => Mux23.IN834
-memory[825][2] => Mux14.IN834
-memory[825][2] => Mux22.IN834
-memory[825][3] => Mux13.IN834
-memory[825][3] => Mux21.IN834
-memory[825][4] => Mux12.IN834
-memory[825][4] => Mux20.IN834
-memory[825][5] => Mux11.IN834
-memory[825][5] => Mux19.IN834
-memory[825][6] => Mux10.IN834
-memory[825][6] => Mux18.IN834
-memory[825][7] => Mux9.IN834
-memory[825][7] => Mux17.IN834
-memory[824][0] => Mux16.IN833
-memory[824][0] => Mux24.IN833
-memory[824][1] => Mux15.IN833
-memory[824][1] => Mux23.IN833
-memory[824][2] => Mux14.IN833
-memory[824][2] => Mux22.IN833
-memory[824][3] => Mux13.IN833
-memory[824][3] => Mux21.IN833
-memory[824][4] => Mux12.IN833
-memory[824][4] => Mux20.IN833
-memory[824][5] => Mux11.IN833
-memory[824][5] => Mux19.IN833
-memory[824][6] => Mux10.IN833
-memory[824][6] => Mux18.IN833
-memory[824][7] => Mux9.IN833
-memory[824][7] => Mux17.IN833
-memory[823][0] => Mux16.IN832
-memory[823][0] => Mux24.IN832
-memory[823][1] => Mux15.IN832
-memory[823][1] => Mux23.IN832
-memory[823][2] => Mux14.IN832
-memory[823][2] => Mux22.IN832
-memory[823][3] => Mux13.IN832
-memory[823][3] => Mux21.IN832
-memory[823][4] => Mux12.IN832
-memory[823][4] => Mux20.IN832
-memory[823][5] => Mux11.IN832
-memory[823][5] => Mux19.IN832
-memory[823][6] => Mux10.IN832
-memory[823][6] => Mux18.IN832
-memory[823][7] => Mux9.IN832
-memory[823][7] => Mux17.IN832
-memory[822][0] => Mux16.IN831
-memory[822][0] => Mux24.IN831
-memory[822][1] => Mux15.IN831
-memory[822][1] => Mux23.IN831
-memory[822][2] => Mux14.IN831
-memory[822][2] => Mux22.IN831
-memory[822][3] => Mux13.IN831
-memory[822][3] => Mux21.IN831
-memory[822][4] => Mux12.IN831
-memory[822][4] => Mux20.IN831
-memory[822][5] => Mux11.IN831
-memory[822][5] => Mux19.IN831
-memory[822][6] => Mux10.IN831
-memory[822][6] => Mux18.IN831
-memory[822][7] => Mux9.IN831
-memory[822][7] => Mux17.IN831
-memory[821][0] => Mux16.IN830
-memory[821][0] => Mux24.IN830
-memory[821][1] => Mux15.IN830
-memory[821][1] => Mux23.IN830
-memory[821][2] => Mux14.IN830
-memory[821][2] => Mux22.IN830
-memory[821][3] => Mux13.IN830
-memory[821][3] => Mux21.IN830
-memory[821][4] => Mux12.IN830
-memory[821][4] => Mux20.IN830
-memory[821][5] => Mux11.IN830
-memory[821][5] => Mux19.IN830
-memory[821][6] => Mux10.IN830
-memory[821][6] => Mux18.IN830
-memory[821][7] => Mux9.IN830
-memory[821][7] => Mux17.IN830
-memory[820][0] => Mux16.IN829
-memory[820][0] => Mux24.IN829
-memory[820][1] => Mux15.IN829
-memory[820][1] => Mux23.IN829
-memory[820][2] => Mux14.IN829
-memory[820][2] => Mux22.IN829
-memory[820][3] => Mux13.IN829
-memory[820][3] => Mux21.IN829
-memory[820][4] => Mux12.IN829
-memory[820][4] => Mux20.IN829
-memory[820][5] => Mux11.IN829
-memory[820][5] => Mux19.IN829
-memory[820][6] => Mux10.IN829
-memory[820][6] => Mux18.IN829
-memory[820][7] => Mux9.IN829
-memory[820][7] => Mux17.IN829
-memory[819][0] => Mux16.IN828
-memory[819][0] => Mux24.IN828
-memory[819][1] => Mux15.IN828
-memory[819][1] => Mux23.IN828
-memory[819][2] => Mux14.IN828
-memory[819][2] => Mux22.IN828
-memory[819][3] => Mux13.IN828
-memory[819][3] => Mux21.IN828
-memory[819][4] => Mux12.IN828
-memory[819][4] => Mux20.IN828
-memory[819][5] => Mux11.IN828
-memory[819][5] => Mux19.IN828
-memory[819][6] => Mux10.IN828
-memory[819][6] => Mux18.IN828
-memory[819][7] => Mux9.IN828
-memory[819][7] => Mux17.IN828
-memory[818][0] => Mux16.IN827
-memory[818][0] => Mux24.IN827
-memory[818][1] => Mux15.IN827
-memory[818][1] => Mux23.IN827
-memory[818][2] => Mux14.IN827
-memory[818][2] => Mux22.IN827
-memory[818][3] => Mux13.IN827
-memory[818][3] => Mux21.IN827
-memory[818][4] => Mux12.IN827
-memory[818][4] => Mux20.IN827
-memory[818][5] => Mux11.IN827
-memory[818][5] => Mux19.IN827
-memory[818][6] => Mux10.IN827
-memory[818][6] => Mux18.IN827
-memory[818][7] => Mux9.IN827
-memory[818][7] => Mux17.IN827
-memory[817][0] => Mux16.IN826
-memory[817][0] => Mux24.IN826
-memory[817][1] => Mux15.IN826
-memory[817][1] => Mux23.IN826
-memory[817][2] => Mux14.IN826
-memory[817][2] => Mux22.IN826
-memory[817][3] => Mux13.IN826
-memory[817][3] => Mux21.IN826
-memory[817][4] => Mux12.IN826
-memory[817][4] => Mux20.IN826
-memory[817][5] => Mux11.IN826
-memory[817][5] => Mux19.IN826
-memory[817][6] => Mux10.IN826
-memory[817][6] => Mux18.IN826
-memory[817][7] => Mux9.IN826
-memory[817][7] => Mux17.IN826
-memory[816][0] => Mux16.IN825
-memory[816][0] => Mux24.IN825
-memory[816][1] => Mux15.IN825
-memory[816][1] => Mux23.IN825
-memory[816][2] => Mux14.IN825
-memory[816][2] => Mux22.IN825
-memory[816][3] => Mux13.IN825
-memory[816][3] => Mux21.IN825
-memory[816][4] => Mux12.IN825
-memory[816][4] => Mux20.IN825
-memory[816][5] => Mux11.IN825
-memory[816][5] => Mux19.IN825
-memory[816][6] => Mux10.IN825
-memory[816][6] => Mux18.IN825
-memory[816][7] => Mux9.IN825
-memory[816][7] => Mux17.IN825
-memory[815][0] => Mux16.IN824
-memory[815][0] => Mux24.IN824
-memory[815][1] => Mux15.IN824
-memory[815][1] => Mux23.IN824
-memory[815][2] => Mux14.IN824
-memory[815][2] => Mux22.IN824
-memory[815][3] => Mux13.IN824
-memory[815][3] => Mux21.IN824
-memory[815][4] => Mux12.IN824
-memory[815][4] => Mux20.IN824
-memory[815][5] => Mux11.IN824
-memory[815][5] => Mux19.IN824
-memory[815][6] => Mux10.IN824
-memory[815][6] => Mux18.IN824
-memory[815][7] => Mux9.IN824
-memory[815][7] => Mux17.IN824
-memory[814][0] => Mux16.IN823
-memory[814][0] => Mux24.IN823
-memory[814][1] => Mux15.IN823
-memory[814][1] => Mux23.IN823
-memory[814][2] => Mux14.IN823
-memory[814][2] => Mux22.IN823
-memory[814][3] => Mux13.IN823
-memory[814][3] => Mux21.IN823
-memory[814][4] => Mux12.IN823
-memory[814][4] => Mux20.IN823
-memory[814][5] => Mux11.IN823
-memory[814][5] => Mux19.IN823
-memory[814][6] => Mux10.IN823
-memory[814][6] => Mux18.IN823
-memory[814][7] => Mux9.IN823
-memory[814][7] => Mux17.IN823
-memory[813][0] => Mux16.IN822
-memory[813][0] => Mux24.IN822
-memory[813][1] => Mux15.IN822
-memory[813][1] => Mux23.IN822
-memory[813][2] => Mux14.IN822
-memory[813][2] => Mux22.IN822
-memory[813][3] => Mux13.IN822
-memory[813][3] => Mux21.IN822
-memory[813][4] => Mux12.IN822
-memory[813][4] => Mux20.IN822
-memory[813][5] => Mux11.IN822
-memory[813][5] => Mux19.IN822
-memory[813][6] => Mux10.IN822
-memory[813][6] => Mux18.IN822
-memory[813][7] => Mux9.IN822
-memory[813][7] => Mux17.IN822
-memory[812][0] => Mux16.IN821
-memory[812][0] => Mux24.IN821
-memory[812][1] => Mux15.IN821
-memory[812][1] => Mux23.IN821
-memory[812][2] => Mux14.IN821
-memory[812][2] => Mux22.IN821
-memory[812][3] => Mux13.IN821
-memory[812][3] => Mux21.IN821
-memory[812][4] => Mux12.IN821
-memory[812][4] => Mux20.IN821
-memory[812][5] => Mux11.IN821
-memory[812][5] => Mux19.IN821
-memory[812][6] => Mux10.IN821
-memory[812][6] => Mux18.IN821
-memory[812][7] => Mux9.IN821
-memory[812][7] => Mux17.IN821
-memory[811][0] => Mux16.IN820
-memory[811][0] => Mux24.IN820
-memory[811][1] => Mux15.IN820
-memory[811][1] => Mux23.IN820
-memory[811][2] => Mux14.IN820
-memory[811][2] => Mux22.IN820
-memory[811][3] => Mux13.IN820
-memory[811][3] => Mux21.IN820
-memory[811][4] => Mux12.IN820
-memory[811][4] => Mux20.IN820
-memory[811][5] => Mux11.IN820
-memory[811][5] => Mux19.IN820
-memory[811][6] => Mux10.IN820
-memory[811][6] => Mux18.IN820
-memory[811][7] => Mux9.IN820
-memory[811][7] => Mux17.IN820
-memory[810][0] => Mux16.IN819
-memory[810][0] => Mux24.IN819
-memory[810][1] => Mux15.IN819
-memory[810][1] => Mux23.IN819
-memory[810][2] => Mux14.IN819
-memory[810][2] => Mux22.IN819
-memory[810][3] => Mux13.IN819
-memory[810][3] => Mux21.IN819
-memory[810][4] => Mux12.IN819
-memory[810][4] => Mux20.IN819
-memory[810][5] => Mux11.IN819
-memory[810][5] => Mux19.IN819
-memory[810][6] => Mux10.IN819
-memory[810][6] => Mux18.IN819
-memory[810][7] => Mux9.IN819
-memory[810][7] => Mux17.IN819
-memory[809][0] => Mux16.IN818
-memory[809][0] => Mux24.IN818
-memory[809][1] => Mux15.IN818
-memory[809][1] => Mux23.IN818
-memory[809][2] => Mux14.IN818
-memory[809][2] => Mux22.IN818
-memory[809][3] => Mux13.IN818
-memory[809][3] => Mux21.IN818
-memory[809][4] => Mux12.IN818
-memory[809][4] => Mux20.IN818
-memory[809][5] => Mux11.IN818
-memory[809][5] => Mux19.IN818
-memory[809][6] => Mux10.IN818
-memory[809][6] => Mux18.IN818
-memory[809][7] => Mux9.IN818
-memory[809][7] => Mux17.IN818
-memory[808][0] => Mux16.IN817
-memory[808][0] => Mux24.IN817
-memory[808][1] => Mux15.IN817
-memory[808][1] => Mux23.IN817
-memory[808][2] => Mux14.IN817
-memory[808][2] => Mux22.IN817
-memory[808][3] => Mux13.IN817
-memory[808][3] => Mux21.IN817
-memory[808][4] => Mux12.IN817
-memory[808][4] => Mux20.IN817
-memory[808][5] => Mux11.IN817
-memory[808][5] => Mux19.IN817
-memory[808][6] => Mux10.IN817
-memory[808][6] => Mux18.IN817
-memory[808][7] => Mux9.IN817
-memory[808][7] => Mux17.IN817
-memory[807][0] => Mux16.IN816
-memory[807][0] => Mux24.IN816
-memory[807][1] => Mux15.IN816
-memory[807][1] => Mux23.IN816
-memory[807][2] => Mux14.IN816
-memory[807][2] => Mux22.IN816
-memory[807][3] => Mux13.IN816
-memory[807][3] => Mux21.IN816
-memory[807][4] => Mux12.IN816
-memory[807][4] => Mux20.IN816
-memory[807][5] => Mux11.IN816
-memory[807][5] => Mux19.IN816
-memory[807][6] => Mux10.IN816
-memory[807][6] => Mux18.IN816
-memory[807][7] => Mux9.IN816
-memory[807][7] => Mux17.IN816
-memory[806][0] => Mux16.IN815
-memory[806][0] => Mux24.IN815
-memory[806][1] => Mux15.IN815
-memory[806][1] => Mux23.IN815
-memory[806][2] => Mux14.IN815
-memory[806][2] => Mux22.IN815
-memory[806][3] => Mux13.IN815
-memory[806][3] => Mux21.IN815
-memory[806][4] => Mux12.IN815
-memory[806][4] => Mux20.IN815
-memory[806][5] => Mux11.IN815
-memory[806][5] => Mux19.IN815
-memory[806][6] => Mux10.IN815
-memory[806][6] => Mux18.IN815
-memory[806][7] => Mux9.IN815
-memory[806][7] => Mux17.IN815
-memory[805][0] => Mux16.IN814
-memory[805][0] => Mux24.IN814
-memory[805][1] => Mux15.IN814
-memory[805][1] => Mux23.IN814
-memory[805][2] => Mux14.IN814
-memory[805][2] => Mux22.IN814
-memory[805][3] => Mux13.IN814
-memory[805][3] => Mux21.IN814
-memory[805][4] => Mux12.IN814
-memory[805][4] => Mux20.IN814
-memory[805][5] => Mux11.IN814
-memory[805][5] => Mux19.IN814
-memory[805][6] => Mux10.IN814
-memory[805][6] => Mux18.IN814
-memory[805][7] => Mux9.IN814
-memory[805][7] => Mux17.IN814
-memory[804][0] => Mux16.IN813
-memory[804][0] => Mux24.IN813
-memory[804][1] => Mux15.IN813
-memory[804][1] => Mux23.IN813
-memory[804][2] => Mux14.IN813
-memory[804][2] => Mux22.IN813
-memory[804][3] => Mux13.IN813
-memory[804][3] => Mux21.IN813
-memory[804][4] => Mux12.IN813
-memory[804][4] => Mux20.IN813
-memory[804][5] => Mux11.IN813
-memory[804][5] => Mux19.IN813
-memory[804][6] => Mux10.IN813
-memory[804][6] => Mux18.IN813
-memory[804][7] => Mux9.IN813
-memory[804][7] => Mux17.IN813
-memory[803][0] => Mux16.IN812
-memory[803][0] => Mux24.IN812
-memory[803][1] => Mux15.IN812
-memory[803][1] => Mux23.IN812
-memory[803][2] => Mux14.IN812
-memory[803][2] => Mux22.IN812
-memory[803][3] => Mux13.IN812
-memory[803][3] => Mux21.IN812
-memory[803][4] => Mux12.IN812
-memory[803][4] => Mux20.IN812
-memory[803][5] => Mux11.IN812
-memory[803][5] => Mux19.IN812
-memory[803][6] => Mux10.IN812
-memory[803][6] => Mux18.IN812
-memory[803][7] => Mux9.IN812
-memory[803][7] => Mux17.IN812
-memory[802][0] => Mux16.IN811
-memory[802][0] => Mux24.IN811
-memory[802][1] => Mux15.IN811
-memory[802][1] => Mux23.IN811
-memory[802][2] => Mux14.IN811
-memory[802][2] => Mux22.IN811
-memory[802][3] => Mux13.IN811
-memory[802][3] => Mux21.IN811
-memory[802][4] => Mux12.IN811
-memory[802][4] => Mux20.IN811
-memory[802][5] => Mux11.IN811
-memory[802][5] => Mux19.IN811
-memory[802][6] => Mux10.IN811
-memory[802][6] => Mux18.IN811
-memory[802][7] => Mux9.IN811
-memory[802][7] => Mux17.IN811
-memory[801][0] => Mux16.IN810
-memory[801][0] => Mux24.IN810
-memory[801][1] => Mux15.IN810
-memory[801][1] => Mux23.IN810
-memory[801][2] => Mux14.IN810
-memory[801][2] => Mux22.IN810
-memory[801][3] => Mux13.IN810
-memory[801][3] => Mux21.IN810
-memory[801][4] => Mux12.IN810
-memory[801][4] => Mux20.IN810
-memory[801][5] => Mux11.IN810
-memory[801][5] => Mux19.IN810
-memory[801][6] => Mux10.IN810
-memory[801][6] => Mux18.IN810
-memory[801][7] => Mux9.IN810
-memory[801][7] => Mux17.IN810
-memory[800][0] => Mux16.IN809
-memory[800][0] => Mux24.IN809
-memory[800][1] => Mux15.IN809
-memory[800][1] => Mux23.IN809
-memory[800][2] => Mux14.IN809
-memory[800][2] => Mux22.IN809
-memory[800][3] => Mux13.IN809
-memory[800][3] => Mux21.IN809
-memory[800][4] => Mux12.IN809
-memory[800][4] => Mux20.IN809
-memory[800][5] => Mux11.IN809
-memory[800][5] => Mux19.IN809
-memory[800][6] => Mux10.IN809
-memory[800][6] => Mux18.IN809
-memory[800][7] => Mux9.IN809
-memory[800][7] => Mux17.IN809
-memory[799][0] => Mux16.IN808
-memory[799][0] => Mux24.IN808
-memory[799][1] => Mux15.IN808
-memory[799][1] => Mux23.IN808
-memory[799][2] => Mux14.IN808
-memory[799][2] => Mux22.IN808
-memory[799][3] => Mux13.IN808
-memory[799][3] => Mux21.IN808
-memory[799][4] => Mux12.IN808
-memory[799][4] => Mux20.IN808
-memory[799][5] => Mux11.IN808
-memory[799][5] => Mux19.IN808
-memory[799][6] => Mux10.IN808
-memory[799][6] => Mux18.IN808
-memory[799][7] => Mux9.IN808
-memory[799][7] => Mux17.IN808
-memory[798][0] => Mux16.IN807
-memory[798][0] => Mux24.IN807
-memory[798][1] => Mux15.IN807
-memory[798][1] => Mux23.IN807
-memory[798][2] => Mux14.IN807
-memory[798][2] => Mux22.IN807
-memory[798][3] => Mux13.IN807
-memory[798][3] => Mux21.IN807
-memory[798][4] => Mux12.IN807
-memory[798][4] => Mux20.IN807
-memory[798][5] => Mux11.IN807
-memory[798][5] => Mux19.IN807
-memory[798][6] => Mux10.IN807
-memory[798][6] => Mux18.IN807
-memory[798][7] => Mux9.IN807
-memory[798][7] => Mux17.IN807
-memory[797][0] => Mux16.IN806
-memory[797][0] => Mux24.IN806
-memory[797][1] => Mux15.IN806
-memory[797][1] => Mux23.IN806
-memory[797][2] => Mux14.IN806
-memory[797][2] => Mux22.IN806
-memory[797][3] => Mux13.IN806
-memory[797][3] => Mux21.IN806
-memory[797][4] => Mux12.IN806
-memory[797][4] => Mux20.IN806
-memory[797][5] => Mux11.IN806
-memory[797][5] => Mux19.IN806
-memory[797][6] => Mux10.IN806
-memory[797][6] => Mux18.IN806
-memory[797][7] => Mux9.IN806
-memory[797][7] => Mux17.IN806
-memory[796][0] => Mux16.IN805
-memory[796][0] => Mux24.IN805
-memory[796][1] => Mux15.IN805
-memory[796][1] => Mux23.IN805
-memory[796][2] => Mux14.IN805
-memory[796][2] => Mux22.IN805
-memory[796][3] => Mux13.IN805
-memory[796][3] => Mux21.IN805
-memory[796][4] => Mux12.IN805
-memory[796][4] => Mux20.IN805
-memory[796][5] => Mux11.IN805
-memory[796][5] => Mux19.IN805
-memory[796][6] => Mux10.IN805
-memory[796][6] => Mux18.IN805
-memory[796][7] => Mux9.IN805
-memory[796][7] => Mux17.IN805
-memory[795][0] => Mux16.IN804
-memory[795][0] => Mux24.IN804
-memory[795][1] => Mux15.IN804
-memory[795][1] => Mux23.IN804
-memory[795][2] => Mux14.IN804
-memory[795][2] => Mux22.IN804
-memory[795][3] => Mux13.IN804
-memory[795][3] => Mux21.IN804
-memory[795][4] => Mux12.IN804
-memory[795][4] => Mux20.IN804
-memory[795][5] => Mux11.IN804
-memory[795][5] => Mux19.IN804
-memory[795][6] => Mux10.IN804
-memory[795][6] => Mux18.IN804
-memory[795][7] => Mux9.IN804
-memory[795][7] => Mux17.IN804
-memory[794][0] => Mux16.IN803
-memory[794][0] => Mux24.IN803
-memory[794][1] => Mux15.IN803
-memory[794][1] => Mux23.IN803
-memory[794][2] => Mux14.IN803
-memory[794][2] => Mux22.IN803
-memory[794][3] => Mux13.IN803
-memory[794][3] => Mux21.IN803
-memory[794][4] => Mux12.IN803
-memory[794][4] => Mux20.IN803
-memory[794][5] => Mux11.IN803
-memory[794][5] => Mux19.IN803
-memory[794][6] => Mux10.IN803
-memory[794][6] => Mux18.IN803
-memory[794][7] => Mux9.IN803
-memory[794][7] => Mux17.IN803
-memory[793][0] => Mux16.IN802
-memory[793][0] => Mux24.IN802
-memory[793][1] => Mux15.IN802
-memory[793][1] => Mux23.IN802
-memory[793][2] => Mux14.IN802
-memory[793][2] => Mux22.IN802
-memory[793][3] => Mux13.IN802
-memory[793][3] => Mux21.IN802
-memory[793][4] => Mux12.IN802
-memory[793][4] => Mux20.IN802
-memory[793][5] => Mux11.IN802
-memory[793][5] => Mux19.IN802
-memory[793][6] => Mux10.IN802
-memory[793][6] => Mux18.IN802
-memory[793][7] => Mux9.IN802
-memory[793][7] => Mux17.IN802
-memory[792][0] => Mux16.IN801
-memory[792][0] => Mux24.IN801
-memory[792][1] => Mux15.IN801
-memory[792][1] => Mux23.IN801
-memory[792][2] => Mux14.IN801
-memory[792][2] => Mux22.IN801
-memory[792][3] => Mux13.IN801
-memory[792][3] => Mux21.IN801
-memory[792][4] => Mux12.IN801
-memory[792][4] => Mux20.IN801
-memory[792][5] => Mux11.IN801
-memory[792][5] => Mux19.IN801
-memory[792][6] => Mux10.IN801
-memory[792][6] => Mux18.IN801
-memory[792][7] => Mux9.IN801
-memory[792][7] => Mux17.IN801
-memory[791][0] => Mux16.IN800
-memory[791][0] => Mux24.IN800
-memory[791][1] => Mux15.IN800
-memory[791][1] => Mux23.IN800
-memory[791][2] => Mux14.IN800
-memory[791][2] => Mux22.IN800
-memory[791][3] => Mux13.IN800
-memory[791][3] => Mux21.IN800
-memory[791][4] => Mux12.IN800
-memory[791][4] => Mux20.IN800
-memory[791][5] => Mux11.IN800
-memory[791][5] => Mux19.IN800
-memory[791][6] => Mux10.IN800
-memory[791][6] => Mux18.IN800
-memory[791][7] => Mux9.IN800
-memory[791][7] => Mux17.IN800
-memory[790][0] => Mux16.IN799
-memory[790][0] => Mux24.IN799
-memory[790][1] => Mux15.IN799
-memory[790][1] => Mux23.IN799
-memory[790][2] => Mux14.IN799
-memory[790][2] => Mux22.IN799
-memory[790][3] => Mux13.IN799
-memory[790][3] => Mux21.IN799
-memory[790][4] => Mux12.IN799
-memory[790][4] => Mux20.IN799
-memory[790][5] => Mux11.IN799
-memory[790][5] => Mux19.IN799
-memory[790][6] => Mux10.IN799
-memory[790][6] => Mux18.IN799
-memory[790][7] => Mux9.IN799
-memory[790][7] => Mux17.IN799
-memory[789][0] => Mux16.IN798
-memory[789][0] => Mux24.IN798
-memory[789][1] => Mux15.IN798
-memory[789][1] => Mux23.IN798
-memory[789][2] => Mux14.IN798
-memory[789][2] => Mux22.IN798
-memory[789][3] => Mux13.IN798
-memory[789][3] => Mux21.IN798
-memory[789][4] => Mux12.IN798
-memory[789][4] => Mux20.IN798
-memory[789][5] => Mux11.IN798
-memory[789][5] => Mux19.IN798
-memory[789][6] => Mux10.IN798
-memory[789][6] => Mux18.IN798
-memory[789][7] => Mux9.IN798
-memory[789][7] => Mux17.IN798
-memory[788][0] => Mux16.IN797
-memory[788][0] => Mux24.IN797
-memory[788][1] => Mux15.IN797
-memory[788][1] => Mux23.IN797
-memory[788][2] => Mux14.IN797
-memory[788][2] => Mux22.IN797
-memory[788][3] => Mux13.IN797
-memory[788][3] => Mux21.IN797
-memory[788][4] => Mux12.IN797
-memory[788][4] => Mux20.IN797
-memory[788][5] => Mux11.IN797
-memory[788][5] => Mux19.IN797
-memory[788][6] => Mux10.IN797
-memory[788][6] => Mux18.IN797
-memory[788][7] => Mux9.IN797
-memory[788][7] => Mux17.IN797
-memory[787][0] => Mux16.IN796
-memory[787][0] => Mux24.IN796
-memory[787][1] => Mux15.IN796
-memory[787][1] => Mux23.IN796
-memory[787][2] => Mux14.IN796
-memory[787][2] => Mux22.IN796
-memory[787][3] => Mux13.IN796
-memory[787][3] => Mux21.IN796
-memory[787][4] => Mux12.IN796
-memory[787][4] => Mux20.IN796
-memory[787][5] => Mux11.IN796
-memory[787][5] => Mux19.IN796
-memory[787][6] => Mux10.IN796
-memory[787][6] => Mux18.IN796
-memory[787][7] => Mux9.IN796
-memory[787][7] => Mux17.IN796
-memory[786][0] => Mux16.IN795
-memory[786][0] => Mux24.IN795
-memory[786][1] => Mux15.IN795
-memory[786][1] => Mux23.IN795
-memory[786][2] => Mux14.IN795
-memory[786][2] => Mux22.IN795
-memory[786][3] => Mux13.IN795
-memory[786][3] => Mux21.IN795
-memory[786][4] => Mux12.IN795
-memory[786][4] => Mux20.IN795
-memory[786][5] => Mux11.IN795
-memory[786][5] => Mux19.IN795
-memory[786][6] => Mux10.IN795
-memory[786][6] => Mux18.IN795
-memory[786][7] => Mux9.IN795
-memory[786][7] => Mux17.IN795
-memory[785][0] => Mux16.IN794
-memory[785][0] => Mux24.IN794
-memory[785][1] => Mux15.IN794
-memory[785][1] => Mux23.IN794
-memory[785][2] => Mux14.IN794
-memory[785][2] => Mux22.IN794
-memory[785][3] => Mux13.IN794
-memory[785][3] => Mux21.IN794
-memory[785][4] => Mux12.IN794
-memory[785][4] => Mux20.IN794
-memory[785][5] => Mux11.IN794
-memory[785][5] => Mux19.IN794
-memory[785][6] => Mux10.IN794
-memory[785][6] => Mux18.IN794
-memory[785][7] => Mux9.IN794
-memory[785][7] => Mux17.IN794
-memory[784][0] => Mux16.IN793
-memory[784][0] => Mux24.IN793
-memory[784][1] => Mux15.IN793
-memory[784][1] => Mux23.IN793
-memory[784][2] => Mux14.IN793
-memory[784][2] => Mux22.IN793
-memory[784][3] => Mux13.IN793
-memory[784][3] => Mux21.IN793
-memory[784][4] => Mux12.IN793
-memory[784][4] => Mux20.IN793
-memory[784][5] => Mux11.IN793
-memory[784][5] => Mux19.IN793
-memory[784][6] => Mux10.IN793
-memory[784][6] => Mux18.IN793
-memory[784][7] => Mux9.IN793
-memory[784][7] => Mux17.IN793
-memory[783][0] => Mux16.IN792
-memory[783][0] => Mux24.IN792
-memory[783][1] => Mux15.IN792
-memory[783][1] => Mux23.IN792
-memory[783][2] => Mux14.IN792
-memory[783][2] => Mux22.IN792
-memory[783][3] => Mux13.IN792
-memory[783][3] => Mux21.IN792
-memory[783][4] => Mux12.IN792
-memory[783][4] => Mux20.IN792
-memory[783][5] => Mux11.IN792
-memory[783][5] => Mux19.IN792
-memory[783][6] => Mux10.IN792
-memory[783][6] => Mux18.IN792
-memory[783][7] => Mux9.IN792
-memory[783][7] => Mux17.IN792
-memory[782][0] => Mux16.IN791
-memory[782][0] => Mux24.IN791
-memory[782][1] => Mux15.IN791
-memory[782][1] => Mux23.IN791
-memory[782][2] => Mux14.IN791
-memory[782][2] => Mux22.IN791
-memory[782][3] => Mux13.IN791
-memory[782][3] => Mux21.IN791
-memory[782][4] => Mux12.IN791
-memory[782][4] => Mux20.IN791
-memory[782][5] => Mux11.IN791
-memory[782][5] => Mux19.IN791
-memory[782][6] => Mux10.IN791
-memory[782][6] => Mux18.IN791
-memory[782][7] => Mux9.IN791
-memory[782][7] => Mux17.IN791
-memory[781][0] => Mux16.IN790
-memory[781][0] => Mux24.IN790
-memory[781][1] => Mux15.IN790
-memory[781][1] => Mux23.IN790
-memory[781][2] => Mux14.IN790
-memory[781][2] => Mux22.IN790
-memory[781][3] => Mux13.IN790
-memory[781][3] => Mux21.IN790
-memory[781][4] => Mux12.IN790
-memory[781][4] => Mux20.IN790
-memory[781][5] => Mux11.IN790
-memory[781][5] => Mux19.IN790
-memory[781][6] => Mux10.IN790
-memory[781][6] => Mux18.IN790
-memory[781][7] => Mux9.IN790
-memory[781][7] => Mux17.IN790
-memory[780][0] => Mux16.IN789
-memory[780][0] => Mux24.IN789
-memory[780][1] => Mux15.IN789
-memory[780][1] => Mux23.IN789
-memory[780][2] => Mux14.IN789
-memory[780][2] => Mux22.IN789
-memory[780][3] => Mux13.IN789
-memory[780][3] => Mux21.IN789
-memory[780][4] => Mux12.IN789
-memory[780][4] => Mux20.IN789
-memory[780][5] => Mux11.IN789
-memory[780][5] => Mux19.IN789
-memory[780][6] => Mux10.IN789
-memory[780][6] => Mux18.IN789
-memory[780][7] => Mux9.IN789
-memory[780][7] => Mux17.IN789
-memory[779][0] => Mux16.IN788
-memory[779][0] => Mux24.IN788
-memory[779][1] => Mux15.IN788
-memory[779][1] => Mux23.IN788
-memory[779][2] => Mux14.IN788
-memory[779][2] => Mux22.IN788
-memory[779][3] => Mux13.IN788
-memory[779][3] => Mux21.IN788
-memory[779][4] => Mux12.IN788
-memory[779][4] => Mux20.IN788
-memory[779][5] => Mux11.IN788
-memory[779][5] => Mux19.IN788
-memory[779][6] => Mux10.IN788
-memory[779][6] => Mux18.IN788
-memory[779][7] => Mux9.IN788
-memory[779][7] => Mux17.IN788
-memory[778][0] => Mux16.IN787
-memory[778][0] => Mux24.IN787
-memory[778][1] => Mux15.IN787
-memory[778][1] => Mux23.IN787
-memory[778][2] => Mux14.IN787
-memory[778][2] => Mux22.IN787
-memory[778][3] => Mux13.IN787
-memory[778][3] => Mux21.IN787
-memory[778][4] => Mux12.IN787
-memory[778][4] => Mux20.IN787
-memory[778][5] => Mux11.IN787
-memory[778][5] => Mux19.IN787
-memory[778][6] => Mux10.IN787
-memory[778][6] => Mux18.IN787
-memory[778][7] => Mux9.IN787
-memory[778][7] => Mux17.IN787
-memory[777][0] => Mux16.IN786
-memory[777][0] => Mux24.IN786
-memory[777][1] => Mux15.IN786
-memory[777][1] => Mux23.IN786
-memory[777][2] => Mux14.IN786
-memory[777][2] => Mux22.IN786
-memory[777][3] => Mux13.IN786
-memory[777][3] => Mux21.IN786
-memory[777][4] => Mux12.IN786
-memory[777][4] => Mux20.IN786
-memory[777][5] => Mux11.IN786
-memory[777][5] => Mux19.IN786
-memory[777][6] => Mux10.IN786
-memory[777][6] => Mux18.IN786
-memory[777][7] => Mux9.IN786
-memory[777][7] => Mux17.IN786
-memory[776][0] => Mux16.IN785
-memory[776][0] => Mux24.IN785
-memory[776][1] => Mux15.IN785
-memory[776][1] => Mux23.IN785
-memory[776][2] => Mux14.IN785
-memory[776][2] => Mux22.IN785
-memory[776][3] => Mux13.IN785
-memory[776][3] => Mux21.IN785
-memory[776][4] => Mux12.IN785
-memory[776][4] => Mux20.IN785
-memory[776][5] => Mux11.IN785
-memory[776][5] => Mux19.IN785
-memory[776][6] => Mux10.IN785
-memory[776][6] => Mux18.IN785
-memory[776][7] => Mux9.IN785
-memory[776][7] => Mux17.IN785
-memory[775][0] => Mux16.IN784
-memory[775][0] => Mux24.IN784
-memory[775][1] => Mux15.IN784
-memory[775][1] => Mux23.IN784
-memory[775][2] => Mux14.IN784
-memory[775][2] => Mux22.IN784
-memory[775][3] => Mux13.IN784
-memory[775][3] => Mux21.IN784
-memory[775][4] => Mux12.IN784
-memory[775][4] => Mux20.IN784
-memory[775][5] => Mux11.IN784
-memory[775][5] => Mux19.IN784
-memory[775][6] => Mux10.IN784
-memory[775][6] => Mux18.IN784
-memory[775][7] => Mux9.IN784
-memory[775][7] => Mux17.IN784
-memory[774][0] => Mux16.IN783
-memory[774][0] => Mux24.IN783
-memory[774][1] => Mux15.IN783
-memory[774][1] => Mux23.IN783
-memory[774][2] => Mux14.IN783
-memory[774][2] => Mux22.IN783
-memory[774][3] => Mux13.IN783
-memory[774][3] => Mux21.IN783
-memory[774][4] => Mux12.IN783
-memory[774][4] => Mux20.IN783
-memory[774][5] => Mux11.IN783
-memory[774][5] => Mux19.IN783
-memory[774][6] => Mux10.IN783
-memory[774][6] => Mux18.IN783
-memory[774][7] => Mux9.IN783
-memory[774][7] => Mux17.IN783
-memory[773][0] => Mux16.IN782
-memory[773][0] => Mux24.IN782
-memory[773][1] => Mux15.IN782
-memory[773][1] => Mux23.IN782
-memory[773][2] => Mux14.IN782
-memory[773][2] => Mux22.IN782
-memory[773][3] => Mux13.IN782
-memory[773][3] => Mux21.IN782
-memory[773][4] => Mux12.IN782
-memory[773][4] => Mux20.IN782
-memory[773][5] => Mux11.IN782
-memory[773][5] => Mux19.IN782
-memory[773][6] => Mux10.IN782
-memory[773][6] => Mux18.IN782
-memory[773][7] => Mux9.IN782
-memory[773][7] => Mux17.IN782
-memory[772][0] => Mux16.IN781
-memory[772][0] => Mux24.IN781
-memory[772][1] => Mux15.IN781
-memory[772][1] => Mux23.IN781
-memory[772][2] => Mux14.IN781
-memory[772][2] => Mux22.IN781
-memory[772][3] => Mux13.IN781
-memory[772][3] => Mux21.IN781
-memory[772][4] => Mux12.IN781
-memory[772][4] => Mux20.IN781
-memory[772][5] => Mux11.IN781
-memory[772][5] => Mux19.IN781
-memory[772][6] => Mux10.IN781
-memory[772][6] => Mux18.IN781
-memory[772][7] => Mux9.IN781
-memory[772][7] => Mux17.IN781
-memory[771][0] => Mux16.IN780
-memory[771][0] => Mux24.IN780
-memory[771][1] => Mux15.IN780
-memory[771][1] => Mux23.IN780
-memory[771][2] => Mux14.IN780
-memory[771][2] => Mux22.IN780
-memory[771][3] => Mux13.IN780
-memory[771][3] => Mux21.IN780
-memory[771][4] => Mux12.IN780
-memory[771][4] => Mux20.IN780
-memory[771][5] => Mux11.IN780
-memory[771][5] => Mux19.IN780
-memory[771][6] => Mux10.IN780
-memory[771][6] => Mux18.IN780
-memory[771][7] => Mux9.IN780
-memory[771][7] => Mux17.IN780
-memory[770][0] => Mux16.IN779
-memory[770][0] => Mux24.IN779
-memory[770][1] => Mux15.IN779
-memory[770][1] => Mux23.IN779
-memory[770][2] => Mux14.IN779
-memory[770][2] => Mux22.IN779
-memory[770][3] => Mux13.IN779
-memory[770][3] => Mux21.IN779
-memory[770][4] => Mux12.IN779
-memory[770][4] => Mux20.IN779
-memory[770][5] => Mux11.IN779
-memory[770][5] => Mux19.IN779
-memory[770][6] => Mux10.IN779
-memory[770][6] => Mux18.IN779
-memory[770][7] => Mux9.IN779
-memory[770][7] => Mux17.IN779
-memory[769][0] => Mux16.IN778
-memory[769][0] => Mux24.IN778
-memory[769][1] => Mux15.IN778
-memory[769][1] => Mux23.IN778
-memory[769][2] => Mux14.IN778
-memory[769][2] => Mux22.IN778
-memory[769][3] => Mux13.IN778
-memory[769][3] => Mux21.IN778
-memory[769][4] => Mux12.IN778
-memory[769][4] => Mux20.IN778
-memory[769][5] => Mux11.IN778
-memory[769][5] => Mux19.IN778
-memory[769][6] => Mux10.IN778
-memory[769][6] => Mux18.IN778
-memory[769][7] => Mux9.IN778
-memory[769][7] => Mux17.IN778
-memory[768][0] => Mux16.IN777
-memory[768][0] => Mux24.IN777
-memory[768][1] => Mux15.IN777
-memory[768][1] => Mux23.IN777
-memory[768][2] => Mux14.IN777
-memory[768][2] => Mux22.IN777
-memory[768][3] => Mux13.IN777
-memory[768][3] => Mux21.IN777
-memory[768][4] => Mux12.IN777
-memory[768][4] => Mux20.IN777
-memory[768][5] => Mux11.IN777
-memory[768][5] => Mux19.IN777
-memory[768][6] => Mux10.IN777
-memory[768][6] => Mux18.IN777
-memory[768][7] => Mux9.IN777
-memory[768][7] => Mux17.IN777
-memory[767][0] => Mux16.IN776
-memory[767][0] => Mux24.IN776
-memory[767][1] => Mux15.IN776
-memory[767][1] => Mux23.IN776
-memory[767][2] => Mux14.IN776
-memory[767][2] => Mux22.IN776
-memory[767][3] => Mux13.IN776
-memory[767][3] => Mux21.IN776
-memory[767][4] => Mux12.IN776
-memory[767][4] => Mux20.IN776
-memory[767][5] => Mux11.IN776
-memory[767][5] => Mux19.IN776
-memory[767][6] => Mux10.IN776
-memory[767][6] => Mux18.IN776
-memory[767][7] => Mux9.IN776
-memory[767][7] => Mux17.IN776
-memory[766][0] => Mux16.IN775
-memory[766][0] => Mux24.IN775
-memory[766][1] => Mux15.IN775
-memory[766][1] => Mux23.IN775
-memory[766][2] => Mux14.IN775
-memory[766][2] => Mux22.IN775
-memory[766][3] => Mux13.IN775
-memory[766][3] => Mux21.IN775
-memory[766][4] => Mux12.IN775
-memory[766][4] => Mux20.IN775
-memory[766][5] => Mux11.IN775
-memory[766][5] => Mux19.IN775
-memory[766][6] => Mux10.IN775
-memory[766][6] => Mux18.IN775
-memory[766][7] => Mux9.IN775
-memory[766][7] => Mux17.IN775
-memory[765][0] => Mux16.IN774
-memory[765][0] => Mux24.IN774
-memory[765][1] => Mux15.IN774
-memory[765][1] => Mux23.IN774
-memory[765][2] => Mux14.IN774
-memory[765][2] => Mux22.IN774
-memory[765][3] => Mux13.IN774
-memory[765][3] => Mux21.IN774
-memory[765][4] => Mux12.IN774
-memory[765][4] => Mux20.IN774
-memory[765][5] => Mux11.IN774
-memory[765][5] => Mux19.IN774
-memory[765][6] => Mux10.IN774
-memory[765][6] => Mux18.IN774
-memory[765][7] => Mux9.IN774
-memory[765][7] => Mux17.IN774
-memory[764][0] => Mux16.IN773
-memory[764][0] => Mux24.IN773
-memory[764][1] => Mux15.IN773
-memory[764][1] => Mux23.IN773
-memory[764][2] => Mux14.IN773
-memory[764][2] => Mux22.IN773
-memory[764][3] => Mux13.IN773
-memory[764][3] => Mux21.IN773
-memory[764][4] => Mux12.IN773
-memory[764][4] => Mux20.IN773
-memory[764][5] => Mux11.IN773
-memory[764][5] => Mux19.IN773
-memory[764][6] => Mux10.IN773
-memory[764][6] => Mux18.IN773
-memory[764][7] => Mux9.IN773
-memory[764][7] => Mux17.IN773
-memory[763][0] => Mux16.IN772
-memory[763][0] => Mux24.IN772
-memory[763][1] => Mux15.IN772
-memory[763][1] => Mux23.IN772
-memory[763][2] => Mux14.IN772
-memory[763][2] => Mux22.IN772
-memory[763][3] => Mux13.IN772
-memory[763][3] => Mux21.IN772
-memory[763][4] => Mux12.IN772
-memory[763][4] => Mux20.IN772
-memory[763][5] => Mux11.IN772
-memory[763][5] => Mux19.IN772
-memory[763][6] => Mux10.IN772
-memory[763][6] => Mux18.IN772
-memory[763][7] => Mux9.IN772
-memory[763][7] => Mux17.IN772
-memory[762][0] => Mux16.IN771
-memory[762][0] => Mux24.IN771
-memory[762][1] => Mux15.IN771
-memory[762][1] => Mux23.IN771
-memory[762][2] => Mux14.IN771
-memory[762][2] => Mux22.IN771
-memory[762][3] => Mux13.IN771
-memory[762][3] => Mux21.IN771
-memory[762][4] => Mux12.IN771
-memory[762][4] => Mux20.IN771
-memory[762][5] => Mux11.IN771
-memory[762][5] => Mux19.IN771
-memory[762][6] => Mux10.IN771
-memory[762][6] => Mux18.IN771
-memory[762][7] => Mux9.IN771
-memory[762][7] => Mux17.IN771
-memory[761][0] => Mux16.IN770
-memory[761][0] => Mux24.IN770
-memory[761][1] => Mux15.IN770
-memory[761][1] => Mux23.IN770
-memory[761][2] => Mux14.IN770
-memory[761][2] => Mux22.IN770
-memory[761][3] => Mux13.IN770
-memory[761][3] => Mux21.IN770
-memory[761][4] => Mux12.IN770
-memory[761][4] => Mux20.IN770
-memory[761][5] => Mux11.IN770
-memory[761][5] => Mux19.IN770
-memory[761][6] => Mux10.IN770
-memory[761][6] => Mux18.IN770
-memory[761][7] => Mux9.IN770
-memory[761][7] => Mux17.IN770
-memory[760][0] => Mux16.IN769
-memory[760][0] => Mux24.IN769
-memory[760][1] => Mux15.IN769
-memory[760][1] => Mux23.IN769
-memory[760][2] => Mux14.IN769
-memory[760][2] => Mux22.IN769
-memory[760][3] => Mux13.IN769
-memory[760][3] => Mux21.IN769
-memory[760][4] => Mux12.IN769
-memory[760][4] => Mux20.IN769
-memory[760][5] => Mux11.IN769
-memory[760][5] => Mux19.IN769
-memory[760][6] => Mux10.IN769
-memory[760][6] => Mux18.IN769
-memory[760][7] => Mux9.IN769
-memory[760][7] => Mux17.IN769
-memory[759][0] => Mux16.IN768
-memory[759][0] => Mux24.IN768
-memory[759][1] => Mux15.IN768
-memory[759][1] => Mux23.IN768
-memory[759][2] => Mux14.IN768
-memory[759][2] => Mux22.IN768
-memory[759][3] => Mux13.IN768
-memory[759][3] => Mux21.IN768
-memory[759][4] => Mux12.IN768
-memory[759][4] => Mux20.IN768
-memory[759][5] => Mux11.IN768
-memory[759][5] => Mux19.IN768
-memory[759][6] => Mux10.IN768
-memory[759][6] => Mux18.IN768
-memory[759][7] => Mux9.IN768
-memory[759][7] => Mux17.IN768
-memory[758][0] => Mux16.IN767
-memory[758][0] => Mux24.IN767
-memory[758][1] => Mux15.IN767
-memory[758][1] => Mux23.IN767
-memory[758][2] => Mux14.IN767
-memory[758][2] => Mux22.IN767
-memory[758][3] => Mux13.IN767
-memory[758][3] => Mux21.IN767
-memory[758][4] => Mux12.IN767
-memory[758][4] => Mux20.IN767
-memory[758][5] => Mux11.IN767
-memory[758][5] => Mux19.IN767
-memory[758][6] => Mux10.IN767
-memory[758][6] => Mux18.IN767
-memory[758][7] => Mux9.IN767
-memory[758][7] => Mux17.IN767
-memory[757][0] => Mux16.IN766
-memory[757][0] => Mux24.IN766
-memory[757][1] => Mux15.IN766
-memory[757][1] => Mux23.IN766
-memory[757][2] => Mux14.IN766
-memory[757][2] => Mux22.IN766
-memory[757][3] => Mux13.IN766
-memory[757][3] => Mux21.IN766
-memory[757][4] => Mux12.IN766
-memory[757][4] => Mux20.IN766
-memory[757][5] => Mux11.IN766
-memory[757][5] => Mux19.IN766
-memory[757][6] => Mux10.IN766
-memory[757][6] => Mux18.IN766
-memory[757][7] => Mux9.IN766
-memory[757][7] => Mux17.IN766
-memory[756][0] => Mux16.IN765
-memory[756][0] => Mux24.IN765
-memory[756][1] => Mux15.IN765
-memory[756][1] => Mux23.IN765
-memory[756][2] => Mux14.IN765
-memory[756][2] => Mux22.IN765
-memory[756][3] => Mux13.IN765
-memory[756][3] => Mux21.IN765
-memory[756][4] => Mux12.IN765
-memory[756][4] => Mux20.IN765
-memory[756][5] => Mux11.IN765
-memory[756][5] => Mux19.IN765
-memory[756][6] => Mux10.IN765
-memory[756][6] => Mux18.IN765
-memory[756][7] => Mux9.IN765
-memory[756][7] => Mux17.IN765
-memory[755][0] => Mux16.IN764
-memory[755][0] => Mux24.IN764
-memory[755][1] => Mux15.IN764
-memory[755][1] => Mux23.IN764
-memory[755][2] => Mux14.IN764
-memory[755][2] => Mux22.IN764
-memory[755][3] => Mux13.IN764
-memory[755][3] => Mux21.IN764
-memory[755][4] => Mux12.IN764
-memory[755][4] => Mux20.IN764
-memory[755][5] => Mux11.IN764
-memory[755][5] => Mux19.IN764
-memory[755][6] => Mux10.IN764
-memory[755][6] => Mux18.IN764
-memory[755][7] => Mux9.IN764
-memory[755][7] => Mux17.IN764
-memory[754][0] => Mux16.IN763
-memory[754][0] => Mux24.IN763
-memory[754][1] => Mux15.IN763
-memory[754][1] => Mux23.IN763
-memory[754][2] => Mux14.IN763
-memory[754][2] => Mux22.IN763
-memory[754][3] => Mux13.IN763
-memory[754][3] => Mux21.IN763
-memory[754][4] => Mux12.IN763
-memory[754][4] => Mux20.IN763
-memory[754][5] => Mux11.IN763
-memory[754][5] => Mux19.IN763
-memory[754][6] => Mux10.IN763
-memory[754][6] => Mux18.IN763
-memory[754][7] => Mux9.IN763
-memory[754][7] => Mux17.IN763
-memory[753][0] => Mux16.IN762
-memory[753][0] => Mux24.IN762
-memory[753][1] => Mux15.IN762
-memory[753][1] => Mux23.IN762
-memory[753][2] => Mux14.IN762
-memory[753][2] => Mux22.IN762
-memory[753][3] => Mux13.IN762
-memory[753][3] => Mux21.IN762
-memory[753][4] => Mux12.IN762
-memory[753][4] => Mux20.IN762
-memory[753][5] => Mux11.IN762
-memory[753][5] => Mux19.IN762
-memory[753][6] => Mux10.IN762
-memory[753][6] => Mux18.IN762
-memory[753][7] => Mux9.IN762
-memory[753][7] => Mux17.IN762
-memory[752][0] => Mux16.IN761
-memory[752][0] => Mux24.IN761
-memory[752][1] => Mux15.IN761
-memory[752][1] => Mux23.IN761
-memory[752][2] => Mux14.IN761
-memory[752][2] => Mux22.IN761
-memory[752][3] => Mux13.IN761
-memory[752][3] => Mux21.IN761
-memory[752][4] => Mux12.IN761
-memory[752][4] => Mux20.IN761
-memory[752][5] => Mux11.IN761
-memory[752][5] => Mux19.IN761
-memory[752][6] => Mux10.IN761
-memory[752][6] => Mux18.IN761
-memory[752][7] => Mux9.IN761
-memory[752][7] => Mux17.IN761
-memory[751][0] => Mux16.IN760
-memory[751][0] => Mux24.IN760
-memory[751][1] => Mux15.IN760
-memory[751][1] => Mux23.IN760
-memory[751][2] => Mux14.IN760
-memory[751][2] => Mux22.IN760
-memory[751][3] => Mux13.IN760
-memory[751][3] => Mux21.IN760
-memory[751][4] => Mux12.IN760
-memory[751][4] => Mux20.IN760
-memory[751][5] => Mux11.IN760
-memory[751][5] => Mux19.IN760
-memory[751][6] => Mux10.IN760
-memory[751][6] => Mux18.IN760
-memory[751][7] => Mux9.IN760
-memory[751][7] => Mux17.IN760
-memory[750][0] => Mux16.IN759
-memory[750][0] => Mux24.IN759
-memory[750][1] => Mux15.IN759
-memory[750][1] => Mux23.IN759
-memory[750][2] => Mux14.IN759
-memory[750][2] => Mux22.IN759
-memory[750][3] => Mux13.IN759
-memory[750][3] => Mux21.IN759
-memory[750][4] => Mux12.IN759
-memory[750][4] => Mux20.IN759
-memory[750][5] => Mux11.IN759
-memory[750][5] => Mux19.IN759
-memory[750][6] => Mux10.IN759
-memory[750][6] => Mux18.IN759
-memory[750][7] => Mux9.IN759
-memory[750][7] => Mux17.IN759
-memory[749][0] => Mux16.IN758
-memory[749][0] => Mux24.IN758
-memory[749][1] => Mux15.IN758
-memory[749][1] => Mux23.IN758
-memory[749][2] => Mux14.IN758
-memory[749][2] => Mux22.IN758
-memory[749][3] => Mux13.IN758
-memory[749][3] => Mux21.IN758
-memory[749][4] => Mux12.IN758
-memory[749][4] => Mux20.IN758
-memory[749][5] => Mux11.IN758
-memory[749][5] => Mux19.IN758
-memory[749][6] => Mux10.IN758
-memory[749][6] => Mux18.IN758
-memory[749][7] => Mux9.IN758
-memory[749][7] => Mux17.IN758
-memory[748][0] => Mux16.IN757
-memory[748][0] => Mux24.IN757
-memory[748][1] => Mux15.IN757
-memory[748][1] => Mux23.IN757
-memory[748][2] => Mux14.IN757
-memory[748][2] => Mux22.IN757
-memory[748][3] => Mux13.IN757
-memory[748][3] => Mux21.IN757
-memory[748][4] => Mux12.IN757
-memory[748][4] => Mux20.IN757
-memory[748][5] => Mux11.IN757
-memory[748][5] => Mux19.IN757
-memory[748][6] => Mux10.IN757
-memory[748][6] => Mux18.IN757
-memory[748][7] => Mux9.IN757
-memory[748][7] => Mux17.IN757
-memory[747][0] => Mux16.IN756
-memory[747][0] => Mux24.IN756
-memory[747][1] => Mux15.IN756
-memory[747][1] => Mux23.IN756
-memory[747][2] => Mux14.IN756
-memory[747][2] => Mux22.IN756
-memory[747][3] => Mux13.IN756
-memory[747][3] => Mux21.IN756
-memory[747][4] => Mux12.IN756
-memory[747][4] => Mux20.IN756
-memory[747][5] => Mux11.IN756
-memory[747][5] => Mux19.IN756
-memory[747][6] => Mux10.IN756
-memory[747][6] => Mux18.IN756
-memory[747][7] => Mux9.IN756
-memory[747][7] => Mux17.IN756
-memory[746][0] => Mux16.IN755
-memory[746][0] => Mux24.IN755
-memory[746][1] => Mux15.IN755
-memory[746][1] => Mux23.IN755
-memory[746][2] => Mux14.IN755
-memory[746][2] => Mux22.IN755
-memory[746][3] => Mux13.IN755
-memory[746][3] => Mux21.IN755
-memory[746][4] => Mux12.IN755
-memory[746][4] => Mux20.IN755
-memory[746][5] => Mux11.IN755
-memory[746][5] => Mux19.IN755
-memory[746][6] => Mux10.IN755
-memory[746][6] => Mux18.IN755
-memory[746][7] => Mux9.IN755
-memory[746][7] => Mux17.IN755
-memory[745][0] => Mux16.IN754
-memory[745][0] => Mux24.IN754
-memory[745][1] => Mux15.IN754
-memory[745][1] => Mux23.IN754
-memory[745][2] => Mux14.IN754
-memory[745][2] => Mux22.IN754
-memory[745][3] => Mux13.IN754
-memory[745][3] => Mux21.IN754
-memory[745][4] => Mux12.IN754
-memory[745][4] => Mux20.IN754
-memory[745][5] => Mux11.IN754
-memory[745][5] => Mux19.IN754
-memory[745][6] => Mux10.IN754
-memory[745][6] => Mux18.IN754
-memory[745][7] => Mux9.IN754
-memory[745][7] => Mux17.IN754
-memory[744][0] => Mux16.IN753
-memory[744][0] => Mux24.IN753
-memory[744][1] => Mux15.IN753
-memory[744][1] => Mux23.IN753
-memory[744][2] => Mux14.IN753
-memory[744][2] => Mux22.IN753
-memory[744][3] => Mux13.IN753
-memory[744][3] => Mux21.IN753
-memory[744][4] => Mux12.IN753
-memory[744][4] => Mux20.IN753
-memory[744][5] => Mux11.IN753
-memory[744][5] => Mux19.IN753
-memory[744][6] => Mux10.IN753
-memory[744][6] => Mux18.IN753
-memory[744][7] => Mux9.IN753
-memory[744][7] => Mux17.IN753
-memory[743][0] => Mux16.IN752
-memory[743][0] => Mux24.IN752
-memory[743][1] => Mux15.IN752
-memory[743][1] => Mux23.IN752
-memory[743][2] => Mux14.IN752
-memory[743][2] => Mux22.IN752
-memory[743][3] => Mux13.IN752
-memory[743][3] => Mux21.IN752
-memory[743][4] => Mux12.IN752
-memory[743][4] => Mux20.IN752
-memory[743][5] => Mux11.IN752
-memory[743][5] => Mux19.IN752
-memory[743][6] => Mux10.IN752
-memory[743][6] => Mux18.IN752
-memory[743][7] => Mux9.IN752
-memory[743][7] => Mux17.IN752
-memory[742][0] => Mux16.IN751
-memory[742][0] => Mux24.IN751
-memory[742][1] => Mux15.IN751
-memory[742][1] => Mux23.IN751
-memory[742][2] => Mux14.IN751
-memory[742][2] => Mux22.IN751
-memory[742][3] => Mux13.IN751
-memory[742][3] => Mux21.IN751
-memory[742][4] => Mux12.IN751
-memory[742][4] => Mux20.IN751
-memory[742][5] => Mux11.IN751
-memory[742][5] => Mux19.IN751
-memory[742][6] => Mux10.IN751
-memory[742][6] => Mux18.IN751
-memory[742][7] => Mux9.IN751
-memory[742][7] => Mux17.IN751
-memory[741][0] => Mux16.IN750
-memory[741][0] => Mux24.IN750
-memory[741][1] => Mux15.IN750
-memory[741][1] => Mux23.IN750
-memory[741][2] => Mux14.IN750
-memory[741][2] => Mux22.IN750
-memory[741][3] => Mux13.IN750
-memory[741][3] => Mux21.IN750
-memory[741][4] => Mux12.IN750
-memory[741][4] => Mux20.IN750
-memory[741][5] => Mux11.IN750
-memory[741][5] => Mux19.IN750
-memory[741][6] => Mux10.IN750
-memory[741][6] => Mux18.IN750
-memory[741][7] => Mux9.IN750
-memory[741][7] => Mux17.IN750
-memory[740][0] => Mux16.IN749
-memory[740][0] => Mux24.IN749
-memory[740][1] => Mux15.IN749
-memory[740][1] => Mux23.IN749
-memory[740][2] => Mux14.IN749
-memory[740][2] => Mux22.IN749
-memory[740][3] => Mux13.IN749
-memory[740][3] => Mux21.IN749
-memory[740][4] => Mux12.IN749
-memory[740][4] => Mux20.IN749
-memory[740][5] => Mux11.IN749
-memory[740][5] => Mux19.IN749
-memory[740][6] => Mux10.IN749
-memory[740][6] => Mux18.IN749
-memory[740][7] => Mux9.IN749
-memory[740][7] => Mux17.IN749
-memory[739][0] => Mux16.IN748
-memory[739][0] => Mux24.IN748
-memory[739][1] => Mux15.IN748
-memory[739][1] => Mux23.IN748
-memory[739][2] => Mux14.IN748
-memory[739][2] => Mux22.IN748
-memory[739][3] => Mux13.IN748
-memory[739][3] => Mux21.IN748
-memory[739][4] => Mux12.IN748
-memory[739][4] => Mux20.IN748
-memory[739][5] => Mux11.IN748
-memory[739][5] => Mux19.IN748
-memory[739][6] => Mux10.IN748
-memory[739][6] => Mux18.IN748
-memory[739][7] => Mux9.IN748
-memory[739][7] => Mux17.IN748
-memory[738][0] => Mux16.IN747
-memory[738][0] => Mux24.IN747
-memory[738][1] => Mux15.IN747
-memory[738][1] => Mux23.IN747
-memory[738][2] => Mux14.IN747
-memory[738][2] => Mux22.IN747
-memory[738][3] => Mux13.IN747
-memory[738][3] => Mux21.IN747
-memory[738][4] => Mux12.IN747
-memory[738][4] => Mux20.IN747
-memory[738][5] => Mux11.IN747
-memory[738][5] => Mux19.IN747
-memory[738][6] => Mux10.IN747
-memory[738][6] => Mux18.IN747
-memory[738][7] => Mux9.IN747
-memory[738][7] => Mux17.IN747
-memory[737][0] => Mux16.IN746
-memory[737][0] => Mux24.IN746
-memory[737][1] => Mux15.IN746
-memory[737][1] => Mux23.IN746
-memory[737][2] => Mux14.IN746
-memory[737][2] => Mux22.IN746
-memory[737][3] => Mux13.IN746
-memory[737][3] => Mux21.IN746
-memory[737][4] => Mux12.IN746
-memory[737][4] => Mux20.IN746
-memory[737][5] => Mux11.IN746
-memory[737][5] => Mux19.IN746
-memory[737][6] => Mux10.IN746
-memory[737][6] => Mux18.IN746
-memory[737][7] => Mux9.IN746
-memory[737][7] => Mux17.IN746
-memory[736][0] => Mux16.IN745
-memory[736][0] => Mux24.IN745
-memory[736][1] => Mux15.IN745
-memory[736][1] => Mux23.IN745
-memory[736][2] => Mux14.IN745
-memory[736][2] => Mux22.IN745
-memory[736][3] => Mux13.IN745
-memory[736][3] => Mux21.IN745
-memory[736][4] => Mux12.IN745
-memory[736][4] => Mux20.IN745
-memory[736][5] => Mux11.IN745
-memory[736][5] => Mux19.IN745
-memory[736][6] => Mux10.IN745
-memory[736][6] => Mux18.IN745
-memory[736][7] => Mux9.IN745
-memory[736][7] => Mux17.IN745
-memory[735][0] => Mux16.IN744
-memory[735][0] => Mux24.IN744
-memory[735][1] => Mux15.IN744
-memory[735][1] => Mux23.IN744
-memory[735][2] => Mux14.IN744
-memory[735][2] => Mux22.IN744
-memory[735][3] => Mux13.IN744
-memory[735][3] => Mux21.IN744
-memory[735][4] => Mux12.IN744
-memory[735][4] => Mux20.IN744
-memory[735][5] => Mux11.IN744
-memory[735][5] => Mux19.IN744
-memory[735][6] => Mux10.IN744
-memory[735][6] => Mux18.IN744
-memory[735][7] => Mux9.IN744
-memory[735][7] => Mux17.IN744
-memory[734][0] => Mux16.IN743
-memory[734][0] => Mux24.IN743
-memory[734][1] => Mux15.IN743
-memory[734][1] => Mux23.IN743
-memory[734][2] => Mux14.IN743
-memory[734][2] => Mux22.IN743
-memory[734][3] => Mux13.IN743
-memory[734][3] => Mux21.IN743
-memory[734][4] => Mux12.IN743
-memory[734][4] => Mux20.IN743
-memory[734][5] => Mux11.IN743
-memory[734][5] => Mux19.IN743
-memory[734][6] => Mux10.IN743
-memory[734][6] => Mux18.IN743
-memory[734][7] => Mux9.IN743
-memory[734][7] => Mux17.IN743
-memory[733][0] => Mux16.IN742
-memory[733][0] => Mux24.IN742
-memory[733][1] => Mux15.IN742
-memory[733][1] => Mux23.IN742
-memory[733][2] => Mux14.IN742
-memory[733][2] => Mux22.IN742
-memory[733][3] => Mux13.IN742
-memory[733][3] => Mux21.IN742
-memory[733][4] => Mux12.IN742
-memory[733][4] => Mux20.IN742
-memory[733][5] => Mux11.IN742
-memory[733][5] => Mux19.IN742
-memory[733][6] => Mux10.IN742
-memory[733][6] => Mux18.IN742
-memory[733][7] => Mux9.IN742
-memory[733][7] => Mux17.IN742
-memory[732][0] => Mux16.IN741
-memory[732][0] => Mux24.IN741
-memory[732][1] => Mux15.IN741
-memory[732][1] => Mux23.IN741
-memory[732][2] => Mux14.IN741
-memory[732][2] => Mux22.IN741
-memory[732][3] => Mux13.IN741
-memory[732][3] => Mux21.IN741
-memory[732][4] => Mux12.IN741
-memory[732][4] => Mux20.IN741
-memory[732][5] => Mux11.IN741
-memory[732][5] => Mux19.IN741
-memory[732][6] => Mux10.IN741
-memory[732][6] => Mux18.IN741
-memory[732][7] => Mux9.IN741
-memory[732][7] => Mux17.IN741
-memory[731][0] => Mux16.IN740
-memory[731][0] => Mux24.IN740
-memory[731][1] => Mux15.IN740
-memory[731][1] => Mux23.IN740
-memory[731][2] => Mux14.IN740
-memory[731][2] => Mux22.IN740
-memory[731][3] => Mux13.IN740
-memory[731][3] => Mux21.IN740
-memory[731][4] => Mux12.IN740
-memory[731][4] => Mux20.IN740
-memory[731][5] => Mux11.IN740
-memory[731][5] => Mux19.IN740
-memory[731][6] => Mux10.IN740
-memory[731][6] => Mux18.IN740
-memory[731][7] => Mux9.IN740
-memory[731][7] => Mux17.IN740
-memory[730][0] => Mux16.IN739
-memory[730][0] => Mux24.IN739
-memory[730][1] => Mux15.IN739
-memory[730][1] => Mux23.IN739
-memory[730][2] => Mux14.IN739
-memory[730][2] => Mux22.IN739
-memory[730][3] => Mux13.IN739
-memory[730][3] => Mux21.IN739
-memory[730][4] => Mux12.IN739
-memory[730][4] => Mux20.IN739
-memory[730][5] => Mux11.IN739
-memory[730][5] => Mux19.IN739
-memory[730][6] => Mux10.IN739
-memory[730][6] => Mux18.IN739
-memory[730][7] => Mux9.IN739
-memory[730][7] => Mux17.IN739
-memory[729][0] => Mux16.IN738
-memory[729][0] => Mux24.IN738
-memory[729][1] => Mux15.IN738
-memory[729][1] => Mux23.IN738
-memory[729][2] => Mux14.IN738
-memory[729][2] => Mux22.IN738
-memory[729][3] => Mux13.IN738
-memory[729][3] => Mux21.IN738
-memory[729][4] => Mux12.IN738
-memory[729][4] => Mux20.IN738
-memory[729][5] => Mux11.IN738
-memory[729][5] => Mux19.IN738
-memory[729][6] => Mux10.IN738
-memory[729][6] => Mux18.IN738
-memory[729][7] => Mux9.IN738
-memory[729][7] => Mux17.IN738
-memory[728][0] => Mux16.IN737
-memory[728][0] => Mux24.IN737
-memory[728][1] => Mux15.IN737
-memory[728][1] => Mux23.IN737
-memory[728][2] => Mux14.IN737
-memory[728][2] => Mux22.IN737
-memory[728][3] => Mux13.IN737
-memory[728][3] => Mux21.IN737
-memory[728][4] => Mux12.IN737
-memory[728][4] => Mux20.IN737
-memory[728][5] => Mux11.IN737
-memory[728][5] => Mux19.IN737
-memory[728][6] => Mux10.IN737
-memory[728][6] => Mux18.IN737
-memory[728][7] => Mux9.IN737
-memory[728][7] => Mux17.IN737
-memory[727][0] => Mux16.IN736
-memory[727][0] => Mux24.IN736
-memory[727][1] => Mux15.IN736
-memory[727][1] => Mux23.IN736
-memory[727][2] => Mux14.IN736
-memory[727][2] => Mux22.IN736
-memory[727][3] => Mux13.IN736
-memory[727][3] => Mux21.IN736
-memory[727][4] => Mux12.IN736
-memory[727][4] => Mux20.IN736
-memory[727][5] => Mux11.IN736
-memory[727][5] => Mux19.IN736
-memory[727][6] => Mux10.IN736
-memory[727][6] => Mux18.IN736
-memory[727][7] => Mux9.IN736
-memory[727][7] => Mux17.IN736
-memory[726][0] => Mux16.IN735
-memory[726][0] => Mux24.IN735
-memory[726][1] => Mux15.IN735
-memory[726][1] => Mux23.IN735
-memory[726][2] => Mux14.IN735
-memory[726][2] => Mux22.IN735
-memory[726][3] => Mux13.IN735
-memory[726][3] => Mux21.IN735
-memory[726][4] => Mux12.IN735
-memory[726][4] => Mux20.IN735
-memory[726][5] => Mux11.IN735
-memory[726][5] => Mux19.IN735
-memory[726][6] => Mux10.IN735
-memory[726][6] => Mux18.IN735
-memory[726][7] => Mux9.IN735
-memory[726][7] => Mux17.IN735
-memory[725][0] => Mux16.IN734
-memory[725][0] => Mux24.IN734
-memory[725][1] => Mux15.IN734
-memory[725][1] => Mux23.IN734
-memory[725][2] => Mux14.IN734
-memory[725][2] => Mux22.IN734
-memory[725][3] => Mux13.IN734
-memory[725][3] => Mux21.IN734
-memory[725][4] => Mux12.IN734
-memory[725][4] => Mux20.IN734
-memory[725][5] => Mux11.IN734
-memory[725][5] => Mux19.IN734
-memory[725][6] => Mux10.IN734
-memory[725][6] => Mux18.IN734
-memory[725][7] => Mux9.IN734
-memory[725][7] => Mux17.IN734
-memory[724][0] => Mux16.IN733
-memory[724][0] => Mux24.IN733
-memory[724][1] => Mux15.IN733
-memory[724][1] => Mux23.IN733
-memory[724][2] => Mux14.IN733
-memory[724][2] => Mux22.IN733
-memory[724][3] => Mux13.IN733
-memory[724][3] => Mux21.IN733
-memory[724][4] => Mux12.IN733
-memory[724][4] => Mux20.IN733
-memory[724][5] => Mux11.IN733
-memory[724][5] => Mux19.IN733
-memory[724][6] => Mux10.IN733
-memory[724][6] => Mux18.IN733
-memory[724][7] => Mux9.IN733
-memory[724][7] => Mux17.IN733
-memory[723][0] => Mux16.IN732
-memory[723][0] => Mux24.IN732
-memory[723][1] => Mux15.IN732
-memory[723][1] => Mux23.IN732
-memory[723][2] => Mux14.IN732
-memory[723][2] => Mux22.IN732
-memory[723][3] => Mux13.IN732
-memory[723][3] => Mux21.IN732
-memory[723][4] => Mux12.IN732
-memory[723][4] => Mux20.IN732
-memory[723][5] => Mux11.IN732
-memory[723][5] => Mux19.IN732
-memory[723][6] => Mux10.IN732
-memory[723][6] => Mux18.IN732
-memory[723][7] => Mux9.IN732
-memory[723][7] => Mux17.IN732
-memory[722][0] => Mux16.IN731
-memory[722][0] => Mux24.IN731
-memory[722][1] => Mux15.IN731
-memory[722][1] => Mux23.IN731
-memory[722][2] => Mux14.IN731
-memory[722][2] => Mux22.IN731
-memory[722][3] => Mux13.IN731
-memory[722][3] => Mux21.IN731
-memory[722][4] => Mux12.IN731
-memory[722][4] => Mux20.IN731
-memory[722][5] => Mux11.IN731
-memory[722][5] => Mux19.IN731
-memory[722][6] => Mux10.IN731
-memory[722][6] => Mux18.IN731
-memory[722][7] => Mux9.IN731
-memory[722][7] => Mux17.IN731
-memory[721][0] => Mux16.IN730
-memory[721][0] => Mux24.IN730
-memory[721][1] => Mux15.IN730
-memory[721][1] => Mux23.IN730
-memory[721][2] => Mux14.IN730
-memory[721][2] => Mux22.IN730
-memory[721][3] => Mux13.IN730
-memory[721][3] => Mux21.IN730
-memory[721][4] => Mux12.IN730
-memory[721][4] => Mux20.IN730
-memory[721][5] => Mux11.IN730
-memory[721][5] => Mux19.IN730
-memory[721][6] => Mux10.IN730
-memory[721][6] => Mux18.IN730
-memory[721][7] => Mux9.IN730
-memory[721][7] => Mux17.IN730
-memory[720][0] => Mux16.IN729
-memory[720][0] => Mux24.IN729
-memory[720][1] => Mux15.IN729
-memory[720][1] => Mux23.IN729
-memory[720][2] => Mux14.IN729
-memory[720][2] => Mux22.IN729
-memory[720][3] => Mux13.IN729
-memory[720][3] => Mux21.IN729
-memory[720][4] => Mux12.IN729
-memory[720][4] => Mux20.IN729
-memory[720][5] => Mux11.IN729
-memory[720][5] => Mux19.IN729
-memory[720][6] => Mux10.IN729
-memory[720][6] => Mux18.IN729
-memory[720][7] => Mux9.IN729
-memory[720][7] => Mux17.IN729
-memory[719][0] => Mux16.IN728
-memory[719][0] => Mux24.IN728
-memory[719][1] => Mux15.IN728
-memory[719][1] => Mux23.IN728
-memory[719][2] => Mux14.IN728
-memory[719][2] => Mux22.IN728
-memory[719][3] => Mux13.IN728
-memory[719][3] => Mux21.IN728
-memory[719][4] => Mux12.IN728
-memory[719][4] => Mux20.IN728
-memory[719][5] => Mux11.IN728
-memory[719][5] => Mux19.IN728
-memory[719][6] => Mux10.IN728
-memory[719][6] => Mux18.IN728
-memory[719][7] => Mux9.IN728
-memory[719][7] => Mux17.IN728
-memory[718][0] => Mux16.IN727
-memory[718][0] => Mux24.IN727
-memory[718][1] => Mux15.IN727
-memory[718][1] => Mux23.IN727
-memory[718][2] => Mux14.IN727
-memory[718][2] => Mux22.IN727
-memory[718][3] => Mux13.IN727
-memory[718][3] => Mux21.IN727
-memory[718][4] => Mux12.IN727
-memory[718][4] => Mux20.IN727
-memory[718][5] => Mux11.IN727
-memory[718][5] => Mux19.IN727
-memory[718][6] => Mux10.IN727
-memory[718][6] => Mux18.IN727
-memory[718][7] => Mux9.IN727
-memory[718][7] => Mux17.IN727
-memory[717][0] => Mux16.IN726
-memory[717][0] => Mux24.IN726
-memory[717][1] => Mux15.IN726
-memory[717][1] => Mux23.IN726
-memory[717][2] => Mux14.IN726
-memory[717][2] => Mux22.IN726
-memory[717][3] => Mux13.IN726
-memory[717][3] => Mux21.IN726
-memory[717][4] => Mux12.IN726
-memory[717][4] => Mux20.IN726
-memory[717][5] => Mux11.IN726
-memory[717][5] => Mux19.IN726
-memory[717][6] => Mux10.IN726
-memory[717][6] => Mux18.IN726
-memory[717][7] => Mux9.IN726
-memory[717][7] => Mux17.IN726
-memory[716][0] => Mux16.IN725
-memory[716][0] => Mux24.IN725
-memory[716][1] => Mux15.IN725
-memory[716][1] => Mux23.IN725
-memory[716][2] => Mux14.IN725
-memory[716][2] => Mux22.IN725
-memory[716][3] => Mux13.IN725
-memory[716][3] => Mux21.IN725
-memory[716][4] => Mux12.IN725
-memory[716][4] => Mux20.IN725
-memory[716][5] => Mux11.IN725
-memory[716][5] => Mux19.IN725
-memory[716][6] => Mux10.IN725
-memory[716][6] => Mux18.IN725
-memory[716][7] => Mux9.IN725
-memory[716][7] => Mux17.IN725
-memory[715][0] => Mux16.IN724
-memory[715][0] => Mux24.IN724
-memory[715][1] => Mux15.IN724
-memory[715][1] => Mux23.IN724
-memory[715][2] => Mux14.IN724
-memory[715][2] => Mux22.IN724
-memory[715][3] => Mux13.IN724
-memory[715][3] => Mux21.IN724
-memory[715][4] => Mux12.IN724
-memory[715][4] => Mux20.IN724
-memory[715][5] => Mux11.IN724
-memory[715][5] => Mux19.IN724
-memory[715][6] => Mux10.IN724
-memory[715][6] => Mux18.IN724
-memory[715][7] => Mux9.IN724
-memory[715][7] => Mux17.IN724
-memory[714][0] => Mux16.IN723
-memory[714][0] => Mux24.IN723
-memory[714][1] => Mux15.IN723
-memory[714][1] => Mux23.IN723
-memory[714][2] => Mux14.IN723
-memory[714][2] => Mux22.IN723
-memory[714][3] => Mux13.IN723
-memory[714][3] => Mux21.IN723
-memory[714][4] => Mux12.IN723
-memory[714][4] => Mux20.IN723
-memory[714][5] => Mux11.IN723
-memory[714][5] => Mux19.IN723
-memory[714][6] => Mux10.IN723
-memory[714][6] => Mux18.IN723
-memory[714][7] => Mux9.IN723
-memory[714][7] => Mux17.IN723
-memory[713][0] => Mux16.IN722
-memory[713][0] => Mux24.IN722
-memory[713][1] => Mux15.IN722
-memory[713][1] => Mux23.IN722
-memory[713][2] => Mux14.IN722
-memory[713][2] => Mux22.IN722
-memory[713][3] => Mux13.IN722
-memory[713][3] => Mux21.IN722
-memory[713][4] => Mux12.IN722
-memory[713][4] => Mux20.IN722
-memory[713][5] => Mux11.IN722
-memory[713][5] => Mux19.IN722
-memory[713][6] => Mux10.IN722
-memory[713][6] => Mux18.IN722
-memory[713][7] => Mux9.IN722
-memory[713][7] => Mux17.IN722
-memory[712][0] => Mux16.IN721
-memory[712][0] => Mux24.IN721
-memory[712][1] => Mux15.IN721
-memory[712][1] => Mux23.IN721
-memory[712][2] => Mux14.IN721
-memory[712][2] => Mux22.IN721
-memory[712][3] => Mux13.IN721
-memory[712][3] => Mux21.IN721
-memory[712][4] => Mux12.IN721
-memory[712][4] => Mux20.IN721
-memory[712][5] => Mux11.IN721
-memory[712][5] => Mux19.IN721
-memory[712][6] => Mux10.IN721
-memory[712][6] => Mux18.IN721
-memory[712][7] => Mux9.IN721
-memory[712][7] => Mux17.IN721
-memory[711][0] => Mux16.IN720
-memory[711][0] => Mux24.IN720
-memory[711][1] => Mux15.IN720
-memory[711][1] => Mux23.IN720
-memory[711][2] => Mux14.IN720
-memory[711][2] => Mux22.IN720
-memory[711][3] => Mux13.IN720
-memory[711][3] => Mux21.IN720
-memory[711][4] => Mux12.IN720
-memory[711][4] => Mux20.IN720
-memory[711][5] => Mux11.IN720
-memory[711][5] => Mux19.IN720
-memory[711][6] => Mux10.IN720
-memory[711][6] => Mux18.IN720
-memory[711][7] => Mux9.IN720
-memory[711][7] => Mux17.IN720
-memory[710][0] => Mux16.IN719
-memory[710][0] => Mux24.IN719
-memory[710][1] => Mux15.IN719
-memory[710][1] => Mux23.IN719
-memory[710][2] => Mux14.IN719
-memory[710][2] => Mux22.IN719
-memory[710][3] => Mux13.IN719
-memory[710][3] => Mux21.IN719
-memory[710][4] => Mux12.IN719
-memory[710][4] => Mux20.IN719
-memory[710][5] => Mux11.IN719
-memory[710][5] => Mux19.IN719
-memory[710][6] => Mux10.IN719
-memory[710][6] => Mux18.IN719
-memory[710][7] => Mux9.IN719
-memory[710][7] => Mux17.IN719
-memory[709][0] => Mux16.IN718
-memory[709][0] => Mux24.IN718
-memory[709][1] => Mux15.IN718
-memory[709][1] => Mux23.IN718
-memory[709][2] => Mux14.IN718
-memory[709][2] => Mux22.IN718
-memory[709][3] => Mux13.IN718
-memory[709][3] => Mux21.IN718
-memory[709][4] => Mux12.IN718
-memory[709][4] => Mux20.IN718
-memory[709][5] => Mux11.IN718
-memory[709][5] => Mux19.IN718
-memory[709][6] => Mux10.IN718
-memory[709][6] => Mux18.IN718
-memory[709][7] => Mux9.IN718
-memory[709][7] => Mux17.IN718
-memory[708][0] => Mux16.IN717
-memory[708][0] => Mux24.IN717
-memory[708][1] => Mux15.IN717
-memory[708][1] => Mux23.IN717
-memory[708][2] => Mux14.IN717
-memory[708][2] => Mux22.IN717
-memory[708][3] => Mux13.IN717
-memory[708][3] => Mux21.IN717
-memory[708][4] => Mux12.IN717
-memory[708][4] => Mux20.IN717
-memory[708][5] => Mux11.IN717
-memory[708][5] => Mux19.IN717
-memory[708][6] => Mux10.IN717
-memory[708][6] => Mux18.IN717
-memory[708][7] => Mux9.IN717
-memory[708][7] => Mux17.IN717
-memory[707][0] => Mux16.IN716
-memory[707][0] => Mux24.IN716
-memory[707][1] => Mux15.IN716
-memory[707][1] => Mux23.IN716
-memory[707][2] => Mux14.IN716
-memory[707][2] => Mux22.IN716
-memory[707][3] => Mux13.IN716
-memory[707][3] => Mux21.IN716
-memory[707][4] => Mux12.IN716
-memory[707][4] => Mux20.IN716
-memory[707][5] => Mux11.IN716
-memory[707][5] => Mux19.IN716
-memory[707][6] => Mux10.IN716
-memory[707][6] => Mux18.IN716
-memory[707][7] => Mux9.IN716
-memory[707][7] => Mux17.IN716
-memory[706][0] => Mux16.IN715
-memory[706][0] => Mux24.IN715
-memory[706][1] => Mux15.IN715
-memory[706][1] => Mux23.IN715
-memory[706][2] => Mux14.IN715
-memory[706][2] => Mux22.IN715
-memory[706][3] => Mux13.IN715
-memory[706][3] => Mux21.IN715
-memory[706][4] => Mux12.IN715
-memory[706][4] => Mux20.IN715
-memory[706][5] => Mux11.IN715
-memory[706][5] => Mux19.IN715
-memory[706][6] => Mux10.IN715
-memory[706][6] => Mux18.IN715
-memory[706][7] => Mux9.IN715
-memory[706][7] => Mux17.IN715
-memory[705][0] => Mux16.IN714
-memory[705][0] => Mux24.IN714
-memory[705][1] => Mux15.IN714
-memory[705][1] => Mux23.IN714
-memory[705][2] => Mux14.IN714
-memory[705][2] => Mux22.IN714
-memory[705][3] => Mux13.IN714
-memory[705][3] => Mux21.IN714
-memory[705][4] => Mux12.IN714
-memory[705][4] => Mux20.IN714
-memory[705][5] => Mux11.IN714
-memory[705][5] => Mux19.IN714
-memory[705][6] => Mux10.IN714
-memory[705][6] => Mux18.IN714
-memory[705][7] => Mux9.IN714
-memory[705][7] => Mux17.IN714
-memory[704][0] => Mux16.IN713
-memory[704][0] => Mux24.IN713
-memory[704][1] => Mux15.IN713
-memory[704][1] => Mux23.IN713
-memory[704][2] => Mux14.IN713
-memory[704][2] => Mux22.IN713
-memory[704][3] => Mux13.IN713
-memory[704][3] => Mux21.IN713
-memory[704][4] => Mux12.IN713
-memory[704][4] => Mux20.IN713
-memory[704][5] => Mux11.IN713
-memory[704][5] => Mux19.IN713
-memory[704][6] => Mux10.IN713
-memory[704][6] => Mux18.IN713
-memory[704][7] => Mux9.IN713
-memory[704][7] => Mux17.IN713
-memory[703][0] => Mux16.IN712
-memory[703][0] => Mux24.IN712
-memory[703][1] => Mux15.IN712
-memory[703][1] => Mux23.IN712
-memory[703][2] => Mux14.IN712
-memory[703][2] => Mux22.IN712
-memory[703][3] => Mux13.IN712
-memory[703][3] => Mux21.IN712
-memory[703][4] => Mux12.IN712
-memory[703][4] => Mux20.IN712
-memory[703][5] => Mux11.IN712
-memory[703][5] => Mux19.IN712
-memory[703][6] => Mux10.IN712
-memory[703][6] => Mux18.IN712
-memory[703][7] => Mux9.IN712
-memory[703][7] => Mux17.IN712
-memory[702][0] => Mux16.IN711
-memory[702][0] => Mux24.IN711
-memory[702][1] => Mux15.IN711
-memory[702][1] => Mux23.IN711
-memory[702][2] => Mux14.IN711
-memory[702][2] => Mux22.IN711
-memory[702][3] => Mux13.IN711
-memory[702][3] => Mux21.IN711
-memory[702][4] => Mux12.IN711
-memory[702][4] => Mux20.IN711
-memory[702][5] => Mux11.IN711
-memory[702][5] => Mux19.IN711
-memory[702][6] => Mux10.IN711
-memory[702][6] => Mux18.IN711
-memory[702][7] => Mux9.IN711
-memory[702][7] => Mux17.IN711
-memory[701][0] => Mux16.IN710
-memory[701][0] => Mux24.IN710
-memory[701][1] => Mux15.IN710
-memory[701][1] => Mux23.IN710
-memory[701][2] => Mux14.IN710
-memory[701][2] => Mux22.IN710
-memory[701][3] => Mux13.IN710
-memory[701][3] => Mux21.IN710
-memory[701][4] => Mux12.IN710
-memory[701][4] => Mux20.IN710
-memory[701][5] => Mux11.IN710
-memory[701][5] => Mux19.IN710
-memory[701][6] => Mux10.IN710
-memory[701][6] => Mux18.IN710
-memory[701][7] => Mux9.IN710
-memory[701][7] => Mux17.IN710
-memory[700][0] => Mux16.IN709
-memory[700][0] => Mux24.IN709
-memory[700][1] => Mux15.IN709
-memory[700][1] => Mux23.IN709
-memory[700][2] => Mux14.IN709
-memory[700][2] => Mux22.IN709
-memory[700][3] => Mux13.IN709
-memory[700][3] => Mux21.IN709
-memory[700][4] => Mux12.IN709
-memory[700][4] => Mux20.IN709
-memory[700][5] => Mux11.IN709
-memory[700][5] => Mux19.IN709
-memory[700][6] => Mux10.IN709
-memory[700][6] => Mux18.IN709
-memory[700][7] => Mux9.IN709
-memory[700][7] => Mux17.IN709
-memory[699][0] => Mux16.IN708
-memory[699][0] => Mux24.IN708
-memory[699][1] => Mux15.IN708
-memory[699][1] => Mux23.IN708
-memory[699][2] => Mux14.IN708
-memory[699][2] => Mux22.IN708
-memory[699][3] => Mux13.IN708
-memory[699][3] => Mux21.IN708
-memory[699][4] => Mux12.IN708
-memory[699][4] => Mux20.IN708
-memory[699][5] => Mux11.IN708
-memory[699][5] => Mux19.IN708
-memory[699][6] => Mux10.IN708
-memory[699][6] => Mux18.IN708
-memory[699][7] => Mux9.IN708
-memory[699][7] => Mux17.IN708
-memory[698][0] => Mux16.IN707
-memory[698][0] => Mux24.IN707
-memory[698][1] => Mux15.IN707
-memory[698][1] => Mux23.IN707
-memory[698][2] => Mux14.IN707
-memory[698][2] => Mux22.IN707
-memory[698][3] => Mux13.IN707
-memory[698][3] => Mux21.IN707
-memory[698][4] => Mux12.IN707
-memory[698][4] => Mux20.IN707
-memory[698][5] => Mux11.IN707
-memory[698][5] => Mux19.IN707
-memory[698][6] => Mux10.IN707
-memory[698][6] => Mux18.IN707
-memory[698][7] => Mux9.IN707
-memory[698][7] => Mux17.IN707
-memory[697][0] => Mux16.IN706
-memory[697][0] => Mux24.IN706
-memory[697][1] => Mux15.IN706
-memory[697][1] => Mux23.IN706
-memory[697][2] => Mux14.IN706
-memory[697][2] => Mux22.IN706
-memory[697][3] => Mux13.IN706
-memory[697][3] => Mux21.IN706
-memory[697][4] => Mux12.IN706
-memory[697][4] => Mux20.IN706
-memory[697][5] => Mux11.IN706
-memory[697][5] => Mux19.IN706
-memory[697][6] => Mux10.IN706
-memory[697][6] => Mux18.IN706
-memory[697][7] => Mux9.IN706
-memory[697][7] => Mux17.IN706
-memory[696][0] => Mux16.IN705
-memory[696][0] => Mux24.IN705
-memory[696][1] => Mux15.IN705
-memory[696][1] => Mux23.IN705
-memory[696][2] => Mux14.IN705
-memory[696][2] => Mux22.IN705
-memory[696][3] => Mux13.IN705
-memory[696][3] => Mux21.IN705
-memory[696][4] => Mux12.IN705
-memory[696][4] => Mux20.IN705
-memory[696][5] => Mux11.IN705
-memory[696][5] => Mux19.IN705
-memory[696][6] => Mux10.IN705
-memory[696][6] => Mux18.IN705
-memory[696][7] => Mux9.IN705
-memory[696][7] => Mux17.IN705
-memory[695][0] => Mux16.IN704
-memory[695][0] => Mux24.IN704
-memory[695][1] => Mux15.IN704
-memory[695][1] => Mux23.IN704
-memory[695][2] => Mux14.IN704
-memory[695][2] => Mux22.IN704
-memory[695][3] => Mux13.IN704
-memory[695][3] => Mux21.IN704
-memory[695][4] => Mux12.IN704
-memory[695][4] => Mux20.IN704
-memory[695][5] => Mux11.IN704
-memory[695][5] => Mux19.IN704
-memory[695][6] => Mux10.IN704
-memory[695][6] => Mux18.IN704
-memory[695][7] => Mux9.IN704
-memory[695][7] => Mux17.IN704
-memory[694][0] => Mux16.IN703
-memory[694][0] => Mux24.IN703
-memory[694][1] => Mux15.IN703
-memory[694][1] => Mux23.IN703
-memory[694][2] => Mux14.IN703
-memory[694][2] => Mux22.IN703
-memory[694][3] => Mux13.IN703
-memory[694][3] => Mux21.IN703
-memory[694][4] => Mux12.IN703
-memory[694][4] => Mux20.IN703
-memory[694][5] => Mux11.IN703
-memory[694][5] => Mux19.IN703
-memory[694][6] => Mux10.IN703
-memory[694][6] => Mux18.IN703
-memory[694][7] => Mux9.IN703
-memory[694][7] => Mux17.IN703
-memory[693][0] => Mux16.IN702
-memory[693][0] => Mux24.IN702
-memory[693][1] => Mux15.IN702
-memory[693][1] => Mux23.IN702
-memory[693][2] => Mux14.IN702
-memory[693][2] => Mux22.IN702
-memory[693][3] => Mux13.IN702
-memory[693][3] => Mux21.IN702
-memory[693][4] => Mux12.IN702
-memory[693][4] => Mux20.IN702
-memory[693][5] => Mux11.IN702
-memory[693][5] => Mux19.IN702
-memory[693][6] => Mux10.IN702
-memory[693][6] => Mux18.IN702
-memory[693][7] => Mux9.IN702
-memory[693][7] => Mux17.IN702
-memory[692][0] => Mux16.IN701
-memory[692][0] => Mux24.IN701
-memory[692][1] => Mux15.IN701
-memory[692][1] => Mux23.IN701
-memory[692][2] => Mux14.IN701
-memory[692][2] => Mux22.IN701
-memory[692][3] => Mux13.IN701
-memory[692][3] => Mux21.IN701
-memory[692][4] => Mux12.IN701
-memory[692][4] => Mux20.IN701
-memory[692][5] => Mux11.IN701
-memory[692][5] => Mux19.IN701
-memory[692][6] => Mux10.IN701
-memory[692][6] => Mux18.IN701
-memory[692][7] => Mux9.IN701
-memory[692][7] => Mux17.IN701
-memory[691][0] => Mux16.IN700
-memory[691][0] => Mux24.IN700
-memory[691][1] => Mux15.IN700
-memory[691][1] => Mux23.IN700
-memory[691][2] => Mux14.IN700
-memory[691][2] => Mux22.IN700
-memory[691][3] => Mux13.IN700
-memory[691][3] => Mux21.IN700
-memory[691][4] => Mux12.IN700
-memory[691][4] => Mux20.IN700
-memory[691][5] => Mux11.IN700
-memory[691][5] => Mux19.IN700
-memory[691][6] => Mux10.IN700
-memory[691][6] => Mux18.IN700
-memory[691][7] => Mux9.IN700
-memory[691][7] => Mux17.IN700
-memory[690][0] => Mux16.IN699
-memory[690][0] => Mux24.IN699
-memory[690][1] => Mux15.IN699
-memory[690][1] => Mux23.IN699
-memory[690][2] => Mux14.IN699
-memory[690][2] => Mux22.IN699
-memory[690][3] => Mux13.IN699
-memory[690][3] => Mux21.IN699
-memory[690][4] => Mux12.IN699
-memory[690][4] => Mux20.IN699
-memory[690][5] => Mux11.IN699
-memory[690][5] => Mux19.IN699
-memory[690][6] => Mux10.IN699
-memory[690][6] => Mux18.IN699
-memory[690][7] => Mux9.IN699
-memory[690][7] => Mux17.IN699
-memory[689][0] => Mux16.IN698
-memory[689][0] => Mux24.IN698
-memory[689][1] => Mux15.IN698
-memory[689][1] => Mux23.IN698
-memory[689][2] => Mux14.IN698
-memory[689][2] => Mux22.IN698
-memory[689][3] => Mux13.IN698
-memory[689][3] => Mux21.IN698
-memory[689][4] => Mux12.IN698
-memory[689][4] => Mux20.IN698
-memory[689][5] => Mux11.IN698
-memory[689][5] => Mux19.IN698
-memory[689][6] => Mux10.IN698
-memory[689][6] => Mux18.IN698
-memory[689][7] => Mux9.IN698
-memory[689][7] => Mux17.IN698
-memory[688][0] => Mux16.IN697
-memory[688][0] => Mux24.IN697
-memory[688][1] => Mux15.IN697
-memory[688][1] => Mux23.IN697
-memory[688][2] => Mux14.IN697
-memory[688][2] => Mux22.IN697
-memory[688][3] => Mux13.IN697
-memory[688][3] => Mux21.IN697
-memory[688][4] => Mux12.IN697
-memory[688][4] => Mux20.IN697
-memory[688][5] => Mux11.IN697
-memory[688][5] => Mux19.IN697
-memory[688][6] => Mux10.IN697
-memory[688][6] => Mux18.IN697
-memory[688][7] => Mux9.IN697
-memory[688][7] => Mux17.IN697
-memory[687][0] => Mux16.IN696
-memory[687][0] => Mux24.IN696
-memory[687][1] => Mux15.IN696
-memory[687][1] => Mux23.IN696
-memory[687][2] => Mux14.IN696
-memory[687][2] => Mux22.IN696
-memory[687][3] => Mux13.IN696
-memory[687][3] => Mux21.IN696
-memory[687][4] => Mux12.IN696
-memory[687][4] => Mux20.IN696
-memory[687][5] => Mux11.IN696
-memory[687][5] => Mux19.IN696
-memory[687][6] => Mux10.IN696
-memory[687][6] => Mux18.IN696
-memory[687][7] => Mux9.IN696
-memory[687][7] => Mux17.IN696
-memory[686][0] => Mux16.IN695
-memory[686][0] => Mux24.IN695
-memory[686][1] => Mux15.IN695
-memory[686][1] => Mux23.IN695
-memory[686][2] => Mux14.IN695
-memory[686][2] => Mux22.IN695
-memory[686][3] => Mux13.IN695
-memory[686][3] => Mux21.IN695
-memory[686][4] => Mux12.IN695
-memory[686][4] => Mux20.IN695
-memory[686][5] => Mux11.IN695
-memory[686][5] => Mux19.IN695
-memory[686][6] => Mux10.IN695
-memory[686][6] => Mux18.IN695
-memory[686][7] => Mux9.IN695
-memory[686][7] => Mux17.IN695
-memory[685][0] => Mux16.IN694
-memory[685][0] => Mux24.IN694
-memory[685][1] => Mux15.IN694
-memory[685][1] => Mux23.IN694
-memory[685][2] => Mux14.IN694
-memory[685][2] => Mux22.IN694
-memory[685][3] => Mux13.IN694
-memory[685][3] => Mux21.IN694
-memory[685][4] => Mux12.IN694
-memory[685][4] => Mux20.IN694
-memory[685][5] => Mux11.IN694
-memory[685][5] => Mux19.IN694
-memory[685][6] => Mux10.IN694
-memory[685][6] => Mux18.IN694
-memory[685][7] => Mux9.IN694
-memory[685][7] => Mux17.IN694
-memory[684][0] => Mux16.IN693
-memory[684][0] => Mux24.IN693
-memory[684][1] => Mux15.IN693
-memory[684][1] => Mux23.IN693
-memory[684][2] => Mux14.IN693
-memory[684][2] => Mux22.IN693
-memory[684][3] => Mux13.IN693
-memory[684][3] => Mux21.IN693
-memory[684][4] => Mux12.IN693
-memory[684][4] => Mux20.IN693
-memory[684][5] => Mux11.IN693
-memory[684][5] => Mux19.IN693
-memory[684][6] => Mux10.IN693
-memory[684][6] => Mux18.IN693
-memory[684][7] => Mux9.IN693
-memory[684][7] => Mux17.IN693
-memory[683][0] => Mux16.IN692
-memory[683][0] => Mux24.IN692
-memory[683][1] => Mux15.IN692
-memory[683][1] => Mux23.IN692
-memory[683][2] => Mux14.IN692
-memory[683][2] => Mux22.IN692
-memory[683][3] => Mux13.IN692
-memory[683][3] => Mux21.IN692
-memory[683][4] => Mux12.IN692
-memory[683][4] => Mux20.IN692
-memory[683][5] => Mux11.IN692
-memory[683][5] => Mux19.IN692
-memory[683][6] => Mux10.IN692
-memory[683][6] => Mux18.IN692
-memory[683][7] => Mux9.IN692
-memory[683][7] => Mux17.IN692
-memory[682][0] => Mux16.IN691
-memory[682][0] => Mux24.IN691
-memory[682][1] => Mux15.IN691
-memory[682][1] => Mux23.IN691
-memory[682][2] => Mux14.IN691
-memory[682][2] => Mux22.IN691
-memory[682][3] => Mux13.IN691
-memory[682][3] => Mux21.IN691
-memory[682][4] => Mux12.IN691
-memory[682][4] => Mux20.IN691
-memory[682][5] => Mux11.IN691
-memory[682][5] => Mux19.IN691
-memory[682][6] => Mux10.IN691
-memory[682][6] => Mux18.IN691
-memory[682][7] => Mux9.IN691
-memory[682][7] => Mux17.IN691
-memory[681][0] => Mux16.IN690
-memory[681][0] => Mux24.IN690
-memory[681][1] => Mux15.IN690
-memory[681][1] => Mux23.IN690
-memory[681][2] => Mux14.IN690
-memory[681][2] => Mux22.IN690
-memory[681][3] => Mux13.IN690
-memory[681][3] => Mux21.IN690
-memory[681][4] => Mux12.IN690
-memory[681][4] => Mux20.IN690
-memory[681][5] => Mux11.IN690
-memory[681][5] => Mux19.IN690
-memory[681][6] => Mux10.IN690
-memory[681][6] => Mux18.IN690
-memory[681][7] => Mux9.IN690
-memory[681][7] => Mux17.IN690
-memory[680][0] => Mux16.IN689
-memory[680][0] => Mux24.IN689
-memory[680][1] => Mux15.IN689
-memory[680][1] => Mux23.IN689
-memory[680][2] => Mux14.IN689
-memory[680][2] => Mux22.IN689
-memory[680][3] => Mux13.IN689
-memory[680][3] => Mux21.IN689
-memory[680][4] => Mux12.IN689
-memory[680][4] => Mux20.IN689
-memory[680][5] => Mux11.IN689
-memory[680][5] => Mux19.IN689
-memory[680][6] => Mux10.IN689
-memory[680][6] => Mux18.IN689
-memory[680][7] => Mux9.IN689
-memory[680][7] => Mux17.IN689
-memory[679][0] => Mux16.IN688
-memory[679][0] => Mux24.IN688
-memory[679][1] => Mux15.IN688
-memory[679][1] => Mux23.IN688
-memory[679][2] => Mux14.IN688
-memory[679][2] => Mux22.IN688
-memory[679][3] => Mux13.IN688
-memory[679][3] => Mux21.IN688
-memory[679][4] => Mux12.IN688
-memory[679][4] => Mux20.IN688
-memory[679][5] => Mux11.IN688
-memory[679][5] => Mux19.IN688
-memory[679][6] => Mux10.IN688
-memory[679][6] => Mux18.IN688
-memory[679][7] => Mux9.IN688
-memory[679][7] => Mux17.IN688
-memory[678][0] => Mux16.IN687
-memory[678][0] => Mux24.IN687
-memory[678][1] => Mux15.IN687
-memory[678][1] => Mux23.IN687
-memory[678][2] => Mux14.IN687
-memory[678][2] => Mux22.IN687
-memory[678][3] => Mux13.IN687
-memory[678][3] => Mux21.IN687
-memory[678][4] => Mux12.IN687
-memory[678][4] => Mux20.IN687
-memory[678][5] => Mux11.IN687
-memory[678][5] => Mux19.IN687
-memory[678][6] => Mux10.IN687
-memory[678][6] => Mux18.IN687
-memory[678][7] => Mux9.IN687
-memory[678][7] => Mux17.IN687
-memory[677][0] => Mux16.IN686
-memory[677][0] => Mux24.IN686
-memory[677][1] => Mux15.IN686
-memory[677][1] => Mux23.IN686
-memory[677][2] => Mux14.IN686
-memory[677][2] => Mux22.IN686
-memory[677][3] => Mux13.IN686
-memory[677][3] => Mux21.IN686
-memory[677][4] => Mux12.IN686
-memory[677][4] => Mux20.IN686
-memory[677][5] => Mux11.IN686
-memory[677][5] => Mux19.IN686
-memory[677][6] => Mux10.IN686
-memory[677][6] => Mux18.IN686
-memory[677][7] => Mux9.IN686
-memory[677][7] => Mux17.IN686
-memory[676][0] => Mux16.IN685
-memory[676][0] => Mux24.IN685
-memory[676][1] => Mux15.IN685
-memory[676][1] => Mux23.IN685
-memory[676][2] => Mux14.IN685
-memory[676][2] => Mux22.IN685
-memory[676][3] => Mux13.IN685
-memory[676][3] => Mux21.IN685
-memory[676][4] => Mux12.IN685
-memory[676][4] => Mux20.IN685
-memory[676][5] => Mux11.IN685
-memory[676][5] => Mux19.IN685
-memory[676][6] => Mux10.IN685
-memory[676][6] => Mux18.IN685
-memory[676][7] => Mux9.IN685
-memory[676][7] => Mux17.IN685
-memory[675][0] => Mux16.IN684
-memory[675][0] => Mux24.IN684
-memory[675][1] => Mux15.IN684
-memory[675][1] => Mux23.IN684
-memory[675][2] => Mux14.IN684
-memory[675][2] => Mux22.IN684
-memory[675][3] => Mux13.IN684
-memory[675][3] => Mux21.IN684
-memory[675][4] => Mux12.IN684
-memory[675][4] => Mux20.IN684
-memory[675][5] => Mux11.IN684
-memory[675][5] => Mux19.IN684
-memory[675][6] => Mux10.IN684
-memory[675][6] => Mux18.IN684
-memory[675][7] => Mux9.IN684
-memory[675][7] => Mux17.IN684
-memory[674][0] => Mux16.IN683
-memory[674][0] => Mux24.IN683
-memory[674][1] => Mux15.IN683
-memory[674][1] => Mux23.IN683
-memory[674][2] => Mux14.IN683
-memory[674][2] => Mux22.IN683
-memory[674][3] => Mux13.IN683
-memory[674][3] => Mux21.IN683
-memory[674][4] => Mux12.IN683
-memory[674][4] => Mux20.IN683
-memory[674][5] => Mux11.IN683
-memory[674][5] => Mux19.IN683
-memory[674][6] => Mux10.IN683
-memory[674][6] => Mux18.IN683
-memory[674][7] => Mux9.IN683
-memory[674][7] => Mux17.IN683
-memory[673][0] => Mux16.IN682
-memory[673][0] => Mux24.IN682
-memory[673][1] => Mux15.IN682
-memory[673][1] => Mux23.IN682
-memory[673][2] => Mux14.IN682
-memory[673][2] => Mux22.IN682
-memory[673][3] => Mux13.IN682
-memory[673][3] => Mux21.IN682
-memory[673][4] => Mux12.IN682
-memory[673][4] => Mux20.IN682
-memory[673][5] => Mux11.IN682
-memory[673][5] => Mux19.IN682
-memory[673][6] => Mux10.IN682
-memory[673][6] => Mux18.IN682
-memory[673][7] => Mux9.IN682
-memory[673][7] => Mux17.IN682
-memory[672][0] => Mux16.IN681
-memory[672][0] => Mux24.IN681
-memory[672][1] => Mux15.IN681
-memory[672][1] => Mux23.IN681
-memory[672][2] => Mux14.IN681
-memory[672][2] => Mux22.IN681
-memory[672][3] => Mux13.IN681
-memory[672][3] => Mux21.IN681
-memory[672][4] => Mux12.IN681
-memory[672][4] => Mux20.IN681
-memory[672][5] => Mux11.IN681
-memory[672][5] => Mux19.IN681
-memory[672][6] => Mux10.IN681
-memory[672][6] => Mux18.IN681
-memory[672][7] => Mux9.IN681
-memory[672][7] => Mux17.IN681
-memory[671][0] => Mux16.IN680
-memory[671][0] => Mux24.IN680
-memory[671][1] => Mux15.IN680
-memory[671][1] => Mux23.IN680
-memory[671][2] => Mux14.IN680
-memory[671][2] => Mux22.IN680
-memory[671][3] => Mux13.IN680
-memory[671][3] => Mux21.IN680
-memory[671][4] => Mux12.IN680
-memory[671][4] => Mux20.IN680
-memory[671][5] => Mux11.IN680
-memory[671][5] => Mux19.IN680
-memory[671][6] => Mux10.IN680
-memory[671][6] => Mux18.IN680
-memory[671][7] => Mux9.IN680
-memory[671][7] => Mux17.IN680
-memory[670][0] => Mux16.IN679
-memory[670][0] => Mux24.IN679
-memory[670][1] => Mux15.IN679
-memory[670][1] => Mux23.IN679
-memory[670][2] => Mux14.IN679
-memory[670][2] => Mux22.IN679
-memory[670][3] => Mux13.IN679
-memory[670][3] => Mux21.IN679
-memory[670][4] => Mux12.IN679
-memory[670][4] => Mux20.IN679
-memory[670][5] => Mux11.IN679
-memory[670][5] => Mux19.IN679
-memory[670][6] => Mux10.IN679
-memory[670][6] => Mux18.IN679
-memory[670][7] => Mux9.IN679
-memory[670][7] => Mux17.IN679
-memory[669][0] => Mux16.IN678
-memory[669][0] => Mux24.IN678
-memory[669][1] => Mux15.IN678
-memory[669][1] => Mux23.IN678
-memory[669][2] => Mux14.IN678
-memory[669][2] => Mux22.IN678
-memory[669][3] => Mux13.IN678
-memory[669][3] => Mux21.IN678
-memory[669][4] => Mux12.IN678
-memory[669][4] => Mux20.IN678
-memory[669][5] => Mux11.IN678
-memory[669][5] => Mux19.IN678
-memory[669][6] => Mux10.IN678
-memory[669][6] => Mux18.IN678
-memory[669][7] => Mux9.IN678
-memory[669][7] => Mux17.IN678
-memory[668][0] => Mux16.IN677
-memory[668][0] => Mux24.IN677
-memory[668][1] => Mux15.IN677
-memory[668][1] => Mux23.IN677
-memory[668][2] => Mux14.IN677
-memory[668][2] => Mux22.IN677
-memory[668][3] => Mux13.IN677
-memory[668][3] => Mux21.IN677
-memory[668][4] => Mux12.IN677
-memory[668][4] => Mux20.IN677
-memory[668][5] => Mux11.IN677
-memory[668][5] => Mux19.IN677
-memory[668][6] => Mux10.IN677
-memory[668][6] => Mux18.IN677
-memory[668][7] => Mux9.IN677
-memory[668][7] => Mux17.IN677
-memory[667][0] => Mux16.IN676
-memory[667][0] => Mux24.IN676
-memory[667][1] => Mux15.IN676
-memory[667][1] => Mux23.IN676
-memory[667][2] => Mux14.IN676
-memory[667][2] => Mux22.IN676
-memory[667][3] => Mux13.IN676
-memory[667][3] => Mux21.IN676
-memory[667][4] => Mux12.IN676
-memory[667][4] => Mux20.IN676
-memory[667][5] => Mux11.IN676
-memory[667][5] => Mux19.IN676
-memory[667][6] => Mux10.IN676
-memory[667][6] => Mux18.IN676
-memory[667][7] => Mux9.IN676
-memory[667][7] => Mux17.IN676
-memory[666][0] => Mux16.IN675
-memory[666][0] => Mux24.IN675
-memory[666][1] => Mux15.IN675
-memory[666][1] => Mux23.IN675
-memory[666][2] => Mux14.IN675
-memory[666][2] => Mux22.IN675
-memory[666][3] => Mux13.IN675
-memory[666][3] => Mux21.IN675
-memory[666][4] => Mux12.IN675
-memory[666][4] => Mux20.IN675
-memory[666][5] => Mux11.IN675
-memory[666][5] => Mux19.IN675
-memory[666][6] => Mux10.IN675
-memory[666][6] => Mux18.IN675
-memory[666][7] => Mux9.IN675
-memory[666][7] => Mux17.IN675
-memory[665][0] => Mux16.IN674
-memory[665][0] => Mux24.IN674
-memory[665][1] => Mux15.IN674
-memory[665][1] => Mux23.IN674
-memory[665][2] => Mux14.IN674
-memory[665][2] => Mux22.IN674
-memory[665][3] => Mux13.IN674
-memory[665][3] => Mux21.IN674
-memory[665][4] => Mux12.IN674
-memory[665][4] => Mux20.IN674
-memory[665][5] => Mux11.IN674
-memory[665][5] => Mux19.IN674
-memory[665][6] => Mux10.IN674
-memory[665][6] => Mux18.IN674
-memory[665][7] => Mux9.IN674
-memory[665][7] => Mux17.IN674
-memory[664][0] => Mux16.IN673
-memory[664][0] => Mux24.IN673
-memory[664][1] => Mux15.IN673
-memory[664][1] => Mux23.IN673
-memory[664][2] => Mux14.IN673
-memory[664][2] => Mux22.IN673
-memory[664][3] => Mux13.IN673
-memory[664][3] => Mux21.IN673
-memory[664][4] => Mux12.IN673
-memory[664][4] => Mux20.IN673
-memory[664][5] => Mux11.IN673
-memory[664][5] => Mux19.IN673
-memory[664][6] => Mux10.IN673
-memory[664][6] => Mux18.IN673
-memory[664][7] => Mux9.IN673
-memory[664][7] => Mux17.IN673
-memory[663][0] => Mux16.IN672
-memory[663][0] => Mux24.IN672
-memory[663][1] => Mux15.IN672
-memory[663][1] => Mux23.IN672
-memory[663][2] => Mux14.IN672
-memory[663][2] => Mux22.IN672
-memory[663][3] => Mux13.IN672
-memory[663][3] => Mux21.IN672
-memory[663][4] => Mux12.IN672
-memory[663][4] => Mux20.IN672
-memory[663][5] => Mux11.IN672
-memory[663][5] => Mux19.IN672
-memory[663][6] => Mux10.IN672
-memory[663][6] => Mux18.IN672
-memory[663][7] => Mux9.IN672
-memory[663][7] => Mux17.IN672
-memory[662][0] => Mux16.IN671
-memory[662][0] => Mux24.IN671
-memory[662][1] => Mux15.IN671
-memory[662][1] => Mux23.IN671
-memory[662][2] => Mux14.IN671
-memory[662][2] => Mux22.IN671
-memory[662][3] => Mux13.IN671
-memory[662][3] => Mux21.IN671
-memory[662][4] => Mux12.IN671
-memory[662][4] => Mux20.IN671
-memory[662][5] => Mux11.IN671
-memory[662][5] => Mux19.IN671
-memory[662][6] => Mux10.IN671
-memory[662][6] => Mux18.IN671
-memory[662][7] => Mux9.IN671
-memory[662][7] => Mux17.IN671
-memory[661][0] => Mux16.IN670
-memory[661][0] => Mux24.IN670
-memory[661][1] => Mux15.IN670
-memory[661][1] => Mux23.IN670
-memory[661][2] => Mux14.IN670
-memory[661][2] => Mux22.IN670
-memory[661][3] => Mux13.IN670
-memory[661][3] => Mux21.IN670
-memory[661][4] => Mux12.IN670
-memory[661][4] => Mux20.IN670
-memory[661][5] => Mux11.IN670
-memory[661][5] => Mux19.IN670
-memory[661][6] => Mux10.IN670
-memory[661][6] => Mux18.IN670
-memory[661][7] => Mux9.IN670
-memory[661][7] => Mux17.IN670
-memory[660][0] => Mux16.IN669
-memory[660][0] => Mux24.IN669
-memory[660][1] => Mux15.IN669
-memory[660][1] => Mux23.IN669
-memory[660][2] => Mux14.IN669
-memory[660][2] => Mux22.IN669
-memory[660][3] => Mux13.IN669
-memory[660][3] => Mux21.IN669
-memory[660][4] => Mux12.IN669
-memory[660][4] => Mux20.IN669
-memory[660][5] => Mux11.IN669
-memory[660][5] => Mux19.IN669
-memory[660][6] => Mux10.IN669
-memory[660][6] => Mux18.IN669
-memory[660][7] => Mux9.IN669
-memory[660][7] => Mux17.IN669
-memory[659][0] => Mux16.IN668
-memory[659][0] => Mux24.IN668
-memory[659][1] => Mux15.IN668
-memory[659][1] => Mux23.IN668
-memory[659][2] => Mux14.IN668
-memory[659][2] => Mux22.IN668
-memory[659][3] => Mux13.IN668
-memory[659][3] => Mux21.IN668
-memory[659][4] => Mux12.IN668
-memory[659][4] => Mux20.IN668
-memory[659][5] => Mux11.IN668
-memory[659][5] => Mux19.IN668
-memory[659][6] => Mux10.IN668
-memory[659][6] => Mux18.IN668
-memory[659][7] => Mux9.IN668
-memory[659][7] => Mux17.IN668
-memory[658][0] => Mux16.IN667
-memory[658][0] => Mux24.IN667
-memory[658][1] => Mux15.IN667
-memory[658][1] => Mux23.IN667
-memory[658][2] => Mux14.IN667
-memory[658][2] => Mux22.IN667
-memory[658][3] => Mux13.IN667
-memory[658][3] => Mux21.IN667
-memory[658][4] => Mux12.IN667
-memory[658][4] => Mux20.IN667
-memory[658][5] => Mux11.IN667
-memory[658][5] => Mux19.IN667
-memory[658][6] => Mux10.IN667
-memory[658][6] => Mux18.IN667
-memory[658][7] => Mux9.IN667
-memory[658][7] => Mux17.IN667
-memory[657][0] => Mux16.IN666
-memory[657][0] => Mux24.IN666
-memory[657][1] => Mux15.IN666
-memory[657][1] => Mux23.IN666
-memory[657][2] => Mux14.IN666
-memory[657][2] => Mux22.IN666
-memory[657][3] => Mux13.IN666
-memory[657][3] => Mux21.IN666
-memory[657][4] => Mux12.IN666
-memory[657][4] => Mux20.IN666
-memory[657][5] => Mux11.IN666
-memory[657][5] => Mux19.IN666
-memory[657][6] => Mux10.IN666
-memory[657][6] => Mux18.IN666
-memory[657][7] => Mux9.IN666
-memory[657][7] => Mux17.IN666
-memory[656][0] => Mux16.IN665
-memory[656][0] => Mux24.IN665
-memory[656][1] => Mux15.IN665
-memory[656][1] => Mux23.IN665
-memory[656][2] => Mux14.IN665
-memory[656][2] => Mux22.IN665
-memory[656][3] => Mux13.IN665
-memory[656][3] => Mux21.IN665
-memory[656][4] => Mux12.IN665
-memory[656][4] => Mux20.IN665
-memory[656][5] => Mux11.IN665
-memory[656][5] => Mux19.IN665
-memory[656][6] => Mux10.IN665
-memory[656][6] => Mux18.IN665
-memory[656][7] => Mux9.IN665
-memory[656][7] => Mux17.IN665
-memory[655][0] => Mux16.IN664
-memory[655][0] => Mux24.IN664
-memory[655][1] => Mux15.IN664
-memory[655][1] => Mux23.IN664
-memory[655][2] => Mux14.IN664
-memory[655][2] => Mux22.IN664
-memory[655][3] => Mux13.IN664
-memory[655][3] => Mux21.IN664
-memory[655][4] => Mux12.IN664
-memory[655][4] => Mux20.IN664
-memory[655][5] => Mux11.IN664
-memory[655][5] => Mux19.IN664
-memory[655][6] => Mux10.IN664
-memory[655][6] => Mux18.IN664
-memory[655][7] => Mux9.IN664
-memory[655][7] => Mux17.IN664
-memory[654][0] => Mux16.IN663
-memory[654][0] => Mux24.IN663
-memory[654][1] => Mux15.IN663
-memory[654][1] => Mux23.IN663
-memory[654][2] => Mux14.IN663
-memory[654][2] => Mux22.IN663
-memory[654][3] => Mux13.IN663
-memory[654][3] => Mux21.IN663
-memory[654][4] => Mux12.IN663
-memory[654][4] => Mux20.IN663
-memory[654][5] => Mux11.IN663
-memory[654][5] => Mux19.IN663
-memory[654][6] => Mux10.IN663
-memory[654][6] => Mux18.IN663
-memory[654][7] => Mux9.IN663
-memory[654][7] => Mux17.IN663
-memory[653][0] => Mux16.IN662
-memory[653][0] => Mux24.IN662
-memory[653][1] => Mux15.IN662
-memory[653][1] => Mux23.IN662
-memory[653][2] => Mux14.IN662
-memory[653][2] => Mux22.IN662
-memory[653][3] => Mux13.IN662
-memory[653][3] => Mux21.IN662
-memory[653][4] => Mux12.IN662
-memory[653][4] => Mux20.IN662
-memory[653][5] => Mux11.IN662
-memory[653][5] => Mux19.IN662
-memory[653][6] => Mux10.IN662
-memory[653][6] => Mux18.IN662
-memory[653][7] => Mux9.IN662
-memory[653][7] => Mux17.IN662
-memory[652][0] => Mux16.IN661
-memory[652][0] => Mux24.IN661
-memory[652][1] => Mux15.IN661
-memory[652][1] => Mux23.IN661
-memory[652][2] => Mux14.IN661
-memory[652][2] => Mux22.IN661
-memory[652][3] => Mux13.IN661
-memory[652][3] => Mux21.IN661
-memory[652][4] => Mux12.IN661
-memory[652][4] => Mux20.IN661
-memory[652][5] => Mux11.IN661
-memory[652][5] => Mux19.IN661
-memory[652][6] => Mux10.IN661
-memory[652][6] => Mux18.IN661
-memory[652][7] => Mux9.IN661
-memory[652][7] => Mux17.IN661
-memory[651][0] => Mux16.IN660
-memory[651][0] => Mux24.IN660
-memory[651][1] => Mux15.IN660
-memory[651][1] => Mux23.IN660
-memory[651][2] => Mux14.IN660
-memory[651][2] => Mux22.IN660
-memory[651][3] => Mux13.IN660
-memory[651][3] => Mux21.IN660
-memory[651][4] => Mux12.IN660
-memory[651][4] => Mux20.IN660
-memory[651][5] => Mux11.IN660
-memory[651][5] => Mux19.IN660
-memory[651][6] => Mux10.IN660
-memory[651][6] => Mux18.IN660
-memory[651][7] => Mux9.IN660
-memory[651][7] => Mux17.IN660
-memory[650][0] => Mux16.IN659
-memory[650][0] => Mux24.IN659
-memory[650][1] => Mux15.IN659
-memory[650][1] => Mux23.IN659
-memory[650][2] => Mux14.IN659
-memory[650][2] => Mux22.IN659
-memory[650][3] => Mux13.IN659
-memory[650][3] => Mux21.IN659
-memory[650][4] => Mux12.IN659
-memory[650][4] => Mux20.IN659
-memory[650][5] => Mux11.IN659
-memory[650][5] => Mux19.IN659
-memory[650][6] => Mux10.IN659
-memory[650][6] => Mux18.IN659
-memory[650][7] => Mux9.IN659
-memory[650][7] => Mux17.IN659
-memory[649][0] => Mux16.IN658
-memory[649][0] => Mux24.IN658
-memory[649][1] => Mux15.IN658
-memory[649][1] => Mux23.IN658
-memory[649][2] => Mux14.IN658
-memory[649][2] => Mux22.IN658
-memory[649][3] => Mux13.IN658
-memory[649][3] => Mux21.IN658
-memory[649][4] => Mux12.IN658
-memory[649][4] => Mux20.IN658
-memory[649][5] => Mux11.IN658
-memory[649][5] => Mux19.IN658
-memory[649][6] => Mux10.IN658
-memory[649][6] => Mux18.IN658
-memory[649][7] => Mux9.IN658
-memory[649][7] => Mux17.IN658
-memory[648][0] => Mux16.IN657
-memory[648][0] => Mux24.IN657
-memory[648][1] => Mux15.IN657
-memory[648][1] => Mux23.IN657
-memory[648][2] => Mux14.IN657
-memory[648][2] => Mux22.IN657
-memory[648][3] => Mux13.IN657
-memory[648][3] => Mux21.IN657
-memory[648][4] => Mux12.IN657
-memory[648][4] => Mux20.IN657
-memory[648][5] => Mux11.IN657
-memory[648][5] => Mux19.IN657
-memory[648][6] => Mux10.IN657
-memory[648][6] => Mux18.IN657
-memory[648][7] => Mux9.IN657
-memory[648][7] => Mux17.IN657
-memory[647][0] => Mux16.IN656
-memory[647][0] => Mux24.IN656
-memory[647][1] => Mux15.IN656
-memory[647][1] => Mux23.IN656
-memory[647][2] => Mux14.IN656
-memory[647][2] => Mux22.IN656
-memory[647][3] => Mux13.IN656
-memory[647][3] => Mux21.IN656
-memory[647][4] => Mux12.IN656
-memory[647][4] => Mux20.IN656
-memory[647][5] => Mux11.IN656
-memory[647][5] => Mux19.IN656
-memory[647][6] => Mux10.IN656
-memory[647][6] => Mux18.IN656
-memory[647][7] => Mux9.IN656
-memory[647][7] => Mux17.IN656
-memory[646][0] => Mux16.IN655
-memory[646][0] => Mux24.IN655
-memory[646][1] => Mux15.IN655
-memory[646][1] => Mux23.IN655
-memory[646][2] => Mux14.IN655
-memory[646][2] => Mux22.IN655
-memory[646][3] => Mux13.IN655
-memory[646][3] => Mux21.IN655
-memory[646][4] => Mux12.IN655
-memory[646][4] => Mux20.IN655
-memory[646][5] => Mux11.IN655
-memory[646][5] => Mux19.IN655
-memory[646][6] => Mux10.IN655
-memory[646][6] => Mux18.IN655
-memory[646][7] => Mux9.IN655
-memory[646][7] => Mux17.IN655
-memory[645][0] => Mux16.IN654
-memory[645][0] => Mux24.IN654
-memory[645][1] => Mux15.IN654
-memory[645][1] => Mux23.IN654
-memory[645][2] => Mux14.IN654
-memory[645][2] => Mux22.IN654
-memory[645][3] => Mux13.IN654
-memory[645][3] => Mux21.IN654
-memory[645][4] => Mux12.IN654
-memory[645][4] => Mux20.IN654
-memory[645][5] => Mux11.IN654
-memory[645][5] => Mux19.IN654
-memory[645][6] => Mux10.IN654
-memory[645][6] => Mux18.IN654
-memory[645][7] => Mux9.IN654
-memory[645][7] => Mux17.IN654
-memory[644][0] => Mux16.IN653
-memory[644][0] => Mux24.IN653
-memory[644][1] => Mux15.IN653
-memory[644][1] => Mux23.IN653
-memory[644][2] => Mux14.IN653
-memory[644][2] => Mux22.IN653
-memory[644][3] => Mux13.IN653
-memory[644][3] => Mux21.IN653
-memory[644][4] => Mux12.IN653
-memory[644][4] => Mux20.IN653
-memory[644][5] => Mux11.IN653
-memory[644][5] => Mux19.IN653
-memory[644][6] => Mux10.IN653
-memory[644][6] => Mux18.IN653
-memory[644][7] => Mux9.IN653
-memory[644][7] => Mux17.IN653
-memory[643][0] => Mux16.IN652
-memory[643][0] => Mux24.IN652
-memory[643][1] => Mux15.IN652
-memory[643][1] => Mux23.IN652
-memory[643][2] => Mux14.IN652
-memory[643][2] => Mux22.IN652
-memory[643][3] => Mux13.IN652
-memory[643][3] => Mux21.IN652
-memory[643][4] => Mux12.IN652
-memory[643][4] => Mux20.IN652
-memory[643][5] => Mux11.IN652
-memory[643][5] => Mux19.IN652
-memory[643][6] => Mux10.IN652
-memory[643][6] => Mux18.IN652
-memory[643][7] => Mux9.IN652
-memory[643][7] => Mux17.IN652
-memory[642][0] => Mux16.IN651
-memory[642][0] => Mux24.IN651
-memory[642][1] => Mux15.IN651
-memory[642][1] => Mux23.IN651
-memory[642][2] => Mux14.IN651
-memory[642][2] => Mux22.IN651
-memory[642][3] => Mux13.IN651
-memory[642][3] => Mux21.IN651
-memory[642][4] => Mux12.IN651
-memory[642][4] => Mux20.IN651
-memory[642][5] => Mux11.IN651
-memory[642][5] => Mux19.IN651
-memory[642][6] => Mux10.IN651
-memory[642][6] => Mux18.IN651
-memory[642][7] => Mux9.IN651
-memory[642][7] => Mux17.IN651
-memory[641][0] => Mux16.IN650
-memory[641][0] => Mux24.IN650
-memory[641][1] => Mux15.IN650
-memory[641][1] => Mux23.IN650
-memory[641][2] => Mux14.IN650
-memory[641][2] => Mux22.IN650
-memory[641][3] => Mux13.IN650
-memory[641][3] => Mux21.IN650
-memory[641][4] => Mux12.IN650
-memory[641][4] => Mux20.IN650
-memory[641][5] => Mux11.IN650
-memory[641][5] => Mux19.IN650
-memory[641][6] => Mux10.IN650
-memory[641][6] => Mux18.IN650
-memory[641][7] => Mux9.IN650
-memory[641][7] => Mux17.IN650
-memory[640][0] => Mux16.IN649
-memory[640][0] => Mux24.IN649
-memory[640][1] => Mux15.IN649
-memory[640][1] => Mux23.IN649
-memory[640][2] => Mux14.IN649
-memory[640][2] => Mux22.IN649
-memory[640][3] => Mux13.IN649
-memory[640][3] => Mux21.IN649
-memory[640][4] => Mux12.IN649
-memory[640][4] => Mux20.IN649
-memory[640][5] => Mux11.IN649
-memory[640][5] => Mux19.IN649
-memory[640][6] => Mux10.IN649
-memory[640][6] => Mux18.IN649
-memory[640][7] => Mux9.IN649
-memory[640][7] => Mux17.IN649
-memory[639][0] => Mux16.IN648
-memory[639][0] => Mux24.IN648
-memory[639][1] => Mux15.IN648
-memory[639][1] => Mux23.IN648
-memory[639][2] => Mux14.IN648
-memory[639][2] => Mux22.IN648
-memory[639][3] => Mux13.IN648
-memory[639][3] => Mux21.IN648
-memory[639][4] => Mux12.IN648
-memory[639][4] => Mux20.IN648
-memory[639][5] => Mux11.IN648
-memory[639][5] => Mux19.IN648
-memory[639][6] => Mux10.IN648
-memory[639][6] => Mux18.IN648
-memory[639][7] => Mux9.IN648
-memory[639][7] => Mux17.IN648
-memory[638][0] => Mux16.IN647
-memory[638][0] => Mux24.IN647
-memory[638][1] => Mux15.IN647
-memory[638][1] => Mux23.IN647
-memory[638][2] => Mux14.IN647
-memory[638][2] => Mux22.IN647
-memory[638][3] => Mux13.IN647
-memory[638][3] => Mux21.IN647
-memory[638][4] => Mux12.IN647
-memory[638][4] => Mux20.IN647
-memory[638][5] => Mux11.IN647
-memory[638][5] => Mux19.IN647
-memory[638][6] => Mux10.IN647
-memory[638][6] => Mux18.IN647
-memory[638][7] => Mux9.IN647
-memory[638][7] => Mux17.IN647
-memory[637][0] => Mux16.IN646
-memory[637][0] => Mux24.IN646
-memory[637][1] => Mux15.IN646
-memory[637][1] => Mux23.IN646
-memory[637][2] => Mux14.IN646
-memory[637][2] => Mux22.IN646
-memory[637][3] => Mux13.IN646
-memory[637][3] => Mux21.IN646
-memory[637][4] => Mux12.IN646
-memory[637][4] => Mux20.IN646
-memory[637][5] => Mux11.IN646
-memory[637][5] => Mux19.IN646
-memory[637][6] => Mux10.IN646
-memory[637][6] => Mux18.IN646
-memory[637][7] => Mux9.IN646
-memory[637][7] => Mux17.IN646
-memory[636][0] => Mux16.IN645
-memory[636][0] => Mux24.IN645
-memory[636][1] => Mux15.IN645
-memory[636][1] => Mux23.IN645
-memory[636][2] => Mux14.IN645
-memory[636][2] => Mux22.IN645
-memory[636][3] => Mux13.IN645
-memory[636][3] => Mux21.IN645
-memory[636][4] => Mux12.IN645
-memory[636][4] => Mux20.IN645
-memory[636][5] => Mux11.IN645
-memory[636][5] => Mux19.IN645
-memory[636][6] => Mux10.IN645
-memory[636][6] => Mux18.IN645
-memory[636][7] => Mux9.IN645
-memory[636][7] => Mux17.IN645
-memory[635][0] => Mux16.IN644
-memory[635][0] => Mux24.IN644
-memory[635][1] => Mux15.IN644
-memory[635][1] => Mux23.IN644
-memory[635][2] => Mux14.IN644
-memory[635][2] => Mux22.IN644
-memory[635][3] => Mux13.IN644
-memory[635][3] => Mux21.IN644
-memory[635][4] => Mux12.IN644
-memory[635][4] => Mux20.IN644
-memory[635][5] => Mux11.IN644
-memory[635][5] => Mux19.IN644
-memory[635][6] => Mux10.IN644
-memory[635][6] => Mux18.IN644
-memory[635][7] => Mux9.IN644
-memory[635][7] => Mux17.IN644
-memory[634][0] => Mux16.IN643
-memory[634][0] => Mux24.IN643
-memory[634][1] => Mux15.IN643
-memory[634][1] => Mux23.IN643
-memory[634][2] => Mux14.IN643
-memory[634][2] => Mux22.IN643
-memory[634][3] => Mux13.IN643
-memory[634][3] => Mux21.IN643
-memory[634][4] => Mux12.IN643
-memory[634][4] => Mux20.IN643
-memory[634][5] => Mux11.IN643
-memory[634][5] => Mux19.IN643
-memory[634][6] => Mux10.IN643
-memory[634][6] => Mux18.IN643
-memory[634][7] => Mux9.IN643
-memory[634][7] => Mux17.IN643
-memory[633][0] => Mux16.IN642
-memory[633][0] => Mux24.IN642
-memory[633][1] => Mux15.IN642
-memory[633][1] => Mux23.IN642
-memory[633][2] => Mux14.IN642
-memory[633][2] => Mux22.IN642
-memory[633][3] => Mux13.IN642
-memory[633][3] => Mux21.IN642
-memory[633][4] => Mux12.IN642
-memory[633][4] => Mux20.IN642
-memory[633][5] => Mux11.IN642
-memory[633][5] => Mux19.IN642
-memory[633][6] => Mux10.IN642
-memory[633][6] => Mux18.IN642
-memory[633][7] => Mux9.IN642
-memory[633][7] => Mux17.IN642
-memory[632][0] => Mux16.IN641
-memory[632][0] => Mux24.IN641
-memory[632][1] => Mux15.IN641
-memory[632][1] => Mux23.IN641
-memory[632][2] => Mux14.IN641
-memory[632][2] => Mux22.IN641
-memory[632][3] => Mux13.IN641
-memory[632][3] => Mux21.IN641
-memory[632][4] => Mux12.IN641
-memory[632][4] => Mux20.IN641
-memory[632][5] => Mux11.IN641
-memory[632][5] => Mux19.IN641
-memory[632][6] => Mux10.IN641
-memory[632][6] => Mux18.IN641
-memory[632][7] => Mux9.IN641
-memory[632][7] => Mux17.IN641
-memory[631][0] => Mux16.IN640
-memory[631][0] => Mux24.IN640
-memory[631][1] => Mux15.IN640
-memory[631][1] => Mux23.IN640
-memory[631][2] => Mux14.IN640
-memory[631][2] => Mux22.IN640
-memory[631][3] => Mux13.IN640
-memory[631][3] => Mux21.IN640
-memory[631][4] => Mux12.IN640
-memory[631][4] => Mux20.IN640
-memory[631][5] => Mux11.IN640
-memory[631][5] => Mux19.IN640
-memory[631][6] => Mux10.IN640
-memory[631][6] => Mux18.IN640
-memory[631][7] => Mux9.IN640
-memory[631][7] => Mux17.IN640
-memory[630][0] => Mux16.IN639
-memory[630][0] => Mux24.IN639
-memory[630][1] => Mux15.IN639
-memory[630][1] => Mux23.IN639
-memory[630][2] => Mux14.IN639
-memory[630][2] => Mux22.IN639
-memory[630][3] => Mux13.IN639
-memory[630][3] => Mux21.IN639
-memory[630][4] => Mux12.IN639
-memory[630][4] => Mux20.IN639
-memory[630][5] => Mux11.IN639
-memory[630][5] => Mux19.IN639
-memory[630][6] => Mux10.IN639
-memory[630][6] => Mux18.IN639
-memory[630][7] => Mux9.IN639
-memory[630][7] => Mux17.IN639
-memory[629][0] => Mux16.IN638
-memory[629][0] => Mux24.IN638
-memory[629][1] => Mux15.IN638
-memory[629][1] => Mux23.IN638
-memory[629][2] => Mux14.IN638
-memory[629][2] => Mux22.IN638
-memory[629][3] => Mux13.IN638
-memory[629][3] => Mux21.IN638
-memory[629][4] => Mux12.IN638
-memory[629][4] => Mux20.IN638
-memory[629][5] => Mux11.IN638
-memory[629][5] => Mux19.IN638
-memory[629][6] => Mux10.IN638
-memory[629][6] => Mux18.IN638
-memory[629][7] => Mux9.IN638
-memory[629][7] => Mux17.IN638
-memory[628][0] => Mux16.IN637
-memory[628][0] => Mux24.IN637
-memory[628][1] => Mux15.IN637
-memory[628][1] => Mux23.IN637
-memory[628][2] => Mux14.IN637
-memory[628][2] => Mux22.IN637
-memory[628][3] => Mux13.IN637
-memory[628][3] => Mux21.IN637
-memory[628][4] => Mux12.IN637
-memory[628][4] => Mux20.IN637
-memory[628][5] => Mux11.IN637
-memory[628][5] => Mux19.IN637
-memory[628][6] => Mux10.IN637
-memory[628][6] => Mux18.IN637
-memory[628][7] => Mux9.IN637
-memory[628][7] => Mux17.IN637
-memory[627][0] => Mux16.IN636
-memory[627][0] => Mux24.IN636
-memory[627][1] => Mux15.IN636
-memory[627][1] => Mux23.IN636
-memory[627][2] => Mux14.IN636
-memory[627][2] => Mux22.IN636
-memory[627][3] => Mux13.IN636
-memory[627][3] => Mux21.IN636
-memory[627][4] => Mux12.IN636
-memory[627][4] => Mux20.IN636
-memory[627][5] => Mux11.IN636
-memory[627][5] => Mux19.IN636
-memory[627][6] => Mux10.IN636
-memory[627][6] => Mux18.IN636
-memory[627][7] => Mux9.IN636
-memory[627][7] => Mux17.IN636
-memory[626][0] => Mux16.IN635
-memory[626][0] => Mux24.IN635
-memory[626][1] => Mux15.IN635
-memory[626][1] => Mux23.IN635
-memory[626][2] => Mux14.IN635
-memory[626][2] => Mux22.IN635
-memory[626][3] => Mux13.IN635
-memory[626][3] => Mux21.IN635
-memory[626][4] => Mux12.IN635
-memory[626][4] => Mux20.IN635
-memory[626][5] => Mux11.IN635
-memory[626][5] => Mux19.IN635
-memory[626][6] => Mux10.IN635
-memory[626][6] => Mux18.IN635
-memory[626][7] => Mux9.IN635
-memory[626][7] => Mux17.IN635
-memory[625][0] => Mux16.IN634
-memory[625][0] => Mux24.IN634
-memory[625][1] => Mux15.IN634
-memory[625][1] => Mux23.IN634
-memory[625][2] => Mux14.IN634
-memory[625][2] => Mux22.IN634
-memory[625][3] => Mux13.IN634
-memory[625][3] => Mux21.IN634
-memory[625][4] => Mux12.IN634
-memory[625][4] => Mux20.IN634
-memory[625][5] => Mux11.IN634
-memory[625][5] => Mux19.IN634
-memory[625][6] => Mux10.IN634
-memory[625][6] => Mux18.IN634
-memory[625][7] => Mux9.IN634
-memory[625][7] => Mux17.IN634
-memory[624][0] => Mux16.IN633
-memory[624][0] => Mux24.IN633
-memory[624][1] => Mux15.IN633
-memory[624][1] => Mux23.IN633
-memory[624][2] => Mux14.IN633
-memory[624][2] => Mux22.IN633
-memory[624][3] => Mux13.IN633
-memory[624][3] => Mux21.IN633
-memory[624][4] => Mux12.IN633
-memory[624][4] => Mux20.IN633
-memory[624][5] => Mux11.IN633
-memory[624][5] => Mux19.IN633
-memory[624][6] => Mux10.IN633
-memory[624][6] => Mux18.IN633
-memory[624][7] => Mux9.IN633
-memory[624][7] => Mux17.IN633
-memory[623][0] => Mux16.IN632
-memory[623][0] => Mux24.IN632
-memory[623][1] => Mux15.IN632
-memory[623][1] => Mux23.IN632
-memory[623][2] => Mux14.IN632
-memory[623][2] => Mux22.IN632
-memory[623][3] => Mux13.IN632
-memory[623][3] => Mux21.IN632
-memory[623][4] => Mux12.IN632
-memory[623][4] => Mux20.IN632
-memory[623][5] => Mux11.IN632
-memory[623][5] => Mux19.IN632
-memory[623][6] => Mux10.IN632
-memory[623][6] => Mux18.IN632
-memory[623][7] => Mux9.IN632
-memory[623][7] => Mux17.IN632
-memory[622][0] => Mux16.IN631
-memory[622][0] => Mux24.IN631
-memory[622][1] => Mux15.IN631
-memory[622][1] => Mux23.IN631
-memory[622][2] => Mux14.IN631
-memory[622][2] => Mux22.IN631
-memory[622][3] => Mux13.IN631
-memory[622][3] => Mux21.IN631
-memory[622][4] => Mux12.IN631
-memory[622][4] => Mux20.IN631
-memory[622][5] => Mux11.IN631
-memory[622][5] => Mux19.IN631
-memory[622][6] => Mux10.IN631
-memory[622][6] => Mux18.IN631
-memory[622][7] => Mux9.IN631
-memory[622][7] => Mux17.IN631
-memory[621][0] => Mux16.IN630
-memory[621][0] => Mux24.IN630
-memory[621][1] => Mux15.IN630
-memory[621][1] => Mux23.IN630
-memory[621][2] => Mux14.IN630
-memory[621][2] => Mux22.IN630
-memory[621][3] => Mux13.IN630
-memory[621][3] => Mux21.IN630
-memory[621][4] => Mux12.IN630
-memory[621][4] => Mux20.IN630
-memory[621][5] => Mux11.IN630
-memory[621][5] => Mux19.IN630
-memory[621][6] => Mux10.IN630
-memory[621][6] => Mux18.IN630
-memory[621][7] => Mux9.IN630
-memory[621][7] => Mux17.IN630
-memory[620][0] => Mux16.IN629
-memory[620][0] => Mux24.IN629
-memory[620][1] => Mux15.IN629
-memory[620][1] => Mux23.IN629
-memory[620][2] => Mux14.IN629
-memory[620][2] => Mux22.IN629
-memory[620][3] => Mux13.IN629
-memory[620][3] => Mux21.IN629
-memory[620][4] => Mux12.IN629
-memory[620][4] => Mux20.IN629
-memory[620][5] => Mux11.IN629
-memory[620][5] => Mux19.IN629
-memory[620][6] => Mux10.IN629
-memory[620][6] => Mux18.IN629
-memory[620][7] => Mux9.IN629
-memory[620][7] => Mux17.IN629
-memory[619][0] => Mux16.IN628
-memory[619][0] => Mux24.IN628
-memory[619][1] => Mux15.IN628
-memory[619][1] => Mux23.IN628
-memory[619][2] => Mux14.IN628
-memory[619][2] => Mux22.IN628
-memory[619][3] => Mux13.IN628
-memory[619][3] => Mux21.IN628
-memory[619][4] => Mux12.IN628
-memory[619][4] => Mux20.IN628
-memory[619][5] => Mux11.IN628
-memory[619][5] => Mux19.IN628
-memory[619][6] => Mux10.IN628
-memory[619][6] => Mux18.IN628
-memory[619][7] => Mux9.IN628
-memory[619][7] => Mux17.IN628
-memory[618][0] => Mux16.IN627
-memory[618][0] => Mux24.IN627
-memory[618][1] => Mux15.IN627
-memory[618][1] => Mux23.IN627
-memory[618][2] => Mux14.IN627
-memory[618][2] => Mux22.IN627
-memory[618][3] => Mux13.IN627
-memory[618][3] => Mux21.IN627
-memory[618][4] => Mux12.IN627
-memory[618][4] => Mux20.IN627
-memory[618][5] => Mux11.IN627
-memory[618][5] => Mux19.IN627
-memory[618][6] => Mux10.IN627
-memory[618][6] => Mux18.IN627
-memory[618][7] => Mux9.IN627
-memory[618][7] => Mux17.IN627
-memory[617][0] => Mux16.IN626
-memory[617][0] => Mux24.IN626
-memory[617][1] => Mux15.IN626
-memory[617][1] => Mux23.IN626
-memory[617][2] => Mux14.IN626
-memory[617][2] => Mux22.IN626
-memory[617][3] => Mux13.IN626
-memory[617][3] => Mux21.IN626
-memory[617][4] => Mux12.IN626
-memory[617][4] => Mux20.IN626
-memory[617][5] => Mux11.IN626
-memory[617][5] => Mux19.IN626
-memory[617][6] => Mux10.IN626
-memory[617][6] => Mux18.IN626
-memory[617][7] => Mux9.IN626
-memory[617][7] => Mux17.IN626
-memory[616][0] => Mux16.IN625
-memory[616][0] => Mux24.IN625
-memory[616][1] => Mux15.IN625
-memory[616][1] => Mux23.IN625
-memory[616][2] => Mux14.IN625
-memory[616][2] => Mux22.IN625
-memory[616][3] => Mux13.IN625
-memory[616][3] => Mux21.IN625
-memory[616][4] => Mux12.IN625
-memory[616][4] => Mux20.IN625
-memory[616][5] => Mux11.IN625
-memory[616][5] => Mux19.IN625
-memory[616][6] => Mux10.IN625
-memory[616][6] => Mux18.IN625
-memory[616][7] => Mux9.IN625
-memory[616][7] => Mux17.IN625
-memory[615][0] => Mux16.IN624
-memory[615][0] => Mux24.IN624
-memory[615][1] => Mux15.IN624
-memory[615][1] => Mux23.IN624
-memory[615][2] => Mux14.IN624
-memory[615][2] => Mux22.IN624
-memory[615][3] => Mux13.IN624
-memory[615][3] => Mux21.IN624
-memory[615][4] => Mux12.IN624
-memory[615][4] => Mux20.IN624
-memory[615][5] => Mux11.IN624
-memory[615][5] => Mux19.IN624
-memory[615][6] => Mux10.IN624
-memory[615][6] => Mux18.IN624
-memory[615][7] => Mux9.IN624
-memory[615][7] => Mux17.IN624
-memory[614][0] => Mux16.IN623
-memory[614][0] => Mux24.IN623
-memory[614][1] => Mux15.IN623
-memory[614][1] => Mux23.IN623
-memory[614][2] => Mux14.IN623
-memory[614][2] => Mux22.IN623
-memory[614][3] => Mux13.IN623
-memory[614][3] => Mux21.IN623
-memory[614][4] => Mux12.IN623
-memory[614][4] => Mux20.IN623
-memory[614][5] => Mux11.IN623
-memory[614][5] => Mux19.IN623
-memory[614][6] => Mux10.IN623
-memory[614][6] => Mux18.IN623
-memory[614][7] => Mux9.IN623
-memory[614][7] => Mux17.IN623
-memory[613][0] => Mux16.IN622
-memory[613][0] => Mux24.IN622
-memory[613][1] => Mux15.IN622
-memory[613][1] => Mux23.IN622
-memory[613][2] => Mux14.IN622
-memory[613][2] => Mux22.IN622
-memory[613][3] => Mux13.IN622
-memory[613][3] => Mux21.IN622
-memory[613][4] => Mux12.IN622
-memory[613][4] => Mux20.IN622
-memory[613][5] => Mux11.IN622
-memory[613][5] => Mux19.IN622
-memory[613][6] => Mux10.IN622
-memory[613][6] => Mux18.IN622
-memory[613][7] => Mux9.IN622
-memory[613][7] => Mux17.IN622
-memory[612][0] => Mux16.IN621
-memory[612][0] => Mux24.IN621
-memory[612][1] => Mux15.IN621
-memory[612][1] => Mux23.IN621
-memory[612][2] => Mux14.IN621
-memory[612][2] => Mux22.IN621
-memory[612][3] => Mux13.IN621
-memory[612][3] => Mux21.IN621
-memory[612][4] => Mux12.IN621
-memory[612][4] => Mux20.IN621
-memory[612][5] => Mux11.IN621
-memory[612][5] => Mux19.IN621
-memory[612][6] => Mux10.IN621
-memory[612][6] => Mux18.IN621
-memory[612][7] => Mux9.IN621
-memory[612][7] => Mux17.IN621
-memory[611][0] => Mux16.IN620
-memory[611][0] => Mux24.IN620
-memory[611][1] => Mux15.IN620
-memory[611][1] => Mux23.IN620
-memory[611][2] => Mux14.IN620
-memory[611][2] => Mux22.IN620
-memory[611][3] => Mux13.IN620
-memory[611][3] => Mux21.IN620
-memory[611][4] => Mux12.IN620
-memory[611][4] => Mux20.IN620
-memory[611][5] => Mux11.IN620
-memory[611][5] => Mux19.IN620
-memory[611][6] => Mux10.IN620
-memory[611][6] => Mux18.IN620
-memory[611][7] => Mux9.IN620
-memory[611][7] => Mux17.IN620
-memory[610][0] => Mux16.IN619
-memory[610][0] => Mux24.IN619
-memory[610][1] => Mux15.IN619
-memory[610][1] => Mux23.IN619
-memory[610][2] => Mux14.IN619
-memory[610][2] => Mux22.IN619
-memory[610][3] => Mux13.IN619
-memory[610][3] => Mux21.IN619
-memory[610][4] => Mux12.IN619
-memory[610][4] => Mux20.IN619
-memory[610][5] => Mux11.IN619
-memory[610][5] => Mux19.IN619
-memory[610][6] => Mux10.IN619
-memory[610][6] => Mux18.IN619
-memory[610][7] => Mux9.IN619
-memory[610][7] => Mux17.IN619
-memory[609][0] => Mux16.IN618
-memory[609][0] => Mux24.IN618
-memory[609][1] => Mux15.IN618
-memory[609][1] => Mux23.IN618
-memory[609][2] => Mux14.IN618
-memory[609][2] => Mux22.IN618
-memory[609][3] => Mux13.IN618
-memory[609][3] => Mux21.IN618
-memory[609][4] => Mux12.IN618
-memory[609][4] => Mux20.IN618
-memory[609][5] => Mux11.IN618
-memory[609][5] => Mux19.IN618
-memory[609][6] => Mux10.IN618
-memory[609][6] => Mux18.IN618
-memory[609][7] => Mux9.IN618
-memory[609][7] => Mux17.IN618
-memory[608][0] => Mux16.IN617
-memory[608][0] => Mux24.IN617
-memory[608][1] => Mux15.IN617
-memory[608][1] => Mux23.IN617
-memory[608][2] => Mux14.IN617
-memory[608][2] => Mux22.IN617
-memory[608][3] => Mux13.IN617
-memory[608][3] => Mux21.IN617
-memory[608][4] => Mux12.IN617
-memory[608][4] => Mux20.IN617
-memory[608][5] => Mux11.IN617
-memory[608][5] => Mux19.IN617
-memory[608][6] => Mux10.IN617
-memory[608][6] => Mux18.IN617
-memory[608][7] => Mux9.IN617
-memory[608][7] => Mux17.IN617
-memory[607][0] => Mux16.IN616
-memory[607][0] => Mux24.IN616
-memory[607][1] => Mux15.IN616
-memory[607][1] => Mux23.IN616
-memory[607][2] => Mux14.IN616
-memory[607][2] => Mux22.IN616
-memory[607][3] => Mux13.IN616
-memory[607][3] => Mux21.IN616
-memory[607][4] => Mux12.IN616
-memory[607][4] => Mux20.IN616
-memory[607][5] => Mux11.IN616
-memory[607][5] => Mux19.IN616
-memory[607][6] => Mux10.IN616
-memory[607][6] => Mux18.IN616
-memory[607][7] => Mux9.IN616
-memory[607][7] => Mux17.IN616
-memory[606][0] => Mux16.IN615
-memory[606][0] => Mux24.IN615
-memory[606][1] => Mux15.IN615
-memory[606][1] => Mux23.IN615
-memory[606][2] => Mux14.IN615
-memory[606][2] => Mux22.IN615
-memory[606][3] => Mux13.IN615
-memory[606][3] => Mux21.IN615
-memory[606][4] => Mux12.IN615
-memory[606][4] => Mux20.IN615
-memory[606][5] => Mux11.IN615
-memory[606][5] => Mux19.IN615
-memory[606][6] => Mux10.IN615
-memory[606][6] => Mux18.IN615
-memory[606][7] => Mux9.IN615
-memory[606][7] => Mux17.IN615
-memory[605][0] => Mux16.IN614
-memory[605][0] => Mux24.IN614
-memory[605][1] => Mux15.IN614
-memory[605][1] => Mux23.IN614
-memory[605][2] => Mux14.IN614
-memory[605][2] => Mux22.IN614
-memory[605][3] => Mux13.IN614
-memory[605][3] => Mux21.IN614
-memory[605][4] => Mux12.IN614
-memory[605][4] => Mux20.IN614
-memory[605][5] => Mux11.IN614
-memory[605][5] => Mux19.IN614
-memory[605][6] => Mux10.IN614
-memory[605][6] => Mux18.IN614
-memory[605][7] => Mux9.IN614
-memory[605][7] => Mux17.IN614
-memory[604][0] => Mux16.IN613
-memory[604][0] => Mux24.IN613
-memory[604][1] => Mux15.IN613
-memory[604][1] => Mux23.IN613
-memory[604][2] => Mux14.IN613
-memory[604][2] => Mux22.IN613
-memory[604][3] => Mux13.IN613
-memory[604][3] => Mux21.IN613
-memory[604][4] => Mux12.IN613
-memory[604][4] => Mux20.IN613
-memory[604][5] => Mux11.IN613
-memory[604][5] => Mux19.IN613
-memory[604][6] => Mux10.IN613
-memory[604][6] => Mux18.IN613
-memory[604][7] => Mux9.IN613
-memory[604][7] => Mux17.IN613
-memory[603][0] => Mux16.IN612
-memory[603][0] => Mux24.IN612
-memory[603][1] => Mux15.IN612
-memory[603][1] => Mux23.IN612
-memory[603][2] => Mux14.IN612
-memory[603][2] => Mux22.IN612
-memory[603][3] => Mux13.IN612
-memory[603][3] => Mux21.IN612
-memory[603][4] => Mux12.IN612
-memory[603][4] => Mux20.IN612
-memory[603][5] => Mux11.IN612
-memory[603][5] => Mux19.IN612
-memory[603][6] => Mux10.IN612
-memory[603][6] => Mux18.IN612
-memory[603][7] => Mux9.IN612
-memory[603][7] => Mux17.IN612
-memory[602][0] => Mux16.IN611
-memory[602][0] => Mux24.IN611
-memory[602][1] => Mux15.IN611
-memory[602][1] => Mux23.IN611
-memory[602][2] => Mux14.IN611
-memory[602][2] => Mux22.IN611
-memory[602][3] => Mux13.IN611
-memory[602][3] => Mux21.IN611
-memory[602][4] => Mux12.IN611
-memory[602][4] => Mux20.IN611
-memory[602][5] => Mux11.IN611
-memory[602][5] => Mux19.IN611
-memory[602][6] => Mux10.IN611
-memory[602][6] => Mux18.IN611
-memory[602][7] => Mux9.IN611
-memory[602][7] => Mux17.IN611
-memory[601][0] => Mux16.IN610
-memory[601][0] => Mux24.IN610
-memory[601][1] => Mux15.IN610
-memory[601][1] => Mux23.IN610
-memory[601][2] => Mux14.IN610
-memory[601][2] => Mux22.IN610
-memory[601][3] => Mux13.IN610
-memory[601][3] => Mux21.IN610
-memory[601][4] => Mux12.IN610
-memory[601][4] => Mux20.IN610
-memory[601][5] => Mux11.IN610
-memory[601][5] => Mux19.IN610
-memory[601][6] => Mux10.IN610
-memory[601][6] => Mux18.IN610
-memory[601][7] => Mux9.IN610
-memory[601][7] => Mux17.IN610
-memory[600][0] => Mux16.IN609
-memory[600][0] => Mux24.IN609
-memory[600][1] => Mux15.IN609
-memory[600][1] => Mux23.IN609
-memory[600][2] => Mux14.IN609
-memory[600][2] => Mux22.IN609
-memory[600][3] => Mux13.IN609
-memory[600][3] => Mux21.IN609
-memory[600][4] => Mux12.IN609
-memory[600][4] => Mux20.IN609
-memory[600][5] => Mux11.IN609
-memory[600][5] => Mux19.IN609
-memory[600][6] => Mux10.IN609
-memory[600][6] => Mux18.IN609
-memory[600][7] => Mux9.IN609
-memory[600][7] => Mux17.IN609
-memory[599][0] => Mux16.IN608
-memory[599][0] => Mux24.IN608
-memory[599][1] => Mux15.IN608
-memory[599][1] => Mux23.IN608
-memory[599][2] => Mux14.IN608
-memory[599][2] => Mux22.IN608
-memory[599][3] => Mux13.IN608
-memory[599][3] => Mux21.IN608
-memory[599][4] => Mux12.IN608
-memory[599][4] => Mux20.IN608
-memory[599][5] => Mux11.IN608
-memory[599][5] => Mux19.IN608
-memory[599][6] => Mux10.IN608
-memory[599][6] => Mux18.IN608
-memory[599][7] => Mux9.IN608
-memory[599][7] => Mux17.IN608
-memory[598][0] => Mux16.IN607
-memory[598][0] => Mux24.IN607
-memory[598][1] => Mux15.IN607
-memory[598][1] => Mux23.IN607
-memory[598][2] => Mux14.IN607
-memory[598][2] => Mux22.IN607
-memory[598][3] => Mux13.IN607
-memory[598][3] => Mux21.IN607
-memory[598][4] => Mux12.IN607
-memory[598][4] => Mux20.IN607
-memory[598][5] => Mux11.IN607
-memory[598][5] => Mux19.IN607
-memory[598][6] => Mux10.IN607
-memory[598][6] => Mux18.IN607
-memory[598][7] => Mux9.IN607
-memory[598][7] => Mux17.IN607
-memory[597][0] => Mux16.IN606
-memory[597][0] => Mux24.IN606
-memory[597][1] => Mux15.IN606
-memory[597][1] => Mux23.IN606
-memory[597][2] => Mux14.IN606
-memory[597][2] => Mux22.IN606
-memory[597][3] => Mux13.IN606
-memory[597][3] => Mux21.IN606
-memory[597][4] => Mux12.IN606
-memory[597][4] => Mux20.IN606
-memory[597][5] => Mux11.IN606
-memory[597][5] => Mux19.IN606
-memory[597][6] => Mux10.IN606
-memory[597][6] => Mux18.IN606
-memory[597][7] => Mux9.IN606
-memory[597][7] => Mux17.IN606
-memory[596][0] => Mux16.IN605
-memory[596][0] => Mux24.IN605
-memory[596][1] => Mux15.IN605
-memory[596][1] => Mux23.IN605
-memory[596][2] => Mux14.IN605
-memory[596][2] => Mux22.IN605
-memory[596][3] => Mux13.IN605
-memory[596][3] => Mux21.IN605
-memory[596][4] => Mux12.IN605
-memory[596][4] => Mux20.IN605
-memory[596][5] => Mux11.IN605
-memory[596][5] => Mux19.IN605
-memory[596][6] => Mux10.IN605
-memory[596][6] => Mux18.IN605
-memory[596][7] => Mux9.IN605
-memory[596][7] => Mux17.IN605
-memory[595][0] => Mux16.IN604
-memory[595][0] => Mux24.IN604
-memory[595][1] => Mux15.IN604
-memory[595][1] => Mux23.IN604
-memory[595][2] => Mux14.IN604
-memory[595][2] => Mux22.IN604
-memory[595][3] => Mux13.IN604
-memory[595][3] => Mux21.IN604
-memory[595][4] => Mux12.IN604
-memory[595][4] => Mux20.IN604
-memory[595][5] => Mux11.IN604
-memory[595][5] => Mux19.IN604
-memory[595][6] => Mux10.IN604
-memory[595][6] => Mux18.IN604
-memory[595][7] => Mux9.IN604
-memory[595][7] => Mux17.IN604
-memory[594][0] => Mux16.IN603
-memory[594][0] => Mux24.IN603
-memory[594][1] => Mux15.IN603
-memory[594][1] => Mux23.IN603
-memory[594][2] => Mux14.IN603
-memory[594][2] => Mux22.IN603
-memory[594][3] => Mux13.IN603
-memory[594][3] => Mux21.IN603
-memory[594][4] => Mux12.IN603
-memory[594][4] => Mux20.IN603
-memory[594][5] => Mux11.IN603
-memory[594][5] => Mux19.IN603
-memory[594][6] => Mux10.IN603
-memory[594][6] => Mux18.IN603
-memory[594][7] => Mux9.IN603
-memory[594][7] => Mux17.IN603
-memory[593][0] => Mux16.IN602
-memory[593][0] => Mux24.IN602
-memory[593][1] => Mux15.IN602
-memory[593][1] => Mux23.IN602
-memory[593][2] => Mux14.IN602
-memory[593][2] => Mux22.IN602
-memory[593][3] => Mux13.IN602
-memory[593][3] => Mux21.IN602
-memory[593][4] => Mux12.IN602
-memory[593][4] => Mux20.IN602
-memory[593][5] => Mux11.IN602
-memory[593][5] => Mux19.IN602
-memory[593][6] => Mux10.IN602
-memory[593][6] => Mux18.IN602
-memory[593][7] => Mux9.IN602
-memory[593][7] => Mux17.IN602
-memory[592][0] => Mux16.IN601
-memory[592][0] => Mux24.IN601
-memory[592][1] => Mux15.IN601
-memory[592][1] => Mux23.IN601
-memory[592][2] => Mux14.IN601
-memory[592][2] => Mux22.IN601
-memory[592][3] => Mux13.IN601
-memory[592][3] => Mux21.IN601
-memory[592][4] => Mux12.IN601
-memory[592][4] => Mux20.IN601
-memory[592][5] => Mux11.IN601
-memory[592][5] => Mux19.IN601
-memory[592][6] => Mux10.IN601
-memory[592][6] => Mux18.IN601
-memory[592][7] => Mux9.IN601
-memory[592][7] => Mux17.IN601
-memory[591][0] => Mux16.IN600
-memory[591][0] => Mux24.IN600
-memory[591][1] => Mux15.IN600
-memory[591][1] => Mux23.IN600
-memory[591][2] => Mux14.IN600
-memory[591][2] => Mux22.IN600
-memory[591][3] => Mux13.IN600
-memory[591][3] => Mux21.IN600
-memory[591][4] => Mux12.IN600
-memory[591][4] => Mux20.IN600
-memory[591][5] => Mux11.IN600
-memory[591][5] => Mux19.IN600
-memory[591][6] => Mux10.IN600
-memory[591][6] => Mux18.IN600
-memory[591][7] => Mux9.IN600
-memory[591][7] => Mux17.IN600
-memory[590][0] => Mux16.IN599
-memory[590][0] => Mux24.IN599
-memory[590][1] => Mux15.IN599
-memory[590][1] => Mux23.IN599
-memory[590][2] => Mux14.IN599
-memory[590][2] => Mux22.IN599
-memory[590][3] => Mux13.IN599
-memory[590][3] => Mux21.IN599
-memory[590][4] => Mux12.IN599
-memory[590][4] => Mux20.IN599
-memory[590][5] => Mux11.IN599
-memory[590][5] => Mux19.IN599
-memory[590][6] => Mux10.IN599
-memory[590][6] => Mux18.IN599
-memory[590][7] => Mux9.IN599
-memory[590][7] => Mux17.IN599
-memory[589][0] => Mux16.IN598
-memory[589][0] => Mux24.IN598
-memory[589][1] => Mux15.IN598
-memory[589][1] => Mux23.IN598
-memory[589][2] => Mux14.IN598
-memory[589][2] => Mux22.IN598
-memory[589][3] => Mux13.IN598
-memory[589][3] => Mux21.IN598
-memory[589][4] => Mux12.IN598
-memory[589][4] => Mux20.IN598
-memory[589][5] => Mux11.IN598
-memory[589][5] => Mux19.IN598
-memory[589][6] => Mux10.IN598
-memory[589][6] => Mux18.IN598
-memory[589][7] => Mux9.IN598
-memory[589][7] => Mux17.IN598
-memory[588][0] => Mux16.IN597
-memory[588][0] => Mux24.IN597
-memory[588][1] => Mux15.IN597
-memory[588][1] => Mux23.IN597
-memory[588][2] => Mux14.IN597
-memory[588][2] => Mux22.IN597
-memory[588][3] => Mux13.IN597
-memory[588][3] => Mux21.IN597
-memory[588][4] => Mux12.IN597
-memory[588][4] => Mux20.IN597
-memory[588][5] => Mux11.IN597
-memory[588][5] => Mux19.IN597
-memory[588][6] => Mux10.IN597
-memory[588][6] => Mux18.IN597
-memory[588][7] => Mux9.IN597
-memory[588][7] => Mux17.IN597
-memory[587][0] => Mux16.IN596
-memory[587][0] => Mux24.IN596
-memory[587][1] => Mux15.IN596
-memory[587][1] => Mux23.IN596
-memory[587][2] => Mux14.IN596
-memory[587][2] => Mux22.IN596
-memory[587][3] => Mux13.IN596
-memory[587][3] => Mux21.IN596
-memory[587][4] => Mux12.IN596
-memory[587][4] => Mux20.IN596
-memory[587][5] => Mux11.IN596
-memory[587][5] => Mux19.IN596
-memory[587][6] => Mux10.IN596
-memory[587][6] => Mux18.IN596
-memory[587][7] => Mux9.IN596
-memory[587][7] => Mux17.IN596
-memory[586][0] => Mux16.IN595
-memory[586][0] => Mux24.IN595
-memory[586][1] => Mux15.IN595
-memory[586][1] => Mux23.IN595
-memory[586][2] => Mux14.IN595
-memory[586][2] => Mux22.IN595
-memory[586][3] => Mux13.IN595
-memory[586][3] => Mux21.IN595
-memory[586][4] => Mux12.IN595
-memory[586][4] => Mux20.IN595
-memory[586][5] => Mux11.IN595
-memory[586][5] => Mux19.IN595
-memory[586][6] => Mux10.IN595
-memory[586][6] => Mux18.IN595
-memory[586][7] => Mux9.IN595
-memory[586][7] => Mux17.IN595
-memory[585][0] => Mux16.IN594
-memory[585][0] => Mux24.IN594
-memory[585][1] => Mux15.IN594
-memory[585][1] => Mux23.IN594
-memory[585][2] => Mux14.IN594
-memory[585][2] => Mux22.IN594
-memory[585][3] => Mux13.IN594
-memory[585][3] => Mux21.IN594
-memory[585][4] => Mux12.IN594
-memory[585][4] => Mux20.IN594
-memory[585][5] => Mux11.IN594
-memory[585][5] => Mux19.IN594
-memory[585][6] => Mux10.IN594
-memory[585][6] => Mux18.IN594
-memory[585][7] => Mux9.IN594
-memory[585][7] => Mux17.IN594
-memory[584][0] => Mux16.IN593
-memory[584][0] => Mux24.IN593
-memory[584][1] => Mux15.IN593
-memory[584][1] => Mux23.IN593
-memory[584][2] => Mux14.IN593
-memory[584][2] => Mux22.IN593
-memory[584][3] => Mux13.IN593
-memory[584][3] => Mux21.IN593
-memory[584][4] => Mux12.IN593
-memory[584][4] => Mux20.IN593
-memory[584][5] => Mux11.IN593
-memory[584][5] => Mux19.IN593
-memory[584][6] => Mux10.IN593
-memory[584][6] => Mux18.IN593
-memory[584][7] => Mux9.IN593
-memory[584][7] => Mux17.IN593
-memory[583][0] => Mux16.IN592
-memory[583][0] => Mux24.IN592
-memory[583][1] => Mux15.IN592
-memory[583][1] => Mux23.IN592
-memory[583][2] => Mux14.IN592
-memory[583][2] => Mux22.IN592
-memory[583][3] => Mux13.IN592
-memory[583][3] => Mux21.IN592
-memory[583][4] => Mux12.IN592
-memory[583][4] => Mux20.IN592
-memory[583][5] => Mux11.IN592
-memory[583][5] => Mux19.IN592
-memory[583][6] => Mux10.IN592
-memory[583][6] => Mux18.IN592
-memory[583][7] => Mux9.IN592
-memory[583][7] => Mux17.IN592
-memory[582][0] => Mux16.IN591
-memory[582][0] => Mux24.IN591
-memory[582][1] => Mux15.IN591
-memory[582][1] => Mux23.IN591
-memory[582][2] => Mux14.IN591
-memory[582][2] => Mux22.IN591
-memory[582][3] => Mux13.IN591
-memory[582][3] => Mux21.IN591
-memory[582][4] => Mux12.IN591
-memory[582][4] => Mux20.IN591
-memory[582][5] => Mux11.IN591
-memory[582][5] => Mux19.IN591
-memory[582][6] => Mux10.IN591
-memory[582][6] => Mux18.IN591
-memory[582][7] => Mux9.IN591
-memory[582][7] => Mux17.IN591
-memory[581][0] => Mux16.IN590
-memory[581][0] => Mux24.IN590
-memory[581][1] => Mux15.IN590
-memory[581][1] => Mux23.IN590
-memory[581][2] => Mux14.IN590
-memory[581][2] => Mux22.IN590
-memory[581][3] => Mux13.IN590
-memory[581][3] => Mux21.IN590
-memory[581][4] => Mux12.IN590
-memory[581][4] => Mux20.IN590
-memory[581][5] => Mux11.IN590
-memory[581][5] => Mux19.IN590
-memory[581][6] => Mux10.IN590
-memory[581][6] => Mux18.IN590
-memory[581][7] => Mux9.IN590
-memory[581][7] => Mux17.IN590
-memory[580][0] => Mux16.IN589
-memory[580][0] => Mux24.IN589
-memory[580][1] => Mux15.IN589
-memory[580][1] => Mux23.IN589
-memory[580][2] => Mux14.IN589
-memory[580][2] => Mux22.IN589
-memory[580][3] => Mux13.IN589
-memory[580][3] => Mux21.IN589
-memory[580][4] => Mux12.IN589
-memory[580][4] => Mux20.IN589
-memory[580][5] => Mux11.IN589
-memory[580][5] => Mux19.IN589
-memory[580][6] => Mux10.IN589
-memory[580][6] => Mux18.IN589
-memory[580][7] => Mux9.IN589
-memory[580][7] => Mux17.IN589
-memory[579][0] => Mux16.IN588
-memory[579][0] => Mux24.IN588
-memory[579][1] => Mux15.IN588
-memory[579][1] => Mux23.IN588
-memory[579][2] => Mux14.IN588
-memory[579][2] => Mux22.IN588
-memory[579][3] => Mux13.IN588
-memory[579][3] => Mux21.IN588
-memory[579][4] => Mux12.IN588
-memory[579][4] => Mux20.IN588
-memory[579][5] => Mux11.IN588
-memory[579][5] => Mux19.IN588
-memory[579][6] => Mux10.IN588
-memory[579][6] => Mux18.IN588
-memory[579][7] => Mux9.IN588
-memory[579][7] => Mux17.IN588
-memory[578][0] => Mux16.IN587
-memory[578][0] => Mux24.IN587
-memory[578][1] => Mux15.IN587
-memory[578][1] => Mux23.IN587
-memory[578][2] => Mux14.IN587
-memory[578][2] => Mux22.IN587
-memory[578][3] => Mux13.IN587
-memory[578][3] => Mux21.IN587
-memory[578][4] => Mux12.IN587
-memory[578][4] => Mux20.IN587
-memory[578][5] => Mux11.IN587
-memory[578][5] => Mux19.IN587
-memory[578][6] => Mux10.IN587
-memory[578][6] => Mux18.IN587
-memory[578][7] => Mux9.IN587
-memory[578][7] => Mux17.IN587
-memory[577][0] => Mux16.IN586
-memory[577][0] => Mux24.IN586
-memory[577][1] => Mux15.IN586
-memory[577][1] => Mux23.IN586
-memory[577][2] => Mux14.IN586
-memory[577][2] => Mux22.IN586
-memory[577][3] => Mux13.IN586
-memory[577][3] => Mux21.IN586
-memory[577][4] => Mux12.IN586
-memory[577][4] => Mux20.IN586
-memory[577][5] => Mux11.IN586
-memory[577][5] => Mux19.IN586
-memory[577][6] => Mux10.IN586
-memory[577][6] => Mux18.IN586
-memory[577][7] => Mux9.IN586
-memory[577][7] => Mux17.IN586
-memory[576][0] => Mux16.IN585
-memory[576][0] => Mux24.IN585
-memory[576][1] => Mux15.IN585
-memory[576][1] => Mux23.IN585
-memory[576][2] => Mux14.IN585
-memory[576][2] => Mux22.IN585
-memory[576][3] => Mux13.IN585
-memory[576][3] => Mux21.IN585
-memory[576][4] => Mux12.IN585
-memory[576][4] => Mux20.IN585
-memory[576][5] => Mux11.IN585
-memory[576][5] => Mux19.IN585
-memory[576][6] => Mux10.IN585
-memory[576][6] => Mux18.IN585
-memory[576][7] => Mux9.IN585
-memory[576][7] => Mux17.IN585
-memory[575][0] => Mux16.IN584
-memory[575][0] => Mux24.IN584
-memory[575][1] => Mux15.IN584
-memory[575][1] => Mux23.IN584
-memory[575][2] => Mux14.IN584
-memory[575][2] => Mux22.IN584
-memory[575][3] => Mux13.IN584
-memory[575][3] => Mux21.IN584
-memory[575][4] => Mux12.IN584
-memory[575][4] => Mux20.IN584
-memory[575][5] => Mux11.IN584
-memory[575][5] => Mux19.IN584
-memory[575][6] => Mux10.IN584
-memory[575][6] => Mux18.IN584
-memory[575][7] => Mux9.IN584
-memory[575][7] => Mux17.IN584
-memory[574][0] => Mux16.IN583
-memory[574][0] => Mux24.IN583
-memory[574][1] => Mux15.IN583
-memory[574][1] => Mux23.IN583
-memory[574][2] => Mux14.IN583
-memory[574][2] => Mux22.IN583
-memory[574][3] => Mux13.IN583
-memory[574][3] => Mux21.IN583
-memory[574][4] => Mux12.IN583
-memory[574][4] => Mux20.IN583
-memory[574][5] => Mux11.IN583
-memory[574][5] => Mux19.IN583
-memory[574][6] => Mux10.IN583
-memory[574][6] => Mux18.IN583
-memory[574][7] => Mux9.IN583
-memory[574][7] => Mux17.IN583
-memory[573][0] => Mux16.IN582
-memory[573][0] => Mux24.IN582
-memory[573][1] => Mux15.IN582
-memory[573][1] => Mux23.IN582
-memory[573][2] => Mux14.IN582
-memory[573][2] => Mux22.IN582
-memory[573][3] => Mux13.IN582
-memory[573][3] => Mux21.IN582
-memory[573][4] => Mux12.IN582
-memory[573][4] => Mux20.IN582
-memory[573][5] => Mux11.IN582
-memory[573][5] => Mux19.IN582
-memory[573][6] => Mux10.IN582
-memory[573][6] => Mux18.IN582
-memory[573][7] => Mux9.IN582
-memory[573][7] => Mux17.IN582
-memory[572][0] => Mux16.IN581
-memory[572][0] => Mux24.IN581
-memory[572][1] => Mux15.IN581
-memory[572][1] => Mux23.IN581
-memory[572][2] => Mux14.IN581
-memory[572][2] => Mux22.IN581
-memory[572][3] => Mux13.IN581
-memory[572][3] => Mux21.IN581
-memory[572][4] => Mux12.IN581
-memory[572][4] => Mux20.IN581
-memory[572][5] => Mux11.IN581
-memory[572][5] => Mux19.IN581
-memory[572][6] => Mux10.IN581
-memory[572][6] => Mux18.IN581
-memory[572][7] => Mux9.IN581
-memory[572][7] => Mux17.IN581
-memory[571][0] => Mux16.IN580
-memory[571][0] => Mux24.IN580
-memory[571][1] => Mux15.IN580
-memory[571][1] => Mux23.IN580
-memory[571][2] => Mux14.IN580
-memory[571][2] => Mux22.IN580
-memory[571][3] => Mux13.IN580
-memory[571][3] => Mux21.IN580
-memory[571][4] => Mux12.IN580
-memory[571][4] => Mux20.IN580
-memory[571][5] => Mux11.IN580
-memory[571][5] => Mux19.IN580
-memory[571][6] => Mux10.IN580
-memory[571][6] => Mux18.IN580
-memory[571][7] => Mux9.IN580
-memory[571][7] => Mux17.IN580
-memory[570][0] => Mux16.IN579
-memory[570][0] => Mux24.IN579
-memory[570][1] => Mux15.IN579
-memory[570][1] => Mux23.IN579
-memory[570][2] => Mux14.IN579
-memory[570][2] => Mux22.IN579
-memory[570][3] => Mux13.IN579
-memory[570][3] => Mux21.IN579
-memory[570][4] => Mux12.IN579
-memory[570][4] => Mux20.IN579
-memory[570][5] => Mux11.IN579
-memory[570][5] => Mux19.IN579
-memory[570][6] => Mux10.IN579
-memory[570][6] => Mux18.IN579
-memory[570][7] => Mux9.IN579
-memory[570][7] => Mux17.IN579
-memory[569][0] => Mux16.IN578
-memory[569][0] => Mux24.IN578
-memory[569][1] => Mux15.IN578
-memory[569][1] => Mux23.IN578
-memory[569][2] => Mux14.IN578
-memory[569][2] => Mux22.IN578
-memory[569][3] => Mux13.IN578
-memory[569][3] => Mux21.IN578
-memory[569][4] => Mux12.IN578
-memory[569][4] => Mux20.IN578
-memory[569][5] => Mux11.IN578
-memory[569][5] => Mux19.IN578
-memory[569][6] => Mux10.IN578
-memory[569][6] => Mux18.IN578
-memory[569][7] => Mux9.IN578
-memory[569][7] => Mux17.IN578
-memory[568][0] => Mux16.IN577
-memory[568][0] => Mux24.IN577
-memory[568][1] => Mux15.IN577
-memory[568][1] => Mux23.IN577
-memory[568][2] => Mux14.IN577
-memory[568][2] => Mux22.IN577
-memory[568][3] => Mux13.IN577
-memory[568][3] => Mux21.IN577
-memory[568][4] => Mux12.IN577
-memory[568][4] => Mux20.IN577
-memory[568][5] => Mux11.IN577
-memory[568][5] => Mux19.IN577
-memory[568][6] => Mux10.IN577
-memory[568][6] => Mux18.IN577
-memory[568][7] => Mux9.IN577
-memory[568][7] => Mux17.IN577
-memory[567][0] => Mux16.IN576
-memory[567][0] => Mux24.IN576
-memory[567][1] => Mux15.IN576
-memory[567][1] => Mux23.IN576
-memory[567][2] => Mux14.IN576
-memory[567][2] => Mux22.IN576
-memory[567][3] => Mux13.IN576
-memory[567][3] => Mux21.IN576
-memory[567][4] => Mux12.IN576
-memory[567][4] => Mux20.IN576
-memory[567][5] => Mux11.IN576
-memory[567][5] => Mux19.IN576
-memory[567][6] => Mux10.IN576
-memory[567][6] => Mux18.IN576
-memory[567][7] => Mux9.IN576
-memory[567][7] => Mux17.IN576
-memory[566][0] => Mux16.IN575
-memory[566][0] => Mux24.IN575
-memory[566][1] => Mux15.IN575
-memory[566][1] => Mux23.IN575
-memory[566][2] => Mux14.IN575
-memory[566][2] => Mux22.IN575
-memory[566][3] => Mux13.IN575
-memory[566][3] => Mux21.IN575
-memory[566][4] => Mux12.IN575
-memory[566][4] => Mux20.IN575
-memory[566][5] => Mux11.IN575
-memory[566][5] => Mux19.IN575
-memory[566][6] => Mux10.IN575
-memory[566][6] => Mux18.IN575
-memory[566][7] => Mux9.IN575
-memory[566][7] => Mux17.IN575
-memory[565][0] => Mux16.IN574
-memory[565][0] => Mux24.IN574
-memory[565][1] => Mux15.IN574
-memory[565][1] => Mux23.IN574
-memory[565][2] => Mux14.IN574
-memory[565][2] => Mux22.IN574
-memory[565][3] => Mux13.IN574
-memory[565][3] => Mux21.IN574
-memory[565][4] => Mux12.IN574
-memory[565][4] => Mux20.IN574
-memory[565][5] => Mux11.IN574
-memory[565][5] => Mux19.IN574
-memory[565][6] => Mux10.IN574
-memory[565][6] => Mux18.IN574
-memory[565][7] => Mux9.IN574
-memory[565][7] => Mux17.IN574
-memory[564][0] => Mux16.IN573
-memory[564][0] => Mux24.IN573
-memory[564][1] => Mux15.IN573
-memory[564][1] => Mux23.IN573
-memory[564][2] => Mux14.IN573
-memory[564][2] => Mux22.IN573
-memory[564][3] => Mux13.IN573
-memory[564][3] => Mux21.IN573
-memory[564][4] => Mux12.IN573
-memory[564][4] => Mux20.IN573
-memory[564][5] => Mux11.IN573
-memory[564][5] => Mux19.IN573
-memory[564][6] => Mux10.IN573
-memory[564][6] => Mux18.IN573
-memory[564][7] => Mux9.IN573
-memory[564][7] => Mux17.IN573
-memory[563][0] => Mux16.IN572
-memory[563][0] => Mux24.IN572
-memory[563][1] => Mux15.IN572
-memory[563][1] => Mux23.IN572
-memory[563][2] => Mux14.IN572
-memory[563][2] => Mux22.IN572
-memory[563][3] => Mux13.IN572
-memory[563][3] => Mux21.IN572
-memory[563][4] => Mux12.IN572
-memory[563][4] => Mux20.IN572
-memory[563][5] => Mux11.IN572
-memory[563][5] => Mux19.IN572
-memory[563][6] => Mux10.IN572
-memory[563][6] => Mux18.IN572
-memory[563][7] => Mux9.IN572
-memory[563][7] => Mux17.IN572
-memory[562][0] => Mux16.IN571
-memory[562][0] => Mux24.IN571
-memory[562][1] => Mux15.IN571
-memory[562][1] => Mux23.IN571
-memory[562][2] => Mux14.IN571
-memory[562][2] => Mux22.IN571
-memory[562][3] => Mux13.IN571
-memory[562][3] => Mux21.IN571
-memory[562][4] => Mux12.IN571
-memory[562][4] => Mux20.IN571
-memory[562][5] => Mux11.IN571
-memory[562][5] => Mux19.IN571
-memory[562][6] => Mux10.IN571
-memory[562][6] => Mux18.IN571
-memory[562][7] => Mux9.IN571
-memory[562][7] => Mux17.IN571
-memory[561][0] => Mux16.IN570
-memory[561][0] => Mux24.IN570
-memory[561][1] => Mux15.IN570
-memory[561][1] => Mux23.IN570
-memory[561][2] => Mux14.IN570
-memory[561][2] => Mux22.IN570
-memory[561][3] => Mux13.IN570
-memory[561][3] => Mux21.IN570
-memory[561][4] => Mux12.IN570
-memory[561][4] => Mux20.IN570
-memory[561][5] => Mux11.IN570
-memory[561][5] => Mux19.IN570
-memory[561][6] => Mux10.IN570
-memory[561][6] => Mux18.IN570
-memory[561][7] => Mux9.IN570
-memory[561][7] => Mux17.IN570
-memory[560][0] => Mux16.IN569
-memory[560][0] => Mux24.IN569
-memory[560][1] => Mux15.IN569
-memory[560][1] => Mux23.IN569
-memory[560][2] => Mux14.IN569
-memory[560][2] => Mux22.IN569
-memory[560][3] => Mux13.IN569
-memory[560][3] => Mux21.IN569
-memory[560][4] => Mux12.IN569
-memory[560][4] => Mux20.IN569
-memory[560][5] => Mux11.IN569
-memory[560][5] => Mux19.IN569
-memory[560][6] => Mux10.IN569
-memory[560][6] => Mux18.IN569
-memory[560][7] => Mux9.IN569
-memory[560][7] => Mux17.IN569
-memory[559][0] => Mux16.IN568
-memory[559][0] => Mux24.IN568
-memory[559][1] => Mux15.IN568
-memory[559][1] => Mux23.IN568
-memory[559][2] => Mux14.IN568
-memory[559][2] => Mux22.IN568
-memory[559][3] => Mux13.IN568
-memory[559][3] => Mux21.IN568
-memory[559][4] => Mux12.IN568
-memory[559][4] => Mux20.IN568
-memory[559][5] => Mux11.IN568
-memory[559][5] => Mux19.IN568
-memory[559][6] => Mux10.IN568
-memory[559][6] => Mux18.IN568
-memory[559][7] => Mux9.IN568
-memory[559][7] => Mux17.IN568
-memory[558][0] => Mux16.IN567
-memory[558][0] => Mux24.IN567
-memory[558][1] => Mux15.IN567
-memory[558][1] => Mux23.IN567
-memory[558][2] => Mux14.IN567
-memory[558][2] => Mux22.IN567
-memory[558][3] => Mux13.IN567
-memory[558][3] => Mux21.IN567
-memory[558][4] => Mux12.IN567
-memory[558][4] => Mux20.IN567
-memory[558][5] => Mux11.IN567
-memory[558][5] => Mux19.IN567
-memory[558][6] => Mux10.IN567
-memory[558][6] => Mux18.IN567
-memory[558][7] => Mux9.IN567
-memory[558][7] => Mux17.IN567
-memory[557][0] => Mux16.IN566
-memory[557][0] => Mux24.IN566
-memory[557][1] => Mux15.IN566
-memory[557][1] => Mux23.IN566
-memory[557][2] => Mux14.IN566
-memory[557][2] => Mux22.IN566
-memory[557][3] => Mux13.IN566
-memory[557][3] => Mux21.IN566
-memory[557][4] => Mux12.IN566
-memory[557][4] => Mux20.IN566
-memory[557][5] => Mux11.IN566
-memory[557][5] => Mux19.IN566
-memory[557][6] => Mux10.IN566
-memory[557][6] => Mux18.IN566
-memory[557][7] => Mux9.IN566
-memory[557][7] => Mux17.IN566
-memory[556][0] => Mux16.IN565
-memory[556][0] => Mux24.IN565
-memory[556][1] => Mux15.IN565
-memory[556][1] => Mux23.IN565
-memory[556][2] => Mux14.IN565
-memory[556][2] => Mux22.IN565
-memory[556][3] => Mux13.IN565
-memory[556][3] => Mux21.IN565
-memory[556][4] => Mux12.IN565
-memory[556][4] => Mux20.IN565
-memory[556][5] => Mux11.IN565
-memory[556][5] => Mux19.IN565
-memory[556][6] => Mux10.IN565
-memory[556][6] => Mux18.IN565
-memory[556][7] => Mux9.IN565
-memory[556][7] => Mux17.IN565
-memory[555][0] => Mux16.IN564
-memory[555][0] => Mux24.IN564
-memory[555][1] => Mux15.IN564
-memory[555][1] => Mux23.IN564
-memory[555][2] => Mux14.IN564
-memory[555][2] => Mux22.IN564
-memory[555][3] => Mux13.IN564
-memory[555][3] => Mux21.IN564
-memory[555][4] => Mux12.IN564
-memory[555][4] => Mux20.IN564
-memory[555][5] => Mux11.IN564
-memory[555][5] => Mux19.IN564
-memory[555][6] => Mux10.IN564
-memory[555][6] => Mux18.IN564
-memory[555][7] => Mux9.IN564
-memory[555][7] => Mux17.IN564
-memory[554][0] => Mux16.IN563
-memory[554][0] => Mux24.IN563
-memory[554][1] => Mux15.IN563
-memory[554][1] => Mux23.IN563
-memory[554][2] => Mux14.IN563
-memory[554][2] => Mux22.IN563
-memory[554][3] => Mux13.IN563
-memory[554][3] => Mux21.IN563
-memory[554][4] => Mux12.IN563
-memory[554][4] => Mux20.IN563
-memory[554][5] => Mux11.IN563
-memory[554][5] => Mux19.IN563
-memory[554][6] => Mux10.IN563
-memory[554][6] => Mux18.IN563
-memory[554][7] => Mux9.IN563
-memory[554][7] => Mux17.IN563
-memory[553][0] => Mux16.IN562
-memory[553][0] => Mux24.IN562
-memory[553][1] => Mux15.IN562
-memory[553][1] => Mux23.IN562
-memory[553][2] => Mux14.IN562
-memory[553][2] => Mux22.IN562
-memory[553][3] => Mux13.IN562
-memory[553][3] => Mux21.IN562
-memory[553][4] => Mux12.IN562
-memory[553][4] => Mux20.IN562
-memory[553][5] => Mux11.IN562
-memory[553][5] => Mux19.IN562
-memory[553][6] => Mux10.IN562
-memory[553][6] => Mux18.IN562
-memory[553][7] => Mux9.IN562
-memory[553][7] => Mux17.IN562
-memory[552][0] => Mux16.IN561
-memory[552][0] => Mux24.IN561
-memory[552][1] => Mux15.IN561
-memory[552][1] => Mux23.IN561
-memory[552][2] => Mux14.IN561
-memory[552][2] => Mux22.IN561
-memory[552][3] => Mux13.IN561
-memory[552][3] => Mux21.IN561
-memory[552][4] => Mux12.IN561
-memory[552][4] => Mux20.IN561
-memory[552][5] => Mux11.IN561
-memory[552][5] => Mux19.IN561
-memory[552][6] => Mux10.IN561
-memory[552][6] => Mux18.IN561
-memory[552][7] => Mux9.IN561
-memory[552][7] => Mux17.IN561
-memory[551][0] => Mux16.IN560
-memory[551][0] => Mux24.IN560
-memory[551][1] => Mux15.IN560
-memory[551][1] => Mux23.IN560
-memory[551][2] => Mux14.IN560
-memory[551][2] => Mux22.IN560
-memory[551][3] => Mux13.IN560
-memory[551][3] => Mux21.IN560
-memory[551][4] => Mux12.IN560
-memory[551][4] => Mux20.IN560
-memory[551][5] => Mux11.IN560
-memory[551][5] => Mux19.IN560
-memory[551][6] => Mux10.IN560
-memory[551][6] => Mux18.IN560
-memory[551][7] => Mux9.IN560
-memory[551][7] => Mux17.IN560
-memory[550][0] => Mux16.IN559
-memory[550][0] => Mux24.IN559
-memory[550][1] => Mux15.IN559
-memory[550][1] => Mux23.IN559
-memory[550][2] => Mux14.IN559
-memory[550][2] => Mux22.IN559
-memory[550][3] => Mux13.IN559
-memory[550][3] => Mux21.IN559
-memory[550][4] => Mux12.IN559
-memory[550][4] => Mux20.IN559
-memory[550][5] => Mux11.IN559
-memory[550][5] => Mux19.IN559
-memory[550][6] => Mux10.IN559
-memory[550][6] => Mux18.IN559
-memory[550][7] => Mux9.IN559
-memory[550][7] => Mux17.IN559
-memory[549][0] => Mux16.IN558
-memory[549][0] => Mux24.IN558
-memory[549][1] => Mux15.IN558
-memory[549][1] => Mux23.IN558
-memory[549][2] => Mux14.IN558
-memory[549][2] => Mux22.IN558
-memory[549][3] => Mux13.IN558
-memory[549][3] => Mux21.IN558
-memory[549][4] => Mux12.IN558
-memory[549][4] => Mux20.IN558
-memory[549][5] => Mux11.IN558
-memory[549][5] => Mux19.IN558
-memory[549][6] => Mux10.IN558
-memory[549][6] => Mux18.IN558
-memory[549][7] => Mux9.IN558
-memory[549][7] => Mux17.IN558
-memory[548][0] => Mux16.IN557
-memory[548][0] => Mux24.IN557
-memory[548][1] => Mux15.IN557
-memory[548][1] => Mux23.IN557
-memory[548][2] => Mux14.IN557
-memory[548][2] => Mux22.IN557
-memory[548][3] => Mux13.IN557
-memory[548][3] => Mux21.IN557
-memory[548][4] => Mux12.IN557
-memory[548][4] => Mux20.IN557
-memory[548][5] => Mux11.IN557
-memory[548][5] => Mux19.IN557
-memory[548][6] => Mux10.IN557
-memory[548][6] => Mux18.IN557
-memory[548][7] => Mux9.IN557
-memory[548][7] => Mux17.IN557
-memory[547][0] => Mux16.IN556
-memory[547][0] => Mux24.IN556
-memory[547][1] => Mux15.IN556
-memory[547][1] => Mux23.IN556
-memory[547][2] => Mux14.IN556
-memory[547][2] => Mux22.IN556
-memory[547][3] => Mux13.IN556
-memory[547][3] => Mux21.IN556
-memory[547][4] => Mux12.IN556
-memory[547][4] => Mux20.IN556
-memory[547][5] => Mux11.IN556
-memory[547][5] => Mux19.IN556
-memory[547][6] => Mux10.IN556
-memory[547][6] => Mux18.IN556
-memory[547][7] => Mux9.IN556
-memory[547][7] => Mux17.IN556
-memory[546][0] => Mux16.IN555
-memory[546][0] => Mux24.IN555
-memory[546][1] => Mux15.IN555
-memory[546][1] => Mux23.IN555
-memory[546][2] => Mux14.IN555
-memory[546][2] => Mux22.IN555
-memory[546][3] => Mux13.IN555
-memory[546][3] => Mux21.IN555
-memory[546][4] => Mux12.IN555
-memory[546][4] => Mux20.IN555
-memory[546][5] => Mux11.IN555
-memory[546][5] => Mux19.IN555
-memory[546][6] => Mux10.IN555
-memory[546][6] => Mux18.IN555
-memory[546][7] => Mux9.IN555
-memory[546][7] => Mux17.IN555
-memory[545][0] => Mux16.IN554
-memory[545][0] => Mux24.IN554
-memory[545][1] => Mux15.IN554
-memory[545][1] => Mux23.IN554
-memory[545][2] => Mux14.IN554
-memory[545][2] => Mux22.IN554
-memory[545][3] => Mux13.IN554
-memory[545][3] => Mux21.IN554
-memory[545][4] => Mux12.IN554
-memory[545][4] => Mux20.IN554
-memory[545][5] => Mux11.IN554
-memory[545][5] => Mux19.IN554
-memory[545][6] => Mux10.IN554
-memory[545][6] => Mux18.IN554
-memory[545][7] => Mux9.IN554
-memory[545][7] => Mux17.IN554
-memory[544][0] => Mux16.IN553
-memory[544][0] => Mux24.IN553
-memory[544][1] => Mux15.IN553
-memory[544][1] => Mux23.IN553
-memory[544][2] => Mux14.IN553
-memory[544][2] => Mux22.IN553
-memory[544][3] => Mux13.IN553
-memory[544][3] => Mux21.IN553
-memory[544][4] => Mux12.IN553
-memory[544][4] => Mux20.IN553
-memory[544][5] => Mux11.IN553
-memory[544][5] => Mux19.IN553
-memory[544][6] => Mux10.IN553
-memory[544][6] => Mux18.IN553
-memory[544][7] => Mux9.IN553
-memory[544][7] => Mux17.IN553
-memory[543][0] => Mux16.IN552
-memory[543][0] => Mux24.IN552
-memory[543][1] => Mux15.IN552
-memory[543][1] => Mux23.IN552
-memory[543][2] => Mux14.IN552
-memory[543][2] => Mux22.IN552
-memory[543][3] => Mux13.IN552
-memory[543][3] => Mux21.IN552
-memory[543][4] => Mux12.IN552
-memory[543][4] => Mux20.IN552
-memory[543][5] => Mux11.IN552
-memory[543][5] => Mux19.IN552
-memory[543][6] => Mux10.IN552
-memory[543][6] => Mux18.IN552
-memory[543][7] => Mux9.IN552
-memory[543][7] => Mux17.IN552
-memory[542][0] => Mux16.IN551
-memory[542][0] => Mux24.IN551
-memory[542][1] => Mux15.IN551
-memory[542][1] => Mux23.IN551
-memory[542][2] => Mux14.IN551
-memory[542][2] => Mux22.IN551
-memory[542][3] => Mux13.IN551
-memory[542][3] => Mux21.IN551
-memory[542][4] => Mux12.IN551
-memory[542][4] => Mux20.IN551
-memory[542][5] => Mux11.IN551
-memory[542][5] => Mux19.IN551
-memory[542][6] => Mux10.IN551
-memory[542][6] => Mux18.IN551
-memory[542][7] => Mux9.IN551
-memory[542][7] => Mux17.IN551
-memory[541][0] => Mux16.IN550
-memory[541][0] => Mux24.IN550
-memory[541][1] => Mux15.IN550
-memory[541][1] => Mux23.IN550
-memory[541][2] => Mux14.IN550
-memory[541][2] => Mux22.IN550
-memory[541][3] => Mux13.IN550
-memory[541][3] => Mux21.IN550
-memory[541][4] => Mux12.IN550
-memory[541][4] => Mux20.IN550
-memory[541][5] => Mux11.IN550
-memory[541][5] => Mux19.IN550
-memory[541][6] => Mux10.IN550
-memory[541][6] => Mux18.IN550
-memory[541][7] => Mux9.IN550
-memory[541][7] => Mux17.IN550
-memory[540][0] => Mux16.IN549
-memory[540][0] => Mux24.IN549
-memory[540][1] => Mux15.IN549
-memory[540][1] => Mux23.IN549
-memory[540][2] => Mux14.IN549
-memory[540][2] => Mux22.IN549
-memory[540][3] => Mux13.IN549
-memory[540][3] => Mux21.IN549
-memory[540][4] => Mux12.IN549
-memory[540][4] => Mux20.IN549
-memory[540][5] => Mux11.IN549
-memory[540][5] => Mux19.IN549
-memory[540][6] => Mux10.IN549
-memory[540][6] => Mux18.IN549
-memory[540][7] => Mux9.IN549
-memory[540][7] => Mux17.IN549
-memory[539][0] => Mux16.IN548
-memory[539][0] => Mux24.IN548
-memory[539][1] => Mux15.IN548
-memory[539][1] => Mux23.IN548
-memory[539][2] => Mux14.IN548
-memory[539][2] => Mux22.IN548
-memory[539][3] => Mux13.IN548
-memory[539][3] => Mux21.IN548
-memory[539][4] => Mux12.IN548
-memory[539][4] => Mux20.IN548
-memory[539][5] => Mux11.IN548
-memory[539][5] => Mux19.IN548
-memory[539][6] => Mux10.IN548
-memory[539][6] => Mux18.IN548
-memory[539][7] => Mux9.IN548
-memory[539][7] => Mux17.IN548
-memory[538][0] => Mux16.IN547
-memory[538][0] => Mux24.IN547
-memory[538][1] => Mux15.IN547
-memory[538][1] => Mux23.IN547
-memory[538][2] => Mux14.IN547
-memory[538][2] => Mux22.IN547
-memory[538][3] => Mux13.IN547
-memory[538][3] => Mux21.IN547
-memory[538][4] => Mux12.IN547
-memory[538][4] => Mux20.IN547
-memory[538][5] => Mux11.IN547
-memory[538][5] => Mux19.IN547
-memory[538][6] => Mux10.IN547
-memory[538][6] => Mux18.IN547
-memory[538][7] => Mux9.IN547
-memory[538][7] => Mux17.IN547
-memory[537][0] => Mux16.IN546
-memory[537][0] => Mux24.IN546
-memory[537][1] => Mux15.IN546
-memory[537][1] => Mux23.IN546
-memory[537][2] => Mux14.IN546
-memory[537][2] => Mux22.IN546
-memory[537][3] => Mux13.IN546
-memory[537][3] => Mux21.IN546
-memory[537][4] => Mux12.IN546
-memory[537][4] => Mux20.IN546
-memory[537][5] => Mux11.IN546
-memory[537][5] => Mux19.IN546
-memory[537][6] => Mux10.IN546
-memory[537][6] => Mux18.IN546
-memory[537][7] => Mux9.IN546
-memory[537][7] => Mux17.IN546
-memory[536][0] => Mux16.IN545
-memory[536][0] => Mux24.IN545
-memory[536][1] => Mux15.IN545
-memory[536][1] => Mux23.IN545
-memory[536][2] => Mux14.IN545
-memory[536][2] => Mux22.IN545
-memory[536][3] => Mux13.IN545
-memory[536][3] => Mux21.IN545
-memory[536][4] => Mux12.IN545
-memory[536][4] => Mux20.IN545
-memory[536][5] => Mux11.IN545
-memory[536][5] => Mux19.IN545
-memory[536][6] => Mux10.IN545
-memory[536][6] => Mux18.IN545
-memory[536][7] => Mux9.IN545
-memory[536][7] => Mux17.IN545
-memory[535][0] => Mux16.IN544
-memory[535][0] => Mux24.IN544
-memory[535][1] => Mux15.IN544
-memory[535][1] => Mux23.IN544
-memory[535][2] => Mux14.IN544
-memory[535][2] => Mux22.IN544
-memory[535][3] => Mux13.IN544
-memory[535][3] => Mux21.IN544
-memory[535][4] => Mux12.IN544
-memory[535][4] => Mux20.IN544
-memory[535][5] => Mux11.IN544
-memory[535][5] => Mux19.IN544
-memory[535][6] => Mux10.IN544
-memory[535][6] => Mux18.IN544
-memory[535][7] => Mux9.IN544
-memory[535][7] => Mux17.IN544
-memory[534][0] => Mux16.IN543
-memory[534][0] => Mux24.IN543
-memory[534][1] => Mux15.IN543
-memory[534][1] => Mux23.IN543
-memory[534][2] => Mux14.IN543
-memory[534][2] => Mux22.IN543
-memory[534][3] => Mux13.IN543
-memory[534][3] => Mux21.IN543
-memory[534][4] => Mux12.IN543
-memory[534][4] => Mux20.IN543
-memory[534][5] => Mux11.IN543
-memory[534][5] => Mux19.IN543
-memory[534][6] => Mux10.IN543
-memory[534][6] => Mux18.IN543
-memory[534][7] => Mux9.IN543
-memory[534][7] => Mux17.IN543
-memory[533][0] => Mux16.IN542
-memory[533][0] => Mux24.IN542
-memory[533][1] => Mux15.IN542
-memory[533][1] => Mux23.IN542
-memory[533][2] => Mux14.IN542
-memory[533][2] => Mux22.IN542
-memory[533][3] => Mux13.IN542
-memory[533][3] => Mux21.IN542
-memory[533][4] => Mux12.IN542
-memory[533][4] => Mux20.IN542
-memory[533][5] => Mux11.IN542
-memory[533][5] => Mux19.IN542
-memory[533][6] => Mux10.IN542
-memory[533][6] => Mux18.IN542
-memory[533][7] => Mux9.IN542
-memory[533][7] => Mux17.IN542
-memory[532][0] => Mux16.IN541
-memory[532][0] => Mux24.IN541
-memory[532][1] => Mux15.IN541
-memory[532][1] => Mux23.IN541
-memory[532][2] => Mux14.IN541
-memory[532][2] => Mux22.IN541
-memory[532][3] => Mux13.IN541
-memory[532][3] => Mux21.IN541
-memory[532][4] => Mux12.IN541
-memory[532][4] => Mux20.IN541
-memory[532][5] => Mux11.IN541
-memory[532][5] => Mux19.IN541
-memory[532][6] => Mux10.IN541
-memory[532][6] => Mux18.IN541
-memory[532][7] => Mux9.IN541
-memory[532][7] => Mux17.IN541
-memory[531][0] => Mux16.IN540
-memory[531][0] => Mux24.IN540
-memory[531][1] => Mux15.IN540
-memory[531][1] => Mux23.IN540
-memory[531][2] => Mux14.IN540
-memory[531][2] => Mux22.IN540
-memory[531][3] => Mux13.IN540
-memory[531][3] => Mux21.IN540
-memory[531][4] => Mux12.IN540
-memory[531][4] => Mux20.IN540
-memory[531][5] => Mux11.IN540
-memory[531][5] => Mux19.IN540
-memory[531][6] => Mux10.IN540
-memory[531][6] => Mux18.IN540
-memory[531][7] => Mux9.IN540
-memory[531][7] => Mux17.IN540
-memory[530][0] => Mux16.IN539
-memory[530][0] => Mux24.IN539
-memory[530][1] => Mux15.IN539
-memory[530][1] => Mux23.IN539
-memory[530][2] => Mux14.IN539
-memory[530][2] => Mux22.IN539
-memory[530][3] => Mux13.IN539
-memory[530][3] => Mux21.IN539
-memory[530][4] => Mux12.IN539
-memory[530][4] => Mux20.IN539
-memory[530][5] => Mux11.IN539
-memory[530][5] => Mux19.IN539
-memory[530][6] => Mux10.IN539
-memory[530][6] => Mux18.IN539
-memory[530][7] => Mux9.IN539
-memory[530][7] => Mux17.IN539
-memory[529][0] => Mux16.IN538
-memory[529][0] => Mux24.IN538
-memory[529][1] => Mux15.IN538
-memory[529][1] => Mux23.IN538
-memory[529][2] => Mux14.IN538
-memory[529][2] => Mux22.IN538
-memory[529][3] => Mux13.IN538
-memory[529][3] => Mux21.IN538
-memory[529][4] => Mux12.IN538
-memory[529][4] => Mux20.IN538
-memory[529][5] => Mux11.IN538
-memory[529][5] => Mux19.IN538
-memory[529][6] => Mux10.IN538
-memory[529][6] => Mux18.IN538
-memory[529][7] => Mux9.IN538
-memory[529][7] => Mux17.IN538
-memory[528][0] => Mux16.IN537
-memory[528][0] => Mux24.IN537
-memory[528][1] => Mux15.IN537
-memory[528][1] => Mux23.IN537
-memory[528][2] => Mux14.IN537
-memory[528][2] => Mux22.IN537
-memory[528][3] => Mux13.IN537
-memory[528][3] => Mux21.IN537
-memory[528][4] => Mux12.IN537
-memory[528][4] => Mux20.IN537
-memory[528][5] => Mux11.IN537
-memory[528][5] => Mux19.IN537
-memory[528][6] => Mux10.IN537
-memory[528][6] => Mux18.IN537
-memory[528][7] => Mux9.IN537
-memory[528][7] => Mux17.IN537
-memory[527][0] => Mux16.IN536
-memory[527][0] => Mux24.IN536
-memory[527][1] => Mux15.IN536
-memory[527][1] => Mux23.IN536
-memory[527][2] => Mux14.IN536
-memory[527][2] => Mux22.IN536
-memory[527][3] => Mux13.IN536
-memory[527][3] => Mux21.IN536
-memory[527][4] => Mux12.IN536
-memory[527][4] => Mux20.IN536
-memory[527][5] => Mux11.IN536
-memory[527][5] => Mux19.IN536
-memory[527][6] => Mux10.IN536
-memory[527][6] => Mux18.IN536
-memory[527][7] => Mux9.IN536
-memory[527][7] => Mux17.IN536
-memory[526][0] => Mux16.IN535
-memory[526][0] => Mux24.IN535
-memory[526][1] => Mux15.IN535
-memory[526][1] => Mux23.IN535
-memory[526][2] => Mux14.IN535
-memory[526][2] => Mux22.IN535
-memory[526][3] => Mux13.IN535
-memory[526][3] => Mux21.IN535
-memory[526][4] => Mux12.IN535
-memory[526][4] => Mux20.IN535
-memory[526][5] => Mux11.IN535
-memory[526][5] => Mux19.IN535
-memory[526][6] => Mux10.IN535
-memory[526][6] => Mux18.IN535
-memory[526][7] => Mux9.IN535
-memory[526][7] => Mux17.IN535
-memory[525][0] => Mux16.IN534
-memory[525][0] => Mux24.IN534
-memory[525][1] => Mux15.IN534
-memory[525][1] => Mux23.IN534
-memory[525][2] => Mux14.IN534
-memory[525][2] => Mux22.IN534
-memory[525][3] => Mux13.IN534
-memory[525][3] => Mux21.IN534
-memory[525][4] => Mux12.IN534
-memory[525][4] => Mux20.IN534
-memory[525][5] => Mux11.IN534
-memory[525][5] => Mux19.IN534
-memory[525][6] => Mux10.IN534
-memory[525][6] => Mux18.IN534
-memory[525][7] => Mux9.IN534
-memory[525][7] => Mux17.IN534
-memory[524][0] => Mux16.IN533
-memory[524][0] => Mux24.IN533
-memory[524][1] => Mux15.IN533
-memory[524][1] => Mux23.IN533
-memory[524][2] => Mux14.IN533
-memory[524][2] => Mux22.IN533
-memory[524][3] => Mux13.IN533
-memory[524][3] => Mux21.IN533
-memory[524][4] => Mux12.IN533
-memory[524][4] => Mux20.IN533
-memory[524][5] => Mux11.IN533
-memory[524][5] => Mux19.IN533
-memory[524][6] => Mux10.IN533
-memory[524][6] => Mux18.IN533
-memory[524][7] => Mux9.IN533
-memory[524][7] => Mux17.IN533
-memory[523][0] => Mux16.IN532
-memory[523][0] => Mux24.IN532
-memory[523][1] => Mux15.IN532
-memory[523][1] => Mux23.IN532
-memory[523][2] => Mux14.IN532
-memory[523][2] => Mux22.IN532
-memory[523][3] => Mux13.IN532
-memory[523][3] => Mux21.IN532
-memory[523][4] => Mux12.IN532
-memory[523][4] => Mux20.IN532
-memory[523][5] => Mux11.IN532
-memory[523][5] => Mux19.IN532
-memory[523][6] => Mux10.IN532
-memory[523][6] => Mux18.IN532
-memory[523][7] => Mux9.IN532
-memory[523][7] => Mux17.IN532
-memory[522][0] => Mux16.IN531
-memory[522][0] => Mux24.IN531
-memory[522][1] => Mux15.IN531
-memory[522][1] => Mux23.IN531
-memory[522][2] => Mux14.IN531
-memory[522][2] => Mux22.IN531
-memory[522][3] => Mux13.IN531
-memory[522][3] => Mux21.IN531
-memory[522][4] => Mux12.IN531
-memory[522][4] => Mux20.IN531
-memory[522][5] => Mux11.IN531
-memory[522][5] => Mux19.IN531
-memory[522][6] => Mux10.IN531
-memory[522][6] => Mux18.IN531
-memory[522][7] => Mux9.IN531
-memory[522][7] => Mux17.IN531
-memory[521][0] => Mux16.IN530
-memory[521][0] => Mux24.IN530
-memory[521][1] => Mux15.IN530
-memory[521][1] => Mux23.IN530
-memory[521][2] => Mux14.IN530
-memory[521][2] => Mux22.IN530
-memory[521][3] => Mux13.IN530
-memory[521][3] => Mux21.IN530
-memory[521][4] => Mux12.IN530
-memory[521][4] => Mux20.IN530
-memory[521][5] => Mux11.IN530
-memory[521][5] => Mux19.IN530
-memory[521][6] => Mux10.IN530
-memory[521][6] => Mux18.IN530
-memory[521][7] => Mux9.IN530
-memory[521][7] => Mux17.IN530
-memory[520][0] => Mux16.IN529
-memory[520][0] => Mux24.IN529
-memory[520][1] => Mux15.IN529
-memory[520][1] => Mux23.IN529
-memory[520][2] => Mux14.IN529
-memory[520][2] => Mux22.IN529
-memory[520][3] => Mux13.IN529
-memory[520][3] => Mux21.IN529
-memory[520][4] => Mux12.IN529
-memory[520][4] => Mux20.IN529
-memory[520][5] => Mux11.IN529
-memory[520][5] => Mux19.IN529
-memory[520][6] => Mux10.IN529
-memory[520][6] => Mux18.IN529
-memory[520][7] => Mux9.IN529
-memory[520][7] => Mux17.IN529
-memory[519][0] => Mux16.IN528
-memory[519][0] => Mux24.IN528
-memory[519][1] => Mux15.IN528
-memory[519][1] => Mux23.IN528
-memory[519][2] => Mux14.IN528
-memory[519][2] => Mux22.IN528
-memory[519][3] => Mux13.IN528
-memory[519][3] => Mux21.IN528
-memory[519][4] => Mux12.IN528
-memory[519][4] => Mux20.IN528
-memory[519][5] => Mux11.IN528
-memory[519][5] => Mux19.IN528
-memory[519][6] => Mux10.IN528
-memory[519][6] => Mux18.IN528
-memory[519][7] => Mux9.IN528
-memory[519][7] => Mux17.IN528
-memory[518][0] => Mux16.IN527
-memory[518][0] => Mux24.IN527
-memory[518][1] => Mux15.IN527
-memory[518][1] => Mux23.IN527
-memory[518][2] => Mux14.IN527
-memory[518][2] => Mux22.IN527
-memory[518][3] => Mux13.IN527
-memory[518][3] => Mux21.IN527
-memory[518][4] => Mux12.IN527
-memory[518][4] => Mux20.IN527
-memory[518][5] => Mux11.IN527
-memory[518][5] => Mux19.IN527
-memory[518][6] => Mux10.IN527
-memory[518][6] => Mux18.IN527
-memory[518][7] => Mux9.IN527
-memory[518][7] => Mux17.IN527
-memory[517][0] => Mux16.IN526
-memory[517][0] => Mux24.IN526
-memory[517][1] => Mux15.IN526
-memory[517][1] => Mux23.IN526
-memory[517][2] => Mux14.IN526
-memory[517][2] => Mux22.IN526
-memory[517][3] => Mux13.IN526
-memory[517][3] => Mux21.IN526
-memory[517][4] => Mux12.IN526
-memory[517][4] => Mux20.IN526
-memory[517][5] => Mux11.IN526
-memory[517][5] => Mux19.IN526
-memory[517][6] => Mux10.IN526
-memory[517][6] => Mux18.IN526
-memory[517][7] => Mux9.IN526
-memory[517][7] => Mux17.IN526
-memory[516][0] => Mux16.IN525
-memory[516][0] => Mux24.IN525
-memory[516][1] => Mux15.IN525
-memory[516][1] => Mux23.IN525
-memory[516][2] => Mux14.IN525
-memory[516][2] => Mux22.IN525
-memory[516][3] => Mux13.IN525
-memory[516][3] => Mux21.IN525
-memory[516][4] => Mux12.IN525
-memory[516][4] => Mux20.IN525
-memory[516][5] => Mux11.IN525
-memory[516][5] => Mux19.IN525
-memory[516][6] => Mux10.IN525
-memory[516][6] => Mux18.IN525
-memory[516][7] => Mux9.IN525
-memory[516][7] => Mux17.IN525
-memory[515][0] => Mux16.IN524
-memory[515][0] => Mux24.IN524
-memory[515][1] => Mux15.IN524
-memory[515][1] => Mux23.IN524
-memory[515][2] => Mux14.IN524
-memory[515][2] => Mux22.IN524
-memory[515][3] => Mux13.IN524
-memory[515][3] => Mux21.IN524
-memory[515][4] => Mux12.IN524
-memory[515][4] => Mux20.IN524
-memory[515][5] => Mux11.IN524
-memory[515][5] => Mux19.IN524
-memory[515][6] => Mux10.IN524
-memory[515][6] => Mux18.IN524
-memory[515][7] => Mux9.IN524
-memory[515][7] => Mux17.IN524
-memory[514][0] => Mux16.IN523
-memory[514][0] => Mux24.IN523
-memory[514][1] => Mux15.IN523
-memory[514][1] => Mux23.IN523
-memory[514][2] => Mux14.IN523
-memory[514][2] => Mux22.IN523
-memory[514][3] => Mux13.IN523
-memory[514][3] => Mux21.IN523
-memory[514][4] => Mux12.IN523
-memory[514][4] => Mux20.IN523
-memory[514][5] => Mux11.IN523
-memory[514][5] => Mux19.IN523
-memory[514][6] => Mux10.IN523
-memory[514][6] => Mux18.IN523
-memory[514][7] => Mux9.IN523
-memory[514][7] => Mux17.IN523
-memory[513][0] => Mux16.IN522
-memory[513][0] => Mux24.IN522
-memory[513][1] => Mux15.IN522
-memory[513][1] => Mux23.IN522
-memory[513][2] => Mux14.IN522
-memory[513][2] => Mux22.IN522
-memory[513][3] => Mux13.IN522
-memory[513][3] => Mux21.IN522
-memory[513][4] => Mux12.IN522
-memory[513][4] => Mux20.IN522
-memory[513][5] => Mux11.IN522
-memory[513][5] => Mux19.IN522
-memory[513][6] => Mux10.IN522
-memory[513][6] => Mux18.IN522
-memory[513][7] => Mux9.IN522
-memory[513][7] => Mux17.IN522
-memory[512][0] => Mux16.IN521
-memory[512][0] => Mux24.IN521
-memory[512][1] => Mux15.IN521
-memory[512][1] => Mux23.IN521
-memory[512][2] => Mux14.IN521
-memory[512][2] => Mux22.IN521
-memory[512][3] => Mux13.IN521
-memory[512][3] => Mux21.IN521
-memory[512][4] => Mux12.IN521
-memory[512][4] => Mux20.IN521
-memory[512][5] => Mux11.IN521
-memory[512][5] => Mux19.IN521
-memory[512][6] => Mux10.IN521
-memory[512][6] => Mux18.IN521
-memory[512][7] => Mux9.IN521
-memory[512][7] => Mux17.IN521
-memory[511][0] => Mux16.IN520
-memory[511][0] => Mux24.IN520
-memory[511][1] => Mux15.IN520
-memory[511][1] => Mux23.IN520
-memory[511][2] => Mux14.IN520
-memory[511][2] => Mux22.IN520
-memory[511][3] => Mux13.IN520
-memory[511][3] => Mux21.IN520
-memory[511][4] => Mux12.IN520
-memory[511][4] => Mux20.IN520
-memory[511][5] => Mux11.IN520
-memory[511][5] => Mux19.IN520
-memory[511][6] => Mux10.IN520
-memory[511][6] => Mux18.IN520
-memory[511][7] => Mux9.IN520
-memory[511][7] => Mux17.IN520
-memory[510][0] => Mux16.IN519
-memory[510][0] => Mux24.IN519
-memory[510][1] => Mux15.IN519
-memory[510][1] => Mux23.IN519
-memory[510][2] => Mux14.IN519
-memory[510][2] => Mux22.IN519
-memory[510][3] => Mux13.IN519
-memory[510][3] => Mux21.IN519
-memory[510][4] => Mux12.IN519
-memory[510][4] => Mux20.IN519
-memory[510][5] => Mux11.IN519
-memory[510][5] => Mux19.IN519
-memory[510][6] => Mux10.IN519
-memory[510][6] => Mux18.IN519
-memory[510][7] => Mux9.IN519
-memory[510][7] => Mux17.IN519
-memory[509][0] => Mux16.IN518
-memory[509][0] => Mux24.IN518
-memory[509][1] => Mux15.IN518
-memory[509][1] => Mux23.IN518
-memory[509][2] => Mux14.IN518
-memory[509][2] => Mux22.IN518
-memory[509][3] => Mux13.IN518
-memory[509][3] => Mux21.IN518
-memory[509][4] => Mux12.IN518
-memory[509][4] => Mux20.IN518
-memory[509][5] => Mux11.IN518
-memory[509][5] => Mux19.IN518
-memory[509][6] => Mux10.IN518
-memory[509][6] => Mux18.IN518
-memory[509][7] => Mux9.IN518
-memory[509][7] => Mux17.IN518
-memory[508][0] => Mux16.IN517
-memory[508][0] => Mux24.IN517
-memory[508][1] => Mux15.IN517
-memory[508][1] => Mux23.IN517
-memory[508][2] => Mux14.IN517
-memory[508][2] => Mux22.IN517
-memory[508][3] => Mux13.IN517
-memory[508][3] => Mux21.IN517
-memory[508][4] => Mux12.IN517
-memory[508][4] => Mux20.IN517
-memory[508][5] => Mux11.IN517
-memory[508][5] => Mux19.IN517
-memory[508][6] => Mux10.IN517
-memory[508][6] => Mux18.IN517
-memory[508][7] => Mux9.IN517
-memory[508][7] => Mux17.IN517
-memory[507][0] => Mux16.IN516
-memory[507][0] => Mux24.IN516
-memory[507][1] => Mux15.IN516
-memory[507][1] => Mux23.IN516
-memory[507][2] => Mux14.IN516
-memory[507][2] => Mux22.IN516
-memory[507][3] => Mux13.IN516
-memory[507][3] => Mux21.IN516
-memory[507][4] => Mux12.IN516
-memory[507][4] => Mux20.IN516
-memory[507][5] => Mux11.IN516
-memory[507][5] => Mux19.IN516
-memory[507][6] => Mux10.IN516
-memory[507][6] => Mux18.IN516
-memory[507][7] => Mux9.IN516
-memory[507][7] => Mux17.IN516
-memory[506][0] => Mux16.IN515
-memory[506][0] => Mux24.IN515
-memory[506][1] => Mux15.IN515
-memory[506][1] => Mux23.IN515
-memory[506][2] => Mux14.IN515
-memory[506][2] => Mux22.IN515
-memory[506][3] => Mux13.IN515
-memory[506][3] => Mux21.IN515
-memory[506][4] => Mux12.IN515
-memory[506][4] => Mux20.IN515
-memory[506][5] => Mux11.IN515
-memory[506][5] => Mux19.IN515
-memory[506][6] => Mux10.IN515
-memory[506][6] => Mux18.IN515
-memory[506][7] => Mux9.IN515
-memory[506][7] => Mux17.IN515
-memory[505][0] => Mux16.IN514
-memory[505][0] => Mux24.IN514
-memory[505][1] => Mux15.IN514
-memory[505][1] => Mux23.IN514
-memory[505][2] => Mux14.IN514
-memory[505][2] => Mux22.IN514
-memory[505][3] => Mux13.IN514
-memory[505][3] => Mux21.IN514
-memory[505][4] => Mux12.IN514
-memory[505][4] => Mux20.IN514
-memory[505][5] => Mux11.IN514
-memory[505][5] => Mux19.IN514
-memory[505][6] => Mux10.IN514
-memory[505][6] => Mux18.IN514
-memory[505][7] => Mux9.IN514
-memory[505][7] => Mux17.IN514
-memory[504][0] => Mux16.IN513
-memory[504][0] => Mux24.IN513
-memory[504][1] => Mux15.IN513
-memory[504][1] => Mux23.IN513
-memory[504][2] => Mux14.IN513
-memory[504][2] => Mux22.IN513
-memory[504][3] => Mux13.IN513
-memory[504][3] => Mux21.IN513
-memory[504][4] => Mux12.IN513
-memory[504][4] => Mux20.IN513
-memory[504][5] => Mux11.IN513
-memory[504][5] => Mux19.IN513
-memory[504][6] => Mux10.IN513
-memory[504][6] => Mux18.IN513
-memory[504][7] => Mux9.IN513
-memory[504][7] => Mux17.IN513
-memory[503][0] => Mux16.IN512
-memory[503][0] => Mux24.IN512
-memory[503][1] => Mux15.IN512
-memory[503][1] => Mux23.IN512
-memory[503][2] => Mux14.IN512
-memory[503][2] => Mux22.IN512
-memory[503][3] => Mux13.IN512
-memory[503][3] => Mux21.IN512
-memory[503][4] => Mux12.IN512
-memory[503][4] => Mux20.IN512
-memory[503][5] => Mux11.IN512
-memory[503][5] => Mux19.IN512
-memory[503][6] => Mux10.IN512
-memory[503][6] => Mux18.IN512
-memory[503][7] => Mux9.IN512
-memory[503][7] => Mux17.IN512
-memory[502][0] => Mux16.IN511
-memory[502][0] => Mux24.IN511
-memory[502][1] => Mux15.IN511
-memory[502][1] => Mux23.IN511
-memory[502][2] => Mux14.IN511
-memory[502][2] => Mux22.IN511
-memory[502][3] => Mux13.IN511
-memory[502][3] => Mux21.IN511
-memory[502][4] => Mux12.IN511
-memory[502][4] => Mux20.IN511
-memory[502][5] => Mux11.IN511
-memory[502][5] => Mux19.IN511
-memory[502][6] => Mux10.IN511
-memory[502][6] => Mux18.IN511
-memory[502][7] => Mux9.IN511
-memory[502][7] => Mux17.IN511
-memory[501][0] => Mux16.IN510
-memory[501][0] => Mux24.IN510
-memory[501][1] => Mux15.IN510
-memory[501][1] => Mux23.IN510
-memory[501][2] => Mux14.IN510
-memory[501][2] => Mux22.IN510
-memory[501][3] => Mux13.IN510
-memory[501][3] => Mux21.IN510
-memory[501][4] => Mux12.IN510
-memory[501][4] => Mux20.IN510
-memory[501][5] => Mux11.IN510
-memory[501][5] => Mux19.IN510
-memory[501][6] => Mux10.IN510
-memory[501][6] => Mux18.IN510
-memory[501][7] => Mux9.IN510
-memory[501][7] => Mux17.IN510
-memory[500][0] => Mux16.IN509
-memory[500][0] => Mux24.IN509
-memory[500][1] => Mux15.IN509
-memory[500][1] => Mux23.IN509
-memory[500][2] => Mux14.IN509
-memory[500][2] => Mux22.IN509
-memory[500][3] => Mux13.IN509
-memory[500][3] => Mux21.IN509
-memory[500][4] => Mux12.IN509
-memory[500][4] => Mux20.IN509
-memory[500][5] => Mux11.IN509
-memory[500][5] => Mux19.IN509
-memory[500][6] => Mux10.IN509
-memory[500][6] => Mux18.IN509
-memory[500][7] => Mux9.IN509
-memory[500][7] => Mux17.IN509
-memory[499][0] => Mux16.IN508
-memory[499][0] => Mux24.IN508
-memory[499][1] => Mux15.IN508
-memory[499][1] => Mux23.IN508
-memory[499][2] => Mux14.IN508
-memory[499][2] => Mux22.IN508
-memory[499][3] => Mux13.IN508
-memory[499][3] => Mux21.IN508
-memory[499][4] => Mux12.IN508
-memory[499][4] => Mux20.IN508
-memory[499][5] => Mux11.IN508
-memory[499][5] => Mux19.IN508
-memory[499][6] => Mux10.IN508
-memory[499][6] => Mux18.IN508
-memory[499][7] => Mux9.IN508
-memory[499][7] => Mux17.IN508
-memory[498][0] => Mux16.IN507
-memory[498][0] => Mux24.IN507
-memory[498][1] => Mux15.IN507
-memory[498][1] => Mux23.IN507
-memory[498][2] => Mux14.IN507
-memory[498][2] => Mux22.IN507
-memory[498][3] => Mux13.IN507
-memory[498][3] => Mux21.IN507
-memory[498][4] => Mux12.IN507
-memory[498][4] => Mux20.IN507
-memory[498][5] => Mux11.IN507
-memory[498][5] => Mux19.IN507
-memory[498][6] => Mux10.IN507
-memory[498][6] => Mux18.IN507
-memory[498][7] => Mux9.IN507
-memory[498][7] => Mux17.IN507
-memory[497][0] => Mux16.IN506
-memory[497][0] => Mux24.IN506
-memory[497][1] => Mux15.IN506
-memory[497][1] => Mux23.IN506
-memory[497][2] => Mux14.IN506
-memory[497][2] => Mux22.IN506
-memory[497][3] => Mux13.IN506
-memory[497][3] => Mux21.IN506
-memory[497][4] => Mux12.IN506
-memory[497][4] => Mux20.IN506
-memory[497][5] => Mux11.IN506
-memory[497][5] => Mux19.IN506
-memory[497][6] => Mux10.IN506
-memory[497][6] => Mux18.IN506
-memory[497][7] => Mux9.IN506
-memory[497][7] => Mux17.IN506
-memory[496][0] => Mux16.IN505
-memory[496][0] => Mux24.IN505
-memory[496][1] => Mux15.IN505
-memory[496][1] => Mux23.IN505
-memory[496][2] => Mux14.IN505
-memory[496][2] => Mux22.IN505
-memory[496][3] => Mux13.IN505
-memory[496][3] => Mux21.IN505
-memory[496][4] => Mux12.IN505
-memory[496][4] => Mux20.IN505
-memory[496][5] => Mux11.IN505
-memory[496][5] => Mux19.IN505
-memory[496][6] => Mux10.IN505
-memory[496][6] => Mux18.IN505
-memory[496][7] => Mux9.IN505
-memory[496][7] => Mux17.IN505
-memory[495][0] => Mux16.IN504
-memory[495][0] => Mux24.IN504
-memory[495][1] => Mux15.IN504
-memory[495][1] => Mux23.IN504
-memory[495][2] => Mux14.IN504
-memory[495][2] => Mux22.IN504
-memory[495][3] => Mux13.IN504
-memory[495][3] => Mux21.IN504
-memory[495][4] => Mux12.IN504
-memory[495][4] => Mux20.IN504
-memory[495][5] => Mux11.IN504
-memory[495][5] => Mux19.IN504
-memory[495][6] => Mux10.IN504
-memory[495][6] => Mux18.IN504
-memory[495][7] => Mux9.IN504
-memory[495][7] => Mux17.IN504
-memory[494][0] => Mux16.IN503
-memory[494][0] => Mux24.IN503
-memory[494][1] => Mux15.IN503
-memory[494][1] => Mux23.IN503
-memory[494][2] => Mux14.IN503
-memory[494][2] => Mux22.IN503
-memory[494][3] => Mux13.IN503
-memory[494][3] => Mux21.IN503
-memory[494][4] => Mux12.IN503
-memory[494][4] => Mux20.IN503
-memory[494][5] => Mux11.IN503
-memory[494][5] => Mux19.IN503
-memory[494][6] => Mux10.IN503
-memory[494][6] => Mux18.IN503
-memory[494][7] => Mux9.IN503
-memory[494][7] => Mux17.IN503
-memory[493][0] => Mux16.IN502
-memory[493][0] => Mux24.IN502
-memory[493][1] => Mux15.IN502
-memory[493][1] => Mux23.IN502
-memory[493][2] => Mux14.IN502
-memory[493][2] => Mux22.IN502
-memory[493][3] => Mux13.IN502
-memory[493][3] => Mux21.IN502
-memory[493][4] => Mux12.IN502
-memory[493][4] => Mux20.IN502
-memory[493][5] => Mux11.IN502
-memory[493][5] => Mux19.IN502
-memory[493][6] => Mux10.IN502
-memory[493][6] => Mux18.IN502
-memory[493][7] => Mux9.IN502
-memory[493][7] => Mux17.IN502
-memory[492][0] => Mux16.IN501
-memory[492][0] => Mux24.IN501
-memory[492][1] => Mux15.IN501
-memory[492][1] => Mux23.IN501
-memory[492][2] => Mux14.IN501
-memory[492][2] => Mux22.IN501
-memory[492][3] => Mux13.IN501
-memory[492][3] => Mux21.IN501
-memory[492][4] => Mux12.IN501
-memory[492][4] => Mux20.IN501
-memory[492][5] => Mux11.IN501
-memory[492][5] => Mux19.IN501
-memory[492][6] => Mux10.IN501
-memory[492][6] => Mux18.IN501
-memory[492][7] => Mux9.IN501
-memory[492][7] => Mux17.IN501
-memory[491][0] => Mux16.IN500
-memory[491][0] => Mux24.IN500
-memory[491][1] => Mux15.IN500
-memory[491][1] => Mux23.IN500
-memory[491][2] => Mux14.IN500
-memory[491][2] => Mux22.IN500
-memory[491][3] => Mux13.IN500
-memory[491][3] => Mux21.IN500
-memory[491][4] => Mux12.IN500
-memory[491][4] => Mux20.IN500
-memory[491][5] => Mux11.IN500
-memory[491][5] => Mux19.IN500
-memory[491][6] => Mux10.IN500
-memory[491][6] => Mux18.IN500
-memory[491][7] => Mux9.IN500
-memory[491][7] => Mux17.IN500
-memory[490][0] => Mux16.IN499
-memory[490][0] => Mux24.IN499
-memory[490][1] => Mux15.IN499
-memory[490][1] => Mux23.IN499
-memory[490][2] => Mux14.IN499
-memory[490][2] => Mux22.IN499
-memory[490][3] => Mux13.IN499
-memory[490][3] => Mux21.IN499
-memory[490][4] => Mux12.IN499
-memory[490][4] => Mux20.IN499
-memory[490][5] => Mux11.IN499
-memory[490][5] => Mux19.IN499
-memory[490][6] => Mux10.IN499
-memory[490][6] => Mux18.IN499
-memory[490][7] => Mux9.IN499
-memory[490][7] => Mux17.IN499
-memory[489][0] => Mux16.IN498
-memory[489][0] => Mux24.IN498
-memory[489][1] => Mux15.IN498
-memory[489][1] => Mux23.IN498
-memory[489][2] => Mux14.IN498
-memory[489][2] => Mux22.IN498
-memory[489][3] => Mux13.IN498
-memory[489][3] => Mux21.IN498
-memory[489][4] => Mux12.IN498
-memory[489][4] => Mux20.IN498
-memory[489][5] => Mux11.IN498
-memory[489][5] => Mux19.IN498
-memory[489][6] => Mux10.IN498
-memory[489][6] => Mux18.IN498
-memory[489][7] => Mux9.IN498
-memory[489][7] => Mux17.IN498
-memory[488][0] => Mux16.IN497
-memory[488][0] => Mux24.IN497
-memory[488][1] => Mux15.IN497
-memory[488][1] => Mux23.IN497
-memory[488][2] => Mux14.IN497
-memory[488][2] => Mux22.IN497
-memory[488][3] => Mux13.IN497
-memory[488][3] => Mux21.IN497
-memory[488][4] => Mux12.IN497
-memory[488][4] => Mux20.IN497
-memory[488][5] => Mux11.IN497
-memory[488][5] => Mux19.IN497
-memory[488][6] => Mux10.IN497
-memory[488][6] => Mux18.IN497
-memory[488][7] => Mux9.IN497
-memory[488][7] => Mux17.IN497
-memory[487][0] => Mux16.IN496
-memory[487][0] => Mux24.IN496
-memory[487][1] => Mux15.IN496
-memory[487][1] => Mux23.IN496
-memory[487][2] => Mux14.IN496
-memory[487][2] => Mux22.IN496
-memory[487][3] => Mux13.IN496
-memory[487][3] => Mux21.IN496
-memory[487][4] => Mux12.IN496
-memory[487][4] => Mux20.IN496
-memory[487][5] => Mux11.IN496
-memory[487][5] => Mux19.IN496
-memory[487][6] => Mux10.IN496
-memory[487][6] => Mux18.IN496
-memory[487][7] => Mux9.IN496
-memory[487][7] => Mux17.IN496
-memory[486][0] => Mux16.IN495
-memory[486][0] => Mux24.IN495
-memory[486][1] => Mux15.IN495
-memory[486][1] => Mux23.IN495
-memory[486][2] => Mux14.IN495
-memory[486][2] => Mux22.IN495
-memory[486][3] => Mux13.IN495
-memory[486][3] => Mux21.IN495
-memory[486][4] => Mux12.IN495
-memory[486][4] => Mux20.IN495
-memory[486][5] => Mux11.IN495
-memory[486][5] => Mux19.IN495
-memory[486][6] => Mux10.IN495
-memory[486][6] => Mux18.IN495
-memory[486][7] => Mux9.IN495
-memory[486][7] => Mux17.IN495
-memory[485][0] => Mux16.IN494
-memory[485][0] => Mux24.IN494
-memory[485][1] => Mux15.IN494
-memory[485][1] => Mux23.IN494
-memory[485][2] => Mux14.IN494
-memory[485][2] => Mux22.IN494
-memory[485][3] => Mux13.IN494
-memory[485][3] => Mux21.IN494
-memory[485][4] => Mux12.IN494
-memory[485][4] => Mux20.IN494
-memory[485][5] => Mux11.IN494
-memory[485][5] => Mux19.IN494
-memory[485][6] => Mux10.IN494
-memory[485][6] => Mux18.IN494
-memory[485][7] => Mux9.IN494
-memory[485][7] => Mux17.IN494
-memory[484][0] => Mux16.IN493
-memory[484][0] => Mux24.IN493
-memory[484][1] => Mux15.IN493
-memory[484][1] => Mux23.IN493
-memory[484][2] => Mux14.IN493
-memory[484][2] => Mux22.IN493
-memory[484][3] => Mux13.IN493
-memory[484][3] => Mux21.IN493
-memory[484][4] => Mux12.IN493
-memory[484][4] => Mux20.IN493
-memory[484][5] => Mux11.IN493
-memory[484][5] => Mux19.IN493
-memory[484][6] => Mux10.IN493
-memory[484][6] => Mux18.IN493
-memory[484][7] => Mux9.IN493
-memory[484][7] => Mux17.IN493
-memory[483][0] => Mux16.IN492
-memory[483][0] => Mux24.IN492
-memory[483][1] => Mux15.IN492
-memory[483][1] => Mux23.IN492
-memory[483][2] => Mux14.IN492
-memory[483][2] => Mux22.IN492
-memory[483][3] => Mux13.IN492
-memory[483][3] => Mux21.IN492
-memory[483][4] => Mux12.IN492
-memory[483][4] => Mux20.IN492
-memory[483][5] => Mux11.IN492
-memory[483][5] => Mux19.IN492
-memory[483][6] => Mux10.IN492
-memory[483][6] => Mux18.IN492
-memory[483][7] => Mux9.IN492
-memory[483][7] => Mux17.IN492
-memory[482][0] => Mux16.IN491
-memory[482][0] => Mux24.IN491
-memory[482][1] => Mux15.IN491
-memory[482][1] => Mux23.IN491
-memory[482][2] => Mux14.IN491
-memory[482][2] => Mux22.IN491
-memory[482][3] => Mux13.IN491
-memory[482][3] => Mux21.IN491
-memory[482][4] => Mux12.IN491
-memory[482][4] => Mux20.IN491
-memory[482][5] => Mux11.IN491
-memory[482][5] => Mux19.IN491
-memory[482][6] => Mux10.IN491
-memory[482][6] => Mux18.IN491
-memory[482][7] => Mux9.IN491
-memory[482][7] => Mux17.IN491
-memory[481][0] => Mux16.IN490
-memory[481][0] => Mux24.IN490
-memory[481][1] => Mux15.IN490
-memory[481][1] => Mux23.IN490
-memory[481][2] => Mux14.IN490
-memory[481][2] => Mux22.IN490
-memory[481][3] => Mux13.IN490
-memory[481][3] => Mux21.IN490
-memory[481][4] => Mux12.IN490
-memory[481][4] => Mux20.IN490
-memory[481][5] => Mux11.IN490
-memory[481][5] => Mux19.IN490
-memory[481][6] => Mux10.IN490
-memory[481][6] => Mux18.IN490
-memory[481][7] => Mux9.IN490
-memory[481][7] => Mux17.IN490
-memory[480][0] => Mux16.IN489
-memory[480][0] => Mux24.IN489
-memory[480][1] => Mux15.IN489
-memory[480][1] => Mux23.IN489
-memory[480][2] => Mux14.IN489
-memory[480][2] => Mux22.IN489
-memory[480][3] => Mux13.IN489
-memory[480][3] => Mux21.IN489
-memory[480][4] => Mux12.IN489
-memory[480][4] => Mux20.IN489
-memory[480][5] => Mux11.IN489
-memory[480][5] => Mux19.IN489
-memory[480][6] => Mux10.IN489
-memory[480][6] => Mux18.IN489
-memory[480][7] => Mux9.IN489
-memory[480][7] => Mux17.IN489
-memory[479][0] => Mux16.IN488
-memory[479][0] => Mux24.IN488
-memory[479][1] => Mux15.IN488
-memory[479][1] => Mux23.IN488
-memory[479][2] => Mux14.IN488
-memory[479][2] => Mux22.IN488
-memory[479][3] => Mux13.IN488
-memory[479][3] => Mux21.IN488
-memory[479][4] => Mux12.IN488
-memory[479][4] => Mux20.IN488
-memory[479][5] => Mux11.IN488
-memory[479][5] => Mux19.IN488
-memory[479][6] => Mux10.IN488
-memory[479][6] => Mux18.IN488
-memory[479][7] => Mux9.IN488
-memory[479][7] => Mux17.IN488
-memory[478][0] => Mux16.IN487
-memory[478][0] => Mux24.IN487
-memory[478][1] => Mux15.IN487
-memory[478][1] => Mux23.IN487
-memory[478][2] => Mux14.IN487
-memory[478][2] => Mux22.IN487
-memory[478][3] => Mux13.IN487
-memory[478][3] => Mux21.IN487
-memory[478][4] => Mux12.IN487
-memory[478][4] => Mux20.IN487
-memory[478][5] => Mux11.IN487
-memory[478][5] => Mux19.IN487
-memory[478][6] => Mux10.IN487
-memory[478][6] => Mux18.IN487
-memory[478][7] => Mux9.IN487
-memory[478][7] => Mux17.IN487
-memory[477][0] => Mux16.IN486
-memory[477][0] => Mux24.IN486
-memory[477][1] => Mux15.IN486
-memory[477][1] => Mux23.IN486
-memory[477][2] => Mux14.IN486
-memory[477][2] => Mux22.IN486
-memory[477][3] => Mux13.IN486
-memory[477][3] => Mux21.IN486
-memory[477][4] => Mux12.IN486
-memory[477][4] => Mux20.IN486
-memory[477][5] => Mux11.IN486
-memory[477][5] => Mux19.IN486
-memory[477][6] => Mux10.IN486
-memory[477][6] => Mux18.IN486
-memory[477][7] => Mux9.IN486
-memory[477][7] => Mux17.IN486
-memory[476][0] => Mux16.IN485
-memory[476][0] => Mux24.IN485
-memory[476][1] => Mux15.IN485
-memory[476][1] => Mux23.IN485
-memory[476][2] => Mux14.IN485
-memory[476][2] => Mux22.IN485
-memory[476][3] => Mux13.IN485
-memory[476][3] => Mux21.IN485
-memory[476][4] => Mux12.IN485
-memory[476][4] => Mux20.IN485
-memory[476][5] => Mux11.IN485
-memory[476][5] => Mux19.IN485
-memory[476][6] => Mux10.IN485
-memory[476][6] => Mux18.IN485
-memory[476][7] => Mux9.IN485
-memory[476][7] => Mux17.IN485
-memory[475][0] => Mux16.IN484
-memory[475][0] => Mux24.IN484
-memory[475][1] => Mux15.IN484
-memory[475][1] => Mux23.IN484
-memory[475][2] => Mux14.IN484
-memory[475][2] => Mux22.IN484
-memory[475][3] => Mux13.IN484
-memory[475][3] => Mux21.IN484
-memory[475][4] => Mux12.IN484
-memory[475][4] => Mux20.IN484
-memory[475][5] => Mux11.IN484
-memory[475][5] => Mux19.IN484
-memory[475][6] => Mux10.IN484
-memory[475][6] => Mux18.IN484
-memory[475][7] => Mux9.IN484
-memory[475][7] => Mux17.IN484
-memory[474][0] => Mux16.IN483
-memory[474][0] => Mux24.IN483
-memory[474][1] => Mux15.IN483
-memory[474][1] => Mux23.IN483
-memory[474][2] => Mux14.IN483
-memory[474][2] => Mux22.IN483
-memory[474][3] => Mux13.IN483
-memory[474][3] => Mux21.IN483
-memory[474][4] => Mux12.IN483
-memory[474][4] => Mux20.IN483
-memory[474][5] => Mux11.IN483
-memory[474][5] => Mux19.IN483
-memory[474][6] => Mux10.IN483
-memory[474][6] => Mux18.IN483
-memory[474][7] => Mux9.IN483
-memory[474][7] => Mux17.IN483
-memory[473][0] => Mux16.IN482
-memory[473][0] => Mux24.IN482
-memory[473][1] => Mux15.IN482
-memory[473][1] => Mux23.IN482
-memory[473][2] => Mux14.IN482
-memory[473][2] => Mux22.IN482
-memory[473][3] => Mux13.IN482
-memory[473][3] => Mux21.IN482
-memory[473][4] => Mux12.IN482
-memory[473][4] => Mux20.IN482
-memory[473][5] => Mux11.IN482
-memory[473][5] => Mux19.IN482
-memory[473][6] => Mux10.IN482
-memory[473][6] => Mux18.IN482
-memory[473][7] => Mux9.IN482
-memory[473][7] => Mux17.IN482
-memory[472][0] => Mux16.IN481
-memory[472][0] => Mux24.IN481
-memory[472][1] => Mux15.IN481
-memory[472][1] => Mux23.IN481
-memory[472][2] => Mux14.IN481
-memory[472][2] => Mux22.IN481
-memory[472][3] => Mux13.IN481
-memory[472][3] => Mux21.IN481
-memory[472][4] => Mux12.IN481
-memory[472][4] => Mux20.IN481
-memory[472][5] => Mux11.IN481
-memory[472][5] => Mux19.IN481
-memory[472][6] => Mux10.IN481
-memory[472][6] => Mux18.IN481
-memory[472][7] => Mux9.IN481
-memory[472][7] => Mux17.IN481
-memory[471][0] => Mux16.IN480
-memory[471][0] => Mux24.IN480
-memory[471][1] => Mux15.IN480
-memory[471][1] => Mux23.IN480
-memory[471][2] => Mux14.IN480
-memory[471][2] => Mux22.IN480
-memory[471][3] => Mux13.IN480
-memory[471][3] => Mux21.IN480
-memory[471][4] => Mux12.IN480
-memory[471][4] => Mux20.IN480
-memory[471][5] => Mux11.IN480
-memory[471][5] => Mux19.IN480
-memory[471][6] => Mux10.IN480
-memory[471][6] => Mux18.IN480
-memory[471][7] => Mux9.IN480
-memory[471][7] => Mux17.IN480
-memory[470][0] => Mux16.IN479
-memory[470][0] => Mux24.IN479
-memory[470][1] => Mux15.IN479
-memory[470][1] => Mux23.IN479
-memory[470][2] => Mux14.IN479
-memory[470][2] => Mux22.IN479
-memory[470][3] => Mux13.IN479
-memory[470][3] => Mux21.IN479
-memory[470][4] => Mux12.IN479
-memory[470][4] => Mux20.IN479
-memory[470][5] => Mux11.IN479
-memory[470][5] => Mux19.IN479
-memory[470][6] => Mux10.IN479
-memory[470][6] => Mux18.IN479
-memory[470][7] => Mux9.IN479
-memory[470][7] => Mux17.IN479
-memory[469][0] => Mux16.IN478
-memory[469][0] => Mux24.IN478
-memory[469][1] => Mux15.IN478
-memory[469][1] => Mux23.IN478
-memory[469][2] => Mux14.IN478
-memory[469][2] => Mux22.IN478
-memory[469][3] => Mux13.IN478
-memory[469][3] => Mux21.IN478
-memory[469][4] => Mux12.IN478
-memory[469][4] => Mux20.IN478
-memory[469][5] => Mux11.IN478
-memory[469][5] => Mux19.IN478
-memory[469][6] => Mux10.IN478
-memory[469][6] => Mux18.IN478
-memory[469][7] => Mux9.IN478
-memory[469][7] => Mux17.IN478
-memory[468][0] => Mux16.IN477
-memory[468][0] => Mux24.IN477
-memory[468][1] => Mux15.IN477
-memory[468][1] => Mux23.IN477
-memory[468][2] => Mux14.IN477
-memory[468][2] => Mux22.IN477
-memory[468][3] => Mux13.IN477
-memory[468][3] => Mux21.IN477
-memory[468][4] => Mux12.IN477
-memory[468][4] => Mux20.IN477
-memory[468][5] => Mux11.IN477
-memory[468][5] => Mux19.IN477
-memory[468][6] => Mux10.IN477
-memory[468][6] => Mux18.IN477
-memory[468][7] => Mux9.IN477
-memory[468][7] => Mux17.IN477
-memory[467][0] => Mux16.IN476
-memory[467][0] => Mux24.IN476
-memory[467][1] => Mux15.IN476
-memory[467][1] => Mux23.IN476
-memory[467][2] => Mux14.IN476
-memory[467][2] => Mux22.IN476
-memory[467][3] => Mux13.IN476
-memory[467][3] => Mux21.IN476
-memory[467][4] => Mux12.IN476
-memory[467][4] => Mux20.IN476
-memory[467][5] => Mux11.IN476
-memory[467][5] => Mux19.IN476
-memory[467][6] => Mux10.IN476
-memory[467][6] => Mux18.IN476
-memory[467][7] => Mux9.IN476
-memory[467][7] => Mux17.IN476
-memory[466][0] => Mux16.IN475
-memory[466][0] => Mux24.IN475
-memory[466][1] => Mux15.IN475
-memory[466][1] => Mux23.IN475
-memory[466][2] => Mux14.IN475
-memory[466][2] => Mux22.IN475
-memory[466][3] => Mux13.IN475
-memory[466][3] => Mux21.IN475
-memory[466][4] => Mux12.IN475
-memory[466][4] => Mux20.IN475
-memory[466][5] => Mux11.IN475
-memory[466][5] => Mux19.IN475
-memory[466][6] => Mux10.IN475
-memory[466][6] => Mux18.IN475
-memory[466][7] => Mux9.IN475
-memory[466][7] => Mux17.IN475
-memory[465][0] => Mux16.IN474
-memory[465][0] => Mux24.IN474
-memory[465][1] => Mux15.IN474
-memory[465][1] => Mux23.IN474
-memory[465][2] => Mux14.IN474
-memory[465][2] => Mux22.IN474
-memory[465][3] => Mux13.IN474
-memory[465][3] => Mux21.IN474
-memory[465][4] => Mux12.IN474
-memory[465][4] => Mux20.IN474
-memory[465][5] => Mux11.IN474
-memory[465][5] => Mux19.IN474
-memory[465][6] => Mux10.IN474
-memory[465][6] => Mux18.IN474
-memory[465][7] => Mux9.IN474
-memory[465][7] => Mux17.IN474
-memory[464][0] => Mux16.IN473
-memory[464][0] => Mux24.IN473
-memory[464][1] => Mux15.IN473
-memory[464][1] => Mux23.IN473
-memory[464][2] => Mux14.IN473
-memory[464][2] => Mux22.IN473
-memory[464][3] => Mux13.IN473
-memory[464][3] => Mux21.IN473
-memory[464][4] => Mux12.IN473
-memory[464][4] => Mux20.IN473
-memory[464][5] => Mux11.IN473
-memory[464][5] => Mux19.IN473
-memory[464][6] => Mux10.IN473
-memory[464][6] => Mux18.IN473
-memory[464][7] => Mux9.IN473
-memory[464][7] => Mux17.IN473
-memory[463][0] => Mux16.IN472
-memory[463][0] => Mux24.IN472
-memory[463][1] => Mux15.IN472
-memory[463][1] => Mux23.IN472
-memory[463][2] => Mux14.IN472
-memory[463][2] => Mux22.IN472
-memory[463][3] => Mux13.IN472
-memory[463][3] => Mux21.IN472
-memory[463][4] => Mux12.IN472
-memory[463][4] => Mux20.IN472
-memory[463][5] => Mux11.IN472
-memory[463][5] => Mux19.IN472
-memory[463][6] => Mux10.IN472
-memory[463][6] => Mux18.IN472
-memory[463][7] => Mux9.IN472
-memory[463][7] => Mux17.IN472
-memory[462][0] => Mux16.IN471
-memory[462][0] => Mux24.IN471
-memory[462][1] => Mux15.IN471
-memory[462][1] => Mux23.IN471
-memory[462][2] => Mux14.IN471
-memory[462][2] => Mux22.IN471
-memory[462][3] => Mux13.IN471
-memory[462][3] => Mux21.IN471
-memory[462][4] => Mux12.IN471
-memory[462][4] => Mux20.IN471
-memory[462][5] => Mux11.IN471
-memory[462][5] => Mux19.IN471
-memory[462][6] => Mux10.IN471
-memory[462][6] => Mux18.IN471
-memory[462][7] => Mux9.IN471
-memory[462][7] => Mux17.IN471
-memory[461][0] => Mux16.IN470
-memory[461][0] => Mux24.IN470
-memory[461][1] => Mux15.IN470
-memory[461][1] => Mux23.IN470
-memory[461][2] => Mux14.IN470
-memory[461][2] => Mux22.IN470
-memory[461][3] => Mux13.IN470
-memory[461][3] => Mux21.IN470
-memory[461][4] => Mux12.IN470
-memory[461][4] => Mux20.IN470
-memory[461][5] => Mux11.IN470
-memory[461][5] => Mux19.IN470
-memory[461][6] => Mux10.IN470
-memory[461][6] => Mux18.IN470
-memory[461][7] => Mux9.IN470
-memory[461][7] => Mux17.IN470
-memory[460][0] => Mux16.IN469
-memory[460][0] => Mux24.IN469
-memory[460][1] => Mux15.IN469
-memory[460][1] => Mux23.IN469
-memory[460][2] => Mux14.IN469
-memory[460][2] => Mux22.IN469
-memory[460][3] => Mux13.IN469
-memory[460][3] => Mux21.IN469
-memory[460][4] => Mux12.IN469
-memory[460][4] => Mux20.IN469
-memory[460][5] => Mux11.IN469
-memory[460][5] => Mux19.IN469
-memory[460][6] => Mux10.IN469
-memory[460][6] => Mux18.IN469
-memory[460][7] => Mux9.IN469
-memory[460][7] => Mux17.IN469
-memory[459][0] => Mux16.IN468
-memory[459][0] => Mux24.IN468
-memory[459][1] => Mux15.IN468
-memory[459][1] => Mux23.IN468
-memory[459][2] => Mux14.IN468
-memory[459][2] => Mux22.IN468
-memory[459][3] => Mux13.IN468
-memory[459][3] => Mux21.IN468
-memory[459][4] => Mux12.IN468
-memory[459][4] => Mux20.IN468
-memory[459][5] => Mux11.IN468
-memory[459][5] => Mux19.IN468
-memory[459][6] => Mux10.IN468
-memory[459][6] => Mux18.IN468
-memory[459][7] => Mux9.IN468
-memory[459][7] => Mux17.IN468
-memory[458][0] => Mux16.IN467
-memory[458][0] => Mux24.IN467
-memory[458][1] => Mux15.IN467
-memory[458][1] => Mux23.IN467
-memory[458][2] => Mux14.IN467
-memory[458][2] => Mux22.IN467
-memory[458][3] => Mux13.IN467
-memory[458][3] => Mux21.IN467
-memory[458][4] => Mux12.IN467
-memory[458][4] => Mux20.IN467
-memory[458][5] => Mux11.IN467
-memory[458][5] => Mux19.IN467
-memory[458][6] => Mux10.IN467
-memory[458][6] => Mux18.IN467
-memory[458][7] => Mux9.IN467
-memory[458][7] => Mux17.IN467
-memory[457][0] => Mux16.IN466
-memory[457][0] => Mux24.IN466
-memory[457][1] => Mux15.IN466
-memory[457][1] => Mux23.IN466
-memory[457][2] => Mux14.IN466
-memory[457][2] => Mux22.IN466
-memory[457][3] => Mux13.IN466
-memory[457][3] => Mux21.IN466
-memory[457][4] => Mux12.IN466
-memory[457][4] => Mux20.IN466
-memory[457][5] => Mux11.IN466
-memory[457][5] => Mux19.IN466
-memory[457][6] => Mux10.IN466
-memory[457][6] => Mux18.IN466
-memory[457][7] => Mux9.IN466
-memory[457][7] => Mux17.IN466
-memory[456][0] => Mux16.IN465
-memory[456][0] => Mux24.IN465
-memory[456][1] => Mux15.IN465
-memory[456][1] => Mux23.IN465
-memory[456][2] => Mux14.IN465
-memory[456][2] => Mux22.IN465
-memory[456][3] => Mux13.IN465
-memory[456][3] => Mux21.IN465
-memory[456][4] => Mux12.IN465
-memory[456][4] => Mux20.IN465
-memory[456][5] => Mux11.IN465
-memory[456][5] => Mux19.IN465
-memory[456][6] => Mux10.IN465
-memory[456][6] => Mux18.IN465
-memory[456][7] => Mux9.IN465
-memory[456][7] => Mux17.IN465
-memory[455][0] => Mux16.IN464
-memory[455][0] => Mux24.IN464
-memory[455][1] => Mux15.IN464
-memory[455][1] => Mux23.IN464
-memory[455][2] => Mux14.IN464
-memory[455][2] => Mux22.IN464
-memory[455][3] => Mux13.IN464
-memory[455][3] => Mux21.IN464
-memory[455][4] => Mux12.IN464
-memory[455][4] => Mux20.IN464
-memory[455][5] => Mux11.IN464
-memory[455][5] => Mux19.IN464
-memory[455][6] => Mux10.IN464
-memory[455][6] => Mux18.IN464
-memory[455][7] => Mux9.IN464
-memory[455][7] => Mux17.IN464
-memory[454][0] => Mux16.IN463
-memory[454][0] => Mux24.IN463
-memory[454][1] => Mux15.IN463
-memory[454][1] => Mux23.IN463
-memory[454][2] => Mux14.IN463
-memory[454][2] => Mux22.IN463
-memory[454][3] => Mux13.IN463
-memory[454][3] => Mux21.IN463
-memory[454][4] => Mux12.IN463
-memory[454][4] => Mux20.IN463
-memory[454][5] => Mux11.IN463
-memory[454][5] => Mux19.IN463
-memory[454][6] => Mux10.IN463
-memory[454][6] => Mux18.IN463
-memory[454][7] => Mux9.IN463
-memory[454][7] => Mux17.IN463
-memory[453][0] => Mux16.IN462
-memory[453][0] => Mux24.IN462
-memory[453][1] => Mux15.IN462
-memory[453][1] => Mux23.IN462
-memory[453][2] => Mux14.IN462
-memory[453][2] => Mux22.IN462
-memory[453][3] => Mux13.IN462
-memory[453][3] => Mux21.IN462
-memory[453][4] => Mux12.IN462
-memory[453][4] => Mux20.IN462
-memory[453][5] => Mux11.IN462
-memory[453][5] => Mux19.IN462
-memory[453][6] => Mux10.IN462
-memory[453][6] => Mux18.IN462
-memory[453][7] => Mux9.IN462
-memory[453][7] => Mux17.IN462
-memory[452][0] => Mux16.IN461
-memory[452][0] => Mux24.IN461
-memory[452][1] => Mux15.IN461
-memory[452][1] => Mux23.IN461
-memory[452][2] => Mux14.IN461
-memory[452][2] => Mux22.IN461
-memory[452][3] => Mux13.IN461
-memory[452][3] => Mux21.IN461
-memory[452][4] => Mux12.IN461
-memory[452][4] => Mux20.IN461
-memory[452][5] => Mux11.IN461
-memory[452][5] => Mux19.IN461
-memory[452][6] => Mux10.IN461
-memory[452][6] => Mux18.IN461
-memory[452][7] => Mux9.IN461
-memory[452][7] => Mux17.IN461
-memory[451][0] => Mux16.IN460
-memory[451][0] => Mux24.IN460
-memory[451][1] => Mux15.IN460
-memory[451][1] => Mux23.IN460
-memory[451][2] => Mux14.IN460
-memory[451][2] => Mux22.IN460
-memory[451][3] => Mux13.IN460
-memory[451][3] => Mux21.IN460
-memory[451][4] => Mux12.IN460
-memory[451][4] => Mux20.IN460
-memory[451][5] => Mux11.IN460
-memory[451][5] => Mux19.IN460
-memory[451][6] => Mux10.IN460
-memory[451][6] => Mux18.IN460
-memory[451][7] => Mux9.IN460
-memory[451][7] => Mux17.IN460
-memory[450][0] => Mux16.IN459
-memory[450][0] => Mux24.IN459
-memory[450][1] => Mux15.IN459
-memory[450][1] => Mux23.IN459
-memory[450][2] => Mux14.IN459
-memory[450][2] => Mux22.IN459
-memory[450][3] => Mux13.IN459
-memory[450][3] => Mux21.IN459
-memory[450][4] => Mux12.IN459
-memory[450][4] => Mux20.IN459
-memory[450][5] => Mux11.IN459
-memory[450][5] => Mux19.IN459
-memory[450][6] => Mux10.IN459
-memory[450][6] => Mux18.IN459
-memory[450][7] => Mux9.IN459
-memory[450][7] => Mux17.IN459
-memory[449][0] => Mux16.IN458
-memory[449][0] => Mux24.IN458
-memory[449][1] => Mux15.IN458
-memory[449][1] => Mux23.IN458
-memory[449][2] => Mux14.IN458
-memory[449][2] => Mux22.IN458
-memory[449][3] => Mux13.IN458
-memory[449][3] => Mux21.IN458
-memory[449][4] => Mux12.IN458
-memory[449][4] => Mux20.IN458
-memory[449][5] => Mux11.IN458
-memory[449][5] => Mux19.IN458
-memory[449][6] => Mux10.IN458
-memory[449][6] => Mux18.IN458
-memory[449][7] => Mux9.IN458
-memory[449][7] => Mux17.IN458
-memory[448][0] => Mux16.IN457
-memory[448][0] => Mux24.IN457
-memory[448][1] => Mux15.IN457
-memory[448][1] => Mux23.IN457
-memory[448][2] => Mux14.IN457
-memory[448][2] => Mux22.IN457
-memory[448][3] => Mux13.IN457
-memory[448][3] => Mux21.IN457
-memory[448][4] => Mux12.IN457
-memory[448][4] => Mux20.IN457
-memory[448][5] => Mux11.IN457
-memory[448][5] => Mux19.IN457
-memory[448][6] => Mux10.IN457
-memory[448][6] => Mux18.IN457
-memory[448][7] => Mux9.IN457
-memory[448][7] => Mux17.IN457
-memory[447][0] => Mux16.IN456
-memory[447][0] => Mux24.IN456
-memory[447][1] => Mux15.IN456
-memory[447][1] => Mux23.IN456
-memory[447][2] => Mux14.IN456
-memory[447][2] => Mux22.IN456
-memory[447][3] => Mux13.IN456
-memory[447][3] => Mux21.IN456
-memory[447][4] => Mux12.IN456
-memory[447][4] => Mux20.IN456
-memory[447][5] => Mux11.IN456
-memory[447][5] => Mux19.IN456
-memory[447][6] => Mux10.IN456
-memory[447][6] => Mux18.IN456
-memory[447][7] => Mux9.IN456
-memory[447][7] => Mux17.IN456
-memory[446][0] => Mux16.IN455
-memory[446][0] => Mux24.IN455
-memory[446][1] => Mux15.IN455
-memory[446][1] => Mux23.IN455
-memory[446][2] => Mux14.IN455
-memory[446][2] => Mux22.IN455
-memory[446][3] => Mux13.IN455
-memory[446][3] => Mux21.IN455
-memory[446][4] => Mux12.IN455
-memory[446][4] => Mux20.IN455
-memory[446][5] => Mux11.IN455
-memory[446][5] => Mux19.IN455
-memory[446][6] => Mux10.IN455
-memory[446][6] => Mux18.IN455
-memory[446][7] => Mux9.IN455
-memory[446][7] => Mux17.IN455
-memory[445][0] => Mux16.IN454
-memory[445][0] => Mux24.IN454
-memory[445][1] => Mux15.IN454
-memory[445][1] => Mux23.IN454
-memory[445][2] => Mux14.IN454
-memory[445][2] => Mux22.IN454
-memory[445][3] => Mux13.IN454
-memory[445][3] => Mux21.IN454
-memory[445][4] => Mux12.IN454
-memory[445][4] => Mux20.IN454
-memory[445][5] => Mux11.IN454
-memory[445][5] => Mux19.IN454
-memory[445][6] => Mux10.IN454
-memory[445][6] => Mux18.IN454
-memory[445][7] => Mux9.IN454
-memory[445][7] => Mux17.IN454
-memory[444][0] => Mux16.IN453
-memory[444][0] => Mux24.IN453
-memory[444][1] => Mux15.IN453
-memory[444][1] => Mux23.IN453
-memory[444][2] => Mux14.IN453
-memory[444][2] => Mux22.IN453
-memory[444][3] => Mux13.IN453
-memory[444][3] => Mux21.IN453
-memory[444][4] => Mux12.IN453
-memory[444][4] => Mux20.IN453
-memory[444][5] => Mux11.IN453
-memory[444][5] => Mux19.IN453
-memory[444][6] => Mux10.IN453
-memory[444][6] => Mux18.IN453
-memory[444][7] => Mux9.IN453
-memory[444][7] => Mux17.IN453
-memory[443][0] => Mux16.IN452
-memory[443][0] => Mux24.IN452
-memory[443][1] => Mux15.IN452
-memory[443][1] => Mux23.IN452
-memory[443][2] => Mux14.IN452
-memory[443][2] => Mux22.IN452
-memory[443][3] => Mux13.IN452
-memory[443][3] => Mux21.IN452
-memory[443][4] => Mux12.IN452
-memory[443][4] => Mux20.IN452
-memory[443][5] => Mux11.IN452
-memory[443][5] => Mux19.IN452
-memory[443][6] => Mux10.IN452
-memory[443][6] => Mux18.IN452
-memory[443][7] => Mux9.IN452
-memory[443][7] => Mux17.IN452
-memory[442][0] => Mux16.IN451
-memory[442][0] => Mux24.IN451
-memory[442][1] => Mux15.IN451
-memory[442][1] => Mux23.IN451
-memory[442][2] => Mux14.IN451
-memory[442][2] => Mux22.IN451
-memory[442][3] => Mux13.IN451
-memory[442][3] => Mux21.IN451
-memory[442][4] => Mux12.IN451
-memory[442][4] => Mux20.IN451
-memory[442][5] => Mux11.IN451
-memory[442][5] => Mux19.IN451
-memory[442][6] => Mux10.IN451
-memory[442][6] => Mux18.IN451
-memory[442][7] => Mux9.IN451
-memory[442][7] => Mux17.IN451
-memory[441][0] => Mux16.IN450
-memory[441][0] => Mux24.IN450
-memory[441][1] => Mux15.IN450
-memory[441][1] => Mux23.IN450
-memory[441][2] => Mux14.IN450
-memory[441][2] => Mux22.IN450
-memory[441][3] => Mux13.IN450
-memory[441][3] => Mux21.IN450
-memory[441][4] => Mux12.IN450
-memory[441][4] => Mux20.IN450
-memory[441][5] => Mux11.IN450
-memory[441][5] => Mux19.IN450
-memory[441][6] => Mux10.IN450
-memory[441][6] => Mux18.IN450
-memory[441][7] => Mux9.IN450
-memory[441][7] => Mux17.IN450
-memory[440][0] => Mux16.IN449
-memory[440][0] => Mux24.IN449
-memory[440][1] => Mux15.IN449
-memory[440][1] => Mux23.IN449
-memory[440][2] => Mux14.IN449
-memory[440][2] => Mux22.IN449
-memory[440][3] => Mux13.IN449
-memory[440][3] => Mux21.IN449
-memory[440][4] => Mux12.IN449
-memory[440][4] => Mux20.IN449
-memory[440][5] => Mux11.IN449
-memory[440][5] => Mux19.IN449
-memory[440][6] => Mux10.IN449
-memory[440][6] => Mux18.IN449
-memory[440][7] => Mux9.IN449
-memory[440][7] => Mux17.IN449
-memory[439][0] => Mux16.IN448
-memory[439][0] => Mux24.IN448
-memory[439][1] => Mux15.IN448
-memory[439][1] => Mux23.IN448
-memory[439][2] => Mux14.IN448
-memory[439][2] => Mux22.IN448
-memory[439][3] => Mux13.IN448
-memory[439][3] => Mux21.IN448
-memory[439][4] => Mux12.IN448
-memory[439][4] => Mux20.IN448
-memory[439][5] => Mux11.IN448
-memory[439][5] => Mux19.IN448
-memory[439][6] => Mux10.IN448
-memory[439][6] => Mux18.IN448
-memory[439][7] => Mux9.IN448
-memory[439][7] => Mux17.IN448
-memory[438][0] => Mux16.IN447
-memory[438][0] => Mux24.IN447
-memory[438][1] => Mux15.IN447
-memory[438][1] => Mux23.IN447
-memory[438][2] => Mux14.IN447
-memory[438][2] => Mux22.IN447
-memory[438][3] => Mux13.IN447
-memory[438][3] => Mux21.IN447
-memory[438][4] => Mux12.IN447
-memory[438][4] => Mux20.IN447
-memory[438][5] => Mux11.IN447
-memory[438][5] => Mux19.IN447
-memory[438][6] => Mux10.IN447
-memory[438][6] => Mux18.IN447
-memory[438][7] => Mux9.IN447
-memory[438][7] => Mux17.IN447
-memory[437][0] => Mux16.IN446
-memory[437][0] => Mux24.IN446
-memory[437][1] => Mux15.IN446
-memory[437][1] => Mux23.IN446
-memory[437][2] => Mux14.IN446
-memory[437][2] => Mux22.IN446
-memory[437][3] => Mux13.IN446
-memory[437][3] => Mux21.IN446
-memory[437][4] => Mux12.IN446
-memory[437][4] => Mux20.IN446
-memory[437][5] => Mux11.IN446
-memory[437][5] => Mux19.IN446
-memory[437][6] => Mux10.IN446
-memory[437][6] => Mux18.IN446
-memory[437][7] => Mux9.IN446
-memory[437][7] => Mux17.IN446
-memory[436][0] => Mux16.IN445
-memory[436][0] => Mux24.IN445
-memory[436][1] => Mux15.IN445
-memory[436][1] => Mux23.IN445
-memory[436][2] => Mux14.IN445
-memory[436][2] => Mux22.IN445
-memory[436][3] => Mux13.IN445
-memory[436][3] => Mux21.IN445
-memory[436][4] => Mux12.IN445
-memory[436][4] => Mux20.IN445
-memory[436][5] => Mux11.IN445
-memory[436][5] => Mux19.IN445
-memory[436][6] => Mux10.IN445
-memory[436][6] => Mux18.IN445
-memory[436][7] => Mux9.IN445
-memory[436][7] => Mux17.IN445
-memory[435][0] => Mux16.IN444
-memory[435][0] => Mux24.IN444
-memory[435][1] => Mux15.IN444
-memory[435][1] => Mux23.IN444
-memory[435][2] => Mux14.IN444
-memory[435][2] => Mux22.IN444
-memory[435][3] => Mux13.IN444
-memory[435][3] => Mux21.IN444
-memory[435][4] => Mux12.IN444
-memory[435][4] => Mux20.IN444
-memory[435][5] => Mux11.IN444
-memory[435][5] => Mux19.IN444
-memory[435][6] => Mux10.IN444
-memory[435][6] => Mux18.IN444
-memory[435][7] => Mux9.IN444
-memory[435][7] => Mux17.IN444
-memory[434][0] => Mux16.IN443
-memory[434][0] => Mux24.IN443
-memory[434][1] => Mux15.IN443
-memory[434][1] => Mux23.IN443
-memory[434][2] => Mux14.IN443
-memory[434][2] => Mux22.IN443
-memory[434][3] => Mux13.IN443
-memory[434][3] => Mux21.IN443
-memory[434][4] => Mux12.IN443
-memory[434][4] => Mux20.IN443
-memory[434][5] => Mux11.IN443
-memory[434][5] => Mux19.IN443
-memory[434][6] => Mux10.IN443
-memory[434][6] => Mux18.IN443
-memory[434][7] => Mux9.IN443
-memory[434][7] => Mux17.IN443
-memory[433][0] => Mux16.IN442
-memory[433][0] => Mux24.IN442
-memory[433][1] => Mux15.IN442
-memory[433][1] => Mux23.IN442
-memory[433][2] => Mux14.IN442
-memory[433][2] => Mux22.IN442
-memory[433][3] => Mux13.IN442
-memory[433][3] => Mux21.IN442
-memory[433][4] => Mux12.IN442
-memory[433][4] => Mux20.IN442
-memory[433][5] => Mux11.IN442
-memory[433][5] => Mux19.IN442
-memory[433][6] => Mux10.IN442
-memory[433][6] => Mux18.IN442
-memory[433][7] => Mux9.IN442
-memory[433][7] => Mux17.IN442
-memory[432][0] => Mux16.IN441
-memory[432][0] => Mux24.IN441
-memory[432][1] => Mux15.IN441
-memory[432][1] => Mux23.IN441
-memory[432][2] => Mux14.IN441
-memory[432][2] => Mux22.IN441
-memory[432][3] => Mux13.IN441
-memory[432][3] => Mux21.IN441
-memory[432][4] => Mux12.IN441
-memory[432][4] => Mux20.IN441
-memory[432][5] => Mux11.IN441
-memory[432][5] => Mux19.IN441
-memory[432][6] => Mux10.IN441
-memory[432][6] => Mux18.IN441
-memory[432][7] => Mux9.IN441
-memory[432][7] => Mux17.IN441
-memory[431][0] => Mux16.IN440
-memory[431][0] => Mux24.IN440
-memory[431][1] => Mux15.IN440
-memory[431][1] => Mux23.IN440
-memory[431][2] => Mux14.IN440
-memory[431][2] => Mux22.IN440
-memory[431][3] => Mux13.IN440
-memory[431][3] => Mux21.IN440
-memory[431][4] => Mux12.IN440
-memory[431][4] => Mux20.IN440
-memory[431][5] => Mux11.IN440
-memory[431][5] => Mux19.IN440
-memory[431][6] => Mux10.IN440
-memory[431][6] => Mux18.IN440
-memory[431][7] => Mux9.IN440
-memory[431][7] => Mux17.IN440
-memory[430][0] => Mux16.IN439
-memory[430][0] => Mux24.IN439
-memory[430][1] => Mux15.IN439
-memory[430][1] => Mux23.IN439
-memory[430][2] => Mux14.IN439
-memory[430][2] => Mux22.IN439
-memory[430][3] => Mux13.IN439
-memory[430][3] => Mux21.IN439
-memory[430][4] => Mux12.IN439
-memory[430][4] => Mux20.IN439
-memory[430][5] => Mux11.IN439
-memory[430][5] => Mux19.IN439
-memory[430][6] => Mux10.IN439
-memory[430][6] => Mux18.IN439
-memory[430][7] => Mux9.IN439
-memory[430][7] => Mux17.IN439
-memory[429][0] => Mux16.IN438
-memory[429][0] => Mux24.IN438
-memory[429][1] => Mux15.IN438
-memory[429][1] => Mux23.IN438
-memory[429][2] => Mux14.IN438
-memory[429][2] => Mux22.IN438
-memory[429][3] => Mux13.IN438
-memory[429][3] => Mux21.IN438
-memory[429][4] => Mux12.IN438
-memory[429][4] => Mux20.IN438
-memory[429][5] => Mux11.IN438
-memory[429][5] => Mux19.IN438
-memory[429][6] => Mux10.IN438
-memory[429][6] => Mux18.IN438
-memory[429][7] => Mux9.IN438
-memory[429][7] => Mux17.IN438
-memory[428][0] => Mux16.IN437
-memory[428][0] => Mux24.IN437
-memory[428][1] => Mux15.IN437
-memory[428][1] => Mux23.IN437
-memory[428][2] => Mux14.IN437
-memory[428][2] => Mux22.IN437
-memory[428][3] => Mux13.IN437
-memory[428][3] => Mux21.IN437
-memory[428][4] => Mux12.IN437
-memory[428][4] => Mux20.IN437
-memory[428][5] => Mux11.IN437
-memory[428][5] => Mux19.IN437
-memory[428][6] => Mux10.IN437
-memory[428][6] => Mux18.IN437
-memory[428][7] => Mux9.IN437
-memory[428][7] => Mux17.IN437
-memory[427][0] => Mux16.IN436
-memory[427][0] => Mux24.IN436
-memory[427][1] => Mux15.IN436
-memory[427][1] => Mux23.IN436
-memory[427][2] => Mux14.IN436
-memory[427][2] => Mux22.IN436
-memory[427][3] => Mux13.IN436
-memory[427][3] => Mux21.IN436
-memory[427][4] => Mux12.IN436
-memory[427][4] => Mux20.IN436
-memory[427][5] => Mux11.IN436
-memory[427][5] => Mux19.IN436
-memory[427][6] => Mux10.IN436
-memory[427][6] => Mux18.IN436
-memory[427][7] => Mux9.IN436
-memory[427][7] => Mux17.IN436
-memory[426][0] => Mux16.IN435
-memory[426][0] => Mux24.IN435
-memory[426][1] => Mux15.IN435
-memory[426][1] => Mux23.IN435
-memory[426][2] => Mux14.IN435
-memory[426][2] => Mux22.IN435
-memory[426][3] => Mux13.IN435
-memory[426][3] => Mux21.IN435
-memory[426][4] => Mux12.IN435
-memory[426][4] => Mux20.IN435
-memory[426][5] => Mux11.IN435
-memory[426][5] => Mux19.IN435
-memory[426][6] => Mux10.IN435
-memory[426][6] => Mux18.IN435
-memory[426][7] => Mux9.IN435
-memory[426][7] => Mux17.IN435
-memory[425][0] => Mux16.IN434
-memory[425][0] => Mux24.IN434
-memory[425][1] => Mux15.IN434
-memory[425][1] => Mux23.IN434
-memory[425][2] => Mux14.IN434
-memory[425][2] => Mux22.IN434
-memory[425][3] => Mux13.IN434
-memory[425][3] => Mux21.IN434
-memory[425][4] => Mux12.IN434
-memory[425][4] => Mux20.IN434
-memory[425][5] => Mux11.IN434
-memory[425][5] => Mux19.IN434
-memory[425][6] => Mux10.IN434
-memory[425][6] => Mux18.IN434
-memory[425][7] => Mux9.IN434
-memory[425][7] => Mux17.IN434
-memory[424][0] => Mux16.IN433
-memory[424][0] => Mux24.IN433
-memory[424][1] => Mux15.IN433
-memory[424][1] => Mux23.IN433
-memory[424][2] => Mux14.IN433
-memory[424][2] => Mux22.IN433
-memory[424][3] => Mux13.IN433
-memory[424][3] => Mux21.IN433
-memory[424][4] => Mux12.IN433
-memory[424][4] => Mux20.IN433
-memory[424][5] => Mux11.IN433
-memory[424][5] => Mux19.IN433
-memory[424][6] => Mux10.IN433
-memory[424][6] => Mux18.IN433
-memory[424][7] => Mux9.IN433
-memory[424][7] => Mux17.IN433
-memory[423][0] => Mux16.IN432
-memory[423][0] => Mux24.IN432
-memory[423][1] => Mux15.IN432
-memory[423][1] => Mux23.IN432
-memory[423][2] => Mux14.IN432
-memory[423][2] => Mux22.IN432
-memory[423][3] => Mux13.IN432
-memory[423][3] => Mux21.IN432
-memory[423][4] => Mux12.IN432
-memory[423][4] => Mux20.IN432
-memory[423][5] => Mux11.IN432
-memory[423][5] => Mux19.IN432
-memory[423][6] => Mux10.IN432
-memory[423][6] => Mux18.IN432
-memory[423][7] => Mux9.IN432
-memory[423][7] => Mux17.IN432
-memory[422][0] => Mux16.IN431
-memory[422][0] => Mux24.IN431
-memory[422][1] => Mux15.IN431
-memory[422][1] => Mux23.IN431
-memory[422][2] => Mux14.IN431
-memory[422][2] => Mux22.IN431
-memory[422][3] => Mux13.IN431
-memory[422][3] => Mux21.IN431
-memory[422][4] => Mux12.IN431
-memory[422][4] => Mux20.IN431
-memory[422][5] => Mux11.IN431
-memory[422][5] => Mux19.IN431
-memory[422][6] => Mux10.IN431
-memory[422][6] => Mux18.IN431
-memory[422][7] => Mux9.IN431
-memory[422][7] => Mux17.IN431
-memory[421][0] => Mux16.IN430
-memory[421][0] => Mux24.IN430
-memory[421][1] => Mux15.IN430
-memory[421][1] => Mux23.IN430
-memory[421][2] => Mux14.IN430
-memory[421][2] => Mux22.IN430
-memory[421][3] => Mux13.IN430
-memory[421][3] => Mux21.IN430
-memory[421][4] => Mux12.IN430
-memory[421][4] => Mux20.IN430
-memory[421][5] => Mux11.IN430
-memory[421][5] => Mux19.IN430
-memory[421][6] => Mux10.IN430
-memory[421][6] => Mux18.IN430
-memory[421][7] => Mux9.IN430
-memory[421][7] => Mux17.IN430
-memory[420][0] => Mux16.IN429
-memory[420][0] => Mux24.IN429
-memory[420][1] => Mux15.IN429
-memory[420][1] => Mux23.IN429
-memory[420][2] => Mux14.IN429
-memory[420][2] => Mux22.IN429
-memory[420][3] => Mux13.IN429
-memory[420][3] => Mux21.IN429
-memory[420][4] => Mux12.IN429
-memory[420][4] => Mux20.IN429
-memory[420][5] => Mux11.IN429
-memory[420][5] => Mux19.IN429
-memory[420][6] => Mux10.IN429
-memory[420][6] => Mux18.IN429
-memory[420][7] => Mux9.IN429
-memory[420][7] => Mux17.IN429
-memory[419][0] => Mux16.IN428
-memory[419][0] => Mux24.IN428
-memory[419][1] => Mux15.IN428
-memory[419][1] => Mux23.IN428
-memory[419][2] => Mux14.IN428
-memory[419][2] => Mux22.IN428
-memory[419][3] => Mux13.IN428
-memory[419][3] => Mux21.IN428
-memory[419][4] => Mux12.IN428
-memory[419][4] => Mux20.IN428
-memory[419][5] => Mux11.IN428
-memory[419][5] => Mux19.IN428
-memory[419][6] => Mux10.IN428
-memory[419][6] => Mux18.IN428
-memory[419][7] => Mux9.IN428
-memory[419][7] => Mux17.IN428
-memory[418][0] => Mux16.IN427
-memory[418][0] => Mux24.IN427
-memory[418][1] => Mux15.IN427
-memory[418][1] => Mux23.IN427
-memory[418][2] => Mux14.IN427
-memory[418][2] => Mux22.IN427
-memory[418][3] => Mux13.IN427
-memory[418][3] => Mux21.IN427
-memory[418][4] => Mux12.IN427
-memory[418][4] => Mux20.IN427
-memory[418][5] => Mux11.IN427
-memory[418][5] => Mux19.IN427
-memory[418][6] => Mux10.IN427
-memory[418][6] => Mux18.IN427
-memory[418][7] => Mux9.IN427
-memory[418][7] => Mux17.IN427
-memory[417][0] => Mux16.IN426
-memory[417][0] => Mux24.IN426
-memory[417][1] => Mux15.IN426
-memory[417][1] => Mux23.IN426
-memory[417][2] => Mux14.IN426
-memory[417][2] => Mux22.IN426
-memory[417][3] => Mux13.IN426
-memory[417][3] => Mux21.IN426
-memory[417][4] => Mux12.IN426
-memory[417][4] => Mux20.IN426
-memory[417][5] => Mux11.IN426
-memory[417][5] => Mux19.IN426
-memory[417][6] => Mux10.IN426
-memory[417][6] => Mux18.IN426
-memory[417][7] => Mux9.IN426
-memory[417][7] => Mux17.IN426
-memory[416][0] => Mux16.IN425
-memory[416][0] => Mux24.IN425
-memory[416][1] => Mux15.IN425
-memory[416][1] => Mux23.IN425
-memory[416][2] => Mux14.IN425
-memory[416][2] => Mux22.IN425
-memory[416][3] => Mux13.IN425
-memory[416][3] => Mux21.IN425
-memory[416][4] => Mux12.IN425
-memory[416][4] => Mux20.IN425
-memory[416][5] => Mux11.IN425
-memory[416][5] => Mux19.IN425
-memory[416][6] => Mux10.IN425
-memory[416][6] => Mux18.IN425
-memory[416][7] => Mux9.IN425
-memory[416][7] => Mux17.IN425
-memory[415][0] => Mux16.IN424
-memory[415][0] => Mux24.IN424
-memory[415][1] => Mux15.IN424
-memory[415][1] => Mux23.IN424
-memory[415][2] => Mux14.IN424
-memory[415][2] => Mux22.IN424
-memory[415][3] => Mux13.IN424
-memory[415][3] => Mux21.IN424
-memory[415][4] => Mux12.IN424
-memory[415][4] => Mux20.IN424
-memory[415][5] => Mux11.IN424
-memory[415][5] => Mux19.IN424
-memory[415][6] => Mux10.IN424
-memory[415][6] => Mux18.IN424
-memory[415][7] => Mux9.IN424
-memory[415][7] => Mux17.IN424
-memory[414][0] => Mux16.IN423
-memory[414][0] => Mux24.IN423
-memory[414][1] => Mux15.IN423
-memory[414][1] => Mux23.IN423
-memory[414][2] => Mux14.IN423
-memory[414][2] => Mux22.IN423
-memory[414][3] => Mux13.IN423
-memory[414][3] => Mux21.IN423
-memory[414][4] => Mux12.IN423
-memory[414][4] => Mux20.IN423
-memory[414][5] => Mux11.IN423
-memory[414][5] => Mux19.IN423
-memory[414][6] => Mux10.IN423
-memory[414][6] => Mux18.IN423
-memory[414][7] => Mux9.IN423
-memory[414][7] => Mux17.IN423
-memory[413][0] => Mux16.IN422
-memory[413][0] => Mux24.IN422
-memory[413][1] => Mux15.IN422
-memory[413][1] => Mux23.IN422
-memory[413][2] => Mux14.IN422
-memory[413][2] => Mux22.IN422
-memory[413][3] => Mux13.IN422
-memory[413][3] => Mux21.IN422
-memory[413][4] => Mux12.IN422
-memory[413][4] => Mux20.IN422
-memory[413][5] => Mux11.IN422
-memory[413][5] => Mux19.IN422
-memory[413][6] => Mux10.IN422
-memory[413][6] => Mux18.IN422
-memory[413][7] => Mux9.IN422
-memory[413][7] => Mux17.IN422
-memory[412][0] => Mux16.IN421
-memory[412][0] => Mux24.IN421
-memory[412][1] => Mux15.IN421
-memory[412][1] => Mux23.IN421
-memory[412][2] => Mux14.IN421
-memory[412][2] => Mux22.IN421
-memory[412][3] => Mux13.IN421
-memory[412][3] => Mux21.IN421
-memory[412][4] => Mux12.IN421
-memory[412][4] => Mux20.IN421
-memory[412][5] => Mux11.IN421
-memory[412][5] => Mux19.IN421
-memory[412][6] => Mux10.IN421
-memory[412][6] => Mux18.IN421
-memory[412][7] => Mux9.IN421
-memory[412][7] => Mux17.IN421
-memory[411][0] => Mux16.IN420
-memory[411][0] => Mux24.IN420
-memory[411][1] => Mux15.IN420
-memory[411][1] => Mux23.IN420
-memory[411][2] => Mux14.IN420
-memory[411][2] => Mux22.IN420
-memory[411][3] => Mux13.IN420
-memory[411][3] => Mux21.IN420
-memory[411][4] => Mux12.IN420
-memory[411][4] => Mux20.IN420
-memory[411][5] => Mux11.IN420
-memory[411][5] => Mux19.IN420
-memory[411][6] => Mux10.IN420
-memory[411][6] => Mux18.IN420
-memory[411][7] => Mux9.IN420
-memory[411][7] => Mux17.IN420
-memory[410][0] => Mux16.IN419
-memory[410][0] => Mux24.IN419
-memory[410][1] => Mux15.IN419
-memory[410][1] => Mux23.IN419
-memory[410][2] => Mux14.IN419
-memory[410][2] => Mux22.IN419
-memory[410][3] => Mux13.IN419
-memory[410][3] => Mux21.IN419
-memory[410][4] => Mux12.IN419
-memory[410][4] => Mux20.IN419
-memory[410][5] => Mux11.IN419
-memory[410][5] => Mux19.IN419
-memory[410][6] => Mux10.IN419
-memory[410][6] => Mux18.IN419
-memory[410][7] => Mux9.IN419
-memory[410][7] => Mux17.IN419
-memory[409][0] => Mux16.IN418
-memory[409][0] => Mux24.IN418
-memory[409][1] => Mux15.IN418
-memory[409][1] => Mux23.IN418
-memory[409][2] => Mux14.IN418
-memory[409][2] => Mux22.IN418
-memory[409][3] => Mux13.IN418
-memory[409][3] => Mux21.IN418
-memory[409][4] => Mux12.IN418
-memory[409][4] => Mux20.IN418
-memory[409][5] => Mux11.IN418
-memory[409][5] => Mux19.IN418
-memory[409][6] => Mux10.IN418
-memory[409][6] => Mux18.IN418
-memory[409][7] => Mux9.IN418
-memory[409][7] => Mux17.IN418
-memory[408][0] => Mux16.IN417
-memory[408][0] => Mux24.IN417
-memory[408][1] => Mux15.IN417
-memory[408][1] => Mux23.IN417
-memory[408][2] => Mux14.IN417
-memory[408][2] => Mux22.IN417
-memory[408][3] => Mux13.IN417
-memory[408][3] => Mux21.IN417
-memory[408][4] => Mux12.IN417
-memory[408][4] => Mux20.IN417
-memory[408][5] => Mux11.IN417
-memory[408][5] => Mux19.IN417
-memory[408][6] => Mux10.IN417
-memory[408][6] => Mux18.IN417
-memory[408][7] => Mux9.IN417
-memory[408][7] => Mux17.IN417
-memory[407][0] => Mux16.IN416
-memory[407][0] => Mux24.IN416
-memory[407][1] => Mux15.IN416
-memory[407][1] => Mux23.IN416
-memory[407][2] => Mux14.IN416
-memory[407][2] => Mux22.IN416
-memory[407][3] => Mux13.IN416
-memory[407][3] => Mux21.IN416
-memory[407][4] => Mux12.IN416
-memory[407][4] => Mux20.IN416
-memory[407][5] => Mux11.IN416
-memory[407][5] => Mux19.IN416
-memory[407][6] => Mux10.IN416
-memory[407][6] => Mux18.IN416
-memory[407][7] => Mux9.IN416
-memory[407][7] => Mux17.IN416
-memory[406][0] => Mux16.IN415
-memory[406][0] => Mux24.IN415
-memory[406][1] => Mux15.IN415
-memory[406][1] => Mux23.IN415
-memory[406][2] => Mux14.IN415
-memory[406][2] => Mux22.IN415
-memory[406][3] => Mux13.IN415
-memory[406][3] => Mux21.IN415
-memory[406][4] => Mux12.IN415
-memory[406][4] => Mux20.IN415
-memory[406][5] => Mux11.IN415
-memory[406][5] => Mux19.IN415
-memory[406][6] => Mux10.IN415
-memory[406][6] => Mux18.IN415
-memory[406][7] => Mux9.IN415
-memory[406][7] => Mux17.IN415
-memory[405][0] => Mux16.IN414
-memory[405][0] => Mux24.IN414
-memory[405][1] => Mux15.IN414
-memory[405][1] => Mux23.IN414
-memory[405][2] => Mux14.IN414
-memory[405][2] => Mux22.IN414
-memory[405][3] => Mux13.IN414
-memory[405][3] => Mux21.IN414
-memory[405][4] => Mux12.IN414
-memory[405][4] => Mux20.IN414
-memory[405][5] => Mux11.IN414
-memory[405][5] => Mux19.IN414
-memory[405][6] => Mux10.IN414
-memory[405][6] => Mux18.IN414
-memory[405][7] => Mux9.IN414
-memory[405][7] => Mux17.IN414
-memory[404][0] => Mux16.IN413
-memory[404][0] => Mux24.IN413
-memory[404][1] => Mux15.IN413
-memory[404][1] => Mux23.IN413
-memory[404][2] => Mux14.IN413
-memory[404][2] => Mux22.IN413
-memory[404][3] => Mux13.IN413
-memory[404][3] => Mux21.IN413
-memory[404][4] => Mux12.IN413
-memory[404][4] => Mux20.IN413
-memory[404][5] => Mux11.IN413
-memory[404][5] => Mux19.IN413
-memory[404][6] => Mux10.IN413
-memory[404][6] => Mux18.IN413
-memory[404][7] => Mux9.IN413
-memory[404][7] => Mux17.IN413
-memory[403][0] => Mux16.IN412
-memory[403][0] => Mux24.IN412
-memory[403][1] => Mux15.IN412
-memory[403][1] => Mux23.IN412
-memory[403][2] => Mux14.IN412
-memory[403][2] => Mux22.IN412
-memory[403][3] => Mux13.IN412
-memory[403][3] => Mux21.IN412
-memory[403][4] => Mux12.IN412
-memory[403][4] => Mux20.IN412
-memory[403][5] => Mux11.IN412
-memory[403][5] => Mux19.IN412
-memory[403][6] => Mux10.IN412
-memory[403][6] => Mux18.IN412
-memory[403][7] => Mux9.IN412
-memory[403][7] => Mux17.IN412
-memory[402][0] => Mux16.IN411
-memory[402][0] => Mux24.IN411
-memory[402][1] => Mux15.IN411
-memory[402][1] => Mux23.IN411
-memory[402][2] => Mux14.IN411
-memory[402][2] => Mux22.IN411
-memory[402][3] => Mux13.IN411
-memory[402][3] => Mux21.IN411
-memory[402][4] => Mux12.IN411
-memory[402][4] => Mux20.IN411
-memory[402][5] => Mux11.IN411
-memory[402][5] => Mux19.IN411
-memory[402][6] => Mux10.IN411
-memory[402][6] => Mux18.IN411
-memory[402][7] => Mux9.IN411
-memory[402][7] => Mux17.IN411
-memory[401][0] => Mux16.IN410
-memory[401][0] => Mux24.IN410
-memory[401][1] => Mux15.IN410
-memory[401][1] => Mux23.IN410
-memory[401][2] => Mux14.IN410
-memory[401][2] => Mux22.IN410
-memory[401][3] => Mux13.IN410
-memory[401][3] => Mux21.IN410
-memory[401][4] => Mux12.IN410
-memory[401][4] => Mux20.IN410
-memory[401][5] => Mux11.IN410
-memory[401][5] => Mux19.IN410
-memory[401][6] => Mux10.IN410
-memory[401][6] => Mux18.IN410
-memory[401][7] => Mux9.IN410
-memory[401][7] => Mux17.IN410
-memory[400][0] => Mux16.IN409
-memory[400][0] => Mux24.IN409
-memory[400][1] => Mux15.IN409
-memory[400][1] => Mux23.IN409
-memory[400][2] => Mux14.IN409
-memory[400][2] => Mux22.IN409
-memory[400][3] => Mux13.IN409
-memory[400][3] => Mux21.IN409
-memory[400][4] => Mux12.IN409
-memory[400][4] => Mux20.IN409
-memory[400][5] => Mux11.IN409
-memory[400][5] => Mux19.IN409
-memory[400][6] => Mux10.IN409
-memory[400][6] => Mux18.IN409
-memory[400][7] => Mux9.IN409
-memory[400][7] => Mux17.IN409
-memory[399][0] => Mux16.IN408
-memory[399][0] => Mux24.IN408
-memory[399][1] => Mux15.IN408
-memory[399][1] => Mux23.IN408
-memory[399][2] => Mux14.IN408
-memory[399][2] => Mux22.IN408
-memory[399][3] => Mux13.IN408
-memory[399][3] => Mux21.IN408
-memory[399][4] => Mux12.IN408
-memory[399][4] => Mux20.IN408
-memory[399][5] => Mux11.IN408
-memory[399][5] => Mux19.IN408
-memory[399][6] => Mux10.IN408
-memory[399][6] => Mux18.IN408
-memory[399][7] => Mux9.IN408
-memory[399][7] => Mux17.IN408
-memory[398][0] => Mux16.IN407
-memory[398][0] => Mux24.IN407
-memory[398][1] => Mux15.IN407
-memory[398][1] => Mux23.IN407
-memory[398][2] => Mux14.IN407
-memory[398][2] => Mux22.IN407
-memory[398][3] => Mux13.IN407
-memory[398][3] => Mux21.IN407
-memory[398][4] => Mux12.IN407
-memory[398][4] => Mux20.IN407
-memory[398][5] => Mux11.IN407
-memory[398][5] => Mux19.IN407
-memory[398][6] => Mux10.IN407
-memory[398][6] => Mux18.IN407
-memory[398][7] => Mux9.IN407
-memory[398][7] => Mux17.IN407
-memory[397][0] => Mux16.IN406
-memory[397][0] => Mux24.IN406
-memory[397][1] => Mux15.IN406
-memory[397][1] => Mux23.IN406
-memory[397][2] => Mux14.IN406
-memory[397][2] => Mux22.IN406
-memory[397][3] => Mux13.IN406
-memory[397][3] => Mux21.IN406
-memory[397][4] => Mux12.IN406
-memory[397][4] => Mux20.IN406
-memory[397][5] => Mux11.IN406
-memory[397][5] => Mux19.IN406
-memory[397][6] => Mux10.IN406
-memory[397][6] => Mux18.IN406
-memory[397][7] => Mux9.IN406
-memory[397][7] => Mux17.IN406
-memory[396][0] => Mux16.IN405
-memory[396][0] => Mux24.IN405
-memory[396][1] => Mux15.IN405
-memory[396][1] => Mux23.IN405
-memory[396][2] => Mux14.IN405
-memory[396][2] => Mux22.IN405
-memory[396][3] => Mux13.IN405
-memory[396][3] => Mux21.IN405
-memory[396][4] => Mux12.IN405
-memory[396][4] => Mux20.IN405
-memory[396][5] => Mux11.IN405
-memory[396][5] => Mux19.IN405
-memory[396][6] => Mux10.IN405
-memory[396][6] => Mux18.IN405
-memory[396][7] => Mux9.IN405
-memory[396][7] => Mux17.IN405
-memory[395][0] => Mux16.IN404
-memory[395][0] => Mux24.IN404
-memory[395][1] => Mux15.IN404
-memory[395][1] => Mux23.IN404
-memory[395][2] => Mux14.IN404
-memory[395][2] => Mux22.IN404
-memory[395][3] => Mux13.IN404
-memory[395][3] => Mux21.IN404
-memory[395][4] => Mux12.IN404
-memory[395][4] => Mux20.IN404
-memory[395][5] => Mux11.IN404
-memory[395][5] => Mux19.IN404
-memory[395][6] => Mux10.IN404
-memory[395][6] => Mux18.IN404
-memory[395][7] => Mux9.IN404
-memory[395][7] => Mux17.IN404
-memory[394][0] => Mux16.IN403
-memory[394][0] => Mux24.IN403
-memory[394][1] => Mux15.IN403
-memory[394][1] => Mux23.IN403
-memory[394][2] => Mux14.IN403
-memory[394][2] => Mux22.IN403
-memory[394][3] => Mux13.IN403
-memory[394][3] => Mux21.IN403
-memory[394][4] => Mux12.IN403
-memory[394][4] => Mux20.IN403
-memory[394][5] => Mux11.IN403
-memory[394][5] => Mux19.IN403
-memory[394][6] => Mux10.IN403
-memory[394][6] => Mux18.IN403
-memory[394][7] => Mux9.IN403
-memory[394][7] => Mux17.IN403
-memory[393][0] => Mux16.IN402
-memory[393][0] => Mux24.IN402
-memory[393][1] => Mux15.IN402
-memory[393][1] => Mux23.IN402
-memory[393][2] => Mux14.IN402
-memory[393][2] => Mux22.IN402
-memory[393][3] => Mux13.IN402
-memory[393][3] => Mux21.IN402
-memory[393][4] => Mux12.IN402
-memory[393][4] => Mux20.IN402
-memory[393][5] => Mux11.IN402
-memory[393][5] => Mux19.IN402
-memory[393][6] => Mux10.IN402
-memory[393][6] => Mux18.IN402
-memory[393][7] => Mux9.IN402
-memory[393][7] => Mux17.IN402
-memory[392][0] => Mux16.IN401
-memory[392][0] => Mux24.IN401
-memory[392][1] => Mux15.IN401
-memory[392][1] => Mux23.IN401
-memory[392][2] => Mux14.IN401
-memory[392][2] => Mux22.IN401
-memory[392][3] => Mux13.IN401
-memory[392][3] => Mux21.IN401
-memory[392][4] => Mux12.IN401
-memory[392][4] => Mux20.IN401
-memory[392][5] => Mux11.IN401
-memory[392][5] => Mux19.IN401
-memory[392][6] => Mux10.IN401
-memory[392][6] => Mux18.IN401
-memory[392][7] => Mux9.IN401
-memory[392][7] => Mux17.IN401
-memory[391][0] => Mux16.IN400
-memory[391][0] => Mux24.IN400
-memory[391][1] => Mux15.IN400
-memory[391][1] => Mux23.IN400
-memory[391][2] => Mux14.IN400
-memory[391][2] => Mux22.IN400
-memory[391][3] => Mux13.IN400
-memory[391][3] => Mux21.IN400
-memory[391][4] => Mux12.IN400
-memory[391][4] => Mux20.IN400
-memory[391][5] => Mux11.IN400
-memory[391][5] => Mux19.IN400
-memory[391][6] => Mux10.IN400
-memory[391][6] => Mux18.IN400
-memory[391][7] => Mux9.IN400
-memory[391][7] => Mux17.IN400
-memory[390][0] => Mux16.IN399
-memory[390][0] => Mux24.IN399
-memory[390][1] => Mux15.IN399
-memory[390][1] => Mux23.IN399
-memory[390][2] => Mux14.IN399
-memory[390][2] => Mux22.IN399
-memory[390][3] => Mux13.IN399
-memory[390][3] => Mux21.IN399
-memory[390][4] => Mux12.IN399
-memory[390][4] => Mux20.IN399
-memory[390][5] => Mux11.IN399
-memory[390][5] => Mux19.IN399
-memory[390][6] => Mux10.IN399
-memory[390][6] => Mux18.IN399
-memory[390][7] => Mux9.IN399
-memory[390][7] => Mux17.IN399
-memory[389][0] => Mux16.IN398
-memory[389][0] => Mux24.IN398
-memory[389][1] => Mux15.IN398
-memory[389][1] => Mux23.IN398
-memory[389][2] => Mux14.IN398
-memory[389][2] => Mux22.IN398
-memory[389][3] => Mux13.IN398
-memory[389][3] => Mux21.IN398
-memory[389][4] => Mux12.IN398
-memory[389][4] => Mux20.IN398
-memory[389][5] => Mux11.IN398
-memory[389][5] => Mux19.IN398
-memory[389][6] => Mux10.IN398
-memory[389][6] => Mux18.IN398
-memory[389][7] => Mux9.IN398
-memory[389][7] => Mux17.IN398
-memory[388][0] => Mux16.IN397
-memory[388][0] => Mux24.IN397
-memory[388][1] => Mux15.IN397
-memory[388][1] => Mux23.IN397
-memory[388][2] => Mux14.IN397
-memory[388][2] => Mux22.IN397
-memory[388][3] => Mux13.IN397
-memory[388][3] => Mux21.IN397
-memory[388][4] => Mux12.IN397
-memory[388][4] => Mux20.IN397
-memory[388][5] => Mux11.IN397
-memory[388][5] => Mux19.IN397
-memory[388][6] => Mux10.IN397
-memory[388][6] => Mux18.IN397
-memory[388][7] => Mux9.IN397
-memory[388][7] => Mux17.IN397
-memory[387][0] => Mux16.IN396
-memory[387][0] => Mux24.IN396
-memory[387][1] => Mux15.IN396
-memory[387][1] => Mux23.IN396
-memory[387][2] => Mux14.IN396
-memory[387][2] => Mux22.IN396
-memory[387][3] => Mux13.IN396
-memory[387][3] => Mux21.IN396
-memory[387][4] => Mux12.IN396
-memory[387][4] => Mux20.IN396
-memory[387][5] => Mux11.IN396
-memory[387][5] => Mux19.IN396
-memory[387][6] => Mux10.IN396
-memory[387][6] => Mux18.IN396
-memory[387][7] => Mux9.IN396
-memory[387][7] => Mux17.IN396
-memory[386][0] => Mux16.IN395
-memory[386][0] => Mux24.IN395
-memory[386][1] => Mux15.IN395
-memory[386][1] => Mux23.IN395
-memory[386][2] => Mux14.IN395
-memory[386][2] => Mux22.IN395
-memory[386][3] => Mux13.IN395
-memory[386][3] => Mux21.IN395
-memory[386][4] => Mux12.IN395
-memory[386][4] => Mux20.IN395
-memory[386][5] => Mux11.IN395
-memory[386][5] => Mux19.IN395
-memory[386][6] => Mux10.IN395
-memory[386][6] => Mux18.IN395
-memory[386][7] => Mux9.IN395
-memory[386][7] => Mux17.IN395
-memory[385][0] => Mux16.IN394
-memory[385][0] => Mux24.IN394
-memory[385][1] => Mux15.IN394
-memory[385][1] => Mux23.IN394
-memory[385][2] => Mux14.IN394
-memory[385][2] => Mux22.IN394
-memory[385][3] => Mux13.IN394
-memory[385][3] => Mux21.IN394
-memory[385][4] => Mux12.IN394
-memory[385][4] => Mux20.IN394
-memory[385][5] => Mux11.IN394
-memory[385][5] => Mux19.IN394
-memory[385][6] => Mux10.IN394
-memory[385][6] => Mux18.IN394
-memory[385][7] => Mux9.IN394
-memory[385][7] => Mux17.IN394
-memory[384][0] => Mux16.IN393
-memory[384][0] => Mux24.IN393
-memory[384][1] => Mux15.IN393
-memory[384][1] => Mux23.IN393
-memory[384][2] => Mux14.IN393
-memory[384][2] => Mux22.IN393
-memory[384][3] => Mux13.IN393
-memory[384][3] => Mux21.IN393
-memory[384][4] => Mux12.IN393
-memory[384][4] => Mux20.IN393
-memory[384][5] => Mux11.IN393
-memory[384][5] => Mux19.IN393
-memory[384][6] => Mux10.IN393
-memory[384][6] => Mux18.IN393
-memory[384][7] => Mux9.IN393
-memory[384][7] => Mux17.IN393
-memory[383][0] => Mux16.IN392
-memory[383][0] => Mux24.IN392
-memory[383][1] => Mux15.IN392
-memory[383][1] => Mux23.IN392
-memory[383][2] => Mux14.IN392
-memory[383][2] => Mux22.IN392
-memory[383][3] => Mux13.IN392
-memory[383][3] => Mux21.IN392
-memory[383][4] => Mux12.IN392
-memory[383][4] => Mux20.IN392
-memory[383][5] => Mux11.IN392
-memory[383][5] => Mux19.IN392
-memory[383][6] => Mux10.IN392
-memory[383][6] => Mux18.IN392
-memory[383][7] => Mux9.IN392
-memory[383][7] => Mux17.IN392
-memory[382][0] => Mux16.IN391
-memory[382][0] => Mux24.IN391
-memory[382][1] => Mux15.IN391
-memory[382][1] => Mux23.IN391
-memory[382][2] => Mux14.IN391
-memory[382][2] => Mux22.IN391
-memory[382][3] => Mux13.IN391
-memory[382][3] => Mux21.IN391
-memory[382][4] => Mux12.IN391
-memory[382][4] => Mux20.IN391
-memory[382][5] => Mux11.IN391
-memory[382][5] => Mux19.IN391
-memory[382][6] => Mux10.IN391
-memory[382][6] => Mux18.IN391
-memory[382][7] => Mux9.IN391
-memory[382][7] => Mux17.IN391
-memory[381][0] => Mux16.IN390
-memory[381][0] => Mux24.IN390
-memory[381][1] => Mux15.IN390
-memory[381][1] => Mux23.IN390
-memory[381][2] => Mux14.IN390
-memory[381][2] => Mux22.IN390
-memory[381][3] => Mux13.IN390
-memory[381][3] => Mux21.IN390
-memory[381][4] => Mux12.IN390
-memory[381][4] => Mux20.IN390
-memory[381][5] => Mux11.IN390
-memory[381][5] => Mux19.IN390
-memory[381][6] => Mux10.IN390
-memory[381][6] => Mux18.IN390
-memory[381][7] => Mux9.IN390
-memory[381][7] => Mux17.IN390
-memory[380][0] => Mux16.IN389
-memory[380][0] => Mux24.IN389
-memory[380][1] => Mux15.IN389
-memory[380][1] => Mux23.IN389
-memory[380][2] => Mux14.IN389
-memory[380][2] => Mux22.IN389
-memory[380][3] => Mux13.IN389
-memory[380][3] => Mux21.IN389
-memory[380][4] => Mux12.IN389
-memory[380][4] => Mux20.IN389
-memory[380][5] => Mux11.IN389
-memory[380][5] => Mux19.IN389
-memory[380][6] => Mux10.IN389
-memory[380][6] => Mux18.IN389
-memory[380][7] => Mux9.IN389
-memory[380][7] => Mux17.IN389
-memory[379][0] => Mux16.IN388
-memory[379][0] => Mux24.IN388
-memory[379][1] => Mux15.IN388
-memory[379][1] => Mux23.IN388
-memory[379][2] => Mux14.IN388
-memory[379][2] => Mux22.IN388
-memory[379][3] => Mux13.IN388
-memory[379][3] => Mux21.IN388
-memory[379][4] => Mux12.IN388
-memory[379][4] => Mux20.IN388
-memory[379][5] => Mux11.IN388
-memory[379][5] => Mux19.IN388
-memory[379][6] => Mux10.IN388
-memory[379][6] => Mux18.IN388
-memory[379][7] => Mux9.IN388
-memory[379][7] => Mux17.IN388
-memory[378][0] => Mux16.IN387
-memory[378][0] => Mux24.IN387
-memory[378][1] => Mux15.IN387
-memory[378][1] => Mux23.IN387
-memory[378][2] => Mux14.IN387
-memory[378][2] => Mux22.IN387
-memory[378][3] => Mux13.IN387
-memory[378][3] => Mux21.IN387
-memory[378][4] => Mux12.IN387
-memory[378][4] => Mux20.IN387
-memory[378][5] => Mux11.IN387
-memory[378][5] => Mux19.IN387
-memory[378][6] => Mux10.IN387
-memory[378][6] => Mux18.IN387
-memory[378][7] => Mux9.IN387
-memory[378][7] => Mux17.IN387
-memory[377][0] => Mux16.IN386
-memory[377][0] => Mux24.IN386
-memory[377][1] => Mux15.IN386
-memory[377][1] => Mux23.IN386
-memory[377][2] => Mux14.IN386
-memory[377][2] => Mux22.IN386
-memory[377][3] => Mux13.IN386
-memory[377][3] => Mux21.IN386
-memory[377][4] => Mux12.IN386
-memory[377][4] => Mux20.IN386
-memory[377][5] => Mux11.IN386
-memory[377][5] => Mux19.IN386
-memory[377][6] => Mux10.IN386
-memory[377][6] => Mux18.IN386
-memory[377][7] => Mux9.IN386
-memory[377][7] => Mux17.IN386
-memory[376][0] => Mux16.IN385
-memory[376][0] => Mux24.IN385
-memory[376][1] => Mux15.IN385
-memory[376][1] => Mux23.IN385
-memory[376][2] => Mux14.IN385
-memory[376][2] => Mux22.IN385
-memory[376][3] => Mux13.IN385
-memory[376][3] => Mux21.IN385
-memory[376][4] => Mux12.IN385
-memory[376][4] => Mux20.IN385
-memory[376][5] => Mux11.IN385
-memory[376][5] => Mux19.IN385
-memory[376][6] => Mux10.IN385
-memory[376][6] => Mux18.IN385
-memory[376][7] => Mux9.IN385
-memory[376][7] => Mux17.IN385
-memory[375][0] => Mux16.IN384
-memory[375][0] => Mux24.IN384
-memory[375][1] => Mux15.IN384
-memory[375][1] => Mux23.IN384
-memory[375][2] => Mux14.IN384
-memory[375][2] => Mux22.IN384
-memory[375][3] => Mux13.IN384
-memory[375][3] => Mux21.IN384
-memory[375][4] => Mux12.IN384
-memory[375][4] => Mux20.IN384
-memory[375][5] => Mux11.IN384
-memory[375][5] => Mux19.IN384
-memory[375][6] => Mux10.IN384
-memory[375][6] => Mux18.IN384
-memory[375][7] => Mux9.IN384
-memory[375][7] => Mux17.IN384
-memory[374][0] => Mux16.IN383
-memory[374][0] => Mux24.IN383
-memory[374][1] => Mux15.IN383
-memory[374][1] => Mux23.IN383
-memory[374][2] => Mux14.IN383
-memory[374][2] => Mux22.IN383
-memory[374][3] => Mux13.IN383
-memory[374][3] => Mux21.IN383
-memory[374][4] => Mux12.IN383
-memory[374][4] => Mux20.IN383
-memory[374][5] => Mux11.IN383
-memory[374][5] => Mux19.IN383
-memory[374][6] => Mux10.IN383
-memory[374][6] => Mux18.IN383
-memory[374][7] => Mux9.IN383
-memory[374][7] => Mux17.IN383
-memory[373][0] => Mux16.IN382
-memory[373][0] => Mux24.IN382
-memory[373][1] => Mux15.IN382
-memory[373][1] => Mux23.IN382
-memory[373][2] => Mux14.IN382
-memory[373][2] => Mux22.IN382
-memory[373][3] => Mux13.IN382
-memory[373][3] => Mux21.IN382
-memory[373][4] => Mux12.IN382
-memory[373][4] => Mux20.IN382
-memory[373][5] => Mux11.IN382
-memory[373][5] => Mux19.IN382
-memory[373][6] => Mux10.IN382
-memory[373][6] => Mux18.IN382
-memory[373][7] => Mux9.IN382
-memory[373][7] => Mux17.IN382
-memory[372][0] => Mux16.IN381
-memory[372][0] => Mux24.IN381
-memory[372][1] => Mux15.IN381
-memory[372][1] => Mux23.IN381
-memory[372][2] => Mux14.IN381
-memory[372][2] => Mux22.IN381
-memory[372][3] => Mux13.IN381
-memory[372][3] => Mux21.IN381
-memory[372][4] => Mux12.IN381
-memory[372][4] => Mux20.IN381
-memory[372][5] => Mux11.IN381
-memory[372][5] => Mux19.IN381
-memory[372][6] => Mux10.IN381
-memory[372][6] => Mux18.IN381
-memory[372][7] => Mux9.IN381
-memory[372][7] => Mux17.IN381
-memory[371][0] => Mux16.IN380
-memory[371][0] => Mux24.IN380
-memory[371][1] => Mux15.IN380
-memory[371][1] => Mux23.IN380
-memory[371][2] => Mux14.IN380
-memory[371][2] => Mux22.IN380
-memory[371][3] => Mux13.IN380
-memory[371][3] => Mux21.IN380
-memory[371][4] => Mux12.IN380
-memory[371][4] => Mux20.IN380
-memory[371][5] => Mux11.IN380
-memory[371][5] => Mux19.IN380
-memory[371][6] => Mux10.IN380
-memory[371][6] => Mux18.IN380
-memory[371][7] => Mux9.IN380
-memory[371][7] => Mux17.IN380
-memory[370][0] => Mux16.IN379
-memory[370][0] => Mux24.IN379
-memory[370][1] => Mux15.IN379
-memory[370][1] => Mux23.IN379
-memory[370][2] => Mux14.IN379
-memory[370][2] => Mux22.IN379
-memory[370][3] => Mux13.IN379
-memory[370][3] => Mux21.IN379
-memory[370][4] => Mux12.IN379
-memory[370][4] => Mux20.IN379
-memory[370][5] => Mux11.IN379
-memory[370][5] => Mux19.IN379
-memory[370][6] => Mux10.IN379
-memory[370][6] => Mux18.IN379
-memory[370][7] => Mux9.IN379
-memory[370][7] => Mux17.IN379
-memory[369][0] => Mux16.IN378
-memory[369][0] => Mux24.IN378
-memory[369][1] => Mux15.IN378
-memory[369][1] => Mux23.IN378
-memory[369][2] => Mux14.IN378
-memory[369][2] => Mux22.IN378
-memory[369][3] => Mux13.IN378
-memory[369][3] => Mux21.IN378
-memory[369][4] => Mux12.IN378
-memory[369][4] => Mux20.IN378
-memory[369][5] => Mux11.IN378
-memory[369][5] => Mux19.IN378
-memory[369][6] => Mux10.IN378
-memory[369][6] => Mux18.IN378
-memory[369][7] => Mux9.IN378
-memory[369][7] => Mux17.IN378
-memory[368][0] => Mux16.IN377
-memory[368][0] => Mux24.IN377
-memory[368][1] => Mux15.IN377
-memory[368][1] => Mux23.IN377
-memory[368][2] => Mux14.IN377
-memory[368][2] => Mux22.IN377
-memory[368][3] => Mux13.IN377
-memory[368][3] => Mux21.IN377
-memory[368][4] => Mux12.IN377
-memory[368][4] => Mux20.IN377
-memory[368][5] => Mux11.IN377
-memory[368][5] => Mux19.IN377
-memory[368][6] => Mux10.IN377
-memory[368][6] => Mux18.IN377
-memory[368][7] => Mux9.IN377
-memory[368][7] => Mux17.IN377
-memory[367][0] => Mux16.IN376
-memory[367][0] => Mux24.IN376
-memory[367][1] => Mux15.IN376
-memory[367][1] => Mux23.IN376
-memory[367][2] => Mux14.IN376
-memory[367][2] => Mux22.IN376
-memory[367][3] => Mux13.IN376
-memory[367][3] => Mux21.IN376
-memory[367][4] => Mux12.IN376
-memory[367][4] => Mux20.IN376
-memory[367][5] => Mux11.IN376
-memory[367][5] => Mux19.IN376
-memory[367][6] => Mux10.IN376
-memory[367][6] => Mux18.IN376
-memory[367][7] => Mux9.IN376
-memory[367][7] => Mux17.IN376
-memory[366][0] => Mux16.IN375
-memory[366][0] => Mux24.IN375
-memory[366][1] => Mux15.IN375
-memory[366][1] => Mux23.IN375
-memory[366][2] => Mux14.IN375
-memory[366][2] => Mux22.IN375
-memory[366][3] => Mux13.IN375
-memory[366][3] => Mux21.IN375
-memory[366][4] => Mux12.IN375
-memory[366][4] => Mux20.IN375
-memory[366][5] => Mux11.IN375
-memory[366][5] => Mux19.IN375
-memory[366][6] => Mux10.IN375
-memory[366][6] => Mux18.IN375
-memory[366][7] => Mux9.IN375
-memory[366][7] => Mux17.IN375
-memory[365][0] => Mux16.IN374
-memory[365][0] => Mux24.IN374
-memory[365][1] => Mux15.IN374
-memory[365][1] => Mux23.IN374
-memory[365][2] => Mux14.IN374
-memory[365][2] => Mux22.IN374
-memory[365][3] => Mux13.IN374
-memory[365][3] => Mux21.IN374
-memory[365][4] => Mux12.IN374
-memory[365][4] => Mux20.IN374
-memory[365][5] => Mux11.IN374
-memory[365][5] => Mux19.IN374
-memory[365][6] => Mux10.IN374
-memory[365][6] => Mux18.IN374
-memory[365][7] => Mux9.IN374
-memory[365][7] => Mux17.IN374
-memory[364][0] => Mux16.IN373
-memory[364][0] => Mux24.IN373
-memory[364][1] => Mux15.IN373
-memory[364][1] => Mux23.IN373
-memory[364][2] => Mux14.IN373
-memory[364][2] => Mux22.IN373
-memory[364][3] => Mux13.IN373
-memory[364][3] => Mux21.IN373
-memory[364][4] => Mux12.IN373
-memory[364][4] => Mux20.IN373
-memory[364][5] => Mux11.IN373
-memory[364][5] => Mux19.IN373
-memory[364][6] => Mux10.IN373
-memory[364][6] => Mux18.IN373
-memory[364][7] => Mux9.IN373
-memory[364][7] => Mux17.IN373
-memory[363][0] => Mux16.IN372
-memory[363][0] => Mux24.IN372
-memory[363][1] => Mux15.IN372
-memory[363][1] => Mux23.IN372
-memory[363][2] => Mux14.IN372
-memory[363][2] => Mux22.IN372
-memory[363][3] => Mux13.IN372
-memory[363][3] => Mux21.IN372
-memory[363][4] => Mux12.IN372
-memory[363][4] => Mux20.IN372
-memory[363][5] => Mux11.IN372
-memory[363][5] => Mux19.IN372
-memory[363][6] => Mux10.IN372
-memory[363][6] => Mux18.IN372
-memory[363][7] => Mux9.IN372
-memory[363][7] => Mux17.IN372
-memory[362][0] => Mux16.IN371
-memory[362][0] => Mux24.IN371
-memory[362][1] => Mux15.IN371
-memory[362][1] => Mux23.IN371
-memory[362][2] => Mux14.IN371
-memory[362][2] => Mux22.IN371
-memory[362][3] => Mux13.IN371
-memory[362][3] => Mux21.IN371
-memory[362][4] => Mux12.IN371
-memory[362][4] => Mux20.IN371
-memory[362][5] => Mux11.IN371
-memory[362][5] => Mux19.IN371
-memory[362][6] => Mux10.IN371
-memory[362][6] => Mux18.IN371
-memory[362][7] => Mux9.IN371
-memory[362][7] => Mux17.IN371
-memory[361][0] => Mux16.IN370
-memory[361][0] => Mux24.IN370
-memory[361][1] => Mux15.IN370
-memory[361][1] => Mux23.IN370
-memory[361][2] => Mux14.IN370
-memory[361][2] => Mux22.IN370
-memory[361][3] => Mux13.IN370
-memory[361][3] => Mux21.IN370
-memory[361][4] => Mux12.IN370
-memory[361][4] => Mux20.IN370
-memory[361][5] => Mux11.IN370
-memory[361][5] => Mux19.IN370
-memory[361][6] => Mux10.IN370
-memory[361][6] => Mux18.IN370
-memory[361][7] => Mux9.IN370
-memory[361][7] => Mux17.IN370
-memory[360][0] => Mux16.IN369
-memory[360][0] => Mux24.IN369
-memory[360][1] => Mux15.IN369
-memory[360][1] => Mux23.IN369
-memory[360][2] => Mux14.IN369
-memory[360][2] => Mux22.IN369
-memory[360][3] => Mux13.IN369
-memory[360][3] => Mux21.IN369
-memory[360][4] => Mux12.IN369
-memory[360][4] => Mux20.IN369
-memory[360][5] => Mux11.IN369
-memory[360][5] => Mux19.IN369
-memory[360][6] => Mux10.IN369
-memory[360][6] => Mux18.IN369
-memory[360][7] => Mux9.IN369
-memory[360][7] => Mux17.IN369
-memory[359][0] => Mux16.IN368
-memory[359][0] => Mux24.IN368
-memory[359][1] => Mux15.IN368
-memory[359][1] => Mux23.IN368
-memory[359][2] => Mux14.IN368
-memory[359][2] => Mux22.IN368
-memory[359][3] => Mux13.IN368
-memory[359][3] => Mux21.IN368
-memory[359][4] => Mux12.IN368
-memory[359][4] => Mux20.IN368
-memory[359][5] => Mux11.IN368
-memory[359][5] => Mux19.IN368
-memory[359][6] => Mux10.IN368
-memory[359][6] => Mux18.IN368
-memory[359][7] => Mux9.IN368
-memory[359][7] => Mux17.IN368
-memory[358][0] => Mux16.IN367
-memory[358][0] => Mux24.IN367
-memory[358][1] => Mux15.IN367
-memory[358][1] => Mux23.IN367
-memory[358][2] => Mux14.IN367
-memory[358][2] => Mux22.IN367
-memory[358][3] => Mux13.IN367
-memory[358][3] => Mux21.IN367
-memory[358][4] => Mux12.IN367
-memory[358][4] => Mux20.IN367
-memory[358][5] => Mux11.IN367
-memory[358][5] => Mux19.IN367
-memory[358][6] => Mux10.IN367
-memory[358][6] => Mux18.IN367
-memory[358][7] => Mux9.IN367
-memory[358][7] => Mux17.IN367
-memory[357][0] => Mux16.IN366
-memory[357][0] => Mux24.IN366
-memory[357][1] => Mux15.IN366
-memory[357][1] => Mux23.IN366
-memory[357][2] => Mux14.IN366
-memory[357][2] => Mux22.IN366
-memory[357][3] => Mux13.IN366
-memory[357][3] => Mux21.IN366
-memory[357][4] => Mux12.IN366
-memory[357][4] => Mux20.IN366
-memory[357][5] => Mux11.IN366
-memory[357][5] => Mux19.IN366
-memory[357][6] => Mux10.IN366
-memory[357][6] => Mux18.IN366
-memory[357][7] => Mux9.IN366
-memory[357][7] => Mux17.IN366
-memory[356][0] => Mux16.IN365
-memory[356][0] => Mux24.IN365
-memory[356][1] => Mux15.IN365
-memory[356][1] => Mux23.IN365
-memory[356][2] => Mux14.IN365
-memory[356][2] => Mux22.IN365
-memory[356][3] => Mux13.IN365
-memory[356][3] => Mux21.IN365
-memory[356][4] => Mux12.IN365
-memory[356][4] => Mux20.IN365
-memory[356][5] => Mux11.IN365
-memory[356][5] => Mux19.IN365
-memory[356][6] => Mux10.IN365
-memory[356][6] => Mux18.IN365
-memory[356][7] => Mux9.IN365
-memory[356][7] => Mux17.IN365
-memory[355][0] => Mux16.IN364
-memory[355][0] => Mux24.IN364
-memory[355][1] => Mux15.IN364
-memory[355][1] => Mux23.IN364
-memory[355][2] => Mux14.IN364
-memory[355][2] => Mux22.IN364
-memory[355][3] => Mux13.IN364
-memory[355][3] => Mux21.IN364
-memory[355][4] => Mux12.IN364
-memory[355][4] => Mux20.IN364
-memory[355][5] => Mux11.IN364
-memory[355][5] => Mux19.IN364
-memory[355][6] => Mux10.IN364
-memory[355][6] => Mux18.IN364
-memory[355][7] => Mux9.IN364
-memory[355][7] => Mux17.IN364
-memory[354][0] => Mux16.IN363
-memory[354][0] => Mux24.IN363
-memory[354][1] => Mux15.IN363
-memory[354][1] => Mux23.IN363
-memory[354][2] => Mux14.IN363
-memory[354][2] => Mux22.IN363
-memory[354][3] => Mux13.IN363
-memory[354][3] => Mux21.IN363
-memory[354][4] => Mux12.IN363
-memory[354][4] => Mux20.IN363
-memory[354][5] => Mux11.IN363
-memory[354][5] => Mux19.IN363
-memory[354][6] => Mux10.IN363
-memory[354][6] => Mux18.IN363
-memory[354][7] => Mux9.IN363
-memory[354][7] => Mux17.IN363
-memory[353][0] => Mux16.IN362
-memory[353][0] => Mux24.IN362
-memory[353][1] => Mux15.IN362
-memory[353][1] => Mux23.IN362
-memory[353][2] => Mux14.IN362
-memory[353][2] => Mux22.IN362
-memory[353][3] => Mux13.IN362
-memory[353][3] => Mux21.IN362
-memory[353][4] => Mux12.IN362
-memory[353][4] => Mux20.IN362
-memory[353][5] => Mux11.IN362
-memory[353][5] => Mux19.IN362
-memory[353][6] => Mux10.IN362
-memory[353][6] => Mux18.IN362
-memory[353][7] => Mux9.IN362
-memory[353][7] => Mux17.IN362
-memory[352][0] => Mux16.IN361
-memory[352][0] => Mux24.IN361
-memory[352][1] => Mux15.IN361
-memory[352][1] => Mux23.IN361
-memory[352][2] => Mux14.IN361
-memory[352][2] => Mux22.IN361
-memory[352][3] => Mux13.IN361
-memory[352][3] => Mux21.IN361
-memory[352][4] => Mux12.IN361
-memory[352][4] => Mux20.IN361
-memory[352][5] => Mux11.IN361
-memory[352][5] => Mux19.IN361
-memory[352][6] => Mux10.IN361
-memory[352][6] => Mux18.IN361
-memory[352][7] => Mux9.IN361
-memory[352][7] => Mux17.IN361
-memory[351][0] => Mux16.IN360
-memory[351][0] => Mux24.IN360
-memory[351][1] => Mux15.IN360
-memory[351][1] => Mux23.IN360
-memory[351][2] => Mux14.IN360
-memory[351][2] => Mux22.IN360
-memory[351][3] => Mux13.IN360
-memory[351][3] => Mux21.IN360
-memory[351][4] => Mux12.IN360
-memory[351][4] => Mux20.IN360
-memory[351][5] => Mux11.IN360
-memory[351][5] => Mux19.IN360
-memory[351][6] => Mux10.IN360
-memory[351][6] => Mux18.IN360
-memory[351][7] => Mux9.IN360
-memory[351][7] => Mux17.IN360
-memory[350][0] => Mux16.IN359
-memory[350][0] => Mux24.IN359
-memory[350][1] => Mux15.IN359
-memory[350][1] => Mux23.IN359
-memory[350][2] => Mux14.IN359
-memory[350][2] => Mux22.IN359
-memory[350][3] => Mux13.IN359
-memory[350][3] => Mux21.IN359
-memory[350][4] => Mux12.IN359
-memory[350][4] => Mux20.IN359
-memory[350][5] => Mux11.IN359
-memory[350][5] => Mux19.IN359
-memory[350][6] => Mux10.IN359
-memory[350][6] => Mux18.IN359
-memory[350][7] => Mux9.IN359
-memory[350][7] => Mux17.IN359
-memory[349][0] => Mux16.IN358
-memory[349][0] => Mux24.IN358
-memory[349][1] => Mux15.IN358
-memory[349][1] => Mux23.IN358
-memory[349][2] => Mux14.IN358
-memory[349][2] => Mux22.IN358
-memory[349][3] => Mux13.IN358
-memory[349][3] => Mux21.IN358
-memory[349][4] => Mux12.IN358
-memory[349][4] => Mux20.IN358
-memory[349][5] => Mux11.IN358
-memory[349][5] => Mux19.IN358
-memory[349][6] => Mux10.IN358
-memory[349][6] => Mux18.IN358
-memory[349][7] => Mux9.IN358
-memory[349][7] => Mux17.IN358
-memory[348][0] => Mux16.IN357
-memory[348][0] => Mux24.IN357
-memory[348][1] => Mux15.IN357
-memory[348][1] => Mux23.IN357
-memory[348][2] => Mux14.IN357
-memory[348][2] => Mux22.IN357
-memory[348][3] => Mux13.IN357
-memory[348][3] => Mux21.IN357
-memory[348][4] => Mux12.IN357
-memory[348][4] => Mux20.IN357
-memory[348][5] => Mux11.IN357
-memory[348][5] => Mux19.IN357
-memory[348][6] => Mux10.IN357
-memory[348][6] => Mux18.IN357
-memory[348][7] => Mux9.IN357
-memory[348][7] => Mux17.IN357
-memory[347][0] => Mux16.IN356
-memory[347][0] => Mux24.IN356
-memory[347][1] => Mux15.IN356
-memory[347][1] => Mux23.IN356
-memory[347][2] => Mux14.IN356
-memory[347][2] => Mux22.IN356
-memory[347][3] => Mux13.IN356
-memory[347][3] => Mux21.IN356
-memory[347][4] => Mux12.IN356
-memory[347][4] => Mux20.IN356
-memory[347][5] => Mux11.IN356
-memory[347][5] => Mux19.IN356
-memory[347][6] => Mux10.IN356
-memory[347][6] => Mux18.IN356
-memory[347][7] => Mux9.IN356
-memory[347][7] => Mux17.IN356
-memory[346][0] => Mux16.IN355
-memory[346][0] => Mux24.IN355
-memory[346][1] => Mux15.IN355
-memory[346][1] => Mux23.IN355
-memory[346][2] => Mux14.IN355
-memory[346][2] => Mux22.IN355
-memory[346][3] => Mux13.IN355
-memory[346][3] => Mux21.IN355
-memory[346][4] => Mux12.IN355
-memory[346][4] => Mux20.IN355
-memory[346][5] => Mux11.IN355
-memory[346][5] => Mux19.IN355
-memory[346][6] => Mux10.IN355
-memory[346][6] => Mux18.IN355
-memory[346][7] => Mux9.IN355
-memory[346][7] => Mux17.IN355
-memory[345][0] => Mux16.IN354
-memory[345][0] => Mux24.IN354
-memory[345][1] => Mux15.IN354
-memory[345][1] => Mux23.IN354
-memory[345][2] => Mux14.IN354
-memory[345][2] => Mux22.IN354
-memory[345][3] => Mux13.IN354
-memory[345][3] => Mux21.IN354
-memory[345][4] => Mux12.IN354
-memory[345][4] => Mux20.IN354
-memory[345][5] => Mux11.IN354
-memory[345][5] => Mux19.IN354
-memory[345][6] => Mux10.IN354
-memory[345][6] => Mux18.IN354
-memory[345][7] => Mux9.IN354
-memory[345][7] => Mux17.IN354
-memory[344][0] => Mux16.IN353
-memory[344][0] => Mux24.IN353
-memory[344][1] => Mux15.IN353
-memory[344][1] => Mux23.IN353
-memory[344][2] => Mux14.IN353
-memory[344][2] => Mux22.IN353
-memory[344][3] => Mux13.IN353
-memory[344][3] => Mux21.IN353
-memory[344][4] => Mux12.IN353
-memory[344][4] => Mux20.IN353
-memory[344][5] => Mux11.IN353
-memory[344][5] => Mux19.IN353
-memory[344][6] => Mux10.IN353
-memory[344][6] => Mux18.IN353
-memory[344][7] => Mux9.IN353
-memory[344][7] => Mux17.IN353
-memory[343][0] => Mux16.IN352
-memory[343][0] => Mux24.IN352
-memory[343][1] => Mux15.IN352
-memory[343][1] => Mux23.IN352
-memory[343][2] => Mux14.IN352
-memory[343][2] => Mux22.IN352
-memory[343][3] => Mux13.IN352
-memory[343][3] => Mux21.IN352
-memory[343][4] => Mux12.IN352
-memory[343][4] => Mux20.IN352
-memory[343][5] => Mux11.IN352
-memory[343][5] => Mux19.IN352
-memory[343][6] => Mux10.IN352
-memory[343][6] => Mux18.IN352
-memory[343][7] => Mux9.IN352
-memory[343][7] => Mux17.IN352
-memory[342][0] => Mux16.IN351
-memory[342][0] => Mux24.IN351
-memory[342][1] => Mux15.IN351
-memory[342][1] => Mux23.IN351
-memory[342][2] => Mux14.IN351
-memory[342][2] => Mux22.IN351
-memory[342][3] => Mux13.IN351
-memory[342][3] => Mux21.IN351
-memory[342][4] => Mux12.IN351
-memory[342][4] => Mux20.IN351
-memory[342][5] => Mux11.IN351
-memory[342][5] => Mux19.IN351
-memory[342][6] => Mux10.IN351
-memory[342][6] => Mux18.IN351
-memory[342][7] => Mux9.IN351
-memory[342][7] => Mux17.IN351
-memory[341][0] => Mux16.IN350
-memory[341][0] => Mux24.IN350
-memory[341][1] => Mux15.IN350
-memory[341][1] => Mux23.IN350
-memory[341][2] => Mux14.IN350
-memory[341][2] => Mux22.IN350
-memory[341][3] => Mux13.IN350
-memory[341][3] => Mux21.IN350
-memory[341][4] => Mux12.IN350
-memory[341][4] => Mux20.IN350
-memory[341][5] => Mux11.IN350
-memory[341][5] => Mux19.IN350
-memory[341][6] => Mux10.IN350
-memory[341][6] => Mux18.IN350
-memory[341][7] => Mux9.IN350
-memory[341][7] => Mux17.IN350
-memory[340][0] => Mux16.IN349
-memory[340][0] => Mux24.IN349
-memory[340][1] => Mux15.IN349
-memory[340][1] => Mux23.IN349
-memory[340][2] => Mux14.IN349
-memory[340][2] => Mux22.IN349
-memory[340][3] => Mux13.IN349
-memory[340][3] => Mux21.IN349
-memory[340][4] => Mux12.IN349
-memory[340][4] => Mux20.IN349
-memory[340][5] => Mux11.IN349
-memory[340][5] => Mux19.IN349
-memory[340][6] => Mux10.IN349
-memory[340][6] => Mux18.IN349
-memory[340][7] => Mux9.IN349
-memory[340][7] => Mux17.IN349
-memory[339][0] => Mux16.IN348
-memory[339][0] => Mux24.IN348
-memory[339][1] => Mux15.IN348
-memory[339][1] => Mux23.IN348
-memory[339][2] => Mux14.IN348
-memory[339][2] => Mux22.IN348
-memory[339][3] => Mux13.IN348
-memory[339][3] => Mux21.IN348
-memory[339][4] => Mux12.IN348
-memory[339][4] => Mux20.IN348
-memory[339][5] => Mux11.IN348
-memory[339][5] => Mux19.IN348
-memory[339][6] => Mux10.IN348
-memory[339][6] => Mux18.IN348
-memory[339][7] => Mux9.IN348
-memory[339][7] => Mux17.IN348
-memory[338][0] => Mux16.IN347
-memory[338][0] => Mux24.IN347
-memory[338][1] => Mux15.IN347
-memory[338][1] => Mux23.IN347
-memory[338][2] => Mux14.IN347
-memory[338][2] => Mux22.IN347
-memory[338][3] => Mux13.IN347
-memory[338][3] => Mux21.IN347
-memory[338][4] => Mux12.IN347
-memory[338][4] => Mux20.IN347
-memory[338][5] => Mux11.IN347
-memory[338][5] => Mux19.IN347
-memory[338][6] => Mux10.IN347
-memory[338][6] => Mux18.IN347
-memory[338][7] => Mux9.IN347
-memory[338][7] => Mux17.IN347
-memory[337][0] => Mux16.IN346
-memory[337][0] => Mux24.IN346
-memory[337][1] => Mux15.IN346
-memory[337][1] => Mux23.IN346
-memory[337][2] => Mux14.IN346
-memory[337][2] => Mux22.IN346
-memory[337][3] => Mux13.IN346
-memory[337][3] => Mux21.IN346
-memory[337][4] => Mux12.IN346
-memory[337][4] => Mux20.IN346
-memory[337][5] => Mux11.IN346
-memory[337][5] => Mux19.IN346
-memory[337][6] => Mux10.IN346
-memory[337][6] => Mux18.IN346
-memory[337][7] => Mux9.IN346
-memory[337][7] => Mux17.IN346
-memory[336][0] => Mux16.IN345
-memory[336][0] => Mux24.IN345
-memory[336][1] => Mux15.IN345
-memory[336][1] => Mux23.IN345
-memory[336][2] => Mux14.IN345
-memory[336][2] => Mux22.IN345
-memory[336][3] => Mux13.IN345
-memory[336][3] => Mux21.IN345
-memory[336][4] => Mux12.IN345
-memory[336][4] => Mux20.IN345
-memory[336][5] => Mux11.IN345
-memory[336][5] => Mux19.IN345
-memory[336][6] => Mux10.IN345
-memory[336][6] => Mux18.IN345
-memory[336][7] => Mux9.IN345
-memory[336][7] => Mux17.IN345
-memory[335][0] => Mux16.IN344
-memory[335][0] => Mux24.IN344
-memory[335][1] => Mux15.IN344
-memory[335][1] => Mux23.IN344
-memory[335][2] => Mux14.IN344
-memory[335][2] => Mux22.IN344
-memory[335][3] => Mux13.IN344
-memory[335][3] => Mux21.IN344
-memory[335][4] => Mux12.IN344
-memory[335][4] => Mux20.IN344
-memory[335][5] => Mux11.IN344
-memory[335][5] => Mux19.IN344
-memory[335][6] => Mux10.IN344
-memory[335][6] => Mux18.IN344
-memory[335][7] => Mux9.IN344
-memory[335][7] => Mux17.IN344
-memory[334][0] => Mux16.IN343
-memory[334][0] => Mux24.IN343
-memory[334][1] => Mux15.IN343
-memory[334][1] => Mux23.IN343
-memory[334][2] => Mux14.IN343
-memory[334][2] => Mux22.IN343
-memory[334][3] => Mux13.IN343
-memory[334][3] => Mux21.IN343
-memory[334][4] => Mux12.IN343
-memory[334][4] => Mux20.IN343
-memory[334][5] => Mux11.IN343
-memory[334][5] => Mux19.IN343
-memory[334][6] => Mux10.IN343
-memory[334][6] => Mux18.IN343
-memory[334][7] => Mux9.IN343
-memory[334][7] => Mux17.IN343
-memory[333][0] => Mux16.IN342
-memory[333][0] => Mux24.IN342
-memory[333][1] => Mux15.IN342
-memory[333][1] => Mux23.IN342
-memory[333][2] => Mux14.IN342
-memory[333][2] => Mux22.IN342
-memory[333][3] => Mux13.IN342
-memory[333][3] => Mux21.IN342
-memory[333][4] => Mux12.IN342
-memory[333][4] => Mux20.IN342
-memory[333][5] => Mux11.IN342
-memory[333][5] => Mux19.IN342
-memory[333][6] => Mux10.IN342
-memory[333][6] => Mux18.IN342
-memory[333][7] => Mux9.IN342
-memory[333][7] => Mux17.IN342
-memory[332][0] => Mux16.IN341
-memory[332][0] => Mux24.IN341
-memory[332][1] => Mux15.IN341
-memory[332][1] => Mux23.IN341
-memory[332][2] => Mux14.IN341
-memory[332][2] => Mux22.IN341
-memory[332][3] => Mux13.IN341
-memory[332][3] => Mux21.IN341
-memory[332][4] => Mux12.IN341
-memory[332][4] => Mux20.IN341
-memory[332][5] => Mux11.IN341
-memory[332][5] => Mux19.IN341
-memory[332][6] => Mux10.IN341
-memory[332][6] => Mux18.IN341
-memory[332][7] => Mux9.IN341
-memory[332][7] => Mux17.IN341
-memory[331][0] => Mux16.IN340
-memory[331][0] => Mux24.IN340
-memory[331][1] => Mux15.IN340
-memory[331][1] => Mux23.IN340
-memory[331][2] => Mux14.IN340
-memory[331][2] => Mux22.IN340
-memory[331][3] => Mux13.IN340
-memory[331][3] => Mux21.IN340
-memory[331][4] => Mux12.IN340
-memory[331][4] => Mux20.IN340
-memory[331][5] => Mux11.IN340
-memory[331][5] => Mux19.IN340
-memory[331][6] => Mux10.IN340
-memory[331][6] => Mux18.IN340
-memory[331][7] => Mux9.IN340
-memory[331][7] => Mux17.IN340
-memory[330][0] => Mux16.IN339
-memory[330][0] => Mux24.IN339
-memory[330][1] => Mux15.IN339
-memory[330][1] => Mux23.IN339
-memory[330][2] => Mux14.IN339
-memory[330][2] => Mux22.IN339
-memory[330][3] => Mux13.IN339
-memory[330][3] => Mux21.IN339
-memory[330][4] => Mux12.IN339
-memory[330][4] => Mux20.IN339
-memory[330][5] => Mux11.IN339
-memory[330][5] => Mux19.IN339
-memory[330][6] => Mux10.IN339
-memory[330][6] => Mux18.IN339
-memory[330][7] => Mux9.IN339
-memory[330][7] => Mux17.IN339
-memory[329][0] => Mux16.IN338
-memory[329][0] => Mux24.IN338
-memory[329][1] => Mux15.IN338
-memory[329][1] => Mux23.IN338
-memory[329][2] => Mux14.IN338
-memory[329][2] => Mux22.IN338
-memory[329][3] => Mux13.IN338
-memory[329][3] => Mux21.IN338
-memory[329][4] => Mux12.IN338
-memory[329][4] => Mux20.IN338
-memory[329][5] => Mux11.IN338
-memory[329][5] => Mux19.IN338
-memory[329][6] => Mux10.IN338
-memory[329][6] => Mux18.IN338
-memory[329][7] => Mux9.IN338
-memory[329][7] => Mux17.IN338
-memory[328][0] => Mux16.IN337
-memory[328][0] => Mux24.IN337
-memory[328][1] => Mux15.IN337
-memory[328][1] => Mux23.IN337
-memory[328][2] => Mux14.IN337
-memory[328][2] => Mux22.IN337
-memory[328][3] => Mux13.IN337
-memory[328][3] => Mux21.IN337
-memory[328][4] => Mux12.IN337
-memory[328][4] => Mux20.IN337
-memory[328][5] => Mux11.IN337
-memory[328][5] => Mux19.IN337
-memory[328][6] => Mux10.IN337
-memory[328][6] => Mux18.IN337
-memory[328][7] => Mux9.IN337
-memory[328][7] => Mux17.IN337
-memory[327][0] => Mux16.IN336
-memory[327][0] => Mux24.IN336
-memory[327][1] => Mux15.IN336
-memory[327][1] => Mux23.IN336
-memory[327][2] => Mux14.IN336
-memory[327][2] => Mux22.IN336
-memory[327][3] => Mux13.IN336
-memory[327][3] => Mux21.IN336
-memory[327][4] => Mux12.IN336
-memory[327][4] => Mux20.IN336
-memory[327][5] => Mux11.IN336
-memory[327][5] => Mux19.IN336
-memory[327][6] => Mux10.IN336
-memory[327][6] => Mux18.IN336
-memory[327][7] => Mux9.IN336
-memory[327][7] => Mux17.IN336
-memory[326][0] => Mux16.IN335
-memory[326][0] => Mux24.IN335
-memory[326][1] => Mux15.IN335
-memory[326][1] => Mux23.IN335
-memory[326][2] => Mux14.IN335
-memory[326][2] => Mux22.IN335
-memory[326][3] => Mux13.IN335
-memory[326][3] => Mux21.IN335
-memory[326][4] => Mux12.IN335
-memory[326][4] => Mux20.IN335
-memory[326][5] => Mux11.IN335
-memory[326][5] => Mux19.IN335
-memory[326][6] => Mux10.IN335
-memory[326][6] => Mux18.IN335
-memory[326][7] => Mux9.IN335
-memory[326][7] => Mux17.IN335
-memory[325][0] => Mux16.IN334
-memory[325][0] => Mux24.IN334
-memory[325][1] => Mux15.IN334
-memory[325][1] => Mux23.IN334
-memory[325][2] => Mux14.IN334
-memory[325][2] => Mux22.IN334
-memory[325][3] => Mux13.IN334
-memory[325][3] => Mux21.IN334
-memory[325][4] => Mux12.IN334
-memory[325][4] => Mux20.IN334
-memory[325][5] => Mux11.IN334
-memory[325][5] => Mux19.IN334
-memory[325][6] => Mux10.IN334
-memory[325][6] => Mux18.IN334
-memory[325][7] => Mux9.IN334
-memory[325][7] => Mux17.IN334
-memory[324][0] => Mux16.IN333
-memory[324][0] => Mux24.IN333
-memory[324][1] => Mux15.IN333
-memory[324][1] => Mux23.IN333
-memory[324][2] => Mux14.IN333
-memory[324][2] => Mux22.IN333
-memory[324][3] => Mux13.IN333
-memory[324][3] => Mux21.IN333
-memory[324][4] => Mux12.IN333
-memory[324][4] => Mux20.IN333
-memory[324][5] => Mux11.IN333
-memory[324][5] => Mux19.IN333
-memory[324][6] => Mux10.IN333
-memory[324][6] => Mux18.IN333
-memory[324][7] => Mux9.IN333
-memory[324][7] => Mux17.IN333
-memory[323][0] => Mux16.IN332
-memory[323][0] => Mux24.IN332
-memory[323][1] => Mux15.IN332
-memory[323][1] => Mux23.IN332
-memory[323][2] => Mux14.IN332
-memory[323][2] => Mux22.IN332
-memory[323][3] => Mux13.IN332
-memory[323][3] => Mux21.IN332
-memory[323][4] => Mux12.IN332
-memory[323][4] => Mux20.IN332
-memory[323][5] => Mux11.IN332
-memory[323][5] => Mux19.IN332
-memory[323][6] => Mux10.IN332
-memory[323][6] => Mux18.IN332
-memory[323][7] => Mux9.IN332
-memory[323][7] => Mux17.IN332
-memory[322][0] => Mux16.IN331
-memory[322][0] => Mux24.IN331
-memory[322][1] => Mux15.IN331
-memory[322][1] => Mux23.IN331
-memory[322][2] => Mux14.IN331
-memory[322][2] => Mux22.IN331
-memory[322][3] => Mux13.IN331
-memory[322][3] => Mux21.IN331
-memory[322][4] => Mux12.IN331
-memory[322][4] => Mux20.IN331
-memory[322][5] => Mux11.IN331
-memory[322][5] => Mux19.IN331
-memory[322][6] => Mux10.IN331
-memory[322][6] => Mux18.IN331
-memory[322][7] => Mux9.IN331
-memory[322][7] => Mux17.IN331
-memory[321][0] => Mux16.IN330
-memory[321][0] => Mux24.IN330
-memory[321][1] => Mux15.IN330
-memory[321][1] => Mux23.IN330
-memory[321][2] => Mux14.IN330
-memory[321][2] => Mux22.IN330
-memory[321][3] => Mux13.IN330
-memory[321][3] => Mux21.IN330
-memory[321][4] => Mux12.IN330
-memory[321][4] => Mux20.IN330
-memory[321][5] => Mux11.IN330
-memory[321][5] => Mux19.IN330
-memory[321][6] => Mux10.IN330
-memory[321][6] => Mux18.IN330
-memory[321][7] => Mux9.IN330
-memory[321][7] => Mux17.IN330
-memory[320][0] => Mux16.IN329
-memory[320][0] => Mux24.IN329
-memory[320][1] => Mux15.IN329
-memory[320][1] => Mux23.IN329
-memory[320][2] => Mux14.IN329
-memory[320][2] => Mux22.IN329
-memory[320][3] => Mux13.IN329
-memory[320][3] => Mux21.IN329
-memory[320][4] => Mux12.IN329
-memory[320][4] => Mux20.IN329
-memory[320][5] => Mux11.IN329
-memory[320][5] => Mux19.IN329
-memory[320][6] => Mux10.IN329
-memory[320][6] => Mux18.IN329
-memory[320][7] => Mux9.IN329
-memory[320][7] => Mux17.IN329
-memory[319][0] => Mux16.IN328
-memory[319][0] => Mux24.IN328
-memory[319][1] => Mux15.IN328
-memory[319][1] => Mux23.IN328
-memory[319][2] => Mux14.IN328
-memory[319][2] => Mux22.IN328
-memory[319][3] => Mux13.IN328
-memory[319][3] => Mux21.IN328
-memory[319][4] => Mux12.IN328
-memory[319][4] => Mux20.IN328
-memory[319][5] => Mux11.IN328
-memory[319][5] => Mux19.IN328
-memory[319][6] => Mux10.IN328
-memory[319][6] => Mux18.IN328
-memory[319][7] => Mux9.IN328
-memory[319][7] => Mux17.IN328
-memory[318][0] => Mux16.IN327
-memory[318][0] => Mux24.IN327
-memory[318][1] => Mux15.IN327
-memory[318][1] => Mux23.IN327
-memory[318][2] => Mux14.IN327
-memory[318][2] => Mux22.IN327
-memory[318][3] => Mux13.IN327
-memory[318][3] => Mux21.IN327
-memory[318][4] => Mux12.IN327
-memory[318][4] => Mux20.IN327
-memory[318][5] => Mux11.IN327
-memory[318][5] => Mux19.IN327
-memory[318][6] => Mux10.IN327
-memory[318][6] => Mux18.IN327
-memory[318][7] => Mux9.IN327
-memory[318][7] => Mux17.IN327
-memory[317][0] => Mux16.IN326
-memory[317][0] => Mux24.IN326
-memory[317][1] => Mux15.IN326
-memory[317][1] => Mux23.IN326
-memory[317][2] => Mux14.IN326
-memory[317][2] => Mux22.IN326
-memory[317][3] => Mux13.IN326
-memory[317][3] => Mux21.IN326
-memory[317][4] => Mux12.IN326
-memory[317][4] => Mux20.IN326
-memory[317][5] => Mux11.IN326
-memory[317][5] => Mux19.IN326
-memory[317][6] => Mux10.IN326
-memory[317][6] => Mux18.IN326
-memory[317][7] => Mux9.IN326
-memory[317][7] => Mux17.IN326
-memory[316][0] => Mux16.IN325
-memory[316][0] => Mux24.IN325
-memory[316][1] => Mux15.IN325
-memory[316][1] => Mux23.IN325
-memory[316][2] => Mux14.IN325
-memory[316][2] => Mux22.IN325
-memory[316][3] => Mux13.IN325
-memory[316][3] => Mux21.IN325
-memory[316][4] => Mux12.IN325
-memory[316][4] => Mux20.IN325
-memory[316][5] => Mux11.IN325
-memory[316][5] => Mux19.IN325
-memory[316][6] => Mux10.IN325
-memory[316][6] => Mux18.IN325
-memory[316][7] => Mux9.IN325
-memory[316][7] => Mux17.IN325
-memory[315][0] => Mux16.IN324
-memory[315][0] => Mux24.IN324
-memory[315][1] => Mux15.IN324
-memory[315][1] => Mux23.IN324
-memory[315][2] => Mux14.IN324
-memory[315][2] => Mux22.IN324
-memory[315][3] => Mux13.IN324
-memory[315][3] => Mux21.IN324
-memory[315][4] => Mux12.IN324
-memory[315][4] => Mux20.IN324
-memory[315][5] => Mux11.IN324
-memory[315][5] => Mux19.IN324
-memory[315][6] => Mux10.IN324
-memory[315][6] => Mux18.IN324
-memory[315][7] => Mux9.IN324
-memory[315][7] => Mux17.IN324
-memory[314][0] => Mux16.IN323
-memory[314][0] => Mux24.IN323
-memory[314][1] => Mux15.IN323
-memory[314][1] => Mux23.IN323
-memory[314][2] => Mux14.IN323
-memory[314][2] => Mux22.IN323
-memory[314][3] => Mux13.IN323
-memory[314][3] => Mux21.IN323
-memory[314][4] => Mux12.IN323
-memory[314][4] => Mux20.IN323
-memory[314][5] => Mux11.IN323
-memory[314][5] => Mux19.IN323
-memory[314][6] => Mux10.IN323
-memory[314][6] => Mux18.IN323
-memory[314][7] => Mux9.IN323
-memory[314][7] => Mux17.IN323
-memory[313][0] => Mux16.IN322
-memory[313][0] => Mux24.IN322
-memory[313][1] => Mux15.IN322
-memory[313][1] => Mux23.IN322
-memory[313][2] => Mux14.IN322
-memory[313][2] => Mux22.IN322
-memory[313][3] => Mux13.IN322
-memory[313][3] => Mux21.IN322
-memory[313][4] => Mux12.IN322
-memory[313][4] => Mux20.IN322
-memory[313][5] => Mux11.IN322
-memory[313][5] => Mux19.IN322
-memory[313][6] => Mux10.IN322
-memory[313][6] => Mux18.IN322
-memory[313][7] => Mux9.IN322
-memory[313][7] => Mux17.IN322
-memory[312][0] => Mux16.IN321
-memory[312][0] => Mux24.IN321
-memory[312][1] => Mux15.IN321
-memory[312][1] => Mux23.IN321
-memory[312][2] => Mux14.IN321
-memory[312][2] => Mux22.IN321
-memory[312][3] => Mux13.IN321
-memory[312][3] => Mux21.IN321
-memory[312][4] => Mux12.IN321
-memory[312][4] => Mux20.IN321
-memory[312][5] => Mux11.IN321
-memory[312][5] => Mux19.IN321
-memory[312][6] => Mux10.IN321
-memory[312][6] => Mux18.IN321
-memory[312][7] => Mux9.IN321
-memory[312][7] => Mux17.IN321
-memory[311][0] => Mux16.IN320
-memory[311][0] => Mux24.IN320
-memory[311][1] => Mux15.IN320
-memory[311][1] => Mux23.IN320
-memory[311][2] => Mux14.IN320
-memory[311][2] => Mux22.IN320
-memory[311][3] => Mux13.IN320
-memory[311][3] => Mux21.IN320
-memory[311][4] => Mux12.IN320
-memory[311][4] => Mux20.IN320
-memory[311][5] => Mux11.IN320
-memory[311][5] => Mux19.IN320
-memory[311][6] => Mux10.IN320
-memory[311][6] => Mux18.IN320
-memory[311][7] => Mux9.IN320
-memory[311][7] => Mux17.IN320
-memory[310][0] => Mux16.IN319
-memory[310][0] => Mux24.IN319
-memory[310][1] => Mux15.IN319
-memory[310][1] => Mux23.IN319
-memory[310][2] => Mux14.IN319
-memory[310][2] => Mux22.IN319
-memory[310][3] => Mux13.IN319
-memory[310][3] => Mux21.IN319
-memory[310][4] => Mux12.IN319
-memory[310][4] => Mux20.IN319
-memory[310][5] => Mux11.IN319
-memory[310][5] => Mux19.IN319
-memory[310][6] => Mux10.IN319
-memory[310][6] => Mux18.IN319
-memory[310][7] => Mux9.IN319
-memory[310][7] => Mux17.IN319
-memory[309][0] => Mux16.IN318
-memory[309][0] => Mux24.IN318
-memory[309][1] => Mux15.IN318
-memory[309][1] => Mux23.IN318
-memory[309][2] => Mux14.IN318
-memory[309][2] => Mux22.IN318
-memory[309][3] => Mux13.IN318
-memory[309][3] => Mux21.IN318
-memory[309][4] => Mux12.IN318
-memory[309][4] => Mux20.IN318
-memory[309][5] => Mux11.IN318
-memory[309][5] => Mux19.IN318
-memory[309][6] => Mux10.IN318
-memory[309][6] => Mux18.IN318
-memory[309][7] => Mux9.IN318
-memory[309][7] => Mux17.IN318
-memory[308][0] => Mux16.IN317
-memory[308][0] => Mux24.IN317
-memory[308][1] => Mux15.IN317
-memory[308][1] => Mux23.IN317
-memory[308][2] => Mux14.IN317
-memory[308][2] => Mux22.IN317
-memory[308][3] => Mux13.IN317
-memory[308][3] => Mux21.IN317
-memory[308][4] => Mux12.IN317
-memory[308][4] => Mux20.IN317
-memory[308][5] => Mux11.IN317
-memory[308][5] => Mux19.IN317
-memory[308][6] => Mux10.IN317
-memory[308][6] => Mux18.IN317
-memory[308][7] => Mux9.IN317
-memory[308][7] => Mux17.IN317
-memory[307][0] => Mux16.IN316
-memory[307][0] => Mux24.IN316
-memory[307][1] => Mux15.IN316
-memory[307][1] => Mux23.IN316
-memory[307][2] => Mux14.IN316
-memory[307][2] => Mux22.IN316
-memory[307][3] => Mux13.IN316
-memory[307][3] => Mux21.IN316
-memory[307][4] => Mux12.IN316
-memory[307][4] => Mux20.IN316
-memory[307][5] => Mux11.IN316
-memory[307][5] => Mux19.IN316
-memory[307][6] => Mux10.IN316
-memory[307][6] => Mux18.IN316
-memory[307][7] => Mux9.IN316
-memory[307][7] => Mux17.IN316
-memory[306][0] => Mux16.IN315
-memory[306][0] => Mux24.IN315
-memory[306][1] => Mux15.IN315
-memory[306][1] => Mux23.IN315
-memory[306][2] => Mux14.IN315
-memory[306][2] => Mux22.IN315
-memory[306][3] => Mux13.IN315
-memory[306][3] => Mux21.IN315
-memory[306][4] => Mux12.IN315
-memory[306][4] => Mux20.IN315
-memory[306][5] => Mux11.IN315
-memory[306][5] => Mux19.IN315
-memory[306][6] => Mux10.IN315
-memory[306][6] => Mux18.IN315
-memory[306][7] => Mux9.IN315
-memory[306][7] => Mux17.IN315
-memory[305][0] => Mux16.IN314
-memory[305][0] => Mux24.IN314
-memory[305][1] => Mux15.IN314
-memory[305][1] => Mux23.IN314
-memory[305][2] => Mux14.IN314
-memory[305][2] => Mux22.IN314
-memory[305][3] => Mux13.IN314
-memory[305][3] => Mux21.IN314
-memory[305][4] => Mux12.IN314
-memory[305][4] => Mux20.IN314
-memory[305][5] => Mux11.IN314
-memory[305][5] => Mux19.IN314
-memory[305][6] => Mux10.IN314
-memory[305][6] => Mux18.IN314
-memory[305][7] => Mux9.IN314
-memory[305][7] => Mux17.IN314
-memory[304][0] => Mux16.IN313
-memory[304][0] => Mux24.IN313
-memory[304][1] => Mux15.IN313
-memory[304][1] => Mux23.IN313
-memory[304][2] => Mux14.IN313
-memory[304][2] => Mux22.IN313
-memory[304][3] => Mux13.IN313
-memory[304][3] => Mux21.IN313
-memory[304][4] => Mux12.IN313
-memory[304][4] => Mux20.IN313
-memory[304][5] => Mux11.IN313
-memory[304][5] => Mux19.IN313
-memory[304][6] => Mux10.IN313
-memory[304][6] => Mux18.IN313
-memory[304][7] => Mux9.IN313
-memory[304][7] => Mux17.IN313
-memory[303][0] => Mux16.IN312
-memory[303][0] => Mux24.IN312
-memory[303][1] => Mux15.IN312
-memory[303][1] => Mux23.IN312
-memory[303][2] => Mux14.IN312
-memory[303][2] => Mux22.IN312
-memory[303][3] => Mux13.IN312
-memory[303][3] => Mux21.IN312
-memory[303][4] => Mux12.IN312
-memory[303][4] => Mux20.IN312
-memory[303][5] => Mux11.IN312
-memory[303][5] => Mux19.IN312
-memory[303][6] => Mux10.IN312
-memory[303][6] => Mux18.IN312
-memory[303][7] => Mux9.IN312
-memory[303][7] => Mux17.IN312
-memory[302][0] => Mux16.IN311
-memory[302][0] => Mux24.IN311
-memory[302][1] => Mux15.IN311
-memory[302][1] => Mux23.IN311
-memory[302][2] => Mux14.IN311
-memory[302][2] => Mux22.IN311
-memory[302][3] => Mux13.IN311
-memory[302][3] => Mux21.IN311
-memory[302][4] => Mux12.IN311
-memory[302][4] => Mux20.IN311
-memory[302][5] => Mux11.IN311
-memory[302][5] => Mux19.IN311
-memory[302][6] => Mux10.IN311
-memory[302][6] => Mux18.IN311
-memory[302][7] => Mux9.IN311
-memory[302][7] => Mux17.IN311
-memory[301][0] => Mux16.IN310
-memory[301][0] => Mux24.IN310
-memory[301][1] => Mux15.IN310
-memory[301][1] => Mux23.IN310
-memory[301][2] => Mux14.IN310
-memory[301][2] => Mux22.IN310
-memory[301][3] => Mux13.IN310
-memory[301][3] => Mux21.IN310
-memory[301][4] => Mux12.IN310
-memory[301][4] => Mux20.IN310
-memory[301][5] => Mux11.IN310
-memory[301][5] => Mux19.IN310
-memory[301][6] => Mux10.IN310
-memory[301][6] => Mux18.IN310
-memory[301][7] => Mux9.IN310
-memory[301][7] => Mux17.IN310
-memory[300][0] => Mux16.IN309
-memory[300][0] => Mux24.IN309
-memory[300][1] => Mux15.IN309
-memory[300][1] => Mux23.IN309
-memory[300][2] => Mux14.IN309
-memory[300][2] => Mux22.IN309
-memory[300][3] => Mux13.IN309
-memory[300][3] => Mux21.IN309
-memory[300][4] => Mux12.IN309
-memory[300][4] => Mux20.IN309
-memory[300][5] => Mux11.IN309
-memory[300][5] => Mux19.IN309
-memory[300][6] => Mux10.IN309
-memory[300][6] => Mux18.IN309
-memory[300][7] => Mux9.IN309
-memory[300][7] => Mux17.IN309
-memory[299][0] => Mux16.IN308
-memory[299][0] => Mux24.IN308
-memory[299][1] => Mux15.IN308
-memory[299][1] => Mux23.IN308
-memory[299][2] => Mux14.IN308
-memory[299][2] => Mux22.IN308
-memory[299][3] => Mux13.IN308
-memory[299][3] => Mux21.IN308
-memory[299][4] => Mux12.IN308
-memory[299][4] => Mux20.IN308
-memory[299][5] => Mux11.IN308
-memory[299][5] => Mux19.IN308
-memory[299][6] => Mux10.IN308
-memory[299][6] => Mux18.IN308
-memory[299][7] => Mux9.IN308
-memory[299][7] => Mux17.IN308
-memory[298][0] => Mux16.IN307
-memory[298][0] => Mux24.IN307
-memory[298][1] => Mux15.IN307
-memory[298][1] => Mux23.IN307
-memory[298][2] => Mux14.IN307
-memory[298][2] => Mux22.IN307
-memory[298][3] => Mux13.IN307
-memory[298][3] => Mux21.IN307
-memory[298][4] => Mux12.IN307
-memory[298][4] => Mux20.IN307
-memory[298][5] => Mux11.IN307
-memory[298][5] => Mux19.IN307
-memory[298][6] => Mux10.IN307
-memory[298][6] => Mux18.IN307
-memory[298][7] => Mux9.IN307
-memory[298][7] => Mux17.IN307
-memory[297][0] => Mux16.IN306
-memory[297][0] => Mux24.IN306
-memory[297][1] => Mux15.IN306
-memory[297][1] => Mux23.IN306
-memory[297][2] => Mux14.IN306
-memory[297][2] => Mux22.IN306
-memory[297][3] => Mux13.IN306
-memory[297][3] => Mux21.IN306
-memory[297][4] => Mux12.IN306
-memory[297][4] => Mux20.IN306
-memory[297][5] => Mux11.IN306
-memory[297][5] => Mux19.IN306
-memory[297][6] => Mux10.IN306
-memory[297][6] => Mux18.IN306
-memory[297][7] => Mux9.IN306
-memory[297][7] => Mux17.IN306
-memory[296][0] => Mux16.IN305
-memory[296][0] => Mux24.IN305
-memory[296][1] => Mux15.IN305
-memory[296][1] => Mux23.IN305
-memory[296][2] => Mux14.IN305
-memory[296][2] => Mux22.IN305
-memory[296][3] => Mux13.IN305
-memory[296][3] => Mux21.IN305
-memory[296][4] => Mux12.IN305
-memory[296][4] => Mux20.IN305
-memory[296][5] => Mux11.IN305
-memory[296][5] => Mux19.IN305
-memory[296][6] => Mux10.IN305
-memory[296][6] => Mux18.IN305
-memory[296][7] => Mux9.IN305
-memory[296][7] => Mux17.IN305
-memory[295][0] => Mux16.IN304
-memory[295][0] => Mux24.IN304
-memory[295][1] => Mux15.IN304
-memory[295][1] => Mux23.IN304
-memory[295][2] => Mux14.IN304
-memory[295][2] => Mux22.IN304
-memory[295][3] => Mux13.IN304
-memory[295][3] => Mux21.IN304
-memory[295][4] => Mux12.IN304
-memory[295][4] => Mux20.IN304
-memory[295][5] => Mux11.IN304
-memory[295][5] => Mux19.IN304
-memory[295][6] => Mux10.IN304
-memory[295][6] => Mux18.IN304
-memory[295][7] => Mux9.IN304
-memory[295][7] => Mux17.IN304
-memory[294][0] => Mux16.IN303
-memory[294][0] => Mux24.IN303
-memory[294][1] => Mux15.IN303
-memory[294][1] => Mux23.IN303
-memory[294][2] => Mux14.IN303
-memory[294][2] => Mux22.IN303
-memory[294][3] => Mux13.IN303
-memory[294][3] => Mux21.IN303
-memory[294][4] => Mux12.IN303
-memory[294][4] => Mux20.IN303
-memory[294][5] => Mux11.IN303
-memory[294][5] => Mux19.IN303
-memory[294][6] => Mux10.IN303
-memory[294][6] => Mux18.IN303
-memory[294][7] => Mux9.IN303
-memory[294][7] => Mux17.IN303
-memory[293][0] => Mux16.IN302
-memory[293][0] => Mux24.IN302
-memory[293][1] => Mux15.IN302
-memory[293][1] => Mux23.IN302
-memory[293][2] => Mux14.IN302
-memory[293][2] => Mux22.IN302
-memory[293][3] => Mux13.IN302
-memory[293][3] => Mux21.IN302
-memory[293][4] => Mux12.IN302
-memory[293][4] => Mux20.IN302
-memory[293][5] => Mux11.IN302
-memory[293][5] => Mux19.IN302
-memory[293][6] => Mux10.IN302
-memory[293][6] => Mux18.IN302
-memory[293][7] => Mux9.IN302
-memory[293][7] => Mux17.IN302
-memory[292][0] => Mux16.IN301
-memory[292][0] => Mux24.IN301
-memory[292][1] => Mux15.IN301
-memory[292][1] => Mux23.IN301
-memory[292][2] => Mux14.IN301
-memory[292][2] => Mux22.IN301
-memory[292][3] => Mux13.IN301
-memory[292][3] => Mux21.IN301
-memory[292][4] => Mux12.IN301
-memory[292][4] => Mux20.IN301
-memory[292][5] => Mux11.IN301
-memory[292][5] => Mux19.IN301
-memory[292][6] => Mux10.IN301
-memory[292][6] => Mux18.IN301
-memory[292][7] => Mux9.IN301
-memory[292][7] => Mux17.IN301
-memory[291][0] => Mux16.IN300
-memory[291][0] => Mux24.IN300
-memory[291][1] => Mux15.IN300
-memory[291][1] => Mux23.IN300
-memory[291][2] => Mux14.IN300
-memory[291][2] => Mux22.IN300
-memory[291][3] => Mux13.IN300
-memory[291][3] => Mux21.IN300
-memory[291][4] => Mux12.IN300
-memory[291][4] => Mux20.IN300
-memory[291][5] => Mux11.IN300
-memory[291][5] => Mux19.IN300
-memory[291][6] => Mux10.IN300
-memory[291][6] => Mux18.IN300
-memory[291][7] => Mux9.IN300
-memory[291][7] => Mux17.IN300
-memory[290][0] => Mux16.IN299
-memory[290][0] => Mux24.IN299
-memory[290][1] => Mux15.IN299
-memory[290][1] => Mux23.IN299
-memory[290][2] => Mux14.IN299
-memory[290][2] => Mux22.IN299
-memory[290][3] => Mux13.IN299
-memory[290][3] => Mux21.IN299
-memory[290][4] => Mux12.IN299
-memory[290][4] => Mux20.IN299
-memory[290][5] => Mux11.IN299
-memory[290][5] => Mux19.IN299
-memory[290][6] => Mux10.IN299
-memory[290][6] => Mux18.IN299
-memory[290][7] => Mux9.IN299
-memory[290][7] => Mux17.IN299
-memory[289][0] => Mux16.IN298
-memory[289][0] => Mux24.IN298
-memory[289][1] => Mux15.IN298
-memory[289][1] => Mux23.IN298
-memory[289][2] => Mux14.IN298
-memory[289][2] => Mux22.IN298
-memory[289][3] => Mux13.IN298
-memory[289][3] => Mux21.IN298
-memory[289][4] => Mux12.IN298
-memory[289][4] => Mux20.IN298
-memory[289][5] => Mux11.IN298
-memory[289][5] => Mux19.IN298
-memory[289][6] => Mux10.IN298
-memory[289][6] => Mux18.IN298
-memory[289][7] => Mux9.IN298
-memory[289][7] => Mux17.IN298
-memory[288][0] => Mux16.IN297
-memory[288][0] => Mux24.IN297
-memory[288][1] => Mux15.IN297
-memory[288][1] => Mux23.IN297
-memory[288][2] => Mux14.IN297
-memory[288][2] => Mux22.IN297
-memory[288][3] => Mux13.IN297
-memory[288][3] => Mux21.IN297
-memory[288][4] => Mux12.IN297
-memory[288][4] => Mux20.IN297
-memory[288][5] => Mux11.IN297
-memory[288][5] => Mux19.IN297
-memory[288][6] => Mux10.IN297
-memory[288][6] => Mux18.IN297
-memory[288][7] => Mux9.IN297
-memory[288][7] => Mux17.IN297
-memory[287][0] => Mux16.IN296
-memory[287][0] => Mux24.IN296
-memory[287][1] => Mux15.IN296
-memory[287][1] => Mux23.IN296
-memory[287][2] => Mux14.IN296
-memory[287][2] => Mux22.IN296
-memory[287][3] => Mux13.IN296
-memory[287][3] => Mux21.IN296
-memory[287][4] => Mux12.IN296
-memory[287][4] => Mux20.IN296
-memory[287][5] => Mux11.IN296
-memory[287][5] => Mux19.IN296
-memory[287][6] => Mux10.IN296
-memory[287][6] => Mux18.IN296
-memory[287][7] => Mux9.IN296
-memory[287][7] => Mux17.IN296
-memory[286][0] => Mux16.IN295
-memory[286][0] => Mux24.IN295
-memory[286][1] => Mux15.IN295
-memory[286][1] => Mux23.IN295
-memory[286][2] => Mux14.IN295
-memory[286][2] => Mux22.IN295
-memory[286][3] => Mux13.IN295
-memory[286][3] => Mux21.IN295
-memory[286][4] => Mux12.IN295
-memory[286][4] => Mux20.IN295
-memory[286][5] => Mux11.IN295
-memory[286][5] => Mux19.IN295
-memory[286][6] => Mux10.IN295
-memory[286][6] => Mux18.IN295
-memory[286][7] => Mux9.IN295
-memory[286][7] => Mux17.IN295
-memory[285][0] => Mux16.IN294
-memory[285][0] => Mux24.IN294
-memory[285][1] => Mux15.IN294
-memory[285][1] => Mux23.IN294
-memory[285][2] => Mux14.IN294
-memory[285][2] => Mux22.IN294
-memory[285][3] => Mux13.IN294
-memory[285][3] => Mux21.IN294
-memory[285][4] => Mux12.IN294
-memory[285][4] => Mux20.IN294
-memory[285][5] => Mux11.IN294
-memory[285][5] => Mux19.IN294
-memory[285][6] => Mux10.IN294
-memory[285][6] => Mux18.IN294
-memory[285][7] => Mux9.IN294
-memory[285][7] => Mux17.IN294
-memory[284][0] => Mux16.IN293
-memory[284][0] => Mux24.IN293
-memory[284][1] => Mux15.IN293
-memory[284][1] => Mux23.IN293
-memory[284][2] => Mux14.IN293
-memory[284][2] => Mux22.IN293
-memory[284][3] => Mux13.IN293
-memory[284][3] => Mux21.IN293
-memory[284][4] => Mux12.IN293
-memory[284][4] => Mux20.IN293
-memory[284][5] => Mux11.IN293
-memory[284][5] => Mux19.IN293
-memory[284][6] => Mux10.IN293
-memory[284][6] => Mux18.IN293
-memory[284][7] => Mux9.IN293
-memory[284][7] => Mux17.IN293
-memory[283][0] => Mux16.IN292
-memory[283][0] => Mux24.IN292
-memory[283][1] => Mux15.IN292
-memory[283][1] => Mux23.IN292
-memory[283][2] => Mux14.IN292
-memory[283][2] => Mux22.IN292
-memory[283][3] => Mux13.IN292
-memory[283][3] => Mux21.IN292
-memory[283][4] => Mux12.IN292
-memory[283][4] => Mux20.IN292
-memory[283][5] => Mux11.IN292
-memory[283][5] => Mux19.IN292
-memory[283][6] => Mux10.IN292
-memory[283][6] => Mux18.IN292
-memory[283][7] => Mux9.IN292
-memory[283][7] => Mux17.IN292
-memory[282][0] => Mux16.IN291
-memory[282][0] => Mux24.IN291
-memory[282][1] => Mux15.IN291
-memory[282][1] => Mux23.IN291
-memory[282][2] => Mux14.IN291
-memory[282][2] => Mux22.IN291
-memory[282][3] => Mux13.IN291
-memory[282][3] => Mux21.IN291
-memory[282][4] => Mux12.IN291
-memory[282][4] => Mux20.IN291
-memory[282][5] => Mux11.IN291
-memory[282][5] => Mux19.IN291
-memory[282][6] => Mux10.IN291
-memory[282][6] => Mux18.IN291
-memory[282][7] => Mux9.IN291
-memory[282][7] => Mux17.IN291
-memory[281][0] => Mux16.IN290
-memory[281][0] => Mux24.IN290
-memory[281][1] => Mux15.IN290
-memory[281][1] => Mux23.IN290
-memory[281][2] => Mux14.IN290
-memory[281][2] => Mux22.IN290
-memory[281][3] => Mux13.IN290
-memory[281][3] => Mux21.IN290
-memory[281][4] => Mux12.IN290
-memory[281][4] => Mux20.IN290
-memory[281][5] => Mux11.IN290
-memory[281][5] => Mux19.IN290
-memory[281][6] => Mux10.IN290
-memory[281][6] => Mux18.IN290
-memory[281][7] => Mux9.IN290
-memory[281][7] => Mux17.IN290
-memory[280][0] => Mux16.IN289
-memory[280][0] => Mux24.IN289
-memory[280][1] => Mux15.IN289
-memory[280][1] => Mux23.IN289
-memory[280][2] => Mux14.IN289
-memory[280][2] => Mux22.IN289
-memory[280][3] => Mux13.IN289
-memory[280][3] => Mux21.IN289
-memory[280][4] => Mux12.IN289
-memory[280][4] => Mux20.IN289
-memory[280][5] => Mux11.IN289
-memory[280][5] => Mux19.IN289
-memory[280][6] => Mux10.IN289
-memory[280][6] => Mux18.IN289
-memory[280][7] => Mux9.IN289
-memory[280][7] => Mux17.IN289
-memory[279][0] => Mux16.IN288
-memory[279][0] => Mux24.IN288
-memory[279][1] => Mux15.IN288
-memory[279][1] => Mux23.IN288
-memory[279][2] => Mux14.IN288
-memory[279][2] => Mux22.IN288
-memory[279][3] => Mux13.IN288
-memory[279][3] => Mux21.IN288
-memory[279][4] => Mux12.IN288
-memory[279][4] => Mux20.IN288
-memory[279][5] => Mux11.IN288
-memory[279][5] => Mux19.IN288
-memory[279][6] => Mux10.IN288
-memory[279][6] => Mux18.IN288
-memory[279][7] => Mux9.IN288
-memory[279][7] => Mux17.IN288
-memory[278][0] => Mux16.IN287
-memory[278][0] => Mux24.IN287
-memory[278][1] => Mux15.IN287
-memory[278][1] => Mux23.IN287
-memory[278][2] => Mux14.IN287
-memory[278][2] => Mux22.IN287
-memory[278][3] => Mux13.IN287
-memory[278][3] => Mux21.IN287
-memory[278][4] => Mux12.IN287
-memory[278][4] => Mux20.IN287
-memory[278][5] => Mux11.IN287
-memory[278][5] => Mux19.IN287
-memory[278][6] => Mux10.IN287
-memory[278][6] => Mux18.IN287
-memory[278][7] => Mux9.IN287
-memory[278][7] => Mux17.IN287
-memory[277][0] => Mux16.IN286
-memory[277][0] => Mux24.IN286
-memory[277][1] => Mux15.IN286
-memory[277][1] => Mux23.IN286
-memory[277][2] => Mux14.IN286
-memory[277][2] => Mux22.IN286
-memory[277][3] => Mux13.IN286
-memory[277][3] => Mux21.IN286
-memory[277][4] => Mux12.IN286
-memory[277][4] => Mux20.IN286
-memory[277][5] => Mux11.IN286
-memory[277][5] => Mux19.IN286
-memory[277][6] => Mux10.IN286
-memory[277][6] => Mux18.IN286
-memory[277][7] => Mux9.IN286
-memory[277][7] => Mux17.IN286
-memory[276][0] => Mux16.IN285
-memory[276][0] => Mux24.IN285
-memory[276][1] => Mux15.IN285
-memory[276][1] => Mux23.IN285
-memory[276][2] => Mux14.IN285
-memory[276][2] => Mux22.IN285
-memory[276][3] => Mux13.IN285
-memory[276][3] => Mux21.IN285
-memory[276][4] => Mux12.IN285
-memory[276][4] => Mux20.IN285
-memory[276][5] => Mux11.IN285
-memory[276][5] => Mux19.IN285
-memory[276][6] => Mux10.IN285
-memory[276][6] => Mux18.IN285
-memory[276][7] => Mux9.IN285
-memory[276][7] => Mux17.IN285
-memory[275][0] => Mux16.IN284
-memory[275][0] => Mux24.IN284
-memory[275][1] => Mux15.IN284
-memory[275][1] => Mux23.IN284
-memory[275][2] => Mux14.IN284
-memory[275][2] => Mux22.IN284
-memory[275][3] => Mux13.IN284
-memory[275][3] => Mux21.IN284
-memory[275][4] => Mux12.IN284
-memory[275][4] => Mux20.IN284
-memory[275][5] => Mux11.IN284
-memory[275][5] => Mux19.IN284
-memory[275][6] => Mux10.IN284
-memory[275][6] => Mux18.IN284
-memory[275][7] => Mux9.IN284
-memory[275][7] => Mux17.IN284
-memory[274][0] => Mux16.IN283
-memory[274][0] => Mux24.IN283
-memory[274][1] => Mux15.IN283
-memory[274][1] => Mux23.IN283
-memory[274][2] => Mux14.IN283
-memory[274][2] => Mux22.IN283
-memory[274][3] => Mux13.IN283
-memory[274][3] => Mux21.IN283
-memory[274][4] => Mux12.IN283
-memory[274][4] => Mux20.IN283
-memory[274][5] => Mux11.IN283
-memory[274][5] => Mux19.IN283
-memory[274][6] => Mux10.IN283
-memory[274][6] => Mux18.IN283
-memory[274][7] => Mux9.IN283
-memory[274][7] => Mux17.IN283
-memory[273][0] => Mux16.IN282
-memory[273][0] => Mux24.IN282
-memory[273][1] => Mux15.IN282
-memory[273][1] => Mux23.IN282
-memory[273][2] => Mux14.IN282
-memory[273][2] => Mux22.IN282
-memory[273][3] => Mux13.IN282
-memory[273][3] => Mux21.IN282
-memory[273][4] => Mux12.IN282
-memory[273][4] => Mux20.IN282
-memory[273][5] => Mux11.IN282
-memory[273][5] => Mux19.IN282
-memory[273][6] => Mux10.IN282
-memory[273][6] => Mux18.IN282
-memory[273][7] => Mux9.IN282
-memory[273][7] => Mux17.IN282
-memory[272][0] => Mux16.IN281
-memory[272][0] => Mux24.IN281
-memory[272][1] => Mux15.IN281
-memory[272][1] => Mux23.IN281
-memory[272][2] => Mux14.IN281
-memory[272][2] => Mux22.IN281
-memory[272][3] => Mux13.IN281
-memory[272][3] => Mux21.IN281
-memory[272][4] => Mux12.IN281
-memory[272][4] => Mux20.IN281
-memory[272][5] => Mux11.IN281
-memory[272][5] => Mux19.IN281
-memory[272][6] => Mux10.IN281
-memory[272][6] => Mux18.IN281
-memory[272][7] => Mux9.IN281
-memory[272][7] => Mux17.IN281
-memory[271][0] => Mux16.IN280
-memory[271][0] => Mux24.IN280
-memory[271][1] => Mux15.IN280
-memory[271][1] => Mux23.IN280
-memory[271][2] => Mux14.IN280
-memory[271][2] => Mux22.IN280
-memory[271][3] => Mux13.IN280
-memory[271][3] => Mux21.IN280
-memory[271][4] => Mux12.IN280
-memory[271][4] => Mux20.IN280
-memory[271][5] => Mux11.IN280
-memory[271][5] => Mux19.IN280
-memory[271][6] => Mux10.IN280
-memory[271][6] => Mux18.IN280
-memory[271][7] => Mux9.IN280
-memory[271][7] => Mux17.IN280
-memory[270][0] => Mux16.IN279
-memory[270][0] => Mux24.IN279
-memory[270][1] => Mux15.IN279
-memory[270][1] => Mux23.IN279
-memory[270][2] => Mux14.IN279
-memory[270][2] => Mux22.IN279
-memory[270][3] => Mux13.IN279
-memory[270][3] => Mux21.IN279
-memory[270][4] => Mux12.IN279
-memory[270][4] => Mux20.IN279
-memory[270][5] => Mux11.IN279
-memory[270][5] => Mux19.IN279
-memory[270][6] => Mux10.IN279
-memory[270][6] => Mux18.IN279
-memory[270][7] => Mux9.IN279
-memory[270][7] => Mux17.IN279
-memory[269][0] => Mux16.IN278
-memory[269][0] => Mux24.IN278
-memory[269][1] => Mux15.IN278
-memory[269][1] => Mux23.IN278
-memory[269][2] => Mux14.IN278
-memory[269][2] => Mux22.IN278
-memory[269][3] => Mux13.IN278
-memory[269][3] => Mux21.IN278
-memory[269][4] => Mux12.IN278
-memory[269][4] => Mux20.IN278
-memory[269][5] => Mux11.IN278
-memory[269][5] => Mux19.IN278
-memory[269][6] => Mux10.IN278
-memory[269][6] => Mux18.IN278
-memory[269][7] => Mux9.IN278
-memory[269][7] => Mux17.IN278
-memory[268][0] => Mux16.IN277
-memory[268][0] => Mux24.IN277
-memory[268][1] => Mux15.IN277
-memory[268][1] => Mux23.IN277
-memory[268][2] => Mux14.IN277
-memory[268][2] => Mux22.IN277
-memory[268][3] => Mux13.IN277
-memory[268][3] => Mux21.IN277
-memory[268][4] => Mux12.IN277
-memory[268][4] => Mux20.IN277
-memory[268][5] => Mux11.IN277
-memory[268][5] => Mux19.IN277
-memory[268][6] => Mux10.IN277
-memory[268][6] => Mux18.IN277
-memory[268][7] => Mux9.IN277
-memory[268][7] => Mux17.IN277
-memory[267][0] => Mux16.IN276
-memory[267][0] => Mux24.IN276
-memory[267][1] => Mux15.IN276
-memory[267][1] => Mux23.IN276
-memory[267][2] => Mux14.IN276
-memory[267][2] => Mux22.IN276
-memory[267][3] => Mux13.IN276
-memory[267][3] => Mux21.IN276
-memory[267][4] => Mux12.IN276
-memory[267][4] => Mux20.IN276
-memory[267][5] => Mux11.IN276
-memory[267][5] => Mux19.IN276
-memory[267][6] => Mux10.IN276
-memory[267][6] => Mux18.IN276
-memory[267][7] => Mux9.IN276
-memory[267][7] => Mux17.IN276
-memory[266][0] => Mux16.IN275
-memory[266][0] => Mux24.IN275
-memory[266][1] => Mux15.IN275
-memory[266][1] => Mux23.IN275
-memory[266][2] => Mux14.IN275
-memory[266][2] => Mux22.IN275
-memory[266][3] => Mux13.IN275
-memory[266][3] => Mux21.IN275
-memory[266][4] => Mux12.IN275
-memory[266][4] => Mux20.IN275
-memory[266][5] => Mux11.IN275
-memory[266][5] => Mux19.IN275
-memory[266][6] => Mux10.IN275
-memory[266][6] => Mux18.IN275
-memory[266][7] => Mux9.IN275
-memory[266][7] => Mux17.IN275
-memory[265][0] => Mux16.IN274
-memory[265][0] => Mux24.IN274
-memory[265][1] => Mux15.IN274
-memory[265][1] => Mux23.IN274
-memory[265][2] => Mux14.IN274
-memory[265][2] => Mux22.IN274
-memory[265][3] => Mux13.IN274
-memory[265][3] => Mux21.IN274
-memory[265][4] => Mux12.IN274
-memory[265][4] => Mux20.IN274
-memory[265][5] => Mux11.IN274
-memory[265][5] => Mux19.IN274
-memory[265][6] => Mux10.IN274
-memory[265][6] => Mux18.IN274
-memory[265][7] => Mux9.IN274
-memory[265][7] => Mux17.IN274
-memory[264][0] => Mux16.IN273
-memory[264][0] => Mux24.IN273
-memory[264][1] => Mux15.IN273
-memory[264][1] => Mux23.IN273
-memory[264][2] => Mux14.IN273
-memory[264][2] => Mux22.IN273
-memory[264][3] => Mux13.IN273
-memory[264][3] => Mux21.IN273
-memory[264][4] => Mux12.IN273
-memory[264][4] => Mux20.IN273
-memory[264][5] => Mux11.IN273
-memory[264][5] => Mux19.IN273
-memory[264][6] => Mux10.IN273
-memory[264][6] => Mux18.IN273
-memory[264][7] => Mux9.IN273
-memory[264][7] => Mux17.IN273
-memory[263][0] => Mux16.IN272
-memory[263][0] => Mux24.IN272
-memory[263][1] => Mux15.IN272
-memory[263][1] => Mux23.IN272
-memory[263][2] => Mux14.IN272
-memory[263][2] => Mux22.IN272
-memory[263][3] => Mux13.IN272
-memory[263][3] => Mux21.IN272
-memory[263][4] => Mux12.IN272
-memory[263][4] => Mux20.IN272
-memory[263][5] => Mux11.IN272
-memory[263][5] => Mux19.IN272
-memory[263][6] => Mux10.IN272
-memory[263][6] => Mux18.IN272
-memory[263][7] => Mux9.IN272
-memory[263][7] => Mux17.IN272
-memory[262][0] => Mux16.IN271
-memory[262][0] => Mux24.IN271
-memory[262][1] => Mux15.IN271
-memory[262][1] => Mux23.IN271
-memory[262][2] => Mux14.IN271
-memory[262][2] => Mux22.IN271
-memory[262][3] => Mux13.IN271
-memory[262][3] => Mux21.IN271
-memory[262][4] => Mux12.IN271
-memory[262][4] => Mux20.IN271
-memory[262][5] => Mux11.IN271
-memory[262][5] => Mux19.IN271
-memory[262][6] => Mux10.IN271
-memory[262][6] => Mux18.IN271
-memory[262][7] => Mux9.IN271
-memory[262][7] => Mux17.IN271
-memory[261][0] => Mux16.IN270
-memory[261][0] => Mux24.IN270
-memory[261][1] => Mux15.IN270
-memory[261][1] => Mux23.IN270
-memory[261][2] => Mux14.IN270
-memory[261][2] => Mux22.IN270
-memory[261][3] => Mux13.IN270
-memory[261][3] => Mux21.IN270
-memory[261][4] => Mux12.IN270
-memory[261][4] => Mux20.IN270
-memory[261][5] => Mux11.IN270
-memory[261][5] => Mux19.IN270
-memory[261][6] => Mux10.IN270
-memory[261][6] => Mux18.IN270
-memory[261][7] => Mux9.IN270
-memory[261][7] => Mux17.IN270
-memory[260][0] => Mux16.IN269
-memory[260][0] => Mux24.IN269
-memory[260][1] => Mux15.IN269
-memory[260][1] => Mux23.IN269
-memory[260][2] => Mux14.IN269
-memory[260][2] => Mux22.IN269
-memory[260][3] => Mux13.IN269
-memory[260][3] => Mux21.IN269
-memory[260][4] => Mux12.IN269
-memory[260][4] => Mux20.IN269
-memory[260][5] => Mux11.IN269
-memory[260][5] => Mux19.IN269
-memory[260][6] => Mux10.IN269
-memory[260][6] => Mux18.IN269
-memory[260][7] => Mux9.IN269
-memory[260][7] => Mux17.IN269
-memory[259][0] => Mux16.IN268
-memory[259][0] => Mux24.IN268
-memory[259][1] => Mux15.IN268
-memory[259][1] => Mux23.IN268
-memory[259][2] => Mux14.IN268
-memory[259][2] => Mux22.IN268
-memory[259][3] => Mux13.IN268
-memory[259][3] => Mux21.IN268
-memory[259][4] => Mux12.IN268
-memory[259][4] => Mux20.IN268
-memory[259][5] => Mux11.IN268
-memory[259][5] => Mux19.IN268
-memory[259][6] => Mux10.IN268
-memory[259][6] => Mux18.IN268
-memory[259][7] => Mux9.IN268
-memory[259][7] => Mux17.IN268
-memory[258][0] => Mux16.IN267
-memory[258][0] => Mux24.IN267
-memory[258][1] => Mux15.IN267
-memory[258][1] => Mux23.IN267
-memory[258][2] => Mux14.IN267
-memory[258][2] => Mux22.IN267
-memory[258][3] => Mux13.IN267
-memory[258][3] => Mux21.IN267
-memory[258][4] => Mux12.IN267
-memory[258][4] => Mux20.IN267
-memory[258][5] => Mux11.IN267
-memory[258][5] => Mux19.IN267
-memory[258][6] => Mux10.IN267
-memory[258][6] => Mux18.IN267
-memory[258][7] => Mux9.IN267
-memory[258][7] => Mux17.IN267
-memory[257][0] => Mux16.IN266
-memory[257][0] => Mux24.IN266
-memory[257][1] => Mux15.IN266
-memory[257][1] => Mux23.IN266
-memory[257][2] => Mux14.IN266
-memory[257][2] => Mux22.IN266
-memory[257][3] => Mux13.IN266
-memory[257][3] => Mux21.IN266
-memory[257][4] => Mux12.IN266
-memory[257][4] => Mux20.IN266
-memory[257][5] => Mux11.IN266
-memory[257][5] => Mux19.IN266
-memory[257][6] => Mux10.IN266
-memory[257][6] => Mux18.IN266
-memory[257][7] => Mux9.IN266
-memory[257][7] => Mux17.IN266
-memory[256][0] => Mux16.IN265
-memory[256][0] => Mux24.IN265
-memory[256][1] => Mux15.IN265
-memory[256][1] => Mux23.IN265
-memory[256][2] => Mux14.IN265
-memory[256][2] => Mux22.IN265
-memory[256][3] => Mux13.IN265
-memory[256][3] => Mux21.IN265
-memory[256][4] => Mux12.IN265
-memory[256][4] => Mux20.IN265
-memory[256][5] => Mux11.IN265
-memory[256][5] => Mux19.IN265
-memory[256][6] => Mux10.IN265
-memory[256][6] => Mux18.IN265
-memory[256][7] => Mux9.IN265
-memory[256][7] => Mux17.IN265
-memory[255][0] => Mux16.IN264
-memory[255][0] => Mux24.IN264
-memory[255][1] => Mux15.IN264
-memory[255][1] => Mux23.IN264
-memory[255][2] => Mux14.IN264
-memory[255][2] => Mux22.IN264
-memory[255][3] => Mux13.IN264
-memory[255][3] => Mux21.IN264
-memory[255][4] => Mux12.IN264
-memory[255][4] => Mux20.IN264
-memory[255][5] => Mux11.IN264
-memory[255][5] => Mux19.IN264
-memory[255][6] => Mux10.IN264
-memory[255][6] => Mux18.IN264
-memory[255][7] => Mux9.IN264
-memory[255][7] => Mux17.IN264
-memory[254][0] => Mux16.IN263
-memory[254][0] => Mux24.IN263
-memory[254][1] => Mux15.IN263
-memory[254][1] => Mux23.IN263
-memory[254][2] => Mux14.IN263
-memory[254][2] => Mux22.IN263
-memory[254][3] => Mux13.IN263
-memory[254][3] => Mux21.IN263
-memory[254][4] => Mux12.IN263
-memory[254][4] => Mux20.IN263
-memory[254][5] => Mux11.IN263
-memory[254][5] => Mux19.IN263
-memory[254][6] => Mux10.IN263
-memory[254][6] => Mux18.IN263
-memory[254][7] => Mux9.IN263
-memory[254][7] => Mux17.IN263
-memory[253][0] => Mux16.IN262
-memory[253][0] => Mux24.IN262
-memory[253][1] => Mux15.IN262
-memory[253][1] => Mux23.IN262
-memory[253][2] => Mux14.IN262
-memory[253][2] => Mux22.IN262
-memory[253][3] => Mux13.IN262
-memory[253][3] => Mux21.IN262
-memory[253][4] => Mux12.IN262
-memory[253][4] => Mux20.IN262
-memory[253][5] => Mux11.IN262
-memory[253][5] => Mux19.IN262
-memory[253][6] => Mux10.IN262
-memory[253][6] => Mux18.IN262
-memory[253][7] => Mux9.IN262
-memory[253][7] => Mux17.IN262
-memory[252][0] => Mux16.IN261
-memory[252][0] => Mux24.IN261
-memory[252][1] => Mux15.IN261
-memory[252][1] => Mux23.IN261
-memory[252][2] => Mux14.IN261
-memory[252][2] => Mux22.IN261
-memory[252][3] => Mux13.IN261
-memory[252][3] => Mux21.IN261
-memory[252][4] => Mux12.IN261
-memory[252][4] => Mux20.IN261
-memory[252][5] => Mux11.IN261
-memory[252][5] => Mux19.IN261
-memory[252][6] => Mux10.IN261
-memory[252][6] => Mux18.IN261
-memory[252][7] => Mux9.IN261
-memory[252][7] => Mux17.IN261
-memory[251][0] => Mux16.IN260
-memory[251][0] => Mux24.IN260
-memory[251][1] => Mux15.IN260
-memory[251][1] => Mux23.IN260
-memory[251][2] => Mux14.IN260
-memory[251][2] => Mux22.IN260
-memory[251][3] => Mux13.IN260
-memory[251][3] => Mux21.IN260
-memory[251][4] => Mux12.IN260
-memory[251][4] => Mux20.IN260
-memory[251][5] => Mux11.IN260
-memory[251][5] => Mux19.IN260
-memory[251][6] => Mux10.IN260
-memory[251][6] => Mux18.IN260
-memory[251][7] => Mux9.IN260
-memory[251][7] => Mux17.IN260
-memory[250][0] => Mux16.IN259
-memory[250][0] => Mux24.IN259
-memory[250][1] => Mux15.IN259
-memory[250][1] => Mux23.IN259
-memory[250][2] => Mux14.IN259
-memory[250][2] => Mux22.IN259
-memory[250][3] => Mux13.IN259
-memory[250][3] => Mux21.IN259
-memory[250][4] => Mux12.IN259
-memory[250][4] => Mux20.IN259
-memory[250][5] => Mux11.IN259
-memory[250][5] => Mux19.IN259
-memory[250][6] => Mux10.IN259
-memory[250][6] => Mux18.IN259
-memory[250][7] => Mux9.IN259
-memory[250][7] => Mux17.IN259
-memory[249][0] => Mux16.IN258
-memory[249][0] => Mux24.IN258
-memory[249][1] => Mux15.IN258
-memory[249][1] => Mux23.IN258
-memory[249][2] => Mux14.IN258
-memory[249][2] => Mux22.IN258
-memory[249][3] => Mux13.IN258
-memory[249][3] => Mux21.IN258
-memory[249][4] => Mux12.IN258
-memory[249][4] => Mux20.IN258
-memory[249][5] => Mux11.IN258
-memory[249][5] => Mux19.IN258
-memory[249][6] => Mux10.IN258
-memory[249][6] => Mux18.IN258
-memory[249][7] => Mux9.IN258
-memory[249][7] => Mux17.IN258
-memory[248][0] => Mux16.IN257
-memory[248][0] => Mux24.IN257
-memory[248][1] => Mux15.IN257
-memory[248][1] => Mux23.IN257
-memory[248][2] => Mux14.IN257
-memory[248][2] => Mux22.IN257
-memory[248][3] => Mux13.IN257
-memory[248][3] => Mux21.IN257
-memory[248][4] => Mux12.IN257
-memory[248][4] => Mux20.IN257
-memory[248][5] => Mux11.IN257
-memory[248][5] => Mux19.IN257
-memory[248][6] => Mux10.IN257
-memory[248][6] => Mux18.IN257
-memory[248][7] => Mux9.IN257
-memory[248][7] => Mux17.IN257
-memory[247][0] => Mux16.IN256
-memory[247][0] => Mux24.IN256
-memory[247][1] => Mux15.IN256
-memory[247][1] => Mux23.IN256
-memory[247][2] => Mux14.IN256
-memory[247][2] => Mux22.IN256
-memory[247][3] => Mux13.IN256
-memory[247][3] => Mux21.IN256
-memory[247][4] => Mux12.IN256
-memory[247][4] => Mux20.IN256
-memory[247][5] => Mux11.IN256
-memory[247][5] => Mux19.IN256
-memory[247][6] => Mux10.IN256
-memory[247][6] => Mux18.IN256
-memory[247][7] => Mux9.IN256
-memory[247][7] => Mux17.IN256
-memory[246][0] => Mux16.IN255
-memory[246][0] => Mux24.IN255
-memory[246][1] => Mux15.IN255
-memory[246][1] => Mux23.IN255
-memory[246][2] => Mux14.IN255
-memory[246][2] => Mux22.IN255
-memory[246][3] => Mux13.IN255
-memory[246][3] => Mux21.IN255
-memory[246][4] => Mux12.IN255
-memory[246][4] => Mux20.IN255
-memory[246][5] => Mux11.IN255
-memory[246][5] => Mux19.IN255
-memory[246][6] => Mux10.IN255
-memory[246][6] => Mux18.IN255
-memory[246][7] => Mux9.IN255
-memory[246][7] => Mux17.IN255
-memory[245][0] => Mux16.IN254
-memory[245][0] => Mux24.IN254
-memory[245][1] => Mux15.IN254
-memory[245][1] => Mux23.IN254
-memory[245][2] => Mux14.IN254
-memory[245][2] => Mux22.IN254
-memory[245][3] => Mux13.IN254
-memory[245][3] => Mux21.IN254
-memory[245][4] => Mux12.IN254
-memory[245][4] => Mux20.IN254
-memory[245][5] => Mux11.IN254
-memory[245][5] => Mux19.IN254
-memory[245][6] => Mux10.IN254
-memory[245][6] => Mux18.IN254
-memory[245][7] => Mux9.IN254
-memory[245][7] => Mux17.IN254
-memory[244][0] => Mux16.IN253
-memory[244][0] => Mux24.IN253
-memory[244][1] => Mux15.IN253
-memory[244][1] => Mux23.IN253
-memory[244][2] => Mux14.IN253
-memory[244][2] => Mux22.IN253
-memory[244][3] => Mux13.IN253
-memory[244][3] => Mux21.IN253
-memory[244][4] => Mux12.IN253
-memory[244][4] => Mux20.IN253
-memory[244][5] => Mux11.IN253
-memory[244][5] => Mux19.IN253
-memory[244][6] => Mux10.IN253
-memory[244][6] => Mux18.IN253
-memory[244][7] => Mux9.IN253
-memory[244][7] => Mux17.IN253
-memory[243][0] => Mux16.IN252
-memory[243][0] => Mux24.IN252
-memory[243][1] => Mux15.IN252
-memory[243][1] => Mux23.IN252
-memory[243][2] => Mux14.IN252
-memory[243][2] => Mux22.IN252
-memory[243][3] => Mux13.IN252
-memory[243][3] => Mux21.IN252
-memory[243][4] => Mux12.IN252
-memory[243][4] => Mux20.IN252
-memory[243][5] => Mux11.IN252
-memory[243][5] => Mux19.IN252
-memory[243][6] => Mux10.IN252
-memory[243][6] => Mux18.IN252
-memory[243][7] => Mux9.IN252
-memory[243][7] => Mux17.IN252
-memory[242][0] => Mux16.IN251
-memory[242][0] => Mux24.IN251
-memory[242][1] => Mux15.IN251
-memory[242][1] => Mux23.IN251
-memory[242][2] => Mux14.IN251
-memory[242][2] => Mux22.IN251
-memory[242][3] => Mux13.IN251
-memory[242][3] => Mux21.IN251
-memory[242][4] => Mux12.IN251
-memory[242][4] => Mux20.IN251
-memory[242][5] => Mux11.IN251
-memory[242][5] => Mux19.IN251
-memory[242][6] => Mux10.IN251
-memory[242][6] => Mux18.IN251
-memory[242][7] => Mux9.IN251
-memory[242][7] => Mux17.IN251
-memory[241][0] => Mux16.IN250
-memory[241][0] => Mux24.IN250
-memory[241][1] => Mux15.IN250
-memory[241][1] => Mux23.IN250
-memory[241][2] => Mux14.IN250
-memory[241][2] => Mux22.IN250
-memory[241][3] => Mux13.IN250
-memory[241][3] => Mux21.IN250
-memory[241][4] => Mux12.IN250
-memory[241][4] => Mux20.IN250
-memory[241][5] => Mux11.IN250
-memory[241][5] => Mux19.IN250
-memory[241][6] => Mux10.IN250
-memory[241][6] => Mux18.IN250
-memory[241][7] => Mux9.IN250
-memory[241][7] => Mux17.IN250
-memory[240][0] => Mux16.IN249
-memory[240][0] => Mux24.IN249
-memory[240][1] => Mux15.IN249
-memory[240][1] => Mux23.IN249
-memory[240][2] => Mux14.IN249
-memory[240][2] => Mux22.IN249
-memory[240][3] => Mux13.IN249
-memory[240][3] => Mux21.IN249
-memory[240][4] => Mux12.IN249
-memory[240][4] => Mux20.IN249
-memory[240][5] => Mux11.IN249
-memory[240][5] => Mux19.IN249
-memory[240][6] => Mux10.IN249
-memory[240][6] => Mux18.IN249
-memory[240][7] => Mux9.IN249
-memory[240][7] => Mux17.IN249
-memory[239][0] => Mux16.IN248
-memory[239][0] => Mux24.IN248
-memory[239][1] => Mux15.IN248
-memory[239][1] => Mux23.IN248
-memory[239][2] => Mux14.IN248
-memory[239][2] => Mux22.IN248
-memory[239][3] => Mux13.IN248
-memory[239][3] => Mux21.IN248
-memory[239][4] => Mux12.IN248
-memory[239][4] => Mux20.IN248
-memory[239][5] => Mux11.IN248
-memory[239][5] => Mux19.IN248
-memory[239][6] => Mux10.IN248
-memory[239][6] => Mux18.IN248
-memory[239][7] => Mux9.IN248
-memory[239][7] => Mux17.IN248
-memory[238][0] => Mux16.IN247
-memory[238][0] => Mux24.IN247
-memory[238][1] => Mux15.IN247
-memory[238][1] => Mux23.IN247
-memory[238][2] => Mux14.IN247
-memory[238][2] => Mux22.IN247
-memory[238][3] => Mux13.IN247
-memory[238][3] => Mux21.IN247
-memory[238][4] => Mux12.IN247
-memory[238][4] => Mux20.IN247
-memory[238][5] => Mux11.IN247
-memory[238][5] => Mux19.IN247
-memory[238][6] => Mux10.IN247
-memory[238][6] => Mux18.IN247
-memory[238][7] => Mux9.IN247
-memory[238][7] => Mux17.IN247
-memory[237][0] => Mux16.IN246
-memory[237][0] => Mux24.IN246
-memory[237][1] => Mux15.IN246
-memory[237][1] => Mux23.IN246
-memory[237][2] => Mux14.IN246
-memory[237][2] => Mux22.IN246
-memory[237][3] => Mux13.IN246
-memory[237][3] => Mux21.IN246
-memory[237][4] => Mux12.IN246
-memory[237][4] => Mux20.IN246
-memory[237][5] => Mux11.IN246
-memory[237][5] => Mux19.IN246
-memory[237][6] => Mux10.IN246
-memory[237][6] => Mux18.IN246
-memory[237][7] => Mux9.IN246
-memory[237][7] => Mux17.IN246
-memory[236][0] => Mux16.IN245
-memory[236][0] => Mux24.IN245
-memory[236][1] => Mux15.IN245
-memory[236][1] => Mux23.IN245
-memory[236][2] => Mux14.IN245
-memory[236][2] => Mux22.IN245
-memory[236][3] => Mux13.IN245
-memory[236][3] => Mux21.IN245
-memory[236][4] => Mux12.IN245
-memory[236][4] => Mux20.IN245
-memory[236][5] => Mux11.IN245
-memory[236][5] => Mux19.IN245
-memory[236][6] => Mux10.IN245
-memory[236][6] => Mux18.IN245
-memory[236][7] => Mux9.IN245
-memory[236][7] => Mux17.IN245
-memory[235][0] => Mux16.IN244
-memory[235][0] => Mux24.IN244
-memory[235][1] => Mux15.IN244
-memory[235][1] => Mux23.IN244
-memory[235][2] => Mux14.IN244
-memory[235][2] => Mux22.IN244
-memory[235][3] => Mux13.IN244
-memory[235][3] => Mux21.IN244
-memory[235][4] => Mux12.IN244
-memory[235][4] => Mux20.IN244
-memory[235][5] => Mux11.IN244
-memory[235][5] => Mux19.IN244
-memory[235][6] => Mux10.IN244
-memory[235][6] => Mux18.IN244
-memory[235][7] => Mux9.IN244
-memory[235][7] => Mux17.IN244
-memory[234][0] => Mux16.IN243
-memory[234][0] => Mux24.IN243
-memory[234][1] => Mux15.IN243
-memory[234][1] => Mux23.IN243
-memory[234][2] => Mux14.IN243
-memory[234][2] => Mux22.IN243
-memory[234][3] => Mux13.IN243
-memory[234][3] => Mux21.IN243
-memory[234][4] => Mux12.IN243
-memory[234][4] => Mux20.IN243
-memory[234][5] => Mux11.IN243
-memory[234][5] => Mux19.IN243
-memory[234][6] => Mux10.IN243
-memory[234][6] => Mux18.IN243
-memory[234][7] => Mux9.IN243
-memory[234][7] => Mux17.IN243
-memory[233][0] => Mux16.IN242
-memory[233][0] => Mux24.IN242
-memory[233][1] => Mux15.IN242
-memory[233][1] => Mux23.IN242
-memory[233][2] => Mux14.IN242
-memory[233][2] => Mux22.IN242
-memory[233][3] => Mux13.IN242
-memory[233][3] => Mux21.IN242
-memory[233][4] => Mux12.IN242
-memory[233][4] => Mux20.IN242
-memory[233][5] => Mux11.IN242
-memory[233][5] => Mux19.IN242
-memory[233][6] => Mux10.IN242
-memory[233][6] => Mux18.IN242
-memory[233][7] => Mux9.IN242
-memory[233][7] => Mux17.IN242
-memory[232][0] => Mux16.IN241
-memory[232][0] => Mux24.IN241
-memory[232][1] => Mux15.IN241
-memory[232][1] => Mux23.IN241
-memory[232][2] => Mux14.IN241
-memory[232][2] => Mux22.IN241
-memory[232][3] => Mux13.IN241
-memory[232][3] => Mux21.IN241
-memory[232][4] => Mux12.IN241
-memory[232][4] => Mux20.IN241
-memory[232][5] => Mux11.IN241
-memory[232][5] => Mux19.IN241
-memory[232][6] => Mux10.IN241
-memory[232][6] => Mux18.IN241
-memory[232][7] => Mux9.IN241
-memory[232][7] => Mux17.IN241
-memory[231][0] => Mux16.IN240
-memory[231][0] => Mux24.IN240
-memory[231][1] => Mux15.IN240
-memory[231][1] => Mux23.IN240
-memory[231][2] => Mux14.IN240
-memory[231][2] => Mux22.IN240
-memory[231][3] => Mux13.IN240
-memory[231][3] => Mux21.IN240
-memory[231][4] => Mux12.IN240
-memory[231][4] => Mux20.IN240
-memory[231][5] => Mux11.IN240
-memory[231][5] => Mux19.IN240
-memory[231][6] => Mux10.IN240
-memory[231][6] => Mux18.IN240
-memory[231][7] => Mux9.IN240
-memory[231][7] => Mux17.IN240
-memory[230][0] => Mux16.IN239
-memory[230][0] => Mux24.IN239
-memory[230][1] => Mux15.IN239
-memory[230][1] => Mux23.IN239
-memory[230][2] => Mux14.IN239
-memory[230][2] => Mux22.IN239
-memory[230][3] => Mux13.IN239
-memory[230][3] => Mux21.IN239
-memory[230][4] => Mux12.IN239
-memory[230][4] => Mux20.IN239
-memory[230][5] => Mux11.IN239
-memory[230][5] => Mux19.IN239
-memory[230][6] => Mux10.IN239
-memory[230][6] => Mux18.IN239
-memory[230][7] => Mux9.IN239
-memory[230][7] => Mux17.IN239
-memory[229][0] => Mux16.IN238
-memory[229][0] => Mux24.IN238
-memory[229][1] => Mux15.IN238
-memory[229][1] => Mux23.IN238
-memory[229][2] => Mux14.IN238
-memory[229][2] => Mux22.IN238
-memory[229][3] => Mux13.IN238
-memory[229][3] => Mux21.IN238
-memory[229][4] => Mux12.IN238
-memory[229][4] => Mux20.IN238
-memory[229][5] => Mux11.IN238
-memory[229][5] => Mux19.IN238
-memory[229][6] => Mux10.IN238
-memory[229][6] => Mux18.IN238
-memory[229][7] => Mux9.IN238
-memory[229][7] => Mux17.IN238
-memory[228][0] => Mux16.IN237
-memory[228][0] => Mux24.IN237
-memory[228][1] => Mux15.IN237
-memory[228][1] => Mux23.IN237
-memory[228][2] => Mux14.IN237
-memory[228][2] => Mux22.IN237
-memory[228][3] => Mux13.IN237
-memory[228][3] => Mux21.IN237
-memory[228][4] => Mux12.IN237
-memory[228][4] => Mux20.IN237
-memory[228][5] => Mux11.IN237
-memory[228][5] => Mux19.IN237
-memory[228][6] => Mux10.IN237
-memory[228][6] => Mux18.IN237
-memory[228][7] => Mux9.IN237
-memory[228][7] => Mux17.IN237
-memory[227][0] => Mux16.IN236
-memory[227][0] => Mux24.IN236
-memory[227][1] => Mux15.IN236
-memory[227][1] => Mux23.IN236
-memory[227][2] => Mux14.IN236
-memory[227][2] => Mux22.IN236
-memory[227][3] => Mux13.IN236
-memory[227][3] => Mux21.IN236
-memory[227][4] => Mux12.IN236
-memory[227][4] => Mux20.IN236
-memory[227][5] => Mux11.IN236
-memory[227][5] => Mux19.IN236
-memory[227][6] => Mux10.IN236
-memory[227][6] => Mux18.IN236
-memory[227][7] => Mux9.IN236
-memory[227][7] => Mux17.IN236
-memory[226][0] => Mux16.IN235
-memory[226][0] => Mux24.IN235
-memory[226][1] => Mux15.IN235
-memory[226][1] => Mux23.IN235
-memory[226][2] => Mux14.IN235
-memory[226][2] => Mux22.IN235
-memory[226][3] => Mux13.IN235
-memory[226][3] => Mux21.IN235
-memory[226][4] => Mux12.IN235
-memory[226][4] => Mux20.IN235
-memory[226][5] => Mux11.IN235
-memory[226][5] => Mux19.IN235
-memory[226][6] => Mux10.IN235
-memory[226][6] => Mux18.IN235
-memory[226][7] => Mux9.IN235
-memory[226][7] => Mux17.IN235
-memory[225][0] => Mux16.IN234
-memory[225][0] => Mux24.IN234
-memory[225][1] => Mux15.IN234
-memory[225][1] => Mux23.IN234
-memory[225][2] => Mux14.IN234
-memory[225][2] => Mux22.IN234
-memory[225][3] => Mux13.IN234
-memory[225][3] => Mux21.IN234
-memory[225][4] => Mux12.IN234
-memory[225][4] => Mux20.IN234
-memory[225][5] => Mux11.IN234
-memory[225][5] => Mux19.IN234
-memory[225][6] => Mux10.IN234
-memory[225][6] => Mux18.IN234
-memory[225][7] => Mux9.IN234
-memory[225][7] => Mux17.IN234
-memory[224][0] => Mux16.IN233
-memory[224][0] => Mux24.IN233
-memory[224][1] => Mux15.IN233
-memory[224][1] => Mux23.IN233
-memory[224][2] => Mux14.IN233
-memory[224][2] => Mux22.IN233
-memory[224][3] => Mux13.IN233
-memory[224][3] => Mux21.IN233
-memory[224][4] => Mux12.IN233
-memory[224][4] => Mux20.IN233
-memory[224][5] => Mux11.IN233
-memory[224][5] => Mux19.IN233
-memory[224][6] => Mux10.IN233
-memory[224][6] => Mux18.IN233
-memory[224][7] => Mux9.IN233
-memory[224][7] => Mux17.IN233
-memory[223][0] => Mux16.IN232
-memory[223][0] => Mux24.IN232
-memory[223][1] => Mux15.IN232
-memory[223][1] => Mux23.IN232
-memory[223][2] => Mux14.IN232
-memory[223][2] => Mux22.IN232
-memory[223][3] => Mux13.IN232
-memory[223][3] => Mux21.IN232
-memory[223][4] => Mux12.IN232
-memory[223][4] => Mux20.IN232
-memory[223][5] => Mux11.IN232
-memory[223][5] => Mux19.IN232
-memory[223][6] => Mux10.IN232
-memory[223][6] => Mux18.IN232
-memory[223][7] => Mux9.IN232
-memory[223][7] => Mux17.IN232
-memory[222][0] => Mux16.IN231
-memory[222][0] => Mux24.IN231
-memory[222][1] => Mux15.IN231
-memory[222][1] => Mux23.IN231
-memory[222][2] => Mux14.IN231
-memory[222][2] => Mux22.IN231
-memory[222][3] => Mux13.IN231
-memory[222][3] => Mux21.IN231
-memory[222][4] => Mux12.IN231
-memory[222][4] => Mux20.IN231
-memory[222][5] => Mux11.IN231
-memory[222][5] => Mux19.IN231
-memory[222][6] => Mux10.IN231
-memory[222][6] => Mux18.IN231
-memory[222][7] => Mux9.IN231
-memory[222][7] => Mux17.IN231
-memory[221][0] => Mux16.IN230
-memory[221][0] => Mux24.IN230
-memory[221][1] => Mux15.IN230
-memory[221][1] => Mux23.IN230
-memory[221][2] => Mux14.IN230
-memory[221][2] => Mux22.IN230
-memory[221][3] => Mux13.IN230
-memory[221][3] => Mux21.IN230
-memory[221][4] => Mux12.IN230
-memory[221][4] => Mux20.IN230
-memory[221][5] => Mux11.IN230
-memory[221][5] => Mux19.IN230
-memory[221][6] => Mux10.IN230
-memory[221][6] => Mux18.IN230
-memory[221][7] => Mux9.IN230
-memory[221][7] => Mux17.IN230
-memory[220][0] => Mux16.IN229
-memory[220][0] => Mux24.IN229
-memory[220][1] => Mux15.IN229
-memory[220][1] => Mux23.IN229
-memory[220][2] => Mux14.IN229
-memory[220][2] => Mux22.IN229
-memory[220][3] => Mux13.IN229
-memory[220][3] => Mux21.IN229
-memory[220][4] => Mux12.IN229
-memory[220][4] => Mux20.IN229
-memory[220][5] => Mux11.IN229
-memory[220][5] => Mux19.IN229
-memory[220][6] => Mux10.IN229
-memory[220][6] => Mux18.IN229
-memory[220][7] => Mux9.IN229
-memory[220][7] => Mux17.IN229
-memory[219][0] => Mux16.IN228
-memory[219][0] => Mux24.IN228
-memory[219][1] => Mux15.IN228
-memory[219][1] => Mux23.IN228
-memory[219][2] => Mux14.IN228
-memory[219][2] => Mux22.IN228
-memory[219][3] => Mux13.IN228
-memory[219][3] => Mux21.IN228
-memory[219][4] => Mux12.IN228
-memory[219][4] => Mux20.IN228
-memory[219][5] => Mux11.IN228
-memory[219][5] => Mux19.IN228
-memory[219][6] => Mux10.IN228
-memory[219][6] => Mux18.IN228
-memory[219][7] => Mux9.IN228
-memory[219][7] => Mux17.IN228
-memory[218][0] => Mux16.IN227
-memory[218][0] => Mux24.IN227
-memory[218][1] => Mux15.IN227
-memory[218][1] => Mux23.IN227
-memory[218][2] => Mux14.IN227
-memory[218][2] => Mux22.IN227
-memory[218][3] => Mux13.IN227
-memory[218][3] => Mux21.IN227
-memory[218][4] => Mux12.IN227
-memory[218][4] => Mux20.IN227
-memory[218][5] => Mux11.IN227
-memory[218][5] => Mux19.IN227
-memory[218][6] => Mux10.IN227
-memory[218][6] => Mux18.IN227
-memory[218][7] => Mux9.IN227
-memory[218][7] => Mux17.IN227
-memory[217][0] => Mux16.IN226
-memory[217][0] => Mux24.IN226
-memory[217][1] => Mux15.IN226
-memory[217][1] => Mux23.IN226
-memory[217][2] => Mux14.IN226
-memory[217][2] => Mux22.IN226
-memory[217][3] => Mux13.IN226
-memory[217][3] => Mux21.IN226
-memory[217][4] => Mux12.IN226
-memory[217][4] => Mux20.IN226
-memory[217][5] => Mux11.IN226
-memory[217][5] => Mux19.IN226
-memory[217][6] => Mux10.IN226
-memory[217][6] => Mux18.IN226
-memory[217][7] => Mux9.IN226
-memory[217][7] => Mux17.IN226
-memory[216][0] => Mux16.IN225
-memory[216][0] => Mux24.IN225
-memory[216][1] => Mux15.IN225
-memory[216][1] => Mux23.IN225
-memory[216][2] => Mux14.IN225
-memory[216][2] => Mux22.IN225
-memory[216][3] => Mux13.IN225
-memory[216][3] => Mux21.IN225
-memory[216][4] => Mux12.IN225
-memory[216][4] => Mux20.IN225
-memory[216][5] => Mux11.IN225
-memory[216][5] => Mux19.IN225
-memory[216][6] => Mux10.IN225
-memory[216][6] => Mux18.IN225
-memory[216][7] => Mux9.IN225
-memory[216][7] => Mux17.IN225
-memory[215][0] => Mux16.IN224
-memory[215][0] => Mux24.IN224
-memory[215][1] => Mux15.IN224
-memory[215][1] => Mux23.IN224
-memory[215][2] => Mux14.IN224
-memory[215][2] => Mux22.IN224
-memory[215][3] => Mux13.IN224
-memory[215][3] => Mux21.IN224
-memory[215][4] => Mux12.IN224
-memory[215][4] => Mux20.IN224
-memory[215][5] => Mux11.IN224
-memory[215][5] => Mux19.IN224
-memory[215][6] => Mux10.IN224
-memory[215][6] => Mux18.IN224
-memory[215][7] => Mux9.IN224
-memory[215][7] => Mux17.IN224
-memory[214][0] => Mux16.IN223
-memory[214][0] => Mux24.IN223
-memory[214][1] => Mux15.IN223
-memory[214][1] => Mux23.IN223
-memory[214][2] => Mux14.IN223
-memory[214][2] => Mux22.IN223
-memory[214][3] => Mux13.IN223
-memory[214][3] => Mux21.IN223
-memory[214][4] => Mux12.IN223
-memory[214][4] => Mux20.IN223
-memory[214][5] => Mux11.IN223
-memory[214][5] => Mux19.IN223
-memory[214][6] => Mux10.IN223
-memory[214][6] => Mux18.IN223
-memory[214][7] => Mux9.IN223
-memory[214][7] => Mux17.IN223
-memory[213][0] => Mux16.IN222
-memory[213][0] => Mux24.IN222
-memory[213][1] => Mux15.IN222
-memory[213][1] => Mux23.IN222
-memory[213][2] => Mux14.IN222
-memory[213][2] => Mux22.IN222
-memory[213][3] => Mux13.IN222
-memory[213][3] => Mux21.IN222
-memory[213][4] => Mux12.IN222
-memory[213][4] => Mux20.IN222
-memory[213][5] => Mux11.IN222
-memory[213][5] => Mux19.IN222
-memory[213][6] => Mux10.IN222
-memory[213][6] => Mux18.IN222
-memory[213][7] => Mux9.IN222
-memory[213][7] => Mux17.IN222
-memory[212][0] => Mux16.IN221
-memory[212][0] => Mux24.IN221
-memory[212][1] => Mux15.IN221
-memory[212][1] => Mux23.IN221
-memory[212][2] => Mux14.IN221
-memory[212][2] => Mux22.IN221
-memory[212][3] => Mux13.IN221
-memory[212][3] => Mux21.IN221
-memory[212][4] => Mux12.IN221
-memory[212][4] => Mux20.IN221
-memory[212][5] => Mux11.IN221
-memory[212][5] => Mux19.IN221
-memory[212][6] => Mux10.IN221
-memory[212][6] => Mux18.IN221
-memory[212][7] => Mux9.IN221
-memory[212][7] => Mux17.IN221
-memory[211][0] => Mux16.IN220
-memory[211][0] => Mux24.IN220
-memory[211][1] => Mux15.IN220
-memory[211][1] => Mux23.IN220
-memory[211][2] => Mux14.IN220
-memory[211][2] => Mux22.IN220
-memory[211][3] => Mux13.IN220
-memory[211][3] => Mux21.IN220
-memory[211][4] => Mux12.IN220
-memory[211][4] => Mux20.IN220
-memory[211][5] => Mux11.IN220
-memory[211][5] => Mux19.IN220
-memory[211][6] => Mux10.IN220
-memory[211][6] => Mux18.IN220
-memory[211][7] => Mux9.IN220
-memory[211][7] => Mux17.IN220
-memory[210][0] => Mux16.IN219
-memory[210][0] => Mux24.IN219
-memory[210][1] => Mux15.IN219
-memory[210][1] => Mux23.IN219
-memory[210][2] => Mux14.IN219
-memory[210][2] => Mux22.IN219
-memory[210][3] => Mux13.IN219
-memory[210][3] => Mux21.IN219
-memory[210][4] => Mux12.IN219
-memory[210][4] => Mux20.IN219
-memory[210][5] => Mux11.IN219
-memory[210][5] => Mux19.IN219
-memory[210][6] => Mux10.IN219
-memory[210][6] => Mux18.IN219
-memory[210][7] => Mux9.IN219
-memory[210][7] => Mux17.IN219
-memory[209][0] => Mux16.IN218
-memory[209][0] => Mux24.IN218
-memory[209][1] => Mux15.IN218
-memory[209][1] => Mux23.IN218
-memory[209][2] => Mux14.IN218
-memory[209][2] => Mux22.IN218
-memory[209][3] => Mux13.IN218
-memory[209][3] => Mux21.IN218
-memory[209][4] => Mux12.IN218
-memory[209][4] => Mux20.IN218
-memory[209][5] => Mux11.IN218
-memory[209][5] => Mux19.IN218
-memory[209][6] => Mux10.IN218
-memory[209][6] => Mux18.IN218
-memory[209][7] => Mux9.IN218
-memory[209][7] => Mux17.IN218
-memory[208][0] => Mux16.IN217
-memory[208][0] => Mux24.IN217
-memory[208][1] => Mux15.IN217
-memory[208][1] => Mux23.IN217
-memory[208][2] => Mux14.IN217
-memory[208][2] => Mux22.IN217
-memory[208][3] => Mux13.IN217
-memory[208][3] => Mux21.IN217
-memory[208][4] => Mux12.IN217
-memory[208][4] => Mux20.IN217
-memory[208][5] => Mux11.IN217
-memory[208][5] => Mux19.IN217
-memory[208][6] => Mux10.IN217
-memory[208][6] => Mux18.IN217
-memory[208][7] => Mux9.IN217
-memory[208][7] => Mux17.IN217
-memory[207][0] => Mux16.IN216
-memory[207][0] => Mux24.IN216
-memory[207][1] => Mux15.IN216
-memory[207][1] => Mux23.IN216
-memory[207][2] => Mux14.IN216
-memory[207][2] => Mux22.IN216
-memory[207][3] => Mux13.IN216
-memory[207][3] => Mux21.IN216
-memory[207][4] => Mux12.IN216
-memory[207][4] => Mux20.IN216
-memory[207][5] => Mux11.IN216
-memory[207][5] => Mux19.IN216
-memory[207][6] => Mux10.IN216
-memory[207][6] => Mux18.IN216
-memory[207][7] => Mux9.IN216
-memory[207][7] => Mux17.IN216
-memory[206][0] => Mux16.IN215
-memory[206][0] => Mux24.IN215
-memory[206][1] => Mux15.IN215
-memory[206][1] => Mux23.IN215
-memory[206][2] => Mux14.IN215
-memory[206][2] => Mux22.IN215
-memory[206][3] => Mux13.IN215
-memory[206][3] => Mux21.IN215
-memory[206][4] => Mux12.IN215
-memory[206][4] => Mux20.IN215
-memory[206][5] => Mux11.IN215
-memory[206][5] => Mux19.IN215
-memory[206][6] => Mux10.IN215
-memory[206][6] => Mux18.IN215
-memory[206][7] => Mux9.IN215
-memory[206][7] => Mux17.IN215
-memory[205][0] => Mux16.IN214
-memory[205][0] => Mux24.IN214
-memory[205][1] => Mux15.IN214
-memory[205][1] => Mux23.IN214
-memory[205][2] => Mux14.IN214
-memory[205][2] => Mux22.IN214
-memory[205][3] => Mux13.IN214
-memory[205][3] => Mux21.IN214
-memory[205][4] => Mux12.IN214
-memory[205][4] => Mux20.IN214
-memory[205][5] => Mux11.IN214
-memory[205][5] => Mux19.IN214
-memory[205][6] => Mux10.IN214
-memory[205][6] => Mux18.IN214
-memory[205][7] => Mux9.IN214
-memory[205][7] => Mux17.IN214
-memory[204][0] => Mux16.IN213
-memory[204][0] => Mux24.IN213
-memory[204][1] => Mux15.IN213
-memory[204][1] => Mux23.IN213
-memory[204][2] => Mux14.IN213
-memory[204][2] => Mux22.IN213
-memory[204][3] => Mux13.IN213
-memory[204][3] => Mux21.IN213
-memory[204][4] => Mux12.IN213
-memory[204][4] => Mux20.IN213
-memory[204][5] => Mux11.IN213
-memory[204][5] => Mux19.IN213
-memory[204][6] => Mux10.IN213
-memory[204][6] => Mux18.IN213
-memory[204][7] => Mux9.IN213
-memory[204][7] => Mux17.IN213
-memory[203][0] => Mux16.IN212
-memory[203][0] => Mux24.IN212
-memory[203][1] => Mux15.IN212
-memory[203][1] => Mux23.IN212
-memory[203][2] => Mux14.IN212
-memory[203][2] => Mux22.IN212
-memory[203][3] => Mux13.IN212
-memory[203][3] => Mux21.IN212
-memory[203][4] => Mux12.IN212
-memory[203][4] => Mux20.IN212
-memory[203][5] => Mux11.IN212
-memory[203][5] => Mux19.IN212
-memory[203][6] => Mux10.IN212
-memory[203][6] => Mux18.IN212
-memory[203][7] => Mux9.IN212
-memory[203][7] => Mux17.IN212
-memory[202][0] => Mux16.IN211
-memory[202][0] => Mux24.IN211
-memory[202][1] => Mux15.IN211
-memory[202][1] => Mux23.IN211
-memory[202][2] => Mux14.IN211
-memory[202][2] => Mux22.IN211
-memory[202][3] => Mux13.IN211
-memory[202][3] => Mux21.IN211
-memory[202][4] => Mux12.IN211
-memory[202][4] => Mux20.IN211
-memory[202][5] => Mux11.IN211
-memory[202][5] => Mux19.IN211
-memory[202][6] => Mux10.IN211
-memory[202][6] => Mux18.IN211
-memory[202][7] => Mux9.IN211
-memory[202][7] => Mux17.IN211
-memory[201][0] => Mux16.IN210
-memory[201][0] => Mux24.IN210
-memory[201][1] => Mux15.IN210
-memory[201][1] => Mux23.IN210
-memory[201][2] => Mux14.IN210
-memory[201][2] => Mux22.IN210
-memory[201][3] => Mux13.IN210
-memory[201][3] => Mux21.IN210
-memory[201][4] => Mux12.IN210
-memory[201][4] => Mux20.IN210
-memory[201][5] => Mux11.IN210
-memory[201][5] => Mux19.IN210
-memory[201][6] => Mux10.IN210
-memory[201][6] => Mux18.IN210
-memory[201][7] => Mux9.IN210
-memory[201][7] => Mux17.IN210
-memory[200][0] => Mux16.IN209
-memory[200][0] => Mux24.IN209
-memory[200][1] => Mux15.IN209
-memory[200][1] => Mux23.IN209
-memory[200][2] => Mux14.IN209
-memory[200][2] => Mux22.IN209
-memory[200][3] => Mux13.IN209
-memory[200][3] => Mux21.IN209
-memory[200][4] => Mux12.IN209
-memory[200][4] => Mux20.IN209
-memory[200][5] => Mux11.IN209
-memory[200][5] => Mux19.IN209
-memory[200][6] => Mux10.IN209
-memory[200][6] => Mux18.IN209
-memory[200][7] => Mux9.IN209
-memory[200][7] => Mux17.IN209
-memory[199][0] => Mux16.IN208
-memory[199][0] => Mux24.IN208
-memory[199][1] => Mux15.IN208
-memory[199][1] => Mux23.IN208
-memory[199][2] => Mux14.IN208
-memory[199][2] => Mux22.IN208
-memory[199][3] => Mux13.IN208
-memory[199][3] => Mux21.IN208
-memory[199][4] => Mux12.IN208
-memory[199][4] => Mux20.IN208
-memory[199][5] => Mux11.IN208
-memory[199][5] => Mux19.IN208
-memory[199][6] => Mux10.IN208
-memory[199][6] => Mux18.IN208
-memory[199][7] => Mux9.IN208
-memory[199][7] => Mux17.IN208
-memory[198][0] => Mux16.IN207
-memory[198][0] => Mux24.IN207
-memory[198][1] => Mux15.IN207
-memory[198][1] => Mux23.IN207
-memory[198][2] => Mux14.IN207
-memory[198][2] => Mux22.IN207
-memory[198][3] => Mux13.IN207
-memory[198][3] => Mux21.IN207
-memory[198][4] => Mux12.IN207
-memory[198][4] => Mux20.IN207
-memory[198][5] => Mux11.IN207
-memory[198][5] => Mux19.IN207
-memory[198][6] => Mux10.IN207
-memory[198][6] => Mux18.IN207
-memory[198][7] => Mux9.IN207
-memory[198][7] => Mux17.IN207
-memory[197][0] => Mux16.IN206
-memory[197][0] => Mux24.IN206
-memory[197][1] => Mux15.IN206
-memory[197][1] => Mux23.IN206
-memory[197][2] => Mux14.IN206
-memory[197][2] => Mux22.IN206
-memory[197][3] => Mux13.IN206
-memory[197][3] => Mux21.IN206
-memory[197][4] => Mux12.IN206
-memory[197][4] => Mux20.IN206
-memory[197][5] => Mux11.IN206
-memory[197][5] => Mux19.IN206
-memory[197][6] => Mux10.IN206
-memory[197][6] => Mux18.IN206
-memory[197][7] => Mux9.IN206
-memory[197][7] => Mux17.IN206
-memory[196][0] => Mux16.IN205
-memory[196][0] => Mux24.IN205
-memory[196][1] => Mux15.IN205
-memory[196][1] => Mux23.IN205
-memory[196][2] => Mux14.IN205
-memory[196][2] => Mux22.IN205
-memory[196][3] => Mux13.IN205
-memory[196][3] => Mux21.IN205
-memory[196][4] => Mux12.IN205
-memory[196][4] => Mux20.IN205
-memory[196][5] => Mux11.IN205
-memory[196][5] => Mux19.IN205
-memory[196][6] => Mux10.IN205
-memory[196][6] => Mux18.IN205
-memory[196][7] => Mux9.IN205
-memory[196][7] => Mux17.IN205
-memory[195][0] => Mux16.IN204
-memory[195][0] => Mux24.IN204
-memory[195][1] => Mux15.IN204
-memory[195][1] => Mux23.IN204
-memory[195][2] => Mux14.IN204
-memory[195][2] => Mux22.IN204
-memory[195][3] => Mux13.IN204
-memory[195][3] => Mux21.IN204
-memory[195][4] => Mux12.IN204
-memory[195][4] => Mux20.IN204
-memory[195][5] => Mux11.IN204
-memory[195][5] => Mux19.IN204
-memory[195][6] => Mux10.IN204
-memory[195][6] => Mux18.IN204
-memory[195][7] => Mux9.IN204
-memory[195][7] => Mux17.IN204
-memory[194][0] => Mux16.IN203
-memory[194][0] => Mux24.IN203
-memory[194][1] => Mux15.IN203
-memory[194][1] => Mux23.IN203
-memory[194][2] => Mux14.IN203
-memory[194][2] => Mux22.IN203
-memory[194][3] => Mux13.IN203
-memory[194][3] => Mux21.IN203
-memory[194][4] => Mux12.IN203
-memory[194][4] => Mux20.IN203
-memory[194][5] => Mux11.IN203
-memory[194][5] => Mux19.IN203
-memory[194][6] => Mux10.IN203
-memory[194][6] => Mux18.IN203
-memory[194][7] => Mux9.IN203
-memory[194][7] => Mux17.IN203
-memory[193][0] => Mux16.IN202
-memory[193][0] => Mux24.IN202
-memory[193][1] => Mux15.IN202
-memory[193][1] => Mux23.IN202
-memory[193][2] => Mux14.IN202
-memory[193][2] => Mux22.IN202
-memory[193][3] => Mux13.IN202
-memory[193][3] => Mux21.IN202
-memory[193][4] => Mux12.IN202
-memory[193][4] => Mux20.IN202
-memory[193][5] => Mux11.IN202
-memory[193][5] => Mux19.IN202
-memory[193][6] => Mux10.IN202
-memory[193][6] => Mux18.IN202
-memory[193][7] => Mux9.IN202
-memory[193][7] => Mux17.IN202
-memory[192][0] => Mux16.IN201
-memory[192][0] => Mux24.IN201
-memory[192][1] => Mux15.IN201
-memory[192][1] => Mux23.IN201
-memory[192][2] => Mux14.IN201
-memory[192][2] => Mux22.IN201
-memory[192][3] => Mux13.IN201
-memory[192][3] => Mux21.IN201
-memory[192][4] => Mux12.IN201
-memory[192][4] => Mux20.IN201
-memory[192][5] => Mux11.IN201
-memory[192][5] => Mux19.IN201
-memory[192][6] => Mux10.IN201
-memory[192][6] => Mux18.IN201
-memory[192][7] => Mux9.IN201
-memory[192][7] => Mux17.IN201
-memory[191][0] => Mux16.IN200
-memory[191][0] => Mux24.IN200
-memory[191][1] => Mux15.IN200
-memory[191][1] => Mux23.IN200
-memory[191][2] => Mux14.IN200
-memory[191][2] => Mux22.IN200
-memory[191][3] => Mux13.IN200
-memory[191][3] => Mux21.IN200
-memory[191][4] => Mux12.IN200
-memory[191][4] => Mux20.IN200
-memory[191][5] => Mux11.IN200
-memory[191][5] => Mux19.IN200
-memory[191][6] => Mux10.IN200
-memory[191][6] => Mux18.IN200
-memory[191][7] => Mux9.IN200
-memory[191][7] => Mux17.IN200
-memory[190][0] => Mux16.IN199
-memory[190][0] => Mux24.IN199
-memory[190][1] => Mux15.IN199
-memory[190][1] => Mux23.IN199
-memory[190][2] => Mux14.IN199
-memory[190][2] => Mux22.IN199
-memory[190][3] => Mux13.IN199
-memory[190][3] => Mux21.IN199
-memory[190][4] => Mux12.IN199
-memory[190][4] => Mux20.IN199
-memory[190][5] => Mux11.IN199
-memory[190][5] => Mux19.IN199
-memory[190][6] => Mux10.IN199
-memory[190][6] => Mux18.IN199
-memory[190][7] => Mux9.IN199
-memory[190][7] => Mux17.IN199
-memory[189][0] => Mux16.IN198
-memory[189][0] => Mux24.IN198
-memory[189][1] => Mux15.IN198
-memory[189][1] => Mux23.IN198
-memory[189][2] => Mux14.IN198
-memory[189][2] => Mux22.IN198
-memory[189][3] => Mux13.IN198
-memory[189][3] => Mux21.IN198
-memory[189][4] => Mux12.IN198
-memory[189][4] => Mux20.IN198
-memory[189][5] => Mux11.IN198
-memory[189][5] => Mux19.IN198
-memory[189][6] => Mux10.IN198
-memory[189][6] => Mux18.IN198
-memory[189][7] => Mux9.IN198
-memory[189][7] => Mux17.IN198
-memory[188][0] => Mux16.IN197
-memory[188][0] => Mux24.IN197
-memory[188][1] => Mux15.IN197
-memory[188][1] => Mux23.IN197
-memory[188][2] => Mux14.IN197
-memory[188][2] => Mux22.IN197
-memory[188][3] => Mux13.IN197
-memory[188][3] => Mux21.IN197
-memory[188][4] => Mux12.IN197
-memory[188][4] => Mux20.IN197
-memory[188][5] => Mux11.IN197
-memory[188][5] => Mux19.IN197
-memory[188][6] => Mux10.IN197
-memory[188][6] => Mux18.IN197
-memory[188][7] => Mux9.IN197
-memory[188][7] => Mux17.IN197
-memory[187][0] => Mux16.IN196
-memory[187][0] => Mux24.IN196
-memory[187][1] => Mux15.IN196
-memory[187][1] => Mux23.IN196
-memory[187][2] => Mux14.IN196
-memory[187][2] => Mux22.IN196
-memory[187][3] => Mux13.IN196
-memory[187][3] => Mux21.IN196
-memory[187][4] => Mux12.IN196
-memory[187][4] => Mux20.IN196
-memory[187][5] => Mux11.IN196
-memory[187][5] => Mux19.IN196
-memory[187][6] => Mux10.IN196
-memory[187][6] => Mux18.IN196
-memory[187][7] => Mux9.IN196
-memory[187][7] => Mux17.IN196
-memory[186][0] => Mux16.IN195
-memory[186][0] => Mux24.IN195
-memory[186][1] => Mux15.IN195
-memory[186][1] => Mux23.IN195
-memory[186][2] => Mux14.IN195
-memory[186][2] => Mux22.IN195
-memory[186][3] => Mux13.IN195
-memory[186][3] => Mux21.IN195
-memory[186][4] => Mux12.IN195
-memory[186][4] => Mux20.IN195
-memory[186][5] => Mux11.IN195
-memory[186][5] => Mux19.IN195
-memory[186][6] => Mux10.IN195
-memory[186][6] => Mux18.IN195
-memory[186][7] => Mux9.IN195
-memory[186][7] => Mux17.IN195
-memory[185][0] => Mux16.IN194
-memory[185][0] => Mux24.IN194
-memory[185][1] => Mux15.IN194
-memory[185][1] => Mux23.IN194
-memory[185][2] => Mux14.IN194
-memory[185][2] => Mux22.IN194
-memory[185][3] => Mux13.IN194
-memory[185][3] => Mux21.IN194
-memory[185][4] => Mux12.IN194
-memory[185][4] => Mux20.IN194
-memory[185][5] => Mux11.IN194
-memory[185][5] => Mux19.IN194
-memory[185][6] => Mux10.IN194
-memory[185][6] => Mux18.IN194
-memory[185][7] => Mux9.IN194
-memory[185][7] => Mux17.IN194
-memory[184][0] => Mux16.IN193
-memory[184][0] => Mux24.IN193
-memory[184][1] => Mux15.IN193
-memory[184][1] => Mux23.IN193
-memory[184][2] => Mux14.IN193
-memory[184][2] => Mux22.IN193
-memory[184][3] => Mux13.IN193
-memory[184][3] => Mux21.IN193
-memory[184][4] => Mux12.IN193
-memory[184][4] => Mux20.IN193
-memory[184][5] => Mux11.IN193
-memory[184][5] => Mux19.IN193
-memory[184][6] => Mux10.IN193
-memory[184][6] => Mux18.IN193
-memory[184][7] => Mux9.IN193
-memory[184][7] => Mux17.IN193
-memory[183][0] => Mux16.IN192
-memory[183][0] => Mux24.IN192
-memory[183][1] => Mux15.IN192
-memory[183][1] => Mux23.IN192
-memory[183][2] => Mux14.IN192
-memory[183][2] => Mux22.IN192
-memory[183][3] => Mux13.IN192
-memory[183][3] => Mux21.IN192
-memory[183][4] => Mux12.IN192
-memory[183][4] => Mux20.IN192
-memory[183][5] => Mux11.IN192
-memory[183][5] => Mux19.IN192
-memory[183][6] => Mux10.IN192
-memory[183][6] => Mux18.IN192
-memory[183][7] => Mux9.IN192
-memory[183][7] => Mux17.IN192
-memory[182][0] => Mux16.IN191
-memory[182][0] => Mux24.IN191
-memory[182][1] => Mux15.IN191
-memory[182][1] => Mux23.IN191
-memory[182][2] => Mux14.IN191
-memory[182][2] => Mux22.IN191
-memory[182][3] => Mux13.IN191
-memory[182][3] => Mux21.IN191
-memory[182][4] => Mux12.IN191
-memory[182][4] => Mux20.IN191
-memory[182][5] => Mux11.IN191
-memory[182][5] => Mux19.IN191
-memory[182][6] => Mux10.IN191
-memory[182][6] => Mux18.IN191
-memory[182][7] => Mux9.IN191
-memory[182][7] => Mux17.IN191
-memory[181][0] => Mux16.IN190
-memory[181][0] => Mux24.IN190
-memory[181][1] => Mux15.IN190
-memory[181][1] => Mux23.IN190
-memory[181][2] => Mux14.IN190
-memory[181][2] => Mux22.IN190
-memory[181][3] => Mux13.IN190
-memory[181][3] => Mux21.IN190
-memory[181][4] => Mux12.IN190
-memory[181][4] => Mux20.IN190
-memory[181][5] => Mux11.IN190
-memory[181][5] => Mux19.IN190
-memory[181][6] => Mux10.IN190
-memory[181][6] => Mux18.IN190
-memory[181][7] => Mux9.IN190
-memory[181][7] => Mux17.IN190
-memory[180][0] => Mux16.IN189
-memory[180][0] => Mux24.IN189
-memory[180][1] => Mux15.IN189
-memory[180][1] => Mux23.IN189
-memory[180][2] => Mux14.IN189
-memory[180][2] => Mux22.IN189
-memory[180][3] => Mux13.IN189
-memory[180][3] => Mux21.IN189
-memory[180][4] => Mux12.IN189
-memory[180][4] => Mux20.IN189
-memory[180][5] => Mux11.IN189
-memory[180][5] => Mux19.IN189
-memory[180][6] => Mux10.IN189
-memory[180][6] => Mux18.IN189
-memory[180][7] => Mux9.IN189
-memory[180][7] => Mux17.IN189
-memory[179][0] => Mux16.IN188
-memory[179][0] => Mux24.IN188
-memory[179][1] => Mux15.IN188
-memory[179][1] => Mux23.IN188
-memory[179][2] => Mux14.IN188
-memory[179][2] => Mux22.IN188
-memory[179][3] => Mux13.IN188
-memory[179][3] => Mux21.IN188
-memory[179][4] => Mux12.IN188
-memory[179][4] => Mux20.IN188
-memory[179][5] => Mux11.IN188
-memory[179][5] => Mux19.IN188
-memory[179][6] => Mux10.IN188
-memory[179][6] => Mux18.IN188
-memory[179][7] => Mux9.IN188
-memory[179][7] => Mux17.IN188
-memory[178][0] => Mux16.IN187
-memory[178][0] => Mux24.IN187
-memory[178][1] => Mux15.IN187
-memory[178][1] => Mux23.IN187
-memory[178][2] => Mux14.IN187
-memory[178][2] => Mux22.IN187
-memory[178][3] => Mux13.IN187
-memory[178][3] => Mux21.IN187
-memory[178][4] => Mux12.IN187
-memory[178][4] => Mux20.IN187
-memory[178][5] => Mux11.IN187
-memory[178][5] => Mux19.IN187
-memory[178][6] => Mux10.IN187
-memory[178][6] => Mux18.IN187
-memory[178][7] => Mux9.IN187
-memory[178][7] => Mux17.IN187
-memory[177][0] => Mux16.IN186
-memory[177][0] => Mux24.IN186
-memory[177][1] => Mux15.IN186
-memory[177][1] => Mux23.IN186
-memory[177][2] => Mux14.IN186
-memory[177][2] => Mux22.IN186
-memory[177][3] => Mux13.IN186
-memory[177][3] => Mux21.IN186
-memory[177][4] => Mux12.IN186
-memory[177][4] => Mux20.IN186
-memory[177][5] => Mux11.IN186
-memory[177][5] => Mux19.IN186
-memory[177][6] => Mux10.IN186
-memory[177][6] => Mux18.IN186
-memory[177][7] => Mux9.IN186
-memory[177][7] => Mux17.IN186
-memory[176][0] => Mux16.IN185
-memory[176][0] => Mux24.IN185
-memory[176][1] => Mux15.IN185
-memory[176][1] => Mux23.IN185
-memory[176][2] => Mux14.IN185
-memory[176][2] => Mux22.IN185
-memory[176][3] => Mux13.IN185
-memory[176][3] => Mux21.IN185
-memory[176][4] => Mux12.IN185
-memory[176][4] => Mux20.IN185
-memory[176][5] => Mux11.IN185
-memory[176][5] => Mux19.IN185
-memory[176][6] => Mux10.IN185
-memory[176][6] => Mux18.IN185
-memory[176][7] => Mux9.IN185
-memory[176][7] => Mux17.IN185
-memory[175][0] => Mux16.IN184
-memory[175][0] => Mux24.IN184
-memory[175][1] => Mux15.IN184
-memory[175][1] => Mux23.IN184
-memory[175][2] => Mux14.IN184
-memory[175][2] => Mux22.IN184
-memory[175][3] => Mux13.IN184
-memory[175][3] => Mux21.IN184
-memory[175][4] => Mux12.IN184
-memory[175][4] => Mux20.IN184
-memory[175][5] => Mux11.IN184
-memory[175][5] => Mux19.IN184
-memory[175][6] => Mux10.IN184
-memory[175][6] => Mux18.IN184
-memory[175][7] => Mux9.IN184
-memory[175][7] => Mux17.IN184
-memory[174][0] => Mux16.IN183
-memory[174][0] => Mux24.IN183
-memory[174][1] => Mux15.IN183
-memory[174][1] => Mux23.IN183
-memory[174][2] => Mux14.IN183
-memory[174][2] => Mux22.IN183
-memory[174][3] => Mux13.IN183
-memory[174][3] => Mux21.IN183
-memory[174][4] => Mux12.IN183
-memory[174][4] => Mux20.IN183
-memory[174][5] => Mux11.IN183
-memory[174][5] => Mux19.IN183
-memory[174][6] => Mux10.IN183
-memory[174][6] => Mux18.IN183
-memory[174][7] => Mux9.IN183
-memory[174][7] => Mux17.IN183
-memory[173][0] => Mux16.IN182
-memory[173][0] => Mux24.IN182
-memory[173][1] => Mux15.IN182
-memory[173][1] => Mux23.IN182
-memory[173][2] => Mux14.IN182
-memory[173][2] => Mux22.IN182
-memory[173][3] => Mux13.IN182
-memory[173][3] => Mux21.IN182
-memory[173][4] => Mux12.IN182
-memory[173][4] => Mux20.IN182
-memory[173][5] => Mux11.IN182
-memory[173][5] => Mux19.IN182
-memory[173][6] => Mux10.IN182
-memory[173][6] => Mux18.IN182
-memory[173][7] => Mux9.IN182
-memory[173][7] => Mux17.IN182
-memory[172][0] => Mux16.IN181
-memory[172][0] => Mux24.IN181
-memory[172][1] => Mux15.IN181
-memory[172][1] => Mux23.IN181
-memory[172][2] => Mux14.IN181
-memory[172][2] => Mux22.IN181
-memory[172][3] => Mux13.IN181
-memory[172][3] => Mux21.IN181
-memory[172][4] => Mux12.IN181
-memory[172][4] => Mux20.IN181
-memory[172][5] => Mux11.IN181
-memory[172][5] => Mux19.IN181
-memory[172][6] => Mux10.IN181
-memory[172][6] => Mux18.IN181
-memory[172][7] => Mux9.IN181
-memory[172][7] => Mux17.IN181
-memory[171][0] => Mux16.IN180
-memory[171][0] => Mux24.IN180
-memory[171][1] => Mux15.IN180
-memory[171][1] => Mux23.IN180
-memory[171][2] => Mux14.IN180
-memory[171][2] => Mux22.IN180
-memory[171][3] => Mux13.IN180
-memory[171][3] => Mux21.IN180
-memory[171][4] => Mux12.IN180
-memory[171][4] => Mux20.IN180
-memory[171][5] => Mux11.IN180
-memory[171][5] => Mux19.IN180
-memory[171][6] => Mux10.IN180
-memory[171][6] => Mux18.IN180
-memory[171][7] => Mux9.IN180
-memory[171][7] => Mux17.IN180
-memory[170][0] => Mux16.IN179
-memory[170][0] => Mux24.IN179
-memory[170][1] => Mux15.IN179
-memory[170][1] => Mux23.IN179
-memory[170][2] => Mux14.IN179
-memory[170][2] => Mux22.IN179
-memory[170][3] => Mux13.IN179
-memory[170][3] => Mux21.IN179
-memory[170][4] => Mux12.IN179
-memory[170][4] => Mux20.IN179
-memory[170][5] => Mux11.IN179
-memory[170][5] => Mux19.IN179
-memory[170][6] => Mux10.IN179
-memory[170][6] => Mux18.IN179
-memory[170][7] => Mux9.IN179
-memory[170][7] => Mux17.IN179
-memory[169][0] => Mux16.IN178
-memory[169][0] => Mux24.IN178
-memory[169][1] => Mux15.IN178
-memory[169][1] => Mux23.IN178
-memory[169][2] => Mux14.IN178
-memory[169][2] => Mux22.IN178
-memory[169][3] => Mux13.IN178
-memory[169][3] => Mux21.IN178
-memory[169][4] => Mux12.IN178
-memory[169][4] => Mux20.IN178
-memory[169][5] => Mux11.IN178
-memory[169][5] => Mux19.IN178
-memory[169][6] => Mux10.IN178
-memory[169][6] => Mux18.IN178
-memory[169][7] => Mux9.IN178
-memory[169][7] => Mux17.IN178
-memory[168][0] => Mux16.IN177
-memory[168][0] => Mux24.IN177
-memory[168][1] => Mux15.IN177
-memory[168][1] => Mux23.IN177
-memory[168][2] => Mux14.IN177
-memory[168][2] => Mux22.IN177
-memory[168][3] => Mux13.IN177
-memory[168][3] => Mux21.IN177
-memory[168][4] => Mux12.IN177
-memory[168][4] => Mux20.IN177
-memory[168][5] => Mux11.IN177
-memory[168][5] => Mux19.IN177
-memory[168][6] => Mux10.IN177
-memory[168][6] => Mux18.IN177
-memory[168][7] => Mux9.IN177
-memory[168][7] => Mux17.IN177
-memory[167][0] => Mux16.IN176
-memory[167][0] => Mux24.IN176
-memory[167][1] => Mux15.IN176
-memory[167][1] => Mux23.IN176
-memory[167][2] => Mux14.IN176
-memory[167][2] => Mux22.IN176
-memory[167][3] => Mux13.IN176
-memory[167][3] => Mux21.IN176
-memory[167][4] => Mux12.IN176
-memory[167][4] => Mux20.IN176
-memory[167][5] => Mux11.IN176
-memory[167][5] => Mux19.IN176
-memory[167][6] => Mux10.IN176
-memory[167][6] => Mux18.IN176
-memory[167][7] => Mux9.IN176
-memory[167][7] => Mux17.IN176
-memory[166][0] => Mux16.IN175
-memory[166][0] => Mux24.IN175
-memory[166][1] => Mux15.IN175
-memory[166][1] => Mux23.IN175
-memory[166][2] => Mux14.IN175
-memory[166][2] => Mux22.IN175
-memory[166][3] => Mux13.IN175
-memory[166][3] => Mux21.IN175
-memory[166][4] => Mux12.IN175
-memory[166][4] => Mux20.IN175
-memory[166][5] => Mux11.IN175
-memory[166][5] => Mux19.IN175
-memory[166][6] => Mux10.IN175
-memory[166][6] => Mux18.IN175
-memory[166][7] => Mux9.IN175
-memory[166][7] => Mux17.IN175
-memory[165][0] => Mux16.IN174
-memory[165][0] => Mux24.IN174
-memory[165][1] => Mux15.IN174
-memory[165][1] => Mux23.IN174
-memory[165][2] => Mux14.IN174
-memory[165][2] => Mux22.IN174
-memory[165][3] => Mux13.IN174
-memory[165][3] => Mux21.IN174
-memory[165][4] => Mux12.IN174
-memory[165][4] => Mux20.IN174
-memory[165][5] => Mux11.IN174
-memory[165][5] => Mux19.IN174
-memory[165][6] => Mux10.IN174
-memory[165][6] => Mux18.IN174
-memory[165][7] => Mux9.IN174
-memory[165][7] => Mux17.IN174
-memory[164][0] => Mux16.IN173
-memory[164][0] => Mux24.IN173
-memory[164][1] => Mux15.IN173
-memory[164][1] => Mux23.IN173
-memory[164][2] => Mux14.IN173
-memory[164][2] => Mux22.IN173
-memory[164][3] => Mux13.IN173
-memory[164][3] => Mux21.IN173
-memory[164][4] => Mux12.IN173
-memory[164][4] => Mux20.IN173
-memory[164][5] => Mux11.IN173
-memory[164][5] => Mux19.IN173
-memory[164][6] => Mux10.IN173
-memory[164][6] => Mux18.IN173
-memory[164][7] => Mux9.IN173
-memory[164][7] => Mux17.IN173
-memory[163][0] => Mux16.IN172
-memory[163][0] => Mux24.IN172
-memory[163][1] => Mux15.IN172
-memory[163][1] => Mux23.IN172
-memory[163][2] => Mux14.IN172
-memory[163][2] => Mux22.IN172
-memory[163][3] => Mux13.IN172
-memory[163][3] => Mux21.IN172
-memory[163][4] => Mux12.IN172
-memory[163][4] => Mux20.IN172
-memory[163][5] => Mux11.IN172
-memory[163][5] => Mux19.IN172
-memory[163][6] => Mux10.IN172
-memory[163][6] => Mux18.IN172
-memory[163][7] => Mux9.IN172
-memory[163][7] => Mux17.IN172
-memory[162][0] => Mux16.IN171
-memory[162][0] => Mux24.IN171
-memory[162][1] => Mux15.IN171
-memory[162][1] => Mux23.IN171
-memory[162][2] => Mux14.IN171
-memory[162][2] => Mux22.IN171
-memory[162][3] => Mux13.IN171
-memory[162][3] => Mux21.IN171
-memory[162][4] => Mux12.IN171
-memory[162][4] => Mux20.IN171
-memory[162][5] => Mux11.IN171
-memory[162][5] => Mux19.IN171
-memory[162][6] => Mux10.IN171
-memory[162][6] => Mux18.IN171
-memory[162][7] => Mux9.IN171
-memory[162][7] => Mux17.IN171
-memory[161][0] => Mux16.IN170
-memory[161][0] => Mux24.IN170
-memory[161][1] => Mux15.IN170
-memory[161][1] => Mux23.IN170
-memory[161][2] => Mux14.IN170
-memory[161][2] => Mux22.IN170
-memory[161][3] => Mux13.IN170
-memory[161][3] => Mux21.IN170
-memory[161][4] => Mux12.IN170
-memory[161][4] => Mux20.IN170
-memory[161][5] => Mux11.IN170
-memory[161][5] => Mux19.IN170
-memory[161][6] => Mux10.IN170
-memory[161][6] => Mux18.IN170
-memory[161][7] => Mux9.IN170
-memory[161][7] => Mux17.IN170
-memory[160][0] => Mux16.IN169
-memory[160][0] => Mux24.IN169
-memory[160][1] => Mux15.IN169
-memory[160][1] => Mux23.IN169
-memory[160][2] => Mux14.IN169
-memory[160][2] => Mux22.IN169
-memory[160][3] => Mux13.IN169
-memory[160][3] => Mux21.IN169
-memory[160][4] => Mux12.IN169
-memory[160][4] => Mux20.IN169
-memory[160][5] => Mux11.IN169
-memory[160][5] => Mux19.IN169
-memory[160][6] => Mux10.IN169
-memory[160][6] => Mux18.IN169
-memory[160][7] => Mux9.IN169
-memory[160][7] => Mux17.IN169
-memory[159][0] => Mux16.IN168
-memory[159][0] => Mux24.IN168
-memory[159][1] => Mux15.IN168
-memory[159][1] => Mux23.IN168
-memory[159][2] => Mux14.IN168
-memory[159][2] => Mux22.IN168
-memory[159][3] => Mux13.IN168
-memory[159][3] => Mux21.IN168
-memory[159][4] => Mux12.IN168
-memory[159][4] => Mux20.IN168
-memory[159][5] => Mux11.IN168
-memory[159][5] => Mux19.IN168
-memory[159][6] => Mux10.IN168
-memory[159][6] => Mux18.IN168
-memory[159][7] => Mux9.IN168
-memory[159][7] => Mux17.IN168
-memory[158][0] => Mux16.IN167
-memory[158][0] => Mux24.IN167
-memory[158][1] => Mux15.IN167
-memory[158][1] => Mux23.IN167
-memory[158][2] => Mux14.IN167
-memory[158][2] => Mux22.IN167
-memory[158][3] => Mux13.IN167
-memory[158][3] => Mux21.IN167
-memory[158][4] => Mux12.IN167
-memory[158][4] => Mux20.IN167
-memory[158][5] => Mux11.IN167
-memory[158][5] => Mux19.IN167
-memory[158][6] => Mux10.IN167
-memory[158][6] => Mux18.IN167
-memory[158][7] => Mux9.IN167
-memory[158][7] => Mux17.IN167
-memory[157][0] => Mux16.IN166
-memory[157][0] => Mux24.IN166
-memory[157][1] => Mux15.IN166
-memory[157][1] => Mux23.IN166
-memory[157][2] => Mux14.IN166
-memory[157][2] => Mux22.IN166
-memory[157][3] => Mux13.IN166
-memory[157][3] => Mux21.IN166
-memory[157][4] => Mux12.IN166
-memory[157][4] => Mux20.IN166
-memory[157][5] => Mux11.IN166
-memory[157][5] => Mux19.IN166
-memory[157][6] => Mux10.IN166
-memory[157][6] => Mux18.IN166
-memory[157][7] => Mux9.IN166
-memory[157][7] => Mux17.IN166
-memory[156][0] => Mux16.IN165
-memory[156][0] => Mux24.IN165
-memory[156][1] => Mux15.IN165
-memory[156][1] => Mux23.IN165
-memory[156][2] => Mux14.IN165
-memory[156][2] => Mux22.IN165
-memory[156][3] => Mux13.IN165
-memory[156][3] => Mux21.IN165
-memory[156][4] => Mux12.IN165
-memory[156][4] => Mux20.IN165
-memory[156][5] => Mux11.IN165
-memory[156][5] => Mux19.IN165
-memory[156][6] => Mux10.IN165
-memory[156][6] => Mux18.IN165
-memory[156][7] => Mux9.IN165
-memory[156][7] => Mux17.IN165
-memory[155][0] => Mux16.IN164
-memory[155][0] => Mux24.IN164
-memory[155][1] => Mux15.IN164
-memory[155][1] => Mux23.IN164
-memory[155][2] => Mux14.IN164
-memory[155][2] => Mux22.IN164
-memory[155][3] => Mux13.IN164
-memory[155][3] => Mux21.IN164
-memory[155][4] => Mux12.IN164
-memory[155][4] => Mux20.IN164
-memory[155][5] => Mux11.IN164
-memory[155][5] => Mux19.IN164
-memory[155][6] => Mux10.IN164
-memory[155][6] => Mux18.IN164
-memory[155][7] => Mux9.IN164
-memory[155][7] => Mux17.IN164
-memory[154][0] => Mux16.IN163
-memory[154][0] => Mux24.IN163
-memory[154][1] => Mux15.IN163
-memory[154][1] => Mux23.IN163
-memory[154][2] => Mux14.IN163
-memory[154][2] => Mux22.IN163
-memory[154][3] => Mux13.IN163
-memory[154][3] => Mux21.IN163
-memory[154][4] => Mux12.IN163
-memory[154][4] => Mux20.IN163
-memory[154][5] => Mux11.IN163
-memory[154][5] => Mux19.IN163
-memory[154][6] => Mux10.IN163
-memory[154][6] => Mux18.IN163
-memory[154][7] => Mux9.IN163
-memory[154][7] => Mux17.IN163
-memory[153][0] => Mux16.IN162
-memory[153][0] => Mux24.IN162
-memory[153][1] => Mux15.IN162
-memory[153][1] => Mux23.IN162
-memory[153][2] => Mux14.IN162
-memory[153][2] => Mux22.IN162
-memory[153][3] => Mux13.IN162
-memory[153][3] => Mux21.IN162
-memory[153][4] => Mux12.IN162
-memory[153][4] => Mux20.IN162
-memory[153][5] => Mux11.IN162
-memory[153][5] => Mux19.IN162
-memory[153][6] => Mux10.IN162
-memory[153][6] => Mux18.IN162
-memory[153][7] => Mux9.IN162
-memory[153][7] => Mux17.IN162
-memory[152][0] => Mux16.IN161
-memory[152][0] => Mux24.IN161
-memory[152][1] => Mux15.IN161
-memory[152][1] => Mux23.IN161
-memory[152][2] => Mux14.IN161
-memory[152][2] => Mux22.IN161
-memory[152][3] => Mux13.IN161
-memory[152][3] => Mux21.IN161
-memory[152][4] => Mux12.IN161
-memory[152][4] => Mux20.IN161
-memory[152][5] => Mux11.IN161
-memory[152][5] => Mux19.IN161
-memory[152][6] => Mux10.IN161
-memory[152][6] => Mux18.IN161
-memory[152][7] => Mux9.IN161
-memory[152][7] => Mux17.IN161
-memory[151][0] => Mux16.IN160
-memory[151][0] => Mux24.IN160
-memory[151][1] => Mux15.IN160
-memory[151][1] => Mux23.IN160
-memory[151][2] => Mux14.IN160
-memory[151][2] => Mux22.IN160
-memory[151][3] => Mux13.IN160
-memory[151][3] => Mux21.IN160
-memory[151][4] => Mux12.IN160
-memory[151][4] => Mux20.IN160
-memory[151][5] => Mux11.IN160
-memory[151][5] => Mux19.IN160
-memory[151][6] => Mux10.IN160
-memory[151][6] => Mux18.IN160
-memory[151][7] => Mux9.IN160
-memory[151][7] => Mux17.IN160
-memory[150][0] => Mux16.IN159
-memory[150][0] => Mux24.IN159
-memory[150][1] => Mux15.IN159
-memory[150][1] => Mux23.IN159
-memory[150][2] => Mux14.IN159
-memory[150][2] => Mux22.IN159
-memory[150][3] => Mux13.IN159
-memory[150][3] => Mux21.IN159
-memory[150][4] => Mux12.IN159
-memory[150][4] => Mux20.IN159
-memory[150][5] => Mux11.IN159
-memory[150][5] => Mux19.IN159
-memory[150][6] => Mux10.IN159
-memory[150][6] => Mux18.IN159
-memory[150][7] => Mux9.IN159
-memory[150][7] => Mux17.IN159
-memory[149][0] => Mux16.IN158
-memory[149][0] => Mux24.IN158
-memory[149][1] => Mux15.IN158
-memory[149][1] => Mux23.IN158
-memory[149][2] => Mux14.IN158
-memory[149][2] => Mux22.IN158
-memory[149][3] => Mux13.IN158
-memory[149][3] => Mux21.IN158
-memory[149][4] => Mux12.IN158
-memory[149][4] => Mux20.IN158
-memory[149][5] => Mux11.IN158
-memory[149][5] => Mux19.IN158
-memory[149][6] => Mux10.IN158
-memory[149][6] => Mux18.IN158
-memory[149][7] => Mux9.IN158
-memory[149][7] => Mux17.IN158
-memory[148][0] => Mux16.IN157
-memory[148][0] => Mux24.IN157
-memory[148][1] => Mux15.IN157
-memory[148][1] => Mux23.IN157
-memory[148][2] => Mux14.IN157
-memory[148][2] => Mux22.IN157
-memory[148][3] => Mux13.IN157
-memory[148][3] => Mux21.IN157
-memory[148][4] => Mux12.IN157
-memory[148][4] => Mux20.IN157
-memory[148][5] => Mux11.IN157
-memory[148][5] => Mux19.IN157
-memory[148][6] => Mux10.IN157
-memory[148][6] => Mux18.IN157
-memory[148][7] => Mux9.IN157
-memory[148][7] => Mux17.IN157
-memory[147][0] => Mux16.IN156
-memory[147][0] => Mux24.IN156
-memory[147][1] => Mux15.IN156
-memory[147][1] => Mux23.IN156
-memory[147][2] => Mux14.IN156
-memory[147][2] => Mux22.IN156
-memory[147][3] => Mux13.IN156
-memory[147][3] => Mux21.IN156
-memory[147][4] => Mux12.IN156
-memory[147][4] => Mux20.IN156
-memory[147][5] => Mux11.IN156
-memory[147][5] => Mux19.IN156
-memory[147][6] => Mux10.IN156
-memory[147][6] => Mux18.IN156
-memory[147][7] => Mux9.IN156
-memory[147][7] => Mux17.IN156
-memory[146][0] => Mux16.IN155
-memory[146][0] => Mux24.IN155
-memory[146][1] => Mux15.IN155
-memory[146][1] => Mux23.IN155
-memory[146][2] => Mux14.IN155
-memory[146][2] => Mux22.IN155
-memory[146][3] => Mux13.IN155
-memory[146][3] => Mux21.IN155
-memory[146][4] => Mux12.IN155
-memory[146][4] => Mux20.IN155
-memory[146][5] => Mux11.IN155
-memory[146][5] => Mux19.IN155
-memory[146][6] => Mux10.IN155
-memory[146][6] => Mux18.IN155
-memory[146][7] => Mux9.IN155
-memory[146][7] => Mux17.IN155
-memory[145][0] => Mux16.IN154
-memory[145][0] => Mux24.IN154
-memory[145][1] => Mux15.IN154
-memory[145][1] => Mux23.IN154
-memory[145][2] => Mux14.IN154
-memory[145][2] => Mux22.IN154
-memory[145][3] => Mux13.IN154
-memory[145][3] => Mux21.IN154
-memory[145][4] => Mux12.IN154
-memory[145][4] => Mux20.IN154
-memory[145][5] => Mux11.IN154
-memory[145][5] => Mux19.IN154
-memory[145][6] => Mux10.IN154
-memory[145][6] => Mux18.IN154
-memory[145][7] => Mux9.IN154
-memory[145][7] => Mux17.IN154
-memory[144][0] => Mux16.IN153
-memory[144][0] => Mux24.IN153
-memory[144][1] => Mux15.IN153
-memory[144][1] => Mux23.IN153
-memory[144][2] => Mux14.IN153
-memory[144][2] => Mux22.IN153
-memory[144][3] => Mux13.IN153
-memory[144][3] => Mux21.IN153
-memory[144][4] => Mux12.IN153
-memory[144][4] => Mux20.IN153
-memory[144][5] => Mux11.IN153
-memory[144][5] => Mux19.IN153
-memory[144][6] => Mux10.IN153
-memory[144][6] => Mux18.IN153
-memory[144][7] => Mux9.IN153
-memory[144][7] => Mux17.IN153
-memory[143][0] => Mux16.IN152
-memory[143][0] => Mux24.IN152
-memory[143][1] => Mux15.IN152
-memory[143][1] => Mux23.IN152
-memory[143][2] => Mux14.IN152
-memory[143][2] => Mux22.IN152
-memory[143][3] => Mux13.IN152
-memory[143][3] => Mux21.IN152
-memory[143][4] => Mux12.IN152
-memory[143][4] => Mux20.IN152
-memory[143][5] => Mux11.IN152
-memory[143][5] => Mux19.IN152
-memory[143][6] => Mux10.IN152
-memory[143][6] => Mux18.IN152
-memory[143][7] => Mux9.IN152
-memory[143][7] => Mux17.IN152
-memory[142][0] => Mux16.IN151
-memory[142][0] => Mux24.IN151
-memory[142][1] => Mux15.IN151
-memory[142][1] => Mux23.IN151
-memory[142][2] => Mux14.IN151
-memory[142][2] => Mux22.IN151
-memory[142][3] => Mux13.IN151
-memory[142][3] => Mux21.IN151
-memory[142][4] => Mux12.IN151
-memory[142][4] => Mux20.IN151
-memory[142][5] => Mux11.IN151
-memory[142][5] => Mux19.IN151
-memory[142][6] => Mux10.IN151
-memory[142][6] => Mux18.IN151
-memory[142][7] => Mux9.IN151
-memory[142][7] => Mux17.IN151
-memory[141][0] => Mux16.IN150
-memory[141][0] => Mux24.IN150
-memory[141][1] => Mux15.IN150
-memory[141][1] => Mux23.IN150
-memory[141][2] => Mux14.IN150
-memory[141][2] => Mux22.IN150
-memory[141][3] => Mux13.IN150
-memory[141][3] => Mux21.IN150
-memory[141][4] => Mux12.IN150
-memory[141][4] => Mux20.IN150
-memory[141][5] => Mux11.IN150
-memory[141][5] => Mux19.IN150
-memory[141][6] => Mux10.IN150
-memory[141][6] => Mux18.IN150
-memory[141][7] => Mux9.IN150
-memory[141][7] => Mux17.IN150
-memory[140][0] => Mux16.IN149
-memory[140][0] => Mux24.IN149
-memory[140][1] => Mux15.IN149
-memory[140][1] => Mux23.IN149
-memory[140][2] => Mux14.IN149
-memory[140][2] => Mux22.IN149
-memory[140][3] => Mux13.IN149
-memory[140][3] => Mux21.IN149
-memory[140][4] => Mux12.IN149
-memory[140][4] => Mux20.IN149
-memory[140][5] => Mux11.IN149
-memory[140][5] => Mux19.IN149
-memory[140][6] => Mux10.IN149
-memory[140][6] => Mux18.IN149
-memory[140][7] => Mux9.IN149
-memory[140][7] => Mux17.IN149
-memory[139][0] => Mux16.IN148
-memory[139][0] => Mux24.IN148
-memory[139][1] => Mux15.IN148
-memory[139][1] => Mux23.IN148
-memory[139][2] => Mux14.IN148
-memory[139][2] => Mux22.IN148
-memory[139][3] => Mux13.IN148
-memory[139][3] => Mux21.IN148
-memory[139][4] => Mux12.IN148
-memory[139][4] => Mux20.IN148
-memory[139][5] => Mux11.IN148
-memory[139][5] => Mux19.IN148
-memory[139][6] => Mux10.IN148
-memory[139][6] => Mux18.IN148
-memory[139][7] => Mux9.IN148
-memory[139][7] => Mux17.IN148
-memory[138][0] => Mux16.IN147
-memory[138][0] => Mux24.IN147
-memory[138][1] => Mux15.IN147
-memory[138][1] => Mux23.IN147
-memory[138][2] => Mux14.IN147
-memory[138][2] => Mux22.IN147
-memory[138][3] => Mux13.IN147
-memory[138][3] => Mux21.IN147
-memory[138][4] => Mux12.IN147
-memory[138][4] => Mux20.IN147
-memory[138][5] => Mux11.IN147
-memory[138][5] => Mux19.IN147
-memory[138][6] => Mux10.IN147
-memory[138][6] => Mux18.IN147
-memory[138][7] => Mux9.IN147
-memory[138][7] => Mux17.IN147
-memory[137][0] => Mux16.IN146
-memory[137][0] => Mux24.IN146
-memory[137][1] => Mux15.IN146
-memory[137][1] => Mux23.IN146
-memory[137][2] => Mux14.IN146
-memory[137][2] => Mux22.IN146
-memory[137][3] => Mux13.IN146
-memory[137][3] => Mux21.IN146
-memory[137][4] => Mux12.IN146
-memory[137][4] => Mux20.IN146
-memory[137][5] => Mux11.IN146
-memory[137][5] => Mux19.IN146
-memory[137][6] => Mux10.IN146
-memory[137][6] => Mux18.IN146
-memory[137][7] => Mux9.IN146
-memory[137][7] => Mux17.IN146
-memory[136][0] => Mux16.IN145
-memory[136][0] => Mux24.IN145
-memory[136][1] => Mux15.IN145
-memory[136][1] => Mux23.IN145
-memory[136][2] => Mux14.IN145
-memory[136][2] => Mux22.IN145
-memory[136][3] => Mux13.IN145
-memory[136][3] => Mux21.IN145
-memory[136][4] => Mux12.IN145
-memory[136][4] => Mux20.IN145
-memory[136][5] => Mux11.IN145
-memory[136][5] => Mux19.IN145
-memory[136][6] => Mux10.IN145
-memory[136][6] => Mux18.IN145
-memory[136][7] => Mux9.IN145
-memory[136][7] => Mux17.IN145
-memory[135][0] => Mux16.IN144
-memory[135][0] => Mux24.IN144
-memory[135][1] => Mux15.IN144
-memory[135][1] => Mux23.IN144
-memory[135][2] => Mux14.IN144
-memory[135][2] => Mux22.IN144
-memory[135][3] => Mux13.IN144
-memory[135][3] => Mux21.IN144
-memory[135][4] => Mux12.IN144
-memory[135][4] => Mux20.IN144
-memory[135][5] => Mux11.IN144
-memory[135][5] => Mux19.IN144
-memory[135][6] => Mux10.IN144
-memory[135][6] => Mux18.IN144
-memory[135][7] => Mux9.IN144
-memory[135][7] => Mux17.IN144
-memory[134][0] => Mux16.IN143
-memory[134][0] => Mux24.IN143
-memory[134][1] => Mux15.IN143
-memory[134][1] => Mux23.IN143
-memory[134][2] => Mux14.IN143
-memory[134][2] => Mux22.IN143
-memory[134][3] => Mux13.IN143
-memory[134][3] => Mux21.IN143
-memory[134][4] => Mux12.IN143
-memory[134][4] => Mux20.IN143
-memory[134][5] => Mux11.IN143
-memory[134][5] => Mux19.IN143
-memory[134][6] => Mux10.IN143
-memory[134][6] => Mux18.IN143
-memory[134][7] => Mux9.IN143
-memory[134][7] => Mux17.IN143
-memory[133][0] => Mux16.IN142
-memory[133][0] => Mux24.IN142
-memory[133][1] => Mux15.IN142
-memory[133][1] => Mux23.IN142
-memory[133][2] => Mux14.IN142
-memory[133][2] => Mux22.IN142
-memory[133][3] => Mux13.IN142
-memory[133][3] => Mux21.IN142
-memory[133][4] => Mux12.IN142
-memory[133][4] => Mux20.IN142
-memory[133][5] => Mux11.IN142
-memory[133][5] => Mux19.IN142
-memory[133][6] => Mux10.IN142
-memory[133][6] => Mux18.IN142
-memory[133][7] => Mux9.IN142
-memory[133][7] => Mux17.IN142
-memory[132][0] => Mux16.IN141
-memory[132][0] => Mux24.IN141
-memory[132][1] => Mux15.IN141
-memory[132][1] => Mux23.IN141
-memory[132][2] => Mux14.IN141
-memory[132][2] => Mux22.IN141
-memory[132][3] => Mux13.IN141
-memory[132][3] => Mux21.IN141
-memory[132][4] => Mux12.IN141
-memory[132][4] => Mux20.IN141
-memory[132][5] => Mux11.IN141
-memory[132][5] => Mux19.IN141
-memory[132][6] => Mux10.IN141
-memory[132][6] => Mux18.IN141
-memory[132][7] => Mux9.IN141
-memory[132][7] => Mux17.IN141
-memory[131][0] => Mux16.IN140
-memory[131][0] => Mux24.IN140
-memory[131][1] => Mux15.IN140
-memory[131][1] => Mux23.IN140
-memory[131][2] => Mux14.IN140
-memory[131][2] => Mux22.IN140
-memory[131][3] => Mux13.IN140
-memory[131][3] => Mux21.IN140
-memory[131][4] => Mux12.IN140
-memory[131][4] => Mux20.IN140
-memory[131][5] => Mux11.IN140
-memory[131][5] => Mux19.IN140
-memory[131][6] => Mux10.IN140
-memory[131][6] => Mux18.IN140
-memory[131][7] => Mux9.IN140
-memory[131][7] => Mux17.IN140
-memory[130][0] => Mux16.IN139
-memory[130][0] => Mux24.IN139
-memory[130][1] => Mux15.IN139
-memory[130][1] => Mux23.IN139
-memory[130][2] => Mux14.IN139
-memory[130][2] => Mux22.IN139
-memory[130][3] => Mux13.IN139
-memory[130][3] => Mux21.IN139
-memory[130][4] => Mux12.IN139
-memory[130][4] => Mux20.IN139
-memory[130][5] => Mux11.IN139
-memory[130][5] => Mux19.IN139
-memory[130][6] => Mux10.IN139
-memory[130][6] => Mux18.IN139
-memory[130][7] => Mux9.IN139
-memory[130][7] => Mux17.IN139
-memory[129][0] => Mux16.IN138
-memory[129][0] => Mux24.IN138
-memory[129][1] => Mux15.IN138
-memory[129][1] => Mux23.IN138
-memory[129][2] => Mux14.IN138
-memory[129][2] => Mux22.IN138
-memory[129][3] => Mux13.IN138
-memory[129][3] => Mux21.IN138
-memory[129][4] => Mux12.IN138
-memory[129][4] => Mux20.IN138
-memory[129][5] => Mux11.IN138
-memory[129][5] => Mux19.IN138
-memory[129][6] => Mux10.IN138
-memory[129][6] => Mux18.IN138
-memory[129][7] => Mux9.IN138
-memory[129][7] => Mux17.IN138
-memory[128][0] => Mux16.IN137
-memory[128][0] => Mux24.IN137
-memory[128][1] => Mux15.IN137
-memory[128][1] => Mux23.IN137
-memory[128][2] => Mux14.IN137
-memory[128][2] => Mux22.IN137
-memory[128][3] => Mux13.IN137
-memory[128][3] => Mux21.IN137
-memory[128][4] => Mux12.IN137
-memory[128][4] => Mux20.IN137
-memory[128][5] => Mux11.IN137
-memory[128][5] => Mux19.IN137
-memory[128][6] => Mux10.IN137
-memory[128][6] => Mux18.IN137
-memory[128][7] => Mux9.IN137
-memory[128][7] => Mux17.IN137
-memory[127][0] => Mux16.IN136
-memory[127][0] => Mux24.IN136
-memory[127][1] => Mux15.IN136
-memory[127][1] => Mux23.IN136
-memory[127][2] => Mux14.IN136
-memory[127][2] => Mux22.IN136
-memory[127][3] => Mux13.IN136
-memory[127][3] => Mux21.IN136
-memory[127][4] => Mux12.IN136
-memory[127][4] => Mux20.IN136
-memory[127][5] => Mux11.IN136
-memory[127][5] => Mux19.IN136
-memory[127][6] => Mux10.IN136
-memory[127][6] => Mux18.IN136
-memory[127][7] => Mux9.IN136
-memory[127][7] => Mux17.IN136
-memory[126][0] => Mux16.IN135
-memory[126][0] => Mux24.IN135
-memory[126][1] => Mux15.IN135
-memory[126][1] => Mux23.IN135
-memory[126][2] => Mux14.IN135
-memory[126][2] => Mux22.IN135
-memory[126][3] => Mux13.IN135
-memory[126][3] => Mux21.IN135
-memory[126][4] => Mux12.IN135
-memory[126][4] => Mux20.IN135
-memory[126][5] => Mux11.IN135
-memory[126][5] => Mux19.IN135
-memory[126][6] => Mux10.IN135
-memory[126][6] => Mux18.IN135
-memory[126][7] => Mux9.IN135
-memory[126][7] => Mux17.IN135
-memory[125][0] => Mux16.IN134
-memory[125][0] => Mux24.IN134
-memory[125][1] => Mux15.IN134
-memory[125][1] => Mux23.IN134
-memory[125][2] => Mux14.IN134
-memory[125][2] => Mux22.IN134
-memory[125][3] => Mux13.IN134
-memory[125][3] => Mux21.IN134
-memory[125][4] => Mux12.IN134
-memory[125][4] => Mux20.IN134
-memory[125][5] => Mux11.IN134
-memory[125][5] => Mux19.IN134
-memory[125][6] => Mux10.IN134
-memory[125][6] => Mux18.IN134
-memory[125][7] => Mux9.IN134
-memory[125][7] => Mux17.IN134
-memory[124][0] => Mux16.IN133
-memory[124][0] => Mux24.IN133
-memory[124][1] => Mux15.IN133
-memory[124][1] => Mux23.IN133
-memory[124][2] => Mux14.IN133
-memory[124][2] => Mux22.IN133
-memory[124][3] => Mux13.IN133
-memory[124][3] => Mux21.IN133
-memory[124][4] => Mux12.IN133
-memory[124][4] => Mux20.IN133
-memory[124][5] => Mux11.IN133
-memory[124][5] => Mux19.IN133
-memory[124][6] => Mux10.IN133
-memory[124][6] => Mux18.IN133
-memory[124][7] => Mux9.IN133
-memory[124][7] => Mux17.IN133
-memory[123][0] => Mux16.IN132
-memory[123][0] => Mux24.IN132
-memory[123][1] => Mux15.IN132
-memory[123][1] => Mux23.IN132
-memory[123][2] => Mux14.IN132
-memory[123][2] => Mux22.IN132
-memory[123][3] => Mux13.IN132
-memory[123][3] => Mux21.IN132
-memory[123][4] => Mux12.IN132
-memory[123][4] => Mux20.IN132
-memory[123][5] => Mux11.IN132
-memory[123][5] => Mux19.IN132
-memory[123][6] => Mux10.IN132
-memory[123][6] => Mux18.IN132
-memory[123][7] => Mux9.IN132
-memory[123][7] => Mux17.IN132
-memory[122][0] => Mux16.IN131
-memory[122][0] => Mux24.IN131
-memory[122][1] => Mux15.IN131
-memory[122][1] => Mux23.IN131
-memory[122][2] => Mux14.IN131
-memory[122][2] => Mux22.IN131
-memory[122][3] => Mux13.IN131
-memory[122][3] => Mux21.IN131
-memory[122][4] => Mux12.IN131
-memory[122][4] => Mux20.IN131
-memory[122][5] => Mux11.IN131
-memory[122][5] => Mux19.IN131
-memory[122][6] => Mux10.IN131
-memory[122][6] => Mux18.IN131
-memory[122][7] => Mux9.IN131
-memory[122][7] => Mux17.IN131
-memory[121][0] => Mux16.IN130
-memory[121][0] => Mux24.IN130
-memory[121][1] => Mux15.IN130
-memory[121][1] => Mux23.IN130
-memory[121][2] => Mux14.IN130
-memory[121][2] => Mux22.IN130
-memory[121][3] => Mux13.IN130
-memory[121][3] => Mux21.IN130
-memory[121][4] => Mux12.IN130
-memory[121][4] => Mux20.IN130
-memory[121][5] => Mux11.IN130
-memory[121][5] => Mux19.IN130
-memory[121][6] => Mux10.IN130
-memory[121][6] => Mux18.IN130
-memory[121][7] => Mux9.IN130
-memory[121][7] => Mux17.IN130
-memory[120][0] => Mux16.IN129
-memory[120][0] => Mux24.IN129
-memory[120][1] => Mux15.IN129
-memory[120][1] => Mux23.IN129
-memory[120][2] => Mux14.IN129
-memory[120][2] => Mux22.IN129
-memory[120][3] => Mux13.IN129
-memory[120][3] => Mux21.IN129
-memory[120][4] => Mux12.IN129
-memory[120][4] => Mux20.IN129
-memory[120][5] => Mux11.IN129
-memory[120][5] => Mux19.IN129
-memory[120][6] => Mux10.IN129
-memory[120][6] => Mux18.IN129
-memory[120][7] => Mux9.IN129
-memory[120][7] => Mux17.IN129
-memory[119][0] => Mux16.IN128
-memory[119][0] => Mux24.IN128
-memory[119][1] => Mux15.IN128
-memory[119][1] => Mux23.IN128
-memory[119][2] => Mux14.IN128
-memory[119][2] => Mux22.IN128
-memory[119][3] => Mux13.IN128
-memory[119][3] => Mux21.IN128
-memory[119][4] => Mux12.IN128
-memory[119][4] => Mux20.IN128
-memory[119][5] => Mux11.IN128
-memory[119][5] => Mux19.IN128
-memory[119][6] => Mux10.IN128
-memory[119][6] => Mux18.IN128
-memory[119][7] => Mux9.IN128
-memory[119][7] => Mux17.IN128
-memory[118][0] => Mux16.IN127
-memory[118][0] => Mux24.IN127
-memory[118][1] => Mux15.IN127
-memory[118][1] => Mux23.IN127
-memory[118][2] => Mux14.IN127
-memory[118][2] => Mux22.IN127
-memory[118][3] => Mux13.IN127
-memory[118][3] => Mux21.IN127
-memory[118][4] => Mux12.IN127
-memory[118][4] => Mux20.IN127
-memory[118][5] => Mux11.IN127
-memory[118][5] => Mux19.IN127
-memory[118][6] => Mux10.IN127
-memory[118][6] => Mux18.IN127
-memory[118][7] => Mux9.IN127
-memory[118][7] => Mux17.IN127
-memory[117][0] => Mux16.IN126
-memory[117][0] => Mux24.IN126
-memory[117][1] => Mux15.IN126
-memory[117][1] => Mux23.IN126
-memory[117][2] => Mux14.IN126
-memory[117][2] => Mux22.IN126
-memory[117][3] => Mux13.IN126
-memory[117][3] => Mux21.IN126
-memory[117][4] => Mux12.IN126
-memory[117][4] => Mux20.IN126
-memory[117][5] => Mux11.IN126
-memory[117][5] => Mux19.IN126
-memory[117][6] => Mux10.IN126
-memory[117][6] => Mux18.IN126
-memory[117][7] => Mux9.IN126
-memory[117][7] => Mux17.IN126
-memory[116][0] => Mux16.IN125
-memory[116][0] => Mux24.IN125
-memory[116][1] => Mux15.IN125
-memory[116][1] => Mux23.IN125
-memory[116][2] => Mux14.IN125
-memory[116][2] => Mux22.IN125
-memory[116][3] => Mux13.IN125
-memory[116][3] => Mux21.IN125
-memory[116][4] => Mux12.IN125
-memory[116][4] => Mux20.IN125
-memory[116][5] => Mux11.IN125
-memory[116][5] => Mux19.IN125
-memory[116][6] => Mux10.IN125
-memory[116][6] => Mux18.IN125
-memory[116][7] => Mux9.IN125
-memory[116][7] => Mux17.IN125
-memory[115][0] => Mux16.IN124
-memory[115][0] => Mux24.IN124
-memory[115][1] => Mux15.IN124
-memory[115][1] => Mux23.IN124
-memory[115][2] => Mux14.IN124
-memory[115][2] => Mux22.IN124
-memory[115][3] => Mux13.IN124
-memory[115][3] => Mux21.IN124
-memory[115][4] => Mux12.IN124
-memory[115][4] => Mux20.IN124
-memory[115][5] => Mux11.IN124
-memory[115][5] => Mux19.IN124
-memory[115][6] => Mux10.IN124
-memory[115][6] => Mux18.IN124
-memory[115][7] => Mux9.IN124
-memory[115][7] => Mux17.IN124
-memory[114][0] => Mux16.IN123
-memory[114][0] => Mux24.IN123
-memory[114][1] => Mux15.IN123
-memory[114][1] => Mux23.IN123
-memory[114][2] => Mux14.IN123
-memory[114][2] => Mux22.IN123
-memory[114][3] => Mux13.IN123
-memory[114][3] => Mux21.IN123
-memory[114][4] => Mux12.IN123
-memory[114][4] => Mux20.IN123
-memory[114][5] => Mux11.IN123
-memory[114][5] => Mux19.IN123
-memory[114][6] => Mux10.IN123
-memory[114][6] => Mux18.IN123
-memory[114][7] => Mux9.IN123
-memory[114][7] => Mux17.IN123
-memory[113][0] => Mux16.IN122
-memory[113][0] => Mux24.IN122
-memory[113][1] => Mux15.IN122
-memory[113][1] => Mux23.IN122
-memory[113][2] => Mux14.IN122
-memory[113][2] => Mux22.IN122
-memory[113][3] => Mux13.IN122
-memory[113][3] => Mux21.IN122
-memory[113][4] => Mux12.IN122
-memory[113][4] => Mux20.IN122
-memory[113][5] => Mux11.IN122
-memory[113][5] => Mux19.IN122
-memory[113][6] => Mux10.IN122
-memory[113][6] => Mux18.IN122
-memory[113][7] => Mux9.IN122
-memory[113][7] => Mux17.IN122
-memory[112][0] => Mux16.IN121
-memory[112][0] => Mux24.IN121
-memory[112][1] => Mux15.IN121
-memory[112][1] => Mux23.IN121
-memory[112][2] => Mux14.IN121
-memory[112][2] => Mux22.IN121
-memory[112][3] => Mux13.IN121
-memory[112][3] => Mux21.IN121
-memory[112][4] => Mux12.IN121
-memory[112][4] => Mux20.IN121
-memory[112][5] => Mux11.IN121
-memory[112][5] => Mux19.IN121
-memory[112][6] => Mux10.IN121
-memory[112][6] => Mux18.IN121
-memory[112][7] => Mux9.IN121
-memory[112][7] => Mux17.IN121
-memory[111][0] => Mux16.IN120
-memory[111][0] => Mux24.IN120
-memory[111][1] => Mux15.IN120
-memory[111][1] => Mux23.IN120
-memory[111][2] => Mux14.IN120
-memory[111][2] => Mux22.IN120
-memory[111][3] => Mux13.IN120
-memory[111][3] => Mux21.IN120
-memory[111][4] => Mux12.IN120
-memory[111][4] => Mux20.IN120
-memory[111][5] => Mux11.IN120
-memory[111][5] => Mux19.IN120
-memory[111][6] => Mux10.IN120
-memory[111][6] => Mux18.IN120
-memory[111][7] => Mux9.IN120
-memory[111][7] => Mux17.IN120
-memory[110][0] => Mux16.IN119
-memory[110][0] => Mux24.IN119
-memory[110][1] => Mux15.IN119
-memory[110][1] => Mux23.IN119
-memory[110][2] => Mux14.IN119
-memory[110][2] => Mux22.IN119
-memory[110][3] => Mux13.IN119
-memory[110][3] => Mux21.IN119
-memory[110][4] => Mux12.IN119
-memory[110][4] => Mux20.IN119
-memory[110][5] => Mux11.IN119
-memory[110][5] => Mux19.IN119
-memory[110][6] => Mux10.IN119
-memory[110][6] => Mux18.IN119
-memory[110][7] => Mux9.IN119
-memory[110][7] => Mux17.IN119
-memory[109][0] => Mux16.IN118
-memory[109][0] => Mux24.IN118
-memory[109][1] => Mux15.IN118
-memory[109][1] => Mux23.IN118
-memory[109][2] => Mux14.IN118
-memory[109][2] => Mux22.IN118
-memory[109][3] => Mux13.IN118
-memory[109][3] => Mux21.IN118
-memory[109][4] => Mux12.IN118
-memory[109][4] => Mux20.IN118
-memory[109][5] => Mux11.IN118
-memory[109][5] => Mux19.IN118
-memory[109][6] => Mux10.IN118
-memory[109][6] => Mux18.IN118
-memory[109][7] => Mux9.IN118
-memory[109][7] => Mux17.IN118
-memory[108][0] => Mux16.IN117
-memory[108][0] => Mux24.IN117
-memory[108][1] => Mux15.IN117
-memory[108][1] => Mux23.IN117
-memory[108][2] => Mux14.IN117
-memory[108][2] => Mux22.IN117
-memory[108][3] => Mux13.IN117
-memory[108][3] => Mux21.IN117
-memory[108][4] => Mux12.IN117
-memory[108][4] => Mux20.IN117
-memory[108][5] => Mux11.IN117
-memory[108][5] => Mux19.IN117
-memory[108][6] => Mux10.IN117
-memory[108][6] => Mux18.IN117
-memory[108][7] => Mux9.IN117
-memory[108][7] => Mux17.IN117
-memory[107][0] => Mux16.IN116
-memory[107][0] => Mux24.IN116
-memory[107][1] => Mux15.IN116
-memory[107][1] => Mux23.IN116
-memory[107][2] => Mux14.IN116
-memory[107][2] => Mux22.IN116
-memory[107][3] => Mux13.IN116
-memory[107][3] => Mux21.IN116
-memory[107][4] => Mux12.IN116
-memory[107][4] => Mux20.IN116
-memory[107][5] => Mux11.IN116
-memory[107][5] => Mux19.IN116
-memory[107][6] => Mux10.IN116
-memory[107][6] => Mux18.IN116
-memory[107][7] => Mux9.IN116
-memory[107][7] => Mux17.IN116
-memory[106][0] => Mux16.IN115
-memory[106][0] => Mux24.IN115
-memory[106][1] => Mux15.IN115
-memory[106][1] => Mux23.IN115
-memory[106][2] => Mux14.IN115
-memory[106][2] => Mux22.IN115
-memory[106][3] => Mux13.IN115
-memory[106][3] => Mux21.IN115
-memory[106][4] => Mux12.IN115
-memory[106][4] => Mux20.IN115
-memory[106][5] => Mux11.IN115
-memory[106][5] => Mux19.IN115
-memory[106][6] => Mux10.IN115
-memory[106][6] => Mux18.IN115
-memory[106][7] => Mux9.IN115
-memory[106][7] => Mux17.IN115
-memory[105][0] => Mux16.IN114
-memory[105][0] => Mux24.IN114
-memory[105][1] => Mux15.IN114
-memory[105][1] => Mux23.IN114
-memory[105][2] => Mux14.IN114
-memory[105][2] => Mux22.IN114
-memory[105][3] => Mux13.IN114
-memory[105][3] => Mux21.IN114
-memory[105][4] => Mux12.IN114
-memory[105][4] => Mux20.IN114
-memory[105][5] => Mux11.IN114
-memory[105][5] => Mux19.IN114
-memory[105][6] => Mux10.IN114
-memory[105][6] => Mux18.IN114
-memory[105][7] => Mux9.IN114
-memory[105][7] => Mux17.IN114
-memory[104][0] => Mux16.IN113
-memory[104][0] => Mux24.IN113
-memory[104][1] => Mux15.IN113
-memory[104][1] => Mux23.IN113
-memory[104][2] => Mux14.IN113
-memory[104][2] => Mux22.IN113
-memory[104][3] => Mux13.IN113
-memory[104][3] => Mux21.IN113
-memory[104][4] => Mux12.IN113
-memory[104][4] => Mux20.IN113
-memory[104][5] => Mux11.IN113
-memory[104][5] => Mux19.IN113
-memory[104][6] => Mux10.IN113
-memory[104][6] => Mux18.IN113
-memory[104][7] => Mux9.IN113
-memory[104][7] => Mux17.IN113
-memory[103][0] => Mux16.IN112
-memory[103][0] => Mux24.IN112
-memory[103][1] => Mux15.IN112
-memory[103][1] => Mux23.IN112
-memory[103][2] => Mux14.IN112
-memory[103][2] => Mux22.IN112
-memory[103][3] => Mux13.IN112
-memory[103][3] => Mux21.IN112
-memory[103][4] => Mux12.IN112
-memory[103][4] => Mux20.IN112
-memory[103][5] => Mux11.IN112
-memory[103][5] => Mux19.IN112
-memory[103][6] => Mux10.IN112
-memory[103][6] => Mux18.IN112
-memory[103][7] => Mux9.IN112
-memory[103][7] => Mux17.IN112
-memory[102][0] => Mux16.IN111
-memory[102][0] => Mux24.IN111
-memory[102][1] => Mux15.IN111
-memory[102][1] => Mux23.IN111
-memory[102][2] => Mux14.IN111
-memory[102][2] => Mux22.IN111
-memory[102][3] => Mux13.IN111
-memory[102][3] => Mux21.IN111
-memory[102][4] => Mux12.IN111
-memory[102][4] => Mux20.IN111
-memory[102][5] => Mux11.IN111
-memory[102][5] => Mux19.IN111
-memory[102][6] => Mux10.IN111
-memory[102][6] => Mux18.IN111
-memory[102][7] => Mux9.IN111
-memory[102][7] => Mux17.IN111
-memory[101][0] => Mux16.IN110
-memory[101][0] => Mux24.IN110
-memory[101][1] => Mux15.IN110
-memory[101][1] => Mux23.IN110
-memory[101][2] => Mux14.IN110
-memory[101][2] => Mux22.IN110
-memory[101][3] => Mux13.IN110
-memory[101][3] => Mux21.IN110
-memory[101][4] => Mux12.IN110
-memory[101][4] => Mux20.IN110
-memory[101][5] => Mux11.IN110
-memory[101][5] => Mux19.IN110
-memory[101][6] => Mux10.IN110
-memory[101][6] => Mux18.IN110
-memory[101][7] => Mux9.IN110
-memory[101][7] => Mux17.IN110
-memory[100][0] => Mux16.IN109
-memory[100][0] => Mux24.IN109
-memory[100][1] => Mux15.IN109
-memory[100][1] => Mux23.IN109
-memory[100][2] => Mux14.IN109
-memory[100][2] => Mux22.IN109
-memory[100][3] => Mux13.IN109
-memory[100][3] => Mux21.IN109
-memory[100][4] => Mux12.IN109
-memory[100][4] => Mux20.IN109
-memory[100][5] => Mux11.IN109
-memory[100][5] => Mux19.IN109
-memory[100][6] => Mux10.IN109
-memory[100][6] => Mux18.IN109
-memory[100][7] => Mux9.IN109
-memory[100][7] => Mux17.IN109
-memory[99][0] => Mux16.IN108
-memory[99][0] => Mux24.IN108
-memory[99][1] => Mux15.IN108
-memory[99][1] => Mux23.IN108
-memory[99][2] => Mux14.IN108
-memory[99][2] => Mux22.IN108
-memory[99][3] => Mux13.IN108
-memory[99][3] => Mux21.IN108
-memory[99][4] => Mux12.IN108
-memory[99][4] => Mux20.IN108
-memory[99][5] => Mux11.IN108
-memory[99][5] => Mux19.IN108
-memory[99][6] => Mux10.IN108
-memory[99][6] => Mux18.IN108
-memory[99][7] => Mux9.IN108
-memory[99][7] => Mux17.IN108
-memory[98][0] => Mux16.IN107
-memory[98][0] => Mux24.IN107
-memory[98][1] => Mux15.IN107
-memory[98][1] => Mux23.IN107
-memory[98][2] => Mux14.IN107
-memory[98][2] => Mux22.IN107
-memory[98][3] => Mux13.IN107
-memory[98][3] => Mux21.IN107
-memory[98][4] => Mux12.IN107
-memory[98][4] => Mux20.IN107
-memory[98][5] => Mux11.IN107
-memory[98][5] => Mux19.IN107
-memory[98][6] => Mux10.IN107
-memory[98][6] => Mux18.IN107
-memory[98][7] => Mux9.IN107
-memory[98][7] => Mux17.IN107
-memory[97][0] => Mux16.IN106
-memory[97][0] => Mux24.IN106
-memory[97][1] => Mux15.IN106
-memory[97][1] => Mux23.IN106
-memory[97][2] => Mux14.IN106
-memory[97][2] => Mux22.IN106
-memory[97][3] => Mux13.IN106
-memory[97][3] => Mux21.IN106
-memory[97][4] => Mux12.IN106
-memory[97][4] => Mux20.IN106
-memory[97][5] => Mux11.IN106
-memory[97][5] => Mux19.IN106
-memory[97][6] => Mux10.IN106
-memory[97][6] => Mux18.IN106
-memory[97][7] => Mux9.IN106
-memory[97][7] => Mux17.IN106
-memory[96][0] => Mux16.IN105
-memory[96][0] => Mux24.IN105
-memory[96][1] => Mux15.IN105
-memory[96][1] => Mux23.IN105
-memory[96][2] => Mux14.IN105
-memory[96][2] => Mux22.IN105
-memory[96][3] => Mux13.IN105
-memory[96][3] => Mux21.IN105
-memory[96][4] => Mux12.IN105
-memory[96][4] => Mux20.IN105
-memory[96][5] => Mux11.IN105
-memory[96][5] => Mux19.IN105
-memory[96][6] => Mux10.IN105
-memory[96][6] => Mux18.IN105
-memory[96][7] => Mux9.IN105
-memory[96][7] => Mux17.IN105
-memory[95][0] => Mux16.IN104
-memory[95][0] => Mux24.IN104
-memory[95][1] => Mux15.IN104
-memory[95][1] => Mux23.IN104
-memory[95][2] => Mux14.IN104
-memory[95][2] => Mux22.IN104
-memory[95][3] => Mux13.IN104
-memory[95][3] => Mux21.IN104
-memory[95][4] => Mux12.IN104
-memory[95][4] => Mux20.IN104
-memory[95][5] => Mux11.IN104
-memory[95][5] => Mux19.IN104
-memory[95][6] => Mux10.IN104
-memory[95][6] => Mux18.IN104
-memory[95][7] => Mux9.IN104
-memory[95][7] => Mux17.IN104
-memory[94][0] => Mux16.IN103
-memory[94][0] => Mux24.IN103
-memory[94][1] => Mux15.IN103
-memory[94][1] => Mux23.IN103
-memory[94][2] => Mux14.IN103
-memory[94][2] => Mux22.IN103
-memory[94][3] => Mux13.IN103
-memory[94][3] => Mux21.IN103
-memory[94][4] => Mux12.IN103
-memory[94][4] => Mux20.IN103
-memory[94][5] => Mux11.IN103
-memory[94][5] => Mux19.IN103
-memory[94][6] => Mux10.IN103
-memory[94][6] => Mux18.IN103
-memory[94][7] => Mux9.IN103
-memory[94][7] => Mux17.IN103
-memory[93][0] => Mux16.IN102
-memory[93][0] => Mux24.IN102
-memory[93][1] => Mux15.IN102
-memory[93][1] => Mux23.IN102
-memory[93][2] => Mux14.IN102
-memory[93][2] => Mux22.IN102
-memory[93][3] => Mux13.IN102
-memory[93][3] => Mux21.IN102
-memory[93][4] => Mux12.IN102
-memory[93][4] => Mux20.IN102
-memory[93][5] => Mux11.IN102
-memory[93][5] => Mux19.IN102
-memory[93][6] => Mux10.IN102
-memory[93][6] => Mux18.IN102
-memory[93][7] => Mux9.IN102
-memory[93][7] => Mux17.IN102
-memory[92][0] => Mux16.IN101
-memory[92][0] => Mux24.IN101
-memory[92][1] => Mux15.IN101
-memory[92][1] => Mux23.IN101
-memory[92][2] => Mux14.IN101
-memory[92][2] => Mux22.IN101
-memory[92][3] => Mux13.IN101
-memory[92][3] => Mux21.IN101
-memory[92][4] => Mux12.IN101
-memory[92][4] => Mux20.IN101
-memory[92][5] => Mux11.IN101
-memory[92][5] => Mux19.IN101
-memory[92][6] => Mux10.IN101
-memory[92][6] => Mux18.IN101
-memory[92][7] => Mux9.IN101
-memory[92][7] => Mux17.IN101
-memory[91][0] => Mux16.IN100
-memory[91][0] => Mux24.IN100
-memory[91][1] => Mux15.IN100
-memory[91][1] => Mux23.IN100
-memory[91][2] => Mux14.IN100
-memory[91][2] => Mux22.IN100
-memory[91][3] => Mux13.IN100
-memory[91][3] => Mux21.IN100
-memory[91][4] => Mux12.IN100
-memory[91][4] => Mux20.IN100
-memory[91][5] => Mux11.IN100
-memory[91][5] => Mux19.IN100
-memory[91][6] => Mux10.IN100
-memory[91][6] => Mux18.IN100
-memory[91][7] => Mux9.IN100
-memory[91][7] => Mux17.IN100
-memory[90][0] => Mux16.IN99
-memory[90][0] => Mux24.IN99
-memory[90][1] => Mux15.IN99
-memory[90][1] => Mux23.IN99
-memory[90][2] => Mux14.IN99
-memory[90][2] => Mux22.IN99
-memory[90][3] => Mux13.IN99
-memory[90][3] => Mux21.IN99
-memory[90][4] => Mux12.IN99
-memory[90][4] => Mux20.IN99
-memory[90][5] => Mux11.IN99
-memory[90][5] => Mux19.IN99
-memory[90][6] => Mux10.IN99
-memory[90][6] => Mux18.IN99
-memory[90][7] => Mux9.IN99
-memory[90][7] => Mux17.IN99
-memory[89][0] => Mux16.IN98
-memory[89][0] => Mux24.IN98
-memory[89][1] => Mux15.IN98
-memory[89][1] => Mux23.IN98
-memory[89][2] => Mux14.IN98
-memory[89][2] => Mux22.IN98
-memory[89][3] => Mux13.IN98
-memory[89][3] => Mux21.IN98
-memory[89][4] => Mux12.IN98
-memory[89][4] => Mux20.IN98
-memory[89][5] => Mux11.IN98
-memory[89][5] => Mux19.IN98
-memory[89][6] => Mux10.IN98
-memory[89][6] => Mux18.IN98
-memory[89][7] => Mux9.IN98
-memory[89][7] => Mux17.IN98
-memory[88][0] => Mux16.IN97
-memory[88][0] => Mux24.IN97
-memory[88][1] => Mux15.IN97
-memory[88][1] => Mux23.IN97
-memory[88][2] => Mux14.IN97
-memory[88][2] => Mux22.IN97
-memory[88][3] => Mux13.IN97
-memory[88][3] => Mux21.IN97
-memory[88][4] => Mux12.IN97
-memory[88][4] => Mux20.IN97
-memory[88][5] => Mux11.IN97
-memory[88][5] => Mux19.IN97
-memory[88][6] => Mux10.IN97
-memory[88][6] => Mux18.IN97
-memory[88][7] => Mux9.IN97
-memory[88][7] => Mux17.IN97
-memory[87][0] => Mux16.IN96
-memory[87][0] => Mux24.IN96
-memory[87][1] => Mux15.IN96
-memory[87][1] => Mux23.IN96
-memory[87][2] => Mux14.IN96
-memory[87][2] => Mux22.IN96
-memory[87][3] => Mux13.IN96
-memory[87][3] => Mux21.IN96
-memory[87][4] => Mux12.IN96
-memory[87][4] => Mux20.IN96
-memory[87][5] => Mux11.IN96
-memory[87][5] => Mux19.IN96
-memory[87][6] => Mux10.IN96
-memory[87][6] => Mux18.IN96
-memory[87][7] => Mux9.IN96
-memory[87][7] => Mux17.IN96
-memory[86][0] => Mux16.IN95
-memory[86][0] => Mux24.IN95
-memory[86][1] => Mux15.IN95
-memory[86][1] => Mux23.IN95
-memory[86][2] => Mux14.IN95
-memory[86][2] => Mux22.IN95
-memory[86][3] => Mux13.IN95
-memory[86][3] => Mux21.IN95
-memory[86][4] => Mux12.IN95
-memory[86][4] => Mux20.IN95
-memory[86][5] => Mux11.IN95
-memory[86][5] => Mux19.IN95
-memory[86][6] => Mux10.IN95
-memory[86][6] => Mux18.IN95
-memory[86][7] => Mux9.IN95
-memory[86][7] => Mux17.IN95
-memory[85][0] => Mux16.IN94
-memory[85][0] => Mux24.IN94
-memory[85][1] => Mux15.IN94
-memory[85][1] => Mux23.IN94
-memory[85][2] => Mux14.IN94
-memory[85][2] => Mux22.IN94
-memory[85][3] => Mux13.IN94
-memory[85][3] => Mux21.IN94
-memory[85][4] => Mux12.IN94
-memory[85][4] => Mux20.IN94
-memory[85][5] => Mux11.IN94
-memory[85][5] => Mux19.IN94
-memory[85][6] => Mux10.IN94
-memory[85][6] => Mux18.IN94
-memory[85][7] => Mux9.IN94
-memory[85][7] => Mux17.IN94
-memory[84][0] => Mux16.IN93
-memory[84][0] => Mux24.IN93
-memory[84][1] => Mux15.IN93
-memory[84][1] => Mux23.IN93
-memory[84][2] => Mux14.IN93
-memory[84][2] => Mux22.IN93
-memory[84][3] => Mux13.IN93
-memory[84][3] => Mux21.IN93
-memory[84][4] => Mux12.IN93
-memory[84][4] => Mux20.IN93
-memory[84][5] => Mux11.IN93
-memory[84][5] => Mux19.IN93
-memory[84][6] => Mux10.IN93
-memory[84][6] => Mux18.IN93
-memory[84][7] => Mux9.IN93
-memory[84][7] => Mux17.IN93
-memory[83][0] => Mux16.IN92
-memory[83][0] => Mux24.IN92
-memory[83][1] => Mux15.IN92
-memory[83][1] => Mux23.IN92
-memory[83][2] => Mux14.IN92
-memory[83][2] => Mux22.IN92
-memory[83][3] => Mux13.IN92
-memory[83][3] => Mux21.IN92
-memory[83][4] => Mux12.IN92
-memory[83][4] => Mux20.IN92
-memory[83][5] => Mux11.IN92
-memory[83][5] => Mux19.IN92
-memory[83][6] => Mux10.IN92
-memory[83][6] => Mux18.IN92
-memory[83][7] => Mux9.IN92
-memory[83][7] => Mux17.IN92
-memory[82][0] => Mux16.IN91
-memory[82][0] => Mux24.IN91
-memory[82][1] => Mux15.IN91
-memory[82][1] => Mux23.IN91
-memory[82][2] => Mux14.IN91
-memory[82][2] => Mux22.IN91
-memory[82][3] => Mux13.IN91
-memory[82][3] => Mux21.IN91
-memory[82][4] => Mux12.IN91
-memory[82][4] => Mux20.IN91
-memory[82][5] => Mux11.IN91
-memory[82][5] => Mux19.IN91
-memory[82][6] => Mux10.IN91
-memory[82][6] => Mux18.IN91
-memory[82][7] => Mux9.IN91
-memory[82][7] => Mux17.IN91
-memory[81][0] => Mux16.IN90
-memory[81][0] => Mux24.IN90
-memory[81][1] => Mux15.IN90
-memory[81][1] => Mux23.IN90
-memory[81][2] => Mux14.IN90
-memory[81][2] => Mux22.IN90
-memory[81][3] => Mux13.IN90
-memory[81][3] => Mux21.IN90
-memory[81][4] => Mux12.IN90
-memory[81][4] => Mux20.IN90
-memory[81][5] => Mux11.IN90
-memory[81][5] => Mux19.IN90
-memory[81][6] => Mux10.IN90
-memory[81][6] => Mux18.IN90
-memory[81][7] => Mux9.IN90
-memory[81][7] => Mux17.IN90
-memory[80][0] => Mux16.IN89
-memory[80][0] => Mux24.IN89
-memory[80][1] => Mux15.IN89
-memory[80][1] => Mux23.IN89
-memory[80][2] => Mux14.IN89
-memory[80][2] => Mux22.IN89
-memory[80][3] => Mux13.IN89
-memory[80][3] => Mux21.IN89
-memory[80][4] => Mux12.IN89
-memory[80][4] => Mux20.IN89
-memory[80][5] => Mux11.IN89
-memory[80][5] => Mux19.IN89
-memory[80][6] => Mux10.IN89
-memory[80][6] => Mux18.IN89
-memory[80][7] => Mux9.IN89
-memory[80][7] => Mux17.IN89
-memory[79][0] => Mux16.IN88
-memory[79][0] => Mux24.IN88
-memory[79][1] => Mux15.IN88
-memory[79][1] => Mux23.IN88
-memory[79][2] => Mux14.IN88
-memory[79][2] => Mux22.IN88
-memory[79][3] => Mux13.IN88
-memory[79][3] => Mux21.IN88
-memory[79][4] => Mux12.IN88
-memory[79][4] => Mux20.IN88
-memory[79][5] => Mux11.IN88
-memory[79][5] => Mux19.IN88
-memory[79][6] => Mux10.IN88
-memory[79][6] => Mux18.IN88
-memory[79][7] => Mux9.IN88
-memory[79][7] => Mux17.IN88
-memory[78][0] => Mux16.IN87
-memory[78][0] => Mux24.IN87
-memory[78][1] => Mux15.IN87
-memory[78][1] => Mux23.IN87
-memory[78][2] => Mux14.IN87
-memory[78][2] => Mux22.IN87
-memory[78][3] => Mux13.IN87
-memory[78][3] => Mux21.IN87
-memory[78][4] => Mux12.IN87
-memory[78][4] => Mux20.IN87
-memory[78][5] => Mux11.IN87
-memory[78][5] => Mux19.IN87
-memory[78][6] => Mux10.IN87
-memory[78][6] => Mux18.IN87
-memory[78][7] => Mux9.IN87
-memory[78][7] => Mux17.IN87
-memory[77][0] => Mux16.IN86
-memory[77][0] => Mux24.IN86
-memory[77][1] => Mux15.IN86
-memory[77][1] => Mux23.IN86
-memory[77][2] => Mux14.IN86
-memory[77][2] => Mux22.IN86
-memory[77][3] => Mux13.IN86
-memory[77][3] => Mux21.IN86
-memory[77][4] => Mux12.IN86
-memory[77][4] => Mux20.IN86
-memory[77][5] => Mux11.IN86
-memory[77][5] => Mux19.IN86
-memory[77][6] => Mux10.IN86
-memory[77][6] => Mux18.IN86
-memory[77][7] => Mux9.IN86
-memory[77][7] => Mux17.IN86
-memory[76][0] => Mux16.IN85
-memory[76][0] => Mux24.IN85
-memory[76][1] => Mux15.IN85
-memory[76][1] => Mux23.IN85
-memory[76][2] => Mux14.IN85
-memory[76][2] => Mux22.IN85
-memory[76][3] => Mux13.IN85
-memory[76][3] => Mux21.IN85
-memory[76][4] => Mux12.IN85
-memory[76][4] => Mux20.IN85
-memory[76][5] => Mux11.IN85
-memory[76][5] => Mux19.IN85
-memory[76][6] => Mux10.IN85
-memory[76][6] => Mux18.IN85
-memory[76][7] => Mux9.IN85
-memory[76][7] => Mux17.IN85
-memory[75][0] => Mux16.IN84
-memory[75][0] => Mux24.IN84
-memory[75][1] => Mux15.IN84
-memory[75][1] => Mux23.IN84
-memory[75][2] => Mux14.IN84
-memory[75][2] => Mux22.IN84
-memory[75][3] => Mux13.IN84
-memory[75][3] => Mux21.IN84
-memory[75][4] => Mux12.IN84
-memory[75][4] => Mux20.IN84
-memory[75][5] => Mux11.IN84
-memory[75][5] => Mux19.IN84
-memory[75][6] => Mux10.IN84
-memory[75][6] => Mux18.IN84
-memory[75][7] => Mux9.IN84
-memory[75][7] => Mux17.IN84
-memory[74][0] => Mux16.IN83
-memory[74][0] => Mux24.IN83
-memory[74][1] => Mux15.IN83
-memory[74][1] => Mux23.IN83
-memory[74][2] => Mux14.IN83
-memory[74][2] => Mux22.IN83
-memory[74][3] => Mux13.IN83
-memory[74][3] => Mux21.IN83
-memory[74][4] => Mux12.IN83
-memory[74][4] => Mux20.IN83
-memory[74][5] => Mux11.IN83
-memory[74][5] => Mux19.IN83
-memory[74][6] => Mux10.IN83
-memory[74][6] => Mux18.IN83
-memory[74][7] => Mux9.IN83
-memory[74][7] => Mux17.IN83
-memory[73][0] => Mux16.IN82
-memory[73][0] => Mux24.IN82
-memory[73][1] => Mux15.IN82
-memory[73][1] => Mux23.IN82
-memory[73][2] => Mux14.IN82
-memory[73][2] => Mux22.IN82
-memory[73][3] => Mux13.IN82
-memory[73][3] => Mux21.IN82
-memory[73][4] => Mux12.IN82
-memory[73][4] => Mux20.IN82
-memory[73][5] => Mux11.IN82
-memory[73][5] => Mux19.IN82
-memory[73][6] => Mux10.IN82
-memory[73][6] => Mux18.IN82
-memory[73][7] => Mux9.IN82
-memory[73][7] => Mux17.IN82
-memory[72][0] => Mux16.IN81
-memory[72][0] => Mux24.IN81
-memory[72][1] => Mux15.IN81
-memory[72][1] => Mux23.IN81
-memory[72][2] => Mux14.IN81
-memory[72][2] => Mux22.IN81
-memory[72][3] => Mux13.IN81
-memory[72][3] => Mux21.IN81
-memory[72][4] => Mux12.IN81
-memory[72][4] => Mux20.IN81
-memory[72][5] => Mux11.IN81
-memory[72][5] => Mux19.IN81
-memory[72][6] => Mux10.IN81
-memory[72][6] => Mux18.IN81
-memory[72][7] => Mux9.IN81
-memory[72][7] => Mux17.IN81
-memory[71][0] => Mux16.IN80
-memory[71][0] => Mux24.IN80
-memory[71][1] => Mux15.IN80
-memory[71][1] => Mux23.IN80
-memory[71][2] => Mux14.IN80
-memory[71][2] => Mux22.IN80
-memory[71][3] => Mux13.IN80
-memory[71][3] => Mux21.IN80
-memory[71][4] => Mux12.IN80
-memory[71][4] => Mux20.IN80
-memory[71][5] => Mux11.IN80
-memory[71][5] => Mux19.IN80
-memory[71][6] => Mux10.IN80
-memory[71][6] => Mux18.IN80
-memory[71][7] => Mux9.IN80
-memory[71][7] => Mux17.IN80
-memory[70][0] => Mux16.IN79
-memory[70][0] => Mux24.IN79
-memory[70][1] => Mux15.IN79
-memory[70][1] => Mux23.IN79
-memory[70][2] => Mux14.IN79
-memory[70][2] => Mux22.IN79
-memory[70][3] => Mux13.IN79
-memory[70][3] => Mux21.IN79
-memory[70][4] => Mux12.IN79
-memory[70][4] => Mux20.IN79
-memory[70][5] => Mux11.IN79
-memory[70][5] => Mux19.IN79
-memory[70][6] => Mux10.IN79
-memory[70][6] => Mux18.IN79
-memory[70][7] => Mux9.IN79
-memory[70][7] => Mux17.IN79
-memory[69][0] => Mux16.IN78
-memory[69][0] => Mux24.IN78
-memory[69][1] => Mux15.IN78
-memory[69][1] => Mux23.IN78
-memory[69][2] => Mux14.IN78
-memory[69][2] => Mux22.IN78
-memory[69][3] => Mux13.IN78
-memory[69][3] => Mux21.IN78
-memory[69][4] => Mux12.IN78
-memory[69][4] => Mux20.IN78
-memory[69][5] => Mux11.IN78
-memory[69][5] => Mux19.IN78
-memory[69][6] => Mux10.IN78
-memory[69][6] => Mux18.IN78
-memory[69][7] => Mux9.IN78
-memory[69][7] => Mux17.IN78
-memory[68][0] => Mux16.IN77
-memory[68][0] => Mux24.IN77
-memory[68][1] => Mux15.IN77
-memory[68][1] => Mux23.IN77
-memory[68][2] => Mux14.IN77
-memory[68][2] => Mux22.IN77
-memory[68][3] => Mux13.IN77
-memory[68][3] => Mux21.IN77
-memory[68][4] => Mux12.IN77
-memory[68][4] => Mux20.IN77
-memory[68][5] => Mux11.IN77
-memory[68][5] => Mux19.IN77
-memory[68][6] => Mux10.IN77
-memory[68][6] => Mux18.IN77
-memory[68][7] => Mux9.IN77
-memory[68][7] => Mux17.IN77
-memory[67][0] => Mux16.IN76
-memory[67][0] => Mux24.IN76
-memory[67][1] => Mux15.IN76
-memory[67][1] => Mux23.IN76
-memory[67][2] => Mux14.IN76
-memory[67][2] => Mux22.IN76
-memory[67][3] => Mux13.IN76
-memory[67][3] => Mux21.IN76
-memory[67][4] => Mux12.IN76
-memory[67][4] => Mux20.IN76
-memory[67][5] => Mux11.IN76
-memory[67][5] => Mux19.IN76
-memory[67][6] => Mux10.IN76
-memory[67][6] => Mux18.IN76
-memory[67][7] => Mux9.IN76
-memory[67][7] => Mux17.IN76
-memory[66][0] => Mux16.IN75
-memory[66][0] => Mux24.IN75
-memory[66][1] => Mux15.IN75
-memory[66][1] => Mux23.IN75
-memory[66][2] => Mux14.IN75
-memory[66][2] => Mux22.IN75
-memory[66][3] => Mux13.IN75
-memory[66][3] => Mux21.IN75
-memory[66][4] => Mux12.IN75
-memory[66][4] => Mux20.IN75
-memory[66][5] => Mux11.IN75
-memory[66][5] => Mux19.IN75
-memory[66][6] => Mux10.IN75
-memory[66][6] => Mux18.IN75
-memory[66][7] => Mux9.IN75
-memory[66][7] => Mux17.IN75
-memory[65][0] => Mux16.IN74
-memory[65][0] => Mux24.IN74
-memory[65][1] => Mux15.IN74
-memory[65][1] => Mux23.IN74
-memory[65][2] => Mux14.IN74
-memory[65][2] => Mux22.IN74
-memory[65][3] => Mux13.IN74
-memory[65][3] => Mux21.IN74
-memory[65][4] => Mux12.IN74
-memory[65][4] => Mux20.IN74
-memory[65][5] => Mux11.IN74
-memory[65][5] => Mux19.IN74
-memory[65][6] => Mux10.IN74
-memory[65][6] => Mux18.IN74
-memory[65][7] => Mux9.IN74
-memory[65][7] => Mux17.IN74
-memory[64][0] => Mux16.IN73
-memory[64][0] => Mux24.IN73
-memory[64][1] => Mux15.IN73
-memory[64][1] => Mux23.IN73
-memory[64][2] => Mux14.IN73
-memory[64][2] => Mux22.IN73
-memory[64][3] => Mux13.IN73
-memory[64][3] => Mux21.IN73
-memory[64][4] => Mux12.IN73
-memory[64][4] => Mux20.IN73
-memory[64][5] => Mux11.IN73
-memory[64][5] => Mux19.IN73
-memory[64][6] => Mux10.IN73
-memory[64][6] => Mux18.IN73
-memory[64][7] => Mux9.IN73
-memory[64][7] => Mux17.IN73
-memory[63][0] => Mux16.IN72
-memory[63][0] => Mux24.IN72
-memory[63][1] => Mux15.IN72
-memory[63][1] => Mux23.IN72
-memory[63][2] => Mux14.IN72
-memory[63][2] => Mux22.IN72
-memory[63][3] => Mux13.IN72
-memory[63][3] => Mux21.IN72
-memory[63][4] => Mux12.IN72
-memory[63][4] => Mux20.IN72
-memory[63][5] => Mux11.IN72
-memory[63][5] => Mux19.IN72
-memory[63][6] => Mux10.IN72
-memory[63][6] => Mux18.IN72
-memory[63][7] => Mux9.IN72
-memory[63][7] => Mux17.IN72
-memory[62][0] => Mux16.IN71
-memory[62][0] => Mux24.IN71
-memory[62][1] => Mux15.IN71
-memory[62][1] => Mux23.IN71
-memory[62][2] => Mux14.IN71
-memory[62][2] => Mux22.IN71
-memory[62][3] => Mux13.IN71
-memory[62][3] => Mux21.IN71
-memory[62][4] => Mux12.IN71
-memory[62][4] => Mux20.IN71
-memory[62][5] => Mux11.IN71
-memory[62][5] => Mux19.IN71
-memory[62][6] => Mux10.IN71
-memory[62][6] => Mux18.IN71
-memory[62][7] => Mux9.IN71
-memory[62][7] => Mux17.IN71
-memory[61][0] => Mux16.IN70
-memory[61][0] => Mux24.IN70
-memory[61][1] => Mux15.IN70
-memory[61][1] => Mux23.IN70
-memory[61][2] => Mux14.IN70
-memory[61][2] => Mux22.IN70
-memory[61][3] => Mux13.IN70
-memory[61][3] => Mux21.IN70
-memory[61][4] => Mux12.IN70
-memory[61][4] => Mux20.IN70
-memory[61][5] => Mux11.IN70
-memory[61][5] => Mux19.IN70
-memory[61][6] => Mux10.IN70
-memory[61][6] => Mux18.IN70
-memory[61][7] => Mux9.IN70
-memory[61][7] => Mux17.IN70
-memory[60][0] => Mux16.IN69
-memory[60][0] => Mux24.IN69
-memory[60][1] => Mux15.IN69
-memory[60][1] => Mux23.IN69
-memory[60][2] => Mux14.IN69
-memory[60][2] => Mux22.IN69
-memory[60][3] => Mux13.IN69
-memory[60][3] => Mux21.IN69
-memory[60][4] => Mux12.IN69
-memory[60][4] => Mux20.IN69
-memory[60][5] => Mux11.IN69
-memory[60][5] => Mux19.IN69
-memory[60][6] => Mux10.IN69
-memory[60][6] => Mux18.IN69
-memory[60][7] => Mux9.IN69
-memory[60][7] => Mux17.IN69
-memory[59][0] => Mux16.IN68
-memory[59][0] => Mux24.IN68
-memory[59][1] => Mux15.IN68
-memory[59][1] => Mux23.IN68
-memory[59][2] => Mux14.IN68
-memory[59][2] => Mux22.IN68
-memory[59][3] => Mux13.IN68
-memory[59][3] => Mux21.IN68
-memory[59][4] => Mux12.IN68
-memory[59][4] => Mux20.IN68
-memory[59][5] => Mux11.IN68
-memory[59][5] => Mux19.IN68
-memory[59][6] => Mux10.IN68
-memory[59][6] => Mux18.IN68
-memory[59][7] => Mux9.IN68
-memory[59][7] => Mux17.IN68
-memory[58][0] => Mux16.IN67
-memory[58][0] => Mux24.IN67
-memory[58][1] => Mux15.IN67
-memory[58][1] => Mux23.IN67
-memory[58][2] => Mux14.IN67
-memory[58][2] => Mux22.IN67
-memory[58][3] => Mux13.IN67
-memory[58][3] => Mux21.IN67
-memory[58][4] => Mux12.IN67
-memory[58][4] => Mux20.IN67
-memory[58][5] => Mux11.IN67
-memory[58][5] => Mux19.IN67
-memory[58][6] => Mux10.IN67
-memory[58][6] => Mux18.IN67
-memory[58][7] => Mux9.IN67
-memory[58][7] => Mux17.IN67
-memory[57][0] => Mux16.IN66
-memory[57][0] => Mux24.IN66
-memory[57][1] => Mux15.IN66
-memory[57][1] => Mux23.IN66
-memory[57][2] => Mux14.IN66
-memory[57][2] => Mux22.IN66
-memory[57][3] => Mux13.IN66
-memory[57][3] => Mux21.IN66
-memory[57][4] => Mux12.IN66
-memory[57][4] => Mux20.IN66
-memory[57][5] => Mux11.IN66
-memory[57][5] => Mux19.IN66
-memory[57][6] => Mux10.IN66
-memory[57][6] => Mux18.IN66
-memory[57][7] => Mux9.IN66
-memory[57][7] => Mux17.IN66
-memory[56][0] => Mux16.IN65
-memory[56][0] => Mux24.IN65
-memory[56][1] => Mux15.IN65
-memory[56][1] => Mux23.IN65
-memory[56][2] => Mux14.IN65
-memory[56][2] => Mux22.IN65
-memory[56][3] => Mux13.IN65
-memory[56][3] => Mux21.IN65
-memory[56][4] => Mux12.IN65
-memory[56][4] => Mux20.IN65
-memory[56][5] => Mux11.IN65
-memory[56][5] => Mux19.IN65
-memory[56][6] => Mux10.IN65
-memory[56][6] => Mux18.IN65
-memory[56][7] => Mux9.IN65
-memory[56][7] => Mux17.IN65
-memory[55][0] => Mux16.IN64
-memory[55][0] => Mux24.IN64
-memory[55][1] => Mux15.IN64
-memory[55][1] => Mux23.IN64
-memory[55][2] => Mux14.IN64
-memory[55][2] => Mux22.IN64
-memory[55][3] => Mux13.IN64
-memory[55][3] => Mux21.IN64
-memory[55][4] => Mux12.IN64
-memory[55][4] => Mux20.IN64
-memory[55][5] => Mux11.IN64
-memory[55][5] => Mux19.IN64
-memory[55][6] => Mux10.IN64
-memory[55][6] => Mux18.IN64
-memory[55][7] => Mux9.IN64
-memory[55][7] => Mux17.IN64
-memory[54][0] => Mux16.IN63
-memory[54][0] => Mux24.IN63
-memory[54][1] => Mux15.IN63
-memory[54][1] => Mux23.IN63
-memory[54][2] => Mux14.IN63
-memory[54][2] => Mux22.IN63
-memory[54][3] => Mux13.IN63
-memory[54][3] => Mux21.IN63
-memory[54][4] => Mux12.IN63
-memory[54][4] => Mux20.IN63
-memory[54][5] => Mux11.IN63
-memory[54][5] => Mux19.IN63
-memory[54][6] => Mux10.IN63
-memory[54][6] => Mux18.IN63
-memory[54][7] => Mux9.IN63
-memory[54][7] => Mux17.IN63
-memory[53][0] => Mux16.IN62
-memory[53][0] => Mux24.IN62
-memory[53][1] => Mux15.IN62
-memory[53][1] => Mux23.IN62
-memory[53][2] => Mux14.IN62
-memory[53][2] => Mux22.IN62
-memory[53][3] => Mux13.IN62
-memory[53][3] => Mux21.IN62
-memory[53][4] => Mux12.IN62
-memory[53][4] => Mux20.IN62
-memory[53][5] => Mux11.IN62
-memory[53][5] => Mux19.IN62
-memory[53][6] => Mux10.IN62
-memory[53][6] => Mux18.IN62
-memory[53][7] => Mux9.IN62
-memory[53][7] => Mux17.IN62
-memory[52][0] => Mux16.IN61
-memory[52][0] => Mux24.IN61
-memory[52][1] => Mux15.IN61
-memory[52][1] => Mux23.IN61
-memory[52][2] => Mux14.IN61
-memory[52][2] => Mux22.IN61
-memory[52][3] => Mux13.IN61
-memory[52][3] => Mux21.IN61
-memory[52][4] => Mux12.IN61
-memory[52][4] => Mux20.IN61
-memory[52][5] => Mux11.IN61
-memory[52][5] => Mux19.IN61
-memory[52][6] => Mux10.IN61
-memory[52][6] => Mux18.IN61
-memory[52][7] => Mux9.IN61
-memory[52][7] => Mux17.IN61
-memory[51][0] => Mux16.IN60
-memory[51][0] => Mux24.IN60
-memory[51][1] => Mux15.IN60
-memory[51][1] => Mux23.IN60
-memory[51][2] => Mux14.IN60
-memory[51][2] => Mux22.IN60
-memory[51][3] => Mux13.IN60
-memory[51][3] => Mux21.IN60
-memory[51][4] => Mux12.IN60
-memory[51][4] => Mux20.IN60
-memory[51][5] => Mux11.IN60
-memory[51][5] => Mux19.IN60
-memory[51][6] => Mux10.IN60
-memory[51][6] => Mux18.IN60
-memory[51][7] => Mux9.IN60
-memory[51][7] => Mux17.IN60
-memory[50][0] => Mux16.IN59
-memory[50][0] => Mux24.IN59
-memory[50][1] => Mux15.IN59
-memory[50][1] => Mux23.IN59
-memory[50][2] => Mux14.IN59
-memory[50][2] => Mux22.IN59
-memory[50][3] => Mux13.IN59
-memory[50][3] => Mux21.IN59
-memory[50][4] => Mux12.IN59
-memory[50][4] => Mux20.IN59
-memory[50][5] => Mux11.IN59
-memory[50][5] => Mux19.IN59
-memory[50][6] => Mux10.IN59
-memory[50][6] => Mux18.IN59
-memory[50][7] => Mux9.IN59
-memory[50][7] => Mux17.IN59
-memory[49][0] => Mux16.IN58
-memory[49][0] => Mux24.IN58
-memory[49][1] => Mux15.IN58
-memory[49][1] => Mux23.IN58
-memory[49][2] => Mux14.IN58
-memory[49][2] => Mux22.IN58
-memory[49][3] => Mux13.IN58
-memory[49][3] => Mux21.IN58
-memory[49][4] => Mux12.IN58
-memory[49][4] => Mux20.IN58
-memory[49][5] => Mux11.IN58
-memory[49][5] => Mux19.IN58
-memory[49][6] => Mux10.IN58
-memory[49][6] => Mux18.IN58
-memory[49][7] => Mux9.IN58
-memory[49][7] => Mux17.IN58
-memory[48][0] => Mux16.IN57
-memory[48][0] => Mux24.IN57
-memory[48][1] => Mux15.IN57
-memory[48][1] => Mux23.IN57
-memory[48][2] => Mux14.IN57
-memory[48][2] => Mux22.IN57
-memory[48][3] => Mux13.IN57
-memory[48][3] => Mux21.IN57
-memory[48][4] => Mux12.IN57
-memory[48][4] => Mux20.IN57
-memory[48][5] => Mux11.IN57
-memory[48][5] => Mux19.IN57
-memory[48][6] => Mux10.IN57
-memory[48][6] => Mux18.IN57
-memory[48][7] => Mux9.IN57
-memory[48][7] => Mux17.IN57
-memory[47][0] => Mux16.IN56
-memory[47][0] => Mux24.IN56
-memory[47][1] => Mux15.IN56
-memory[47][1] => Mux23.IN56
-memory[47][2] => Mux14.IN56
-memory[47][2] => Mux22.IN56
-memory[47][3] => Mux13.IN56
-memory[47][3] => Mux21.IN56
-memory[47][4] => Mux12.IN56
-memory[47][4] => Mux20.IN56
-memory[47][5] => Mux11.IN56
-memory[47][5] => Mux19.IN56
-memory[47][6] => Mux10.IN56
-memory[47][6] => Mux18.IN56
-memory[47][7] => Mux9.IN56
-memory[47][7] => Mux17.IN56
-memory[46][0] => Mux16.IN55
-memory[46][0] => Mux24.IN55
-memory[46][1] => Mux15.IN55
-memory[46][1] => Mux23.IN55
-memory[46][2] => Mux14.IN55
-memory[46][2] => Mux22.IN55
-memory[46][3] => Mux13.IN55
-memory[46][3] => Mux21.IN55
-memory[46][4] => Mux12.IN55
-memory[46][4] => Mux20.IN55
-memory[46][5] => Mux11.IN55
-memory[46][5] => Mux19.IN55
-memory[46][6] => Mux10.IN55
-memory[46][6] => Mux18.IN55
-memory[46][7] => Mux9.IN55
-memory[46][7] => Mux17.IN55
-memory[45][0] => Mux16.IN54
-memory[45][0] => Mux24.IN54
-memory[45][1] => Mux15.IN54
-memory[45][1] => Mux23.IN54
-memory[45][2] => Mux14.IN54
-memory[45][2] => Mux22.IN54
-memory[45][3] => Mux13.IN54
-memory[45][3] => Mux21.IN54
-memory[45][4] => Mux12.IN54
-memory[45][4] => Mux20.IN54
-memory[45][5] => Mux11.IN54
-memory[45][5] => Mux19.IN54
-memory[45][6] => Mux10.IN54
-memory[45][6] => Mux18.IN54
-memory[45][7] => Mux9.IN54
-memory[45][7] => Mux17.IN54
-memory[44][0] => Mux16.IN53
-memory[44][0] => Mux24.IN53
-memory[44][1] => Mux15.IN53
-memory[44][1] => Mux23.IN53
-memory[44][2] => Mux14.IN53
-memory[44][2] => Mux22.IN53
-memory[44][3] => Mux13.IN53
-memory[44][3] => Mux21.IN53
-memory[44][4] => Mux12.IN53
-memory[44][4] => Mux20.IN53
-memory[44][5] => Mux11.IN53
-memory[44][5] => Mux19.IN53
-memory[44][6] => Mux10.IN53
-memory[44][6] => Mux18.IN53
-memory[44][7] => Mux9.IN53
-memory[44][7] => Mux17.IN53
-memory[43][0] => Mux16.IN52
-memory[43][0] => Mux24.IN52
-memory[43][1] => Mux15.IN52
-memory[43][1] => Mux23.IN52
-memory[43][2] => Mux14.IN52
-memory[43][2] => Mux22.IN52
-memory[43][3] => Mux13.IN52
-memory[43][3] => Mux21.IN52
-memory[43][4] => Mux12.IN52
-memory[43][4] => Mux20.IN52
-memory[43][5] => Mux11.IN52
-memory[43][5] => Mux19.IN52
-memory[43][6] => Mux10.IN52
-memory[43][6] => Mux18.IN52
-memory[43][7] => Mux9.IN52
-memory[43][7] => Mux17.IN52
-memory[42][0] => Mux16.IN51
-memory[42][0] => Mux24.IN51
-memory[42][1] => Mux15.IN51
-memory[42][1] => Mux23.IN51
-memory[42][2] => Mux14.IN51
-memory[42][2] => Mux22.IN51
-memory[42][3] => Mux13.IN51
-memory[42][3] => Mux21.IN51
-memory[42][4] => Mux12.IN51
-memory[42][4] => Mux20.IN51
-memory[42][5] => Mux11.IN51
-memory[42][5] => Mux19.IN51
-memory[42][6] => Mux10.IN51
-memory[42][6] => Mux18.IN51
-memory[42][7] => Mux9.IN51
-memory[42][7] => Mux17.IN51
-memory[41][0] => Mux16.IN50
-memory[41][0] => Mux24.IN50
-memory[41][1] => Mux15.IN50
-memory[41][1] => Mux23.IN50
-memory[41][2] => Mux14.IN50
-memory[41][2] => Mux22.IN50
-memory[41][3] => Mux13.IN50
-memory[41][3] => Mux21.IN50
-memory[41][4] => Mux12.IN50
-memory[41][4] => Mux20.IN50
-memory[41][5] => Mux11.IN50
-memory[41][5] => Mux19.IN50
-memory[41][6] => Mux10.IN50
-memory[41][6] => Mux18.IN50
-memory[41][7] => Mux9.IN50
-memory[41][7] => Mux17.IN50
-memory[40][0] => Mux16.IN49
-memory[40][0] => Mux24.IN49
-memory[40][1] => Mux15.IN49
-memory[40][1] => Mux23.IN49
-memory[40][2] => Mux14.IN49
-memory[40][2] => Mux22.IN49
-memory[40][3] => Mux13.IN49
-memory[40][3] => Mux21.IN49
-memory[40][4] => Mux12.IN49
-memory[40][4] => Mux20.IN49
-memory[40][5] => Mux11.IN49
-memory[40][5] => Mux19.IN49
-memory[40][6] => Mux10.IN49
-memory[40][6] => Mux18.IN49
-memory[40][7] => Mux9.IN49
-memory[40][7] => Mux17.IN49
-memory[39][0] => Mux16.IN48
-memory[39][0] => Mux24.IN48
-memory[39][1] => Mux15.IN48
-memory[39][1] => Mux23.IN48
-memory[39][2] => Mux14.IN48
-memory[39][2] => Mux22.IN48
-memory[39][3] => Mux13.IN48
-memory[39][3] => Mux21.IN48
-memory[39][4] => Mux12.IN48
-memory[39][4] => Mux20.IN48
-memory[39][5] => Mux11.IN48
-memory[39][5] => Mux19.IN48
-memory[39][6] => Mux10.IN48
-memory[39][6] => Mux18.IN48
-memory[39][7] => Mux9.IN48
-memory[39][7] => Mux17.IN48
-memory[38][0] => Mux16.IN47
-memory[38][0] => Mux24.IN47
-memory[38][1] => Mux15.IN47
-memory[38][1] => Mux23.IN47
-memory[38][2] => Mux14.IN47
-memory[38][2] => Mux22.IN47
-memory[38][3] => Mux13.IN47
-memory[38][3] => Mux21.IN47
-memory[38][4] => Mux12.IN47
-memory[38][4] => Mux20.IN47
-memory[38][5] => Mux11.IN47
-memory[38][5] => Mux19.IN47
-memory[38][6] => Mux10.IN47
-memory[38][6] => Mux18.IN47
-memory[38][7] => Mux9.IN47
-memory[38][7] => Mux17.IN47
-memory[37][0] => Mux16.IN46
-memory[37][0] => Mux24.IN46
-memory[37][1] => Mux15.IN46
-memory[37][1] => Mux23.IN46
-memory[37][2] => Mux14.IN46
-memory[37][2] => Mux22.IN46
-memory[37][3] => Mux13.IN46
-memory[37][3] => Mux21.IN46
-memory[37][4] => Mux12.IN46
-memory[37][4] => Mux20.IN46
-memory[37][5] => Mux11.IN46
-memory[37][5] => Mux19.IN46
-memory[37][6] => Mux10.IN46
-memory[37][6] => Mux18.IN46
-memory[37][7] => Mux9.IN46
-memory[37][7] => Mux17.IN46
-memory[36][0] => Mux16.IN45
-memory[36][0] => Mux24.IN45
-memory[36][1] => Mux15.IN45
-memory[36][1] => Mux23.IN45
-memory[36][2] => Mux14.IN45
-memory[36][2] => Mux22.IN45
-memory[36][3] => Mux13.IN45
-memory[36][3] => Mux21.IN45
-memory[36][4] => Mux12.IN45
-memory[36][4] => Mux20.IN45
-memory[36][5] => Mux11.IN45
-memory[36][5] => Mux19.IN45
-memory[36][6] => Mux10.IN45
-memory[36][6] => Mux18.IN45
-memory[36][7] => Mux9.IN45
-memory[36][7] => Mux17.IN45
-memory[35][0] => Mux16.IN44
-memory[35][0] => Mux24.IN44
-memory[35][1] => Mux15.IN44
-memory[35][1] => Mux23.IN44
-memory[35][2] => Mux14.IN44
-memory[35][2] => Mux22.IN44
-memory[35][3] => Mux13.IN44
-memory[35][3] => Mux21.IN44
-memory[35][4] => Mux12.IN44
-memory[35][4] => Mux20.IN44
-memory[35][5] => Mux11.IN44
-memory[35][5] => Mux19.IN44
-memory[35][6] => Mux10.IN44
-memory[35][6] => Mux18.IN44
-memory[35][7] => Mux9.IN44
-memory[35][7] => Mux17.IN44
-memory[34][0] => Mux16.IN43
-memory[34][0] => Mux24.IN43
-memory[34][1] => Mux15.IN43
-memory[34][1] => Mux23.IN43
-memory[34][2] => Mux14.IN43
-memory[34][2] => Mux22.IN43
-memory[34][3] => Mux13.IN43
-memory[34][3] => Mux21.IN43
-memory[34][4] => Mux12.IN43
-memory[34][4] => Mux20.IN43
-memory[34][5] => Mux11.IN43
-memory[34][5] => Mux19.IN43
-memory[34][6] => Mux10.IN43
-memory[34][6] => Mux18.IN43
-memory[34][7] => Mux9.IN43
-memory[34][7] => Mux17.IN43
-memory[33][0] => Mux16.IN42
-memory[33][0] => Mux24.IN42
-memory[33][1] => Mux15.IN42
-memory[33][1] => Mux23.IN42
-memory[33][2] => Mux14.IN42
-memory[33][2] => Mux22.IN42
-memory[33][3] => Mux13.IN42
-memory[33][3] => Mux21.IN42
-memory[33][4] => Mux12.IN42
-memory[33][4] => Mux20.IN42
-memory[33][5] => Mux11.IN42
-memory[33][5] => Mux19.IN42
-memory[33][6] => Mux10.IN42
-memory[33][6] => Mux18.IN42
-memory[33][7] => Mux9.IN42
-memory[33][7] => Mux17.IN42
-memory[32][0] => Mux16.IN41
-memory[32][0] => Mux24.IN41
-memory[32][1] => Mux15.IN41
-memory[32][1] => Mux23.IN41
-memory[32][2] => Mux14.IN41
-memory[32][2] => Mux22.IN41
-memory[32][3] => Mux13.IN41
-memory[32][3] => Mux21.IN41
-memory[32][4] => Mux12.IN41
-memory[32][4] => Mux20.IN41
-memory[32][5] => Mux11.IN41
-memory[32][5] => Mux19.IN41
-memory[32][6] => Mux10.IN41
-memory[32][6] => Mux18.IN41
-memory[32][7] => Mux9.IN41
-memory[32][7] => Mux17.IN41
-memory[31][0] => Mux16.IN40
-memory[31][0] => Mux24.IN40
-memory[31][1] => Mux15.IN40
-memory[31][1] => Mux23.IN40
-memory[31][2] => Mux14.IN40
-memory[31][2] => Mux22.IN40
-memory[31][3] => Mux13.IN40
-memory[31][3] => Mux21.IN40
-memory[31][4] => Mux12.IN40
-memory[31][4] => Mux20.IN40
-memory[31][5] => Mux11.IN40
-memory[31][5] => Mux19.IN40
-memory[31][6] => Mux10.IN40
-memory[31][6] => Mux18.IN40
-memory[31][7] => Mux9.IN40
-memory[31][7] => Mux17.IN40
-memory[30][0] => Mux16.IN39
-memory[30][0] => Mux24.IN39
-memory[30][1] => Mux15.IN39
-memory[30][1] => Mux23.IN39
-memory[30][2] => Mux14.IN39
-memory[30][2] => Mux22.IN39
-memory[30][3] => Mux13.IN39
-memory[30][3] => Mux21.IN39
-memory[30][4] => Mux12.IN39
-memory[30][4] => Mux20.IN39
-memory[30][5] => Mux11.IN39
-memory[30][5] => Mux19.IN39
-memory[30][6] => Mux10.IN39
-memory[30][6] => Mux18.IN39
-memory[30][7] => Mux9.IN39
-memory[30][7] => Mux17.IN39
-memory[29][0] => Mux16.IN38
-memory[29][0] => Mux24.IN38
-memory[29][1] => Mux15.IN38
-memory[29][1] => Mux23.IN38
-memory[29][2] => Mux14.IN38
-memory[29][2] => Mux22.IN38
-memory[29][3] => Mux13.IN38
-memory[29][3] => Mux21.IN38
-memory[29][4] => Mux12.IN38
-memory[29][4] => Mux20.IN38
-memory[29][5] => Mux11.IN38
-memory[29][5] => Mux19.IN38
-memory[29][6] => Mux10.IN38
-memory[29][6] => Mux18.IN38
-memory[29][7] => Mux9.IN38
-memory[29][7] => Mux17.IN38
-memory[28][0] => Mux16.IN37
-memory[28][0] => Mux24.IN37
-memory[28][1] => Mux15.IN37
-memory[28][1] => Mux23.IN37
-memory[28][2] => Mux14.IN37
-memory[28][2] => Mux22.IN37
-memory[28][3] => Mux13.IN37
-memory[28][3] => Mux21.IN37
-memory[28][4] => Mux12.IN37
-memory[28][4] => Mux20.IN37
-memory[28][5] => Mux11.IN37
-memory[28][5] => Mux19.IN37
-memory[28][6] => Mux10.IN37
-memory[28][6] => Mux18.IN37
-memory[28][7] => Mux9.IN37
-memory[28][7] => Mux17.IN37
-memory[27][0] => Mux16.IN36
-memory[27][0] => Mux24.IN36
-memory[27][1] => Mux15.IN36
-memory[27][1] => Mux23.IN36
-memory[27][2] => Mux14.IN36
-memory[27][2] => Mux22.IN36
-memory[27][3] => Mux13.IN36
-memory[27][3] => Mux21.IN36
-memory[27][4] => Mux12.IN36
-memory[27][4] => Mux20.IN36
-memory[27][5] => Mux11.IN36
-memory[27][5] => Mux19.IN36
-memory[27][6] => Mux10.IN36
-memory[27][6] => Mux18.IN36
-memory[27][7] => Mux9.IN36
-memory[27][7] => Mux17.IN36
-memory[26][0] => Mux16.IN35
-memory[26][0] => Mux24.IN35
-memory[26][1] => Mux15.IN35
-memory[26][1] => Mux23.IN35
-memory[26][2] => Mux14.IN35
-memory[26][2] => Mux22.IN35
-memory[26][3] => Mux13.IN35
-memory[26][3] => Mux21.IN35
-memory[26][4] => Mux12.IN35
-memory[26][4] => Mux20.IN35
-memory[26][5] => Mux11.IN35
-memory[26][5] => Mux19.IN35
-memory[26][6] => Mux10.IN35
-memory[26][6] => Mux18.IN35
-memory[26][7] => Mux9.IN35
-memory[26][7] => Mux17.IN35
-memory[25][0] => Mux16.IN34
-memory[25][0] => Mux24.IN34
-memory[25][1] => Mux15.IN34
-memory[25][1] => Mux23.IN34
-memory[25][2] => Mux14.IN34
-memory[25][2] => Mux22.IN34
-memory[25][3] => Mux13.IN34
-memory[25][3] => Mux21.IN34
-memory[25][4] => Mux12.IN34
-memory[25][4] => Mux20.IN34
-memory[25][5] => Mux11.IN34
-memory[25][5] => Mux19.IN34
-memory[25][6] => Mux10.IN34
-memory[25][6] => Mux18.IN34
-memory[25][7] => Mux9.IN34
-memory[25][7] => Mux17.IN34
-memory[24][0] => Mux16.IN33
-memory[24][0] => Mux24.IN33
-memory[24][1] => Mux15.IN33
-memory[24][1] => Mux23.IN33
-memory[24][2] => Mux14.IN33
-memory[24][2] => Mux22.IN33
-memory[24][3] => Mux13.IN33
-memory[24][3] => Mux21.IN33
-memory[24][4] => Mux12.IN33
-memory[24][4] => Mux20.IN33
-memory[24][5] => Mux11.IN33
-memory[24][5] => Mux19.IN33
-memory[24][6] => Mux10.IN33
-memory[24][6] => Mux18.IN33
-memory[24][7] => Mux9.IN33
-memory[24][7] => Mux17.IN33
-memory[23][0] => Mux16.IN32
-memory[23][0] => Mux24.IN32
-memory[23][1] => Mux15.IN32
-memory[23][1] => Mux23.IN32
-memory[23][2] => Mux14.IN32
-memory[23][2] => Mux22.IN32
-memory[23][3] => Mux13.IN32
-memory[23][3] => Mux21.IN32
-memory[23][4] => Mux12.IN32
-memory[23][4] => Mux20.IN32
-memory[23][5] => Mux11.IN32
-memory[23][5] => Mux19.IN32
-memory[23][6] => Mux10.IN32
-memory[23][6] => Mux18.IN32
-memory[23][7] => Mux9.IN32
-memory[23][7] => Mux17.IN32
-memory[22][0] => Mux16.IN31
-memory[22][0] => Mux24.IN31
-memory[22][1] => Mux15.IN31
-memory[22][1] => Mux23.IN31
-memory[22][2] => Mux14.IN31
-memory[22][2] => Mux22.IN31
-memory[22][3] => Mux13.IN31
-memory[22][3] => Mux21.IN31
-memory[22][4] => Mux12.IN31
-memory[22][4] => Mux20.IN31
-memory[22][5] => Mux11.IN31
-memory[22][5] => Mux19.IN31
-memory[22][6] => Mux10.IN31
-memory[22][6] => Mux18.IN31
-memory[22][7] => Mux9.IN31
-memory[22][7] => Mux17.IN31
-memory[21][0] => Mux16.IN30
-memory[21][0] => Mux24.IN30
-memory[21][1] => Mux15.IN30
-memory[21][1] => Mux23.IN30
-memory[21][2] => Mux14.IN30
-memory[21][2] => Mux22.IN30
-memory[21][3] => Mux13.IN30
-memory[21][3] => Mux21.IN30
-memory[21][4] => Mux12.IN30
-memory[21][4] => Mux20.IN30
-memory[21][5] => Mux11.IN30
-memory[21][5] => Mux19.IN30
-memory[21][6] => Mux10.IN30
-memory[21][6] => Mux18.IN30
-memory[21][7] => Mux9.IN30
-memory[21][7] => Mux17.IN30
-memory[20][0] => Mux16.IN29
-memory[20][0] => Mux24.IN29
-memory[20][1] => Mux15.IN29
-memory[20][1] => Mux23.IN29
-memory[20][2] => Mux14.IN29
-memory[20][2] => Mux22.IN29
-memory[20][3] => Mux13.IN29
-memory[20][3] => Mux21.IN29
-memory[20][4] => Mux12.IN29
-memory[20][4] => Mux20.IN29
-memory[20][5] => Mux11.IN29
-memory[20][5] => Mux19.IN29
-memory[20][6] => Mux10.IN29
-memory[20][6] => Mux18.IN29
-memory[20][7] => Mux9.IN29
-memory[20][7] => Mux17.IN29
-memory[19][0] => Mux16.IN28
-memory[19][0] => Mux24.IN28
-memory[19][1] => Mux15.IN28
-memory[19][1] => Mux23.IN28
-memory[19][2] => Mux14.IN28
-memory[19][2] => Mux22.IN28
-memory[19][3] => Mux13.IN28
-memory[19][3] => Mux21.IN28
-memory[19][4] => Mux12.IN28
-memory[19][4] => Mux20.IN28
-memory[19][5] => Mux11.IN28
-memory[19][5] => Mux19.IN28
-memory[19][6] => Mux10.IN28
-memory[19][6] => Mux18.IN28
-memory[19][7] => Mux9.IN28
-memory[19][7] => Mux17.IN28
-memory[18][0] => Mux16.IN27
-memory[18][0] => Mux24.IN27
-memory[18][1] => Mux15.IN27
-memory[18][1] => Mux23.IN27
-memory[18][2] => Mux14.IN27
-memory[18][2] => Mux22.IN27
-memory[18][3] => Mux13.IN27
-memory[18][3] => Mux21.IN27
-memory[18][4] => Mux12.IN27
-memory[18][4] => Mux20.IN27
-memory[18][5] => Mux11.IN27
-memory[18][5] => Mux19.IN27
-memory[18][6] => Mux10.IN27
-memory[18][6] => Mux18.IN27
-memory[18][7] => Mux9.IN27
-memory[18][7] => Mux17.IN27
-memory[17][0] => Mux16.IN26
-memory[17][0] => Mux24.IN26
-memory[17][1] => Mux15.IN26
-memory[17][1] => Mux23.IN26
-memory[17][2] => Mux14.IN26
-memory[17][2] => Mux22.IN26
-memory[17][3] => Mux13.IN26
-memory[17][3] => Mux21.IN26
-memory[17][4] => Mux12.IN26
-memory[17][4] => Mux20.IN26
-memory[17][5] => Mux11.IN26
-memory[17][5] => Mux19.IN26
-memory[17][6] => Mux10.IN26
-memory[17][6] => Mux18.IN26
-memory[17][7] => Mux9.IN26
-memory[17][7] => Mux17.IN26
-memory[16][0] => Mux16.IN25
-memory[16][0] => Mux24.IN25
-memory[16][1] => Mux15.IN25
-memory[16][1] => Mux23.IN25
-memory[16][2] => Mux14.IN25
-memory[16][2] => Mux22.IN25
-memory[16][3] => Mux13.IN25
-memory[16][3] => Mux21.IN25
-memory[16][4] => Mux12.IN25
-memory[16][4] => Mux20.IN25
-memory[16][5] => Mux11.IN25
-memory[16][5] => Mux19.IN25
-memory[16][6] => Mux10.IN25
-memory[16][6] => Mux18.IN25
-memory[16][7] => Mux9.IN25
-memory[16][7] => Mux17.IN25
-memory[15][0] => Mux16.IN24
-memory[15][0] => Mux24.IN24
-memory[15][1] => Mux15.IN24
-memory[15][1] => Mux23.IN24
-memory[15][2] => Mux14.IN24
-memory[15][2] => Mux22.IN24
-memory[15][3] => Mux13.IN24
-memory[15][3] => Mux21.IN24
-memory[15][4] => Mux12.IN24
-memory[15][4] => Mux20.IN24
-memory[15][5] => Mux11.IN24
-memory[15][5] => Mux19.IN24
-memory[15][6] => Mux10.IN24
-memory[15][6] => Mux18.IN24
-memory[15][7] => Mux9.IN24
-memory[15][7] => Mux17.IN24
-memory[14][0] => Mux16.IN23
-memory[14][0] => Mux24.IN23
-memory[14][1] => Mux15.IN23
-memory[14][1] => Mux23.IN23
-memory[14][2] => Mux14.IN23
-memory[14][2] => Mux22.IN23
-memory[14][3] => Mux13.IN23
-memory[14][3] => Mux21.IN23
-memory[14][4] => Mux12.IN23
-memory[14][4] => Mux20.IN23
-memory[14][5] => Mux11.IN23
-memory[14][5] => Mux19.IN23
-memory[14][6] => Mux10.IN23
-memory[14][6] => Mux18.IN23
-memory[14][7] => Mux9.IN23
-memory[14][7] => Mux17.IN23
-memory[13][0] => Mux16.IN22
-memory[13][0] => Mux24.IN22
-memory[13][1] => Mux15.IN22
-memory[13][1] => Mux23.IN22
-memory[13][2] => Mux14.IN22
-memory[13][2] => Mux22.IN22
-memory[13][3] => Mux13.IN22
-memory[13][3] => Mux21.IN22
-memory[13][4] => Mux12.IN22
-memory[13][4] => Mux20.IN22
-memory[13][5] => Mux11.IN22
-memory[13][5] => Mux19.IN22
-memory[13][6] => Mux10.IN22
-memory[13][6] => Mux18.IN22
-memory[13][7] => Mux9.IN22
-memory[13][7] => Mux17.IN22
-memory[12][0] => Mux16.IN21
-memory[12][0] => Mux24.IN21
-memory[12][1] => Mux15.IN21
-memory[12][1] => Mux23.IN21
-memory[12][2] => Mux14.IN21
-memory[12][2] => Mux22.IN21
-memory[12][3] => Mux13.IN21
-memory[12][3] => Mux21.IN21
-memory[12][4] => Mux12.IN21
-memory[12][4] => Mux20.IN21
-memory[12][5] => Mux11.IN21
-memory[12][5] => Mux19.IN21
-memory[12][6] => Mux10.IN21
-memory[12][6] => Mux18.IN21
-memory[12][7] => Mux9.IN21
-memory[12][7] => Mux17.IN21
-memory[11][0] => Mux16.IN20
-memory[11][0] => Mux24.IN20
-memory[11][1] => Mux15.IN20
-memory[11][1] => Mux23.IN20
-memory[11][2] => Mux14.IN20
-memory[11][2] => Mux22.IN20
-memory[11][3] => Mux13.IN20
-memory[11][3] => Mux21.IN20
-memory[11][4] => Mux12.IN20
-memory[11][4] => Mux20.IN20
-memory[11][5] => Mux11.IN20
-memory[11][5] => Mux19.IN20
-memory[11][6] => Mux10.IN20
-memory[11][6] => Mux18.IN20
-memory[11][7] => Mux9.IN20
-memory[11][7] => Mux17.IN20
-memory[10][0] => Mux16.IN19
-memory[10][0] => Mux24.IN19
-memory[10][1] => Mux15.IN19
-memory[10][1] => Mux23.IN19
-memory[10][2] => Mux14.IN19
-memory[10][2] => Mux22.IN19
-memory[10][3] => Mux13.IN19
-memory[10][3] => Mux21.IN19
-memory[10][4] => Mux12.IN19
-memory[10][4] => Mux20.IN19
-memory[10][5] => Mux11.IN19
-memory[10][5] => Mux19.IN19
-memory[10][6] => Mux10.IN19
-memory[10][6] => Mux18.IN19
-memory[10][7] => Mux9.IN19
-memory[10][7] => Mux17.IN19
-memory[9][0] => Mux16.IN18
-memory[9][0] => Mux24.IN18
-memory[9][1] => Mux15.IN18
-memory[9][1] => Mux23.IN18
-memory[9][2] => Mux14.IN18
-memory[9][2] => Mux22.IN18
-memory[9][3] => Mux13.IN18
-memory[9][3] => Mux21.IN18
-memory[9][4] => Mux12.IN18
-memory[9][4] => Mux20.IN18
-memory[9][5] => Mux11.IN18
-memory[9][5] => Mux19.IN18
-memory[9][6] => Mux10.IN18
-memory[9][6] => Mux18.IN18
-memory[9][7] => Mux9.IN18
-memory[9][7] => Mux17.IN18
-memory[8][0] => Mux16.IN17
-memory[8][0] => Mux24.IN17
-memory[8][1] => Mux15.IN17
-memory[8][1] => Mux23.IN17
-memory[8][2] => Mux14.IN17
-memory[8][2] => Mux22.IN17
-memory[8][3] => Mux13.IN17
-memory[8][3] => Mux21.IN17
-memory[8][4] => Mux12.IN17
-memory[8][4] => Mux20.IN17
-memory[8][5] => Mux11.IN17
-memory[8][5] => Mux19.IN17
-memory[8][6] => Mux10.IN17
-memory[8][6] => Mux18.IN17
-memory[8][7] => Mux9.IN17
-memory[8][7] => Mux17.IN17
-memory[7][0] => Mux16.IN16
-memory[7][0] => Mux24.IN16
-memory[7][1] => Mux15.IN16
-memory[7][1] => Mux23.IN16
-memory[7][2] => Mux14.IN16
-memory[7][2] => Mux22.IN16
-memory[7][3] => Mux13.IN16
-memory[7][3] => Mux21.IN16
-memory[7][4] => Mux12.IN16
-memory[7][4] => Mux20.IN16
-memory[7][5] => Mux11.IN16
-memory[7][5] => Mux19.IN16
-memory[7][6] => Mux10.IN16
-memory[7][6] => Mux18.IN16
-memory[7][7] => Mux9.IN16
-memory[7][7] => Mux17.IN16
-memory[6][0] => Mux16.IN15
-memory[6][0] => Mux24.IN15
-memory[6][1] => Mux15.IN15
-memory[6][1] => Mux23.IN15
-memory[6][2] => Mux14.IN15
-memory[6][2] => Mux22.IN15
-memory[6][3] => Mux13.IN15
-memory[6][3] => Mux21.IN15
-memory[6][4] => Mux12.IN15
-memory[6][4] => Mux20.IN15
-memory[6][5] => Mux11.IN15
-memory[6][5] => Mux19.IN15
-memory[6][6] => Mux10.IN15
-memory[6][6] => Mux18.IN15
-memory[6][7] => Mux9.IN15
-memory[6][7] => Mux17.IN15
-memory[5][0] => Mux16.IN14
-memory[5][0] => Mux24.IN14
-memory[5][1] => Mux15.IN14
-memory[5][1] => Mux23.IN14
-memory[5][2] => Mux14.IN14
-memory[5][2] => Mux22.IN14
-memory[5][3] => Mux13.IN14
-memory[5][3] => Mux21.IN14
-memory[5][4] => Mux12.IN14
-memory[5][4] => Mux20.IN14
-memory[5][5] => Mux11.IN14
-memory[5][5] => Mux19.IN14
-memory[5][6] => Mux10.IN14
-memory[5][6] => Mux18.IN14
-memory[5][7] => Mux9.IN14
-memory[5][7] => Mux17.IN14
-memory[4][0] => Mux16.IN13
-memory[4][0] => Mux24.IN13
-memory[4][1] => Mux15.IN13
-memory[4][1] => Mux23.IN13
-memory[4][2] => Mux14.IN13
-memory[4][2] => Mux22.IN13
-memory[4][3] => Mux13.IN13
-memory[4][3] => Mux21.IN13
-memory[4][4] => Mux12.IN13
-memory[4][4] => Mux20.IN13
-memory[4][5] => Mux11.IN13
-memory[4][5] => Mux19.IN13
-memory[4][6] => Mux10.IN13
-memory[4][6] => Mux18.IN13
-memory[4][7] => Mux9.IN13
-memory[4][7] => Mux17.IN13
-memory[3][0] => Mux16.IN12
-memory[3][0] => Mux24.IN12
-memory[3][1] => Mux15.IN12
-memory[3][1] => Mux23.IN12
-memory[3][2] => Mux14.IN12
-memory[3][2] => Mux22.IN12
-memory[3][3] => Mux13.IN12
-memory[3][3] => Mux21.IN12
-memory[3][4] => Mux12.IN12
-memory[3][4] => Mux20.IN12
-memory[3][5] => Mux11.IN12
-memory[3][5] => Mux19.IN12
-memory[3][6] => Mux10.IN12
-memory[3][6] => Mux18.IN12
-memory[3][7] => Mux9.IN12
-memory[3][7] => Mux17.IN12
-memory[2][0] => Mux16.IN11
-memory[2][0] => Mux24.IN11
-memory[2][1] => Mux15.IN11
-memory[2][1] => Mux23.IN11
-memory[2][2] => Mux14.IN11
-memory[2][2] => Mux22.IN11
-memory[2][3] => Mux13.IN11
-memory[2][3] => Mux21.IN11
-memory[2][4] => Mux12.IN11
-memory[2][4] => Mux20.IN11
-memory[2][5] => Mux11.IN11
-memory[2][5] => Mux19.IN11
-memory[2][6] => Mux10.IN11
-memory[2][6] => Mux18.IN11
-memory[2][7] => Mux9.IN11
-memory[2][7] => Mux17.IN11
-memory[1][0] => Mux16.IN10
-memory[1][0] => Mux24.IN10
-memory[1][1] => Mux15.IN10
-memory[1][1] => Mux23.IN10
-memory[1][2] => Mux14.IN10
-memory[1][2] => Mux22.IN10
-memory[1][3] => Mux13.IN10
-memory[1][3] => Mux21.IN10
-memory[1][4] => Mux12.IN10
-memory[1][4] => Mux20.IN10
-memory[1][5] => Mux11.IN10
-memory[1][5] => Mux19.IN10
-memory[1][6] => Mux10.IN10
-memory[1][6] => Mux18.IN10
-memory[1][7] => Mux9.IN10
-memory[1][7] => Mux17.IN10
-memory[0][0] => Mux16.IN9
-memory[0][0] => Mux24.IN9
-memory[0][1] => Mux15.IN9
-memory[0][1] => Mux23.IN9
-memory[0][2] => Mux14.IN9
-memory[0][2] => Mux22.IN9
-memory[0][3] => Mux13.IN9
-memory[0][3] => Mux21.IN9
-memory[0][4] => Mux12.IN9
-memory[0][4] => Mux20.IN9
-memory[0][5] => Mux11.IN9
-memory[0][5] => Mux19.IN9
-memory[0][6] => Mux10.IN9
-memory[0][6] => Mux18.IN9
-memory[0][7] => Mux9.IN9
-memory[0][7] => Mux17.IN9
-lcd_clk <= lcd_clk.DB_MAX_OUTPUT_PORT_TYPE
-lcd_data <= commander:com.port5
-led[0] <= i[0].DB_MAX_OUTPUT_PORT_TYPE
-led[1] <= i[1].DB_MAX_OUTPUT_PORT_TYPE
-led[2] <= i[2].DB_MAX_OUTPUT_PORT_TYPE
-led[3] <= i[3].DB_MAX_OUTPUT_PORT_TYPE
-led[4] <= i[4].DB_MAX_OUTPUT_PORT_TYPE
-led[5] <= d_flip_flop:dff.port2
-
-
-|chip8|cpu:cpu|st7920_serial_driver:gpu|commander:com
-lcd_clk => lcd_data~reg0.CLK
-lcd_clk => full_command_bits[0].CLK
-lcd_clk => full_command_bits[1].CLK
-lcd_clk => full_command_bits[2].CLK
-lcd_clk => full_command_bits[3].CLK
-lcd_clk => full_command_bits[4].CLK
-lcd_clk => full_command_bits[5].CLK
-lcd_clk => full_command_bits[6].CLK
-lcd_clk => full_command_bits[7].CLK
-lcd_clk => full_command_bits[8].CLK
-lcd_clk => full_command_bits[9].CLK
-lcd_clk => full_command_bits[10].CLK
-lcd_clk => full_command_bits[11].CLK
-lcd_clk => full_command_bits[12].CLK
-lcd_clk => full_command_bits[13].CLK
-lcd_clk => full_command_bits[14].CLK
-lcd_clk => full_command_bits[15].CLK
-lcd_clk => full_command_bits[16].CLK
-lcd_clk => full_command_bits[17].CLK
-lcd_clk => full_command_bits[18].CLK
-lcd_clk => full_command_bits[19].CLK
-lcd_clk => full_command_bits[20].CLK
-lcd_clk => full_command_bits[21].CLK
-lcd_clk => full_command_bits[22].CLK
-lcd_clk => full_command_bits[23].CLK
-lcd_clk => i[0].CLK
-lcd_clk => i[1].CLK
-lcd_clk => i[2].CLK
-lcd_clk => i[3].CLK
-lcd_clk => i[4].CLK
-lcd_clk => i[5].CLK
-lcd_clk => i[6].CLK
-lcd_clk => i[7].CLK
-lcd_clk => i[8].CLK
-lcd_clk => i[9].CLK
-lcd_clk => i[10].CLK
-lcd_clk => i[11].CLK
-lcd_clk => i[12].CLK
-lcd_clk => i[13].CLK
-lcd_clk => i[14].CLK
-lcd_clk => i[15].CLK
-lcd_clk => i[16].CLK
-lcd_clk => i[17].CLK
-lcd_clk => i[18].CLK
-lcd_clk => i[19].CLK
-lcd_clk => i[20].CLK
-lcd_clk => i[21].CLK
-lcd_clk => i[22].CLK
-lcd_clk => i[23].CLK
-lcd_clk => i[24].CLK
-lcd_clk => i[25].CLK
-lcd_clk => i[26].CLK
-lcd_clk => i[27].CLK
-lcd_clk => i[28].CLK
-lcd_clk => i[29].CLK
-lcd_clk => i[30].CLK
-lcd_clk => i[31].CLK
-rs => full_command_bits.DATAB
-rw => full_command_bits.DATAB
-data[0] => full_command_bits.DATAB
-data[1] => full_command_bits.DATAB
-data[2] => full_command_bits.DATAB
-data[3] => full_command_bits.DATAB
-data[4] => full_command_bits.DATAB
-data[5] => full_command_bits.DATAB
-data[6] => full_command_bits.DATAB
-data[7] => full_command_bits.DATAB
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => i.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => full_command_bits.OUTPUTSELECT
-start => lcd_data~reg0.ENA
-lcd_data <= lcd_data~reg0.DB_MAX_OUTPUT_PORT_TYPE
-
-
-|chip8|cpu:cpu|st7920_serial_driver:gpu|d_flip_flop:dff
-data_in => data_out~reg0.DATAIN
-clk_in => data_out~reg0.CLK
-data_out <= data_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
-
-
diff --git a/db/chip8.hif b/db/chip8.hif
deleted file mode 100644
index 76eb843..0000000
Binary files a/db/chip8.hif and /dev/null differ
diff --git a/db/chip8.lpc.html b/db/chip8.lpc.html
deleted file mode 100644
index 0ee11d3..0000000
--- a/db/chip8.lpc.html
+++ /dev/null
@@ -1,130 +0,0 @@
-
-
-| Hierarchy |
-Input |
-Constant Input |
-Unused Input |
-Floating Input |
-Output |
-Constant Output |
-Unused Output |
-Floating Output |
-Bidir |
-Constant Bidir |
-Unused Bidir |
-Input only Bidir |
-Output only Bidir |
-
-
-| cpu|gpu|dff |
-2 |
-0 |
-0 |
-0 |
-1 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
-| cpu|gpu|com |
-12 |
-0 |
-0 |
-0 |
-1 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
-| cpu|gpu |
-8194 |
-7 |
-0 |
-7 |
-8 |
-7 |
-7 |
-7 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
-| cpu|alu |
-50 |
-0 |
-32 |
-0 |
-10 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
-| cpu |
-10 |
-0 |
-0 |
-0 |
-73 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
-| mem |
-34 |
-0 |
-0 |
-0 |
-8 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
-| dc |
-1 |
-0 |
-0 |
-0 |
-1 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-0 |
-
-
diff --git a/db/chip8.lpc.rdb b/db/chip8.lpc.rdb
deleted file mode 100644
index f762d88..0000000
Binary files a/db/chip8.lpc.rdb and /dev/null differ
diff --git a/db/chip8.lpc.txt b/db/chip8.lpc.txt
deleted file mode 100644
index 5e0035e..0000000
--- a/db/chip8.lpc.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Legal Partition Candidates ;
-+-------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
-; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
-+-------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
-; cpu|gpu|dff ; 2 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; cpu|gpu|com ; 12 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; cpu|gpu ; 8194 ; 7 ; 0 ; 7 ; 8 ; 7 ; 7 ; 7 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; cpu|alu ; 50 ; 0 ; 32 ; 0 ; 10 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; cpu ; 10 ; 0 ; 0 ; 0 ; 73 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; mem ; 34 ; 0 ; 0 ; 0 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; dc ; 1 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-+-------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
diff --git a/db/chip8.map.ammdb b/db/chip8.map.ammdb
deleted file mode 100644
index c620112..0000000
Binary files a/db/chip8.map.ammdb and /dev/null differ
diff --git a/db/chip8.map.bpm b/db/chip8.map.bpm
deleted file mode 100644
index 2e81a05..0000000
Binary files a/db/chip8.map.bpm and /dev/null differ
diff --git a/db/chip8.map.cdb b/db/chip8.map.cdb
deleted file mode 100644
index 9213240..0000000
Binary files a/db/chip8.map.cdb and /dev/null differ
diff --git a/db/chip8.map.hdb b/db/chip8.map.hdb
deleted file mode 100644
index bef42fb..0000000
Binary files a/db/chip8.map.hdb and /dev/null differ
diff --git a/db/chip8.map.kpt b/db/chip8.map.kpt
deleted file mode 100644
index 41b22bb..0000000
Binary files a/db/chip8.map.kpt and /dev/null differ
diff --git a/db/chip8.map.qmsg b/db/chip8.map.qmsg
deleted file mode 100644
index 0a05aa9..0000000
--- a/db/chip8.map.qmsg
+++ /dev/null
@@ -1,55 +0,0 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1712584011618 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition " "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1712584011618 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 8 08:46:51 2024 " "Processing started: Mon Apr 8 08:46:51 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1712584011618 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584011618 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off chip8 -c chip8 " "Command: quartus_map --read_settings_files=on --write_settings_files=off chip8 -c chip8" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584011618 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1712584011793 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1712584011793 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "the-bomb/st7920_serial_driver.sv 3 3 " "Found 3 design units, including 3 entities, in source file the-bomb/st7920_serial_driver.sv" { { "Info" "ISGN_ENTITY_NAME" "1 st7920_serial_driver " "Found entity 1: st7920_serial_driver" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016098 ""} { "Info" "ISGN_ENTITY_NAME" "2 d_flip_flop " "Found entity 2: d_flip_flop" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 137 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016098 ""} { "Info" "ISGN_ENTITY_NAME" "3 commander " "Found entity 3: commander" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 147 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016098 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584016098 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "chip8.sv 1 1 " "Found 1 design units, including 1 entities, in source file chip8.sv" { { "Info" "ISGN_ENTITY_NAME" "1 chip8 " "Found entity 1: chip8" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016099 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584016099 ""}
-{ "Info" "IVRFX_L3_VERI_OBJ_DIFF_ONLY_IN_CASE" "alu ALU cpu.sv(33) " "Verilog HDL Declaration information at cpu.sv(33): object \"alu\" differs only in case from object \"ALU\" in the same scope" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 33 0 0 } } } 0 10281 "Verilog HDL Declaration information at %3!s!: object \"%1!s!\" differs only in case from object \"%2!s!\" in the same scope" 1 0 "Analysis & Synthesis" 0 -1 1712584016100 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu.sv 1 1 " "Found 1 design units, including 1 entities, in source file cpu.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cpu " "Found entity 1: cpu" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016100 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584016100 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "alu.sv 1 1 " "Found 1 design units, including 1 entities, in source file alu.sv" { { "Info" "ISGN_ENTITY_NAME" "1 alu " "Found entity 1: alu" { } { { "alu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/alu.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016100 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584016100 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "aastructs.sv 1 0 " "Found 1 design units, including 0 entities, in source file aastructs.sv" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 structs (SystemVerilog) " "Found design unit 1: structs (SystemVerilog)" { } { { "aastructs.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/aastructs.sv" 1 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016101 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584016101 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "downclocker.sv 1 1 " "Found 1 design units, including 1 entities, in source file downclocker.sv" { { "Info" "ISGN_ENTITY_NAME" "1 downclocker " "Found entity 1: downclocker" { } { { "downclocker.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/downclocker.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016101 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584016101 ""}
-{ "Info" "ISGN_START_ELABORATION_TOP" "chip8 " "Elaborating entity \"chip8\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1712584016136 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "downclocker downclocker:dc " "Elaborating entity \"downclocker\" for hierarchy \"downclocker:dc\"" { } { { "chip8.sv" "dc" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 14 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584016138 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 downclocker.sv(18) " "Verilog HDL assignment warning at downclocker.sv(18): truncated value with size 32 to match size of target (10)" { } { { "downclocker.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/downclocker.sv" 18 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016138 "|chip8|downclocker:dc"}
-{ "Warning" "WSGN_SEARCH_FILE" "memory.sv 1 1 " "Using design file memory.sv, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 memory " "Found entity 1: memory" { } { { "memory.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/memory.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584016142 ""} } { } 0 12125 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "Analysis & Synthesis" 0 -1 1712584016142 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "memory memory:mem " "Elaborating entity \"memory\" for hierarchy \"memory:mem\"" { } { { "chip8.sv" "mem" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 29 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584016143 ""}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "80 0 4095 memory.sv(14) " "Verilog HDL warning at memory.sv(14): number of words (80) in memory file does not match the number of elements in the address range \[0:4095\]" { } { { "memory.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/memory.sv" 14 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1712584016143 "|chip8|memory:mem"}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "132 512 4095 memory.sv(15) " "Verilog HDL warning at memory.sv(15): number of words (132) in memory file does not match the number of elements in the address range \[512:4095\]" { } { { "memory.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/memory.sv" 15 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1712584016143 "|chip8|memory:mem"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu cpu:cpu " "Elaborating entity \"cpu\" for hierarchy \"cpu:cpu\"" { } { { "chip8.sv" "cpu" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 44 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584016144 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(148) " "Verilog HDL assignment warning at cpu.sv(148): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 148 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016275 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(154) " "Verilog HDL assignment warning at cpu.sv(154): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 154 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016275 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(171) " "Verilog HDL assignment warning at cpu.sv(171): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 171 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016275 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 cpu.sv(249) " "Verilog HDL assignment warning at cpu.sv(249): truncated value with size 32 to match size of target (5)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 249 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016277 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 cpu.sv(252) " "Verilog HDL assignment warning at cpu.sv(252): truncated value with size 32 to match size of target (5)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 252 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016277 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(281) " "Verilog HDL assignment warning at cpu.sv(281): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 281 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016282 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 cpu.sv(285) " "Verilog HDL assignment warning at cpu.sv(285): truncated value with size 32 to match size of target (5)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 285 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016282 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 cpu.sv(296) " "Verilog HDL assignment warning at cpu.sv(296): truncated value with size 32 to match size of target (5)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 296 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016642 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(323) " "Verilog HDL assignment warning at cpu.sv(323): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 323 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016663 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(333) " "Verilog HDL assignment warning at cpu.sv(333): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 333 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584016664 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "instr.src_reg 0 cpu.sv(131) " "Net \"instr.src_reg\" at cpu.sv(131) has no driver or initial value, using a default initial value '0'" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 131 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1712584017054 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "instr.src_addr 0 cpu.sv(131) " "Net \"instr.src_addr\" at cpu.sv(131) has no driver or initial value, using a default initial value '0'" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 131 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1712584017054 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "instr.dst_addr 0 cpu.sv(131) " "Net \"instr.dst_addr\" at cpu.sv(131) has no driver or initial value, using a default initial value '0'" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 131 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1712584017054 "|chip8|cpu:cpu"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alu cpu:cpu\|alu:alu " "Elaborating entity \"alu\" for hierarchy \"cpu:cpu\|alu:alu\"" { } { { "cpu.sv" "alu" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 33 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584019602 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "st7920_serial_driver cpu:cpu\|st7920_serial_driver:gpu " "Elaborating entity \"st7920_serial_driver\" for hierarchy \"cpu:cpu\|st7920_serial_driver:gpu\"" { } { { "cpu.sv" "gpu" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 49 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584019606 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "line_idx st7920_serial_driver.sv(23) " "Verilog HDL or VHDL warning at st7920_serial_driver.sv(23): object \"line_idx\" assigned a value but never read" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 23 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1712584019620 "|chip8|cpu:cpu|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 st7920_serial_driver.sv(71) " "Verilog HDL assignment warning at st7920_serial_driver.sv(71): truncated value with size 32 to match size of target (7)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 71 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584019620 "|chip8|cpu:cpu|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 st7920_serial_driver.sv(84) " "Verilog HDL assignment warning at st7920_serial_driver.sv(84): truncated value with size 32 to match size of target (7)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 84 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584019620 "|chip8|cpu:cpu|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 st7920_serial_driver.sv(103) " "Verilog HDL assignment warning at st7920_serial_driver.sv(103): truncated value with size 32 to match size of target (6)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 103 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584019620 "|chip8|cpu:cpu|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 9 st7920_serial_driver.sv(131) " "Verilog HDL assignment warning at st7920_serial_driver.sv(131): truncated value with size 32 to match size of target (9)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 131 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712584019620 "|chip8|cpu:cpu|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "commands\[6..10\] 0 st7920_serial_driver.sv(26) " "Net \"commands\[6..10\]\" at st7920_serial_driver.sv(26) has no driver or initial value, using a default initial value '0'" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 26 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1712584019620 "|chip8|cpu:cpu|st7920_serial_driver:gpu"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "commander cpu:cpu\|st7920_serial_driver:gpu\|commander:com " "Elaborating entity \"commander\" for hierarchy \"cpu:cpu\|st7920_serial_driver:gpu\|commander:com\"" { } { { "the-bomb/st7920_serial_driver.sv" "com" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 42 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584019621 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "d_flip_flop cpu:cpu\|st7920_serial_driver:gpu\|d_flip_flop:dff " "Elaborating entity \"d_flip_flop\" for hierarchy \"cpu:cpu\|st7920_serial_driver:gpu\|d_flip_flop:dff\"" { } { { "the-bomb/st7920_serial_driver.sv" "dff" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 50 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584019622 ""}
-{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Inferred 1 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "memory:mem\|mem_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"memory:mem\|mem_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 8 " "Parameter WIDTH_A set to 8" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 8 " "Parameter WIDTH_B set to 8" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/chip8.ram0_memory_e9e85012.hdl.mif " "Parameter INIT_FILE set to db/chip8.ram0_memory_e9e85012.hdl.mif" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1712584036621 ""} } { } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1712584036621 ""} } { } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1712584036621 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "memory:mem\|altsyncram:mem_rtl_0 " "Elaborated megafunction instantiation \"memory:mem\|altsyncram:mem_rtl_0\"" { } { } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584036659 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "memory:mem\|altsyncram:mem_rtl_0 " "Instantiated megafunction \"memory:mem\|altsyncram:mem_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 8 " "Parameter \"WIDTH_A\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 8 " "Parameter \"WIDTH_B\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/chip8.ram0_memory_e9e85012.hdl.mif " "Parameter \"INIT_FILE\" = \"db/chip8.ram0_memory_e9e85012.hdl.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712584036659 ""} } { } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1712584036659 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_dsq1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_dsq1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_dsq1 " "Found entity 1: altsyncram_dsq1" { } { { "db/altsyncram_dsq1.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/altsyncram_dsq1.tdf" 28 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712584036680 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584036680 ""}
-{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "led\[4\] GND " "Pin \"led\[4\]\" is stuck at GND" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 7 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1712584046983 "|chip8|led[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "led\[5\] GND " "Pin \"led\[5\]\" is stuck at GND" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 7 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1712584046983 "|chip8|led[5]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1712584046983 ""}
-{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1712584047706 ""}
-{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "6 " "6 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1712584065406 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.map.smsg " "Generated suppressed messages file /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584065742 ""}
-{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1712584066477 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712584066477 ""}
-{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "rst_in " "No output dependent on input pin \"rst_in\"" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 3 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1712584067334 "|chip8|rst_in"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1712584067334 ""}
-{ "Info" "ICUT_CUT_TM_SUMMARY" "17552 " "Implemented 17552 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Implemented 2 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1712584067389 ""} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Implemented 8 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1712584067389 ""} { "Info" "ICUT_CUT_TM_LCELLS" "17534 " "Implemented 17534 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1712584067389 ""} { "Info" "ICUT_CUT_TM_RAMS" "8 " "Implemented 8 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1712584067389 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1712584067389 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 29 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 29 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "775 " "Peak virtual memory: 775 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1712584067421 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 8 08:47:47 2024 " "Processing ended: Mon Apr 8 08:47:47 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1712584067421 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:56 " "Elapsed time: 00:00:56" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1712584067421 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:01:34 " "Total CPU time (on all processors): 00:01:34" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1712584067421 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1712584067421 ""}
diff --git a/db/chip8.map.rdb b/db/chip8.map.rdb
deleted file mode 100644
index 23d87c4..0000000
Binary files a/db/chip8.map.rdb and /dev/null differ
diff --git a/db/chip8.map_bb.cdb b/db/chip8.map_bb.cdb
deleted file mode 100644
index 07a9b20..0000000
Binary files a/db/chip8.map_bb.cdb and /dev/null differ
diff --git a/db/chip8.map_bb.hdb b/db/chip8.map_bb.hdb
deleted file mode 100644
index ff054c2..0000000
Binary files a/db/chip8.map_bb.hdb and /dev/null differ
diff --git a/db/chip8.pre_map.hdb b/db/chip8.pre_map.hdb
deleted file mode 100644
index 432d4e8..0000000
Binary files a/db/chip8.pre_map.hdb and /dev/null differ
diff --git a/db/chip8.quiproj.1387018.rdr.flock b/db/chip8.quiproj.1387018.rdr.flock
deleted file mode 100644
index e69de29..0000000
diff --git a/db/chip8.ram0_memory_e9e85012.hdl.mif b/db/chip8.ram0_memory_e9e85012.hdl.mif
deleted file mode 100644
index 3a8a82c..0000000
--- a/db/chip8.ram0_memory_e9e85012.hdl.mif
+++ /dev/null
@@ -1,4108 +0,0 @@
--- begin_signature
--- memory(RAM_SIZE_BYTES
--- 4096)
--- end_signature
-WIDTH=8;
-DEPTH=4096;
-
-ADDRESS_RADIX=UNS;
-DATA_RADIX=BIN;
-
-CONTENT BEGIN
- 4095 : XXXXXXXX;
- 4094 : XXXXXXXX;
- 4093 : XXXXXXXX;
- 4092 : XXXXXXXX;
- 4091 : XXXXXXXX;
- 4090 : XXXXXXXX;
- 4089 : XXXXXXXX;
- 4088 : XXXXXXXX;
- 4087 : XXXXXXXX;
- 4086 : XXXXXXXX;
- 4085 : XXXXXXXX;
- 4084 : XXXXXXXX;
- 4083 : XXXXXXXX;
- 4082 : XXXXXXXX;
- 4081 : XXXXXXXX;
- 4080 : XXXXXXXX;
- 4079 : XXXXXXXX;
- 4078 : XXXXXXXX;
- 4077 : XXXXXXXX;
- 4076 : XXXXXXXX;
- 4075 : XXXXXXXX;
- 4074 : XXXXXXXX;
- 4073 : XXXXXXXX;
- 4072 : XXXXXXXX;
- 4071 : XXXXXXXX;
- 4070 : XXXXXXXX;
- 4069 : XXXXXXXX;
- 4068 : XXXXXXXX;
- 4067 : XXXXXXXX;
- 4066 : XXXXXXXX;
- 4065 : XXXXXXXX;
- 4064 : XXXXXXXX;
- 4063 : XXXXXXXX;
- 4062 : XXXXXXXX;
- 4061 : XXXXXXXX;
- 4060 : XXXXXXXX;
- 4059 : XXXXXXXX;
- 4058 : XXXXXXXX;
- 4057 : XXXXXXXX;
- 4056 : XXXXXXXX;
- 4055 : XXXXXXXX;
- 4054 : XXXXXXXX;
- 4053 : XXXXXXXX;
- 4052 : XXXXXXXX;
- 4051 : XXXXXXXX;
- 4050 : XXXXXXXX;
- 4049 : XXXXXXXX;
- 4048 : XXXXXXXX;
- 4047 : XXXXXXXX;
- 4046 : XXXXXXXX;
- 4045 : XXXXXXXX;
- 4044 : XXXXXXXX;
- 4043 : XXXXXXXX;
- 4042 : XXXXXXXX;
- 4041 : XXXXXXXX;
- 4040 : XXXXXXXX;
- 4039 : XXXXXXXX;
- 4038 : XXXXXXXX;
- 4037 : XXXXXXXX;
- 4036 : XXXXXXXX;
- 4035 : XXXXXXXX;
- 4034 : XXXXXXXX;
- 4033 : XXXXXXXX;
- 4032 : XXXXXXXX;
- 4031 : XXXXXXXX;
- 4030 : XXXXXXXX;
- 4029 : XXXXXXXX;
- 4028 : XXXXXXXX;
- 4027 : XXXXXXXX;
- 4026 : XXXXXXXX;
- 4025 : XXXXXXXX;
- 4024 : XXXXXXXX;
- 4023 : XXXXXXXX;
- 4022 : XXXXXXXX;
- 4021 : XXXXXXXX;
- 4020 : XXXXXXXX;
- 4019 : XXXXXXXX;
- 4018 : XXXXXXXX;
- 4017 : XXXXXXXX;
- 4016 : XXXXXXXX;
- 4015 : XXXXXXXX;
- 4014 : XXXXXXXX;
- 4013 : XXXXXXXX;
- 4012 : XXXXXXXX;
- 4011 : XXXXXXXX;
- 4010 : XXXXXXXX;
- 4009 : XXXXXXXX;
- 4008 : XXXXXXXX;
- 4007 : XXXXXXXX;
- 4006 : XXXXXXXX;
- 4005 : XXXXXXXX;
- 4004 : XXXXXXXX;
- 4003 : XXXXXXXX;
- 4002 : XXXXXXXX;
- 4001 : XXXXXXXX;
- 4000 : XXXXXXXX;
- 3999 : XXXXXXXX;
- 3998 : XXXXXXXX;
- 3997 : XXXXXXXX;
- 3996 : XXXXXXXX;
- 3995 : XXXXXXXX;
- 3994 : XXXXXXXX;
- 3993 : XXXXXXXX;
- 3992 : XXXXXXXX;
- 3991 : XXXXXXXX;
- 3990 : XXXXXXXX;
- 3989 : XXXXXXXX;
- 3988 : XXXXXXXX;
- 3987 : XXXXXXXX;
- 3986 : XXXXXXXX;
- 3985 : XXXXXXXX;
- 3984 : XXXXXXXX;
- 3983 : XXXXXXXX;
- 3982 : XXXXXXXX;
- 3981 : XXXXXXXX;
- 3980 : XXXXXXXX;
- 3979 : XXXXXXXX;
- 3978 : XXXXXXXX;
- 3977 : XXXXXXXX;
- 3976 : XXXXXXXX;
- 3975 : XXXXXXXX;
- 3974 : XXXXXXXX;
- 3973 : XXXXXXXX;
- 3972 : XXXXXXXX;
- 3971 : XXXXXXXX;
- 3970 : XXXXXXXX;
- 3969 : XXXXXXXX;
- 3968 : XXXXXXXX;
- 3967 : XXXXXXXX;
- 3966 : XXXXXXXX;
- 3965 : XXXXXXXX;
- 3964 : XXXXXXXX;
- 3963 : XXXXXXXX;
- 3962 : XXXXXXXX;
- 3961 : XXXXXXXX;
- 3960 : XXXXXXXX;
- 3959 : XXXXXXXX;
- 3958 : XXXXXXXX;
- 3957 : XXXXXXXX;
- 3956 : XXXXXXXX;
- 3955 : XXXXXXXX;
- 3954 : XXXXXXXX;
- 3953 : XXXXXXXX;
- 3952 : XXXXXXXX;
- 3951 : XXXXXXXX;
- 3950 : XXXXXXXX;
- 3949 : XXXXXXXX;
- 3948 : XXXXXXXX;
- 3947 : XXXXXXXX;
- 3946 : XXXXXXXX;
- 3945 : XXXXXXXX;
- 3944 : XXXXXXXX;
- 3943 : XXXXXXXX;
- 3942 : XXXXXXXX;
- 3941 : XXXXXXXX;
- 3940 : XXXXXXXX;
- 3939 : XXXXXXXX;
- 3938 : XXXXXXXX;
- 3937 : XXXXXXXX;
- 3936 : XXXXXXXX;
- 3935 : XXXXXXXX;
- 3934 : XXXXXXXX;
- 3933 : XXXXXXXX;
- 3932 : XXXXXXXX;
- 3931 : XXXXXXXX;
- 3930 : XXXXXXXX;
- 3929 : XXXXXXXX;
- 3928 : XXXXXXXX;
- 3927 : XXXXXXXX;
- 3926 : XXXXXXXX;
- 3925 : XXXXXXXX;
- 3924 : XXXXXXXX;
- 3923 : XXXXXXXX;
- 3922 : XXXXXXXX;
- 3921 : XXXXXXXX;
- 3920 : XXXXXXXX;
- 3919 : XXXXXXXX;
- 3918 : XXXXXXXX;
- 3917 : XXXXXXXX;
- 3916 : XXXXXXXX;
- 3915 : XXXXXXXX;
- 3914 : XXXXXXXX;
- 3913 : XXXXXXXX;
- 3912 : XXXXXXXX;
- 3911 : XXXXXXXX;
- 3910 : XXXXXXXX;
- 3909 : XXXXXXXX;
- 3908 : XXXXXXXX;
- 3907 : XXXXXXXX;
- 3906 : XXXXXXXX;
- 3905 : XXXXXXXX;
- 3904 : XXXXXXXX;
- 3903 : XXXXXXXX;
- 3902 : XXXXXXXX;
- 3901 : XXXXXXXX;
- 3900 : XXXXXXXX;
- 3899 : XXXXXXXX;
- 3898 : XXXXXXXX;
- 3897 : XXXXXXXX;
- 3896 : XXXXXXXX;
- 3895 : XXXXXXXX;
- 3894 : XXXXXXXX;
- 3893 : XXXXXXXX;
- 3892 : XXXXXXXX;
- 3891 : XXXXXXXX;
- 3890 : XXXXXXXX;
- 3889 : XXXXXXXX;
- 3888 : XXXXXXXX;
- 3887 : XXXXXXXX;
- 3886 : XXXXXXXX;
- 3885 : XXXXXXXX;
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- 585 : 00000000;
- 584 : 10000000;
- 583 : 11111111;
- 582 : 00000000;
- 581 : 11111111;
- 580 : 00000000;
- 579 : 00111000;
- 578 : 00000000;
- 577 : 00111111;
- 576 : 00000000;
- 575 : 00111111;
- 574 : 00000000;
- 573 : 00111000;
- 572 : 00000000;
- 571 : 11111111;
- 570 : 00000000;
- 569 : 11111111;
- 568 : 11111111;
- 567 : 00000000;
- 566 : 11111111;
- 565 : 00000000;
- 564 : 00111100;
- 563 : 00000000;
- 562 : 00111100;
- 561 : 00000000;
- 560 : 00111100;
- 559 : 00000000;
- 558 : 00111100;
- 557 : 00000000;
- 556 : 11111111;
- 555 : 00000000;
- 554 : 11111111;
- 553 : 00101000;
- 552 : 00010010;
- 551 : 00011111;
- 550 : 11010000;
- 549 : 01110101;
- 548 : 10100010;
- 547 : 00001000;
- 546 : 01110000;
- 545 : 00011111;
- 544 : 11010000;
- 543 : 01100110;
- 542 : 10100010;
- 541 : 00001000;
- 540 : 01110000;
- 539 : 00011111;
- 538 : 11010000;
- 537 : 01010111;
- 536 : 10100010;
- 535 : 00000100;
- 534 : 01110000;
- 533 : 00011111;
- 532 : 11010000;
- 531 : 00001000;
- 530 : 01110000;
- 529 : 01001000;
- 528 : 10100010;
- 527 : 00011111;
- 526 : 11010000;
- 525 : 00111001;
- 524 : 10100010;
- 523 : 00001001;
- 522 : 01110000;
- 521 : 00011111;
- 520 : 11010000;
- 519 : 00001000;
- 518 : 01100001;
- 517 : 00001100;
- 516 : 01100000;
- 515 : 00101010;
- 514 : 10100010;
- 513 : 11100000;
- 512 : 00000000;
- 511 : XXXXXXXX;
- 510 : XXXXXXXX;
- 509 : XXXXXXXX;
- 508 : XXXXXXXX;
- 507 : XXXXXXXX;
- 506 : XXXXXXXX;
- 505 : XXXXXXXX;
- 504 : XXXXXXXX;
- 503 : XXXXXXXX;
- 502 : XXXXXXXX;
- 501 : XXXXXXXX;
- 500 : XXXXXXXX;
- 499 : XXXXXXXX;
- 498 : XXXXXXXX;
- 497 : XXXXXXXX;
- 496 : XXXXXXXX;
- 495 : XXXXXXXX;
- 494 : XXXXXXXX;
- 493 : XXXXXXXX;
- 492 : XXXXXXXX;
- 491 : XXXXXXXX;
- 490 : XXXXXXXX;
- 489 : XXXXXXXX;
- 488 : XXXXXXXX;
- 487 : XXXXXXXX;
- 486 : XXXXXXXX;
- 485 : XXXXXXXX;
- 484 : XXXXXXXX;
- 483 : XXXXXXXX;
- 482 : XXXXXXXX;
- 481 : XXXXXXXX;
- 480 : XXXXXXXX;
- 479 : XXXXXXXX;
- 478 : XXXXXXXX;
- 477 : XXXXXXXX;
- 476 : XXXXXXXX;
- 475 : XXXXXXXX;
- 474 : XXXXXXXX;
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- 472 : XXXXXXXX;
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- 470 : XXXXXXXX;
- 469 : XXXXXXXX;
- 468 : XXXXXXXX;
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- 466 : XXXXXXXX;
- 465 : XXXXXXXX;
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- 463 : XXXXXXXX;
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- 460 : XXXXXXXX;
- 459 : XXXXXXXX;
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- 457 : XXXXXXXX;
- 456 : XXXXXXXX;
- 455 : XXXXXXXX;
- 454 : XXXXXXXX;
- 453 : XXXXXXXX;
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- 451 : XXXXXXXX;
- 450 : XXXXXXXX;
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- 445 : XXXXXXXX;
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- 440 : XXXXXXXX;
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- 438 : XXXXXXXX;
- 437 : XXXXXXXX;
- 436 : XXXXXXXX;
- 435 : XXXXXXXX;
- 434 : XXXXXXXX;
- 433 : XXXXXXXX;
- 432 : XXXXXXXX;
- 431 : XXXXXXXX;
- 430 : XXXXXXXX;
- 429 : XXXXXXXX;
- 428 : XXXXXXXX;
- 427 : XXXXXXXX;
- 426 : XXXXXXXX;
- 425 : XXXXXXXX;
- 424 : XXXXXXXX;
- 423 : XXXXXXXX;
- 422 : XXXXXXXX;
- 421 : XXXXXXXX;
- 420 : XXXXXXXX;
- 419 : XXXXXXXX;
- 418 : XXXXXXXX;
- 417 : XXXXXXXX;
- 416 : XXXXXXXX;
- 415 : XXXXXXXX;
- 414 : XXXXXXXX;
- 413 : XXXXXXXX;
- 412 : XXXXXXXX;
- 411 : XXXXXXXX;
- 410 : XXXXXXXX;
- 409 : XXXXXXXX;
- 408 : XXXXXXXX;
- 407 : XXXXXXXX;
- 406 : XXXXXXXX;
- 405 : XXXXXXXX;
- 404 : XXXXXXXX;
- 403 : XXXXXXXX;
- 402 : XXXXXXXX;
- 401 : XXXXXXXX;
- 400 : XXXXXXXX;
- 399 : XXXXXXXX;
- 398 : XXXXXXXX;
- 397 : XXXXXXXX;
- 396 : XXXXXXXX;
- 395 : XXXXXXXX;
- 394 : XXXXXXXX;
- 393 : XXXXXXXX;
- 392 : XXXXXXXX;
- 391 : XXXXXXXX;
- 390 : XXXXXXXX;
- 389 : XXXXXXXX;
- 388 : XXXXXXXX;
- 387 : XXXXXXXX;
- 386 : XXXXXXXX;
- 385 : XXXXXXXX;
- 384 : XXXXXXXX;
- 383 : XXXXXXXX;
- 382 : XXXXXXXX;
- 381 : XXXXXXXX;
- 380 : XXXXXXXX;
- 379 : XXXXXXXX;
- 378 : XXXXXXXX;
- 377 : XXXXXXXX;
- 376 : XXXXXXXX;
- 375 : XXXXXXXX;
- 374 : XXXXXXXX;
- 373 : XXXXXXXX;
- 372 : XXXXXXXX;
- 371 : XXXXXXXX;
- 370 : XXXXXXXX;
- 369 : XXXXXXXX;
- 368 : XXXXXXXX;
- 367 : XXXXXXXX;
- 366 : XXXXXXXX;
- 365 : XXXXXXXX;
- 364 : XXXXXXXX;
- 363 : XXXXXXXX;
- 362 : XXXXXXXX;
- 361 : XXXXXXXX;
- 360 : XXXXXXXX;
- 359 : XXXXXXXX;
- 358 : XXXXXXXX;
- 357 : XXXXXXXX;
- 356 : XXXXXXXX;
- 355 : XXXXXXXX;
- 354 : XXXXXXXX;
- 353 : XXXXXXXX;
- 352 : XXXXXXXX;
- 351 : XXXXXXXX;
- 350 : XXXXXXXX;
- 349 : XXXXXXXX;
- 348 : XXXXXXXX;
- 347 : XXXXXXXX;
- 346 : XXXXXXXX;
- 345 : XXXXXXXX;
- 344 : XXXXXXXX;
- 343 : XXXXXXXX;
- 342 : XXXXXXXX;
- 341 : XXXXXXXX;
- 340 : XXXXXXXX;
- 339 : XXXXXXXX;
- 338 : XXXXXXXX;
- 337 : XXXXXXXX;
- 336 : XXXXXXXX;
- 335 : XXXXXXXX;
- 334 : XXXXXXXX;
- 333 : XXXXXXXX;
- 332 : XXXXXXXX;
- 331 : XXXXXXXX;
- 330 : XXXXXXXX;
- 329 : XXXXXXXX;
- 328 : XXXXXXXX;
- 327 : XXXXXXXX;
- 326 : XXXXXXXX;
- 325 : XXXXXXXX;
- 324 : XXXXXXXX;
- 323 : XXXXXXXX;
- 322 : XXXXXXXX;
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- 320 : XXXXXXXX;
- 319 : XXXXXXXX;
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- 317 : XXXXXXXX;
- 316 : XXXXXXXX;
- 315 : XXXXXXXX;
- 314 : XXXXXXXX;
- 313 : XXXXXXXX;
- 312 : XXXXXXXX;
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- 310 : XXXXXXXX;
- 309 : XXXXXXXX;
- 308 : XXXXXXXX;
- 307 : XXXXXXXX;
- 306 : XXXXXXXX;
- 305 : XXXXXXXX;
- 304 : XXXXXXXX;
- 303 : XXXXXXXX;
- 302 : XXXXXXXX;
- 301 : XXXXXXXX;
- 300 : XXXXXXXX;
- 299 : XXXXXXXX;
- 298 : XXXXXXXX;
- 297 : XXXXXXXX;
- 296 : XXXXXXXX;
- 295 : XXXXXXXX;
- 294 : XXXXXXXX;
- 293 : XXXXXXXX;
- 292 : XXXXXXXX;
- 291 : XXXXXXXX;
- 290 : XXXXXXXX;
- 289 : XXXXXXXX;
- 288 : XXXXXXXX;
- 287 : XXXXXXXX;
- 286 : XXXXXXXX;
- 285 : XXXXXXXX;
- 284 : XXXXXXXX;
- 283 : XXXXXXXX;
- 282 : XXXXXXXX;
- 281 : XXXXXXXX;
- 280 : XXXXXXXX;
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- 278 : XXXXXXXX;
- 277 : XXXXXXXX;
- 276 : XXXXXXXX;
- 275 : XXXXXXXX;
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- 273 : XXXXXXXX;
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- 271 : XXXXXXXX;
- 270 : XXXXXXXX;
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- 264 : XXXXXXXX;
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- 256 : XXXXXXXX;
- 255 : XXXXXXXX;
- 254 : XXXXXXXX;
- 253 : XXXXXXXX;
- 252 : XXXXXXXX;
- 251 : XXXXXXXX;
- 250 : XXXXXXXX;
- 249 : XXXXXXXX;
- 248 : XXXXXXXX;
- 247 : XXXXXXXX;
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- 245 : XXXXXXXX;
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- 243 : XXXXXXXX;
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- 240 : XXXXXXXX;
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- 238 : XXXXXXXX;
- 237 : XXXXXXXX;
- 236 : XXXXXXXX;
- 235 : XXXXXXXX;
- 234 : XXXXXXXX;
- 233 : XXXXXXXX;
- 232 : XXXXXXXX;
- 231 : XXXXXXXX;
- 230 : XXXXXXXX;
- 229 : XXXXXXXX;
- 228 : XXXXXXXX;
- 227 : XXXXXXXX;
- 226 : XXXXXXXX;
- 225 : XXXXXXXX;
- 224 : XXXXXXXX;
- 223 : XXXXXXXX;
- 222 : XXXXXXXX;
- 221 : XXXXXXXX;
- 220 : XXXXXXXX;
- 219 : XXXXXXXX;
- 218 : XXXXXXXX;
- 217 : XXXXXXXX;
- 216 : XXXXXXXX;
- 215 : XXXXXXXX;
- 214 : XXXXXXXX;
- 213 : XXXXXXXX;
- 212 : XXXXXXXX;
- 211 : XXXXXXXX;
- 210 : XXXXXXXX;
- 209 : XXXXXXXX;
- 208 : XXXXXXXX;
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- 206 : XXXXXXXX;
- 205 : XXXXXXXX;
- 204 : XXXXXXXX;
- 203 : XXXXXXXX;
- 202 : XXXXXXXX;
- 201 : XXXXXXXX;
- 200 : XXXXXXXX;
- 199 : XXXXXXXX;
- 198 : XXXXXXXX;
- 197 : XXXXXXXX;
- 196 : XXXXXXXX;
- 195 : XXXXXXXX;
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- 192 : XXXXXXXX;
- 191 : XXXXXXXX;
- 190 : XXXXXXXX;
- 189 : XXXXXXXX;
- 188 : XXXXXXXX;
- 187 : XXXXXXXX;
- 186 : XXXXXXXX;
- 185 : XXXXXXXX;
- 184 : XXXXXXXX;
- 183 : XXXXXXXX;
- 182 : XXXXXXXX;
- 181 : XXXXXXXX;
- 180 : XXXXXXXX;
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- 178 : XXXXXXXX;
- 177 : XXXXXXXX;
- 176 : XXXXXXXX;
- 175 : XXXXXXXX;
- 174 : XXXXXXXX;
- 173 : XXXXXXXX;
- 172 : XXXXXXXX;
- 171 : XXXXXXXX;
- 170 : XXXXXXXX;
- 169 : XXXXXXXX;
- 168 : XXXXXXXX;
- 167 : XXXXXXXX;
- 166 : XXXXXXXX;
- 165 : XXXXXXXX;
- 164 : XXXXXXXX;
- 163 : XXXXXXXX;
- 162 : XXXXXXXX;
- 161 : XXXXXXXX;
- 160 : XXXXXXXX;
- 159 : XXXXXXXX;
- 158 : XXXXXXXX;
- 157 : XXXXXXXX;
- 156 : XXXXXXXX;
- 155 : XXXXXXXX;
- 154 : XXXXXXXX;
- 153 : XXXXXXXX;
- 152 : XXXXXXXX;
- 151 : XXXXXXXX;
- 150 : XXXXXXXX;
- 149 : XXXXXXXX;
- 148 : XXXXXXXX;
- 147 : XXXXXXXX;
- 146 : XXXXXXXX;
- 145 : XXXXXXXX;
- 144 : XXXXXXXX;
- 143 : XXXXXXXX;
- 142 : XXXXXXXX;
- 141 : XXXXXXXX;
- 140 : XXXXXXXX;
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- 138 : XXXXXXXX;
- 137 : XXXXXXXX;
- 136 : XXXXXXXX;
- 135 : XXXXXXXX;
- 134 : XXXXXXXX;
- 133 : XXXXXXXX;
- 132 : XXXXXXXX;
- 131 : XXXXXXXX;
- 130 : XXXXXXXX;
- 129 : XXXXXXXX;
- 128 : XXXXXXXX;
- 127 : XXXXXXXX;
- 126 : XXXXXXXX;
- 125 : XXXXXXXX;
- 124 : XXXXXXXX;
- 123 : XXXXXXXX;
- 122 : XXXXXXXX;
- 121 : XXXXXXXX;
- 120 : XXXXXXXX;
- 119 : XXXXXXXX;
- 118 : XXXXXXXX;
- 117 : XXXXXXXX;
- 116 : XXXXXXXX;
- 115 : XXXXXXXX;
- 114 : XXXXXXXX;
- 113 : XXXXXXXX;
- 112 : XXXXXXXX;
- 111 : XXXXXXXX;
- 110 : XXXXXXXX;
- 109 : XXXXXXXX;
- 108 : XXXXXXXX;
- 107 : XXXXXXXX;
- 106 : XXXXXXXX;
- 105 : XXXXXXXX;
- 104 : XXXXXXXX;
- 103 : XXXXXXXX;
- 102 : XXXXXXXX;
- 101 : XXXXXXXX;
- 100 : XXXXXXXX;
- 99 : XXXXXXXX;
- 98 : XXXXXXXX;
- 97 : XXXXXXXX;
- 96 : XXXXXXXX;
- 95 : XXXXXXXX;
- 94 : XXXXXXXX;
- 93 : XXXXXXXX;
- 92 : XXXXXXXX;
- 91 : XXXXXXXX;
- 90 : XXXXXXXX;
- 89 : XXXXXXXX;
- 88 : XXXXXXXX;
- 87 : XXXXXXXX;
- 86 : XXXXXXXX;
- 85 : XXXXXXXX;
- 84 : XXXXXXXX;
- 83 : XXXXXXXX;
- 82 : XXXXXXXX;
- 81 : XXXXXXXX;
- 80 : XXXXXXXX;
- 79 : 10000000;
- 78 : 10000000;
- 77 : 11110000;
- 76 : 10000000;
- 75 : 11110000;
- 74 : 11110000;
- 73 : 10000000;
- 72 : 11110000;
- 71 : 10000000;
- 70 : 11110000;
- 69 : 11100000;
- 68 : 10010000;
- 67 : 10010000;
- 66 : 10010000;
- 65 : 11100000;
- 64 : 11110000;
- 63 : 10000000;
- 62 : 10000000;
- 61 : 10000000;
- 60 : 11110000;
- 59 : 11100000;
- 58 : 10010000;
- 57 : 11100000;
- 56 : 10010000;
- 55 : 11100000;
- 54 : 10010000;
- 53 : 10010000;
- 52 : 11110000;
- 51 : 10010000;
- 50 : 11110000;
- 49 : 11110000;
- 48 : 00010000;
- 47 : 11110000;
- 46 : 10010000;
- 45 : 11110000;
- 44 : 11110000;
- 43 : 10010000;
- 42 : 11110000;
- 41 : 10010000;
- 40 : 11110000;
- 39 : 01000000;
- 38 : 01000000;
- 37 : 00100000;
- 36 : 00010000;
- 35 : 11110000;
- 34 : 11110000;
- 33 : 10010000;
- 32 : 11110000;
- 31 : 10000000;
- 30 : 11110000;
- 29 : 11110000;
- 28 : 00010000;
- 27 : 11110000;
- 26 : 10000000;
- 25 : 11110000;
- 24 : 00010000;
- 23 : 00010000;
- 22 : 11110000;
- 21 : 10010000;
- 20 : 10010000;
- 19 : 11110000;
- 18 : 00010000;
- 17 : 11110000;
- 16 : 00010000;
- 15 : 11110000;
- 14 : 11110000;
- 13 : 10000000;
- 12 : 11110000;
- 11 : 00010000;
- 10 : 11110000;
- 9 : 01110000;
- 8 : 00100000;
- 7 : 00100000;
- 6 : 01100000;
- 5 : 00100000;
- 4 : 11110000;
- 3 : 10010000;
- 2 : 10010000;
- 1 : 10010000;
- 0 : 11110000;
-END;
diff --git a/db/chip8.root_partition.map.reg_db.cdb b/db/chip8.root_partition.map.reg_db.cdb
deleted file mode 100644
index 4398baf..0000000
Binary files a/db/chip8.root_partition.map.reg_db.cdb and /dev/null differ
diff --git a/db/chip8.routing.rdb b/db/chip8.routing.rdb
deleted file mode 100644
index ddf829e..0000000
Binary files a/db/chip8.routing.rdb and /dev/null differ
diff --git a/db/chip8.rtlv.hdb b/db/chip8.rtlv.hdb
deleted file mode 100644
index 4ba007c..0000000
Binary files a/db/chip8.rtlv.hdb and /dev/null differ
diff --git a/db/chip8.rtlv_sg.cdb b/db/chip8.rtlv_sg.cdb
deleted file mode 100644
index e3418d3..0000000
Binary files a/db/chip8.rtlv_sg.cdb and /dev/null differ
diff --git a/db/chip8.rtlv_sg_swap.cdb b/db/chip8.rtlv_sg_swap.cdb
deleted file mode 100644
index 433848b..0000000
Binary files a/db/chip8.rtlv_sg_swap.cdb and /dev/null differ
diff --git a/db/chip8.sld_design_entry.sci b/db/chip8.sld_design_entry.sci
deleted file mode 100644
index 57893fc..0000000
Binary files a/db/chip8.sld_design_entry.sci and /dev/null differ
diff --git a/db/chip8.sld_design_entry_dsc.sci b/db/chip8.sld_design_entry_dsc.sci
deleted file mode 100644
index 57893fc..0000000
Binary files a/db/chip8.sld_design_entry_dsc.sci and /dev/null differ
diff --git a/db/chip8.smart_action.txt b/db/chip8.smart_action.txt
deleted file mode 100644
index c8e8a13..0000000
--- a/db/chip8.smart_action.txt
+++ /dev/null
@@ -1 +0,0 @@
-DONE
diff --git a/db/chip8.sta.qmsg b/db/chip8.sta.qmsg
deleted file mode 100644
index f9b11d9..0000000
--- a/db/chip8.sta.qmsg
+++ /dev/null
@@ -1,56 +0,0 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1712584346749 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition " "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1712584346749 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 8 08:52:26 2024 " "Processing started: Mon Apr 8 08:52:26 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1712584346749 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1712584346749 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta chip8 -c chip8 " "Command: quartus_sta chip8 -c chip8" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1712584346749 ""}
-{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1712584346775 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Timing Analyzer" 0 -1 1712584347519 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1712584347519 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature -40 degrees C " "Low junction temperature is -40 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584347540 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 100 degrees C " "High junction temperature is 100 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584347540 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "chip8.sdc " "Synopsys Design Constraints File file not found: 'chip8.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1712584348745 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584348745 ""}
-{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name fpga_clk fpga_clk " "create_clock -period 1.000 -name fpga_clk fpga_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1712584348809 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " "create_clock -period 1.000 -name cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1712584348809 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name downclocker:dc\|clk_out downclocker:dc\|clk_out " "create_clock -period 1.000 -name downclocker:dc\|clk_out downclocker:dc\|clk_out" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1712584348809 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584348809 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1712584348957 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584349002 ""}
-{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1712584349007 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 100C Model" { } { } 0 0 "Analyzing Slow 1100mV 100C Model" 0 0 "Timing Analyzer" 0 0 1712584349012 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584352097 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584352097 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -31.412 " "Worst-case setup slack is -31.412" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -31.412 -1884.356 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -31.412 -1884.356 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -11.058 -87363.415 downclocker:dc\|clk_out " " -11.058 -87363.415 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.953 -27.713 fpga_clk " " -4.953 -27.713 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584352098 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.429 " "Worst-case hold slack is 0.429" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.429 0.000 downclocker:dc\|clk_out " " 0.429 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.501 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.501 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.814 0.000 fpga_clk " " 0.814 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584352292 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584352293 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584352294 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -8430.055 downclocker:dc\|clk_out " " -2.636 -8430.055 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.622 -17.105 fpga_clk " " -0.622 -17.105 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -172.550 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.538 -172.550 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584352305 ""}
-{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584352352 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584352352 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV -40C Model" { } { } 0 0 "Analyzing Slow 1100mV -40C Model" 0 0 "Timing Analyzer" 0 0 1712584352354 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1712584352416 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1712584357006 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584357723 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584358182 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584358182 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -29.494 " "Worst-case setup slack is -29.494" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -29.494 -1798.010 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -29.494 -1798.010 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -11.057 -87142.095 downclocker:dc\|clk_out " " -11.057 -87142.095 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.658 -29.299 fpga_clk " " -4.658 -29.299 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584358183 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.483 " "Worst-case hold slack is 0.483" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.483 0.000 downclocker:dc\|clk_out " " 0.483 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.546 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.546 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.786 0.000 fpga_clk " " 0.786 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584358364 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584358365 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584358367 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -8301.987 downclocker:dc\|clk_out " " -2.636 -8301.987 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.627 -18.184 fpga_clk " " -0.627 -18.184 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -170.070 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.538 -170.070 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584358379 ""}
-{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584358423 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584358423 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 100C Model" { } { } 0 0 "Analyzing Fast 1100mV 100C Model" 0 0 "Timing Analyzer" 0 0 1712584358424 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1712584358636 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1712584362578 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584363407 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584363595 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584363595 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -16.301 " "Worst-case setup slack is -16.301" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -16.301 -1018.017 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -16.301 -1018.017 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -5.608 -44394.911 downclocker:dc\|clk_out " " -5.608 -44394.911 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.718 -8.178 fpga_clk " " -3.718 -8.178 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584363596 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.160 " "Worst-case hold slack is 0.160" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.160 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.160 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.177 0.000 downclocker:dc\|clk_out " " 0.177 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.303 0.000 fpga_clk " " 0.303 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584363790 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584363791 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584363791 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.174 " "Worst-case minimum pulse width slack is -2.174" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.174 -537.344 downclocker:dc\|clk_out " " -2.174 -537.344 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.517 -2.901 fpga_clk " " -0.517 -2.901 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.144 -6.507 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.144 -6.507 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584363803 ""}
-{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584363846 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584363846 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV -40C Model" { } { } 0 0 "Analyzing Fast 1100mV -40C Model" 0 0 "Timing Analyzer" 0 0 1712584363847 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584364332 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584364514 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584364514 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -14.004 " "Worst-case setup slack is -14.004" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -14.004 -820.600 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -14.004 -820.600 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.541 -36337.093 downclocker:dc\|clk_out " " -4.541 -36337.093 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.859 -5.427 fpga_clk " " -2.859 -5.427 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584364515 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.138 " "Worst-case hold slack is 0.138" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.138 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.138 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.164 0.000 downclocker:dc\|clk_out " " 0.164 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.289 0.000 fpga_clk " " 0.289 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584364696 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584364696 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584364697 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.174 " "Worst-case minimum pulse width slack is -2.174" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.174 -534.258 downclocker:dc\|clk_out " " -2.174 -534.258 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.533 -2.899 fpga_clk " " -0.533 -2.899 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.057 -2.411 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.057 -2.411 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584364710 ""}
-{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584364752 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584364752 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1712584365431 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1712584365432 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1312 " "Peak virtual memory: 1312 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1712584365561 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 8 08:52:45 2024 " "Processing ended: Mon Apr 8 08:52:45 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1712584365561 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:19 " "Elapsed time: 00:00:19" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1712584365561 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:01:25 " "Total CPU time (on all processors): 00:01:25" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1712584365561 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1712584365561 ""}
diff --git a/db/chip8.sta.rdb b/db/chip8.sta.rdb
deleted file mode 100644
index 5555e92..0000000
Binary files a/db/chip8.sta.rdb and /dev/null differ
diff --git a/db/chip8.sta_cmp.7_slow_1100mv_100c.tdb b/db/chip8.sta_cmp.7_slow_1100mv_100c.tdb
deleted file mode 100644
index a766d34..0000000
Binary files a/db/chip8.sta_cmp.7_slow_1100mv_100c.tdb and /dev/null differ
diff --git a/db/chip8.tis_db_list.ddb b/db/chip8.tis_db_list.ddb
deleted file mode 100644
index 22adbe3..0000000
Binary files a/db/chip8.tis_db_list.ddb and /dev/null differ
diff --git a/db/chip8.tiscmp.fast_1100mv_100c.ddb b/db/chip8.tiscmp.fast_1100mv_100c.ddb
deleted file mode 100644
index 8da32e3..0000000
Binary files a/db/chip8.tiscmp.fast_1100mv_100c.ddb and /dev/null differ
diff --git a/db/chip8.tiscmp.fast_1100mv_n40c.ddb b/db/chip8.tiscmp.fast_1100mv_n40c.ddb
deleted file mode 100644
index 4dfe68e..0000000
Binary files a/db/chip8.tiscmp.fast_1100mv_n40c.ddb and /dev/null differ
diff --git a/db/chip8.tiscmp.fastest_slow_1100mv_85c.ddb b/db/chip8.tiscmp.fastest_slow_1100mv_85c.ddb
deleted file mode 100644
index 4da5e57..0000000
Binary files a/db/chip8.tiscmp.fastest_slow_1100mv_85c.ddb and /dev/null differ
diff --git a/db/chip8.tiscmp.fastest_slow_1100mv_n40c.ddb b/db/chip8.tiscmp.fastest_slow_1100mv_n40c.ddb
deleted file mode 100644
index ae86b39..0000000
Binary files a/db/chip8.tiscmp.fastest_slow_1100mv_n40c.ddb and /dev/null differ
diff --git a/db/chip8.tiscmp.slow_1100mv_100c.ddb b/db/chip8.tiscmp.slow_1100mv_100c.ddb
deleted file mode 100644
index 6db8842..0000000
Binary files a/db/chip8.tiscmp.slow_1100mv_100c.ddb and /dev/null differ
diff --git a/db/chip8.tiscmp.slow_1100mv_n40c.ddb b/db/chip8.tiscmp.slow_1100mv_n40c.ddb
deleted file mode 100644
index 9d251b1..0000000
Binary files a/db/chip8.tiscmp.slow_1100mv_n40c.ddb and /dev/null differ
diff --git a/db/chip8.tmw_info b/db/chip8.tmw_info
deleted file mode 100644
index 1580cf2..0000000
--- a/db/chip8.tmw_info
+++ /dev/null
@@ -1,6 +0,0 @@
-start_full_compilation:s:00:07:53
-start_analysis_synthesis:s:00:01:03-start_full_compilation
-start_analysis_elaboration:s-start_full_compilation
-start_fitter:s:00:06:16-start_full_compilation
-start_assembler:s:00:00:08-start_full_compilation
-start_timing_analyzer:s:00:00:26-start_full_compilation
diff --git a/db/chip8.vpr.ammdb b/db/chip8.vpr.ammdb
deleted file mode 100644
index 42bbe9b..0000000
Binary files a/db/chip8.vpr.ammdb and /dev/null differ
diff --git a/db/chip8_partition_pins.json b/db/chip8_partition_pins.json
deleted file mode 100644
index 8e5fe40..0000000
--- a/db/chip8_partition_pins.json
+++ /dev/null
@@ -1,37 +0,0 @@
-{
- "partitions" : [
- {
- "name" : "Top",
- "pins" : [
- {
- "name" : "lcd_clk",
- "strict" : false
- },
- {
- "name" : "lcd_data",
- "strict" : false
- },
- {
- "name" : "led[0]",
- "strict" : false
- },
- {
- "name" : "led[1]",
- "strict" : false
- },
- {
- "name" : "led[2]",
- "strict" : false
- },
- {
- "name" : "led[3]",
- "strict" : false
- },
- {
- "name" : "fpga_clk",
- "strict" : false
- }
- ]
- }
- ]
-}
\ No newline at end of file
diff --git a/db/lpm_abs_4p9.tdf b/db/lpm_abs_4p9.tdf
deleted file mode 100644
index 990539e..0000000
--- a/db/lpm_abs_4p9.tdf
+++ /dev/null
@@ -1,49 +0,0 @@
---lpm_abs CARRY_CHAIN="MANUAL" DEVICE_FAMILY="Cyclone V" IGNORE_CARRY_BUFFERS="OFF" LPM_WIDTH=32 data result
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-
---synthesis_resources = lut 32
-SUBDESIGN lpm_abs_4p9
-(
- data[31..0] : input;
- overflow : output;
- result[31..0] : output;
-)
-VARIABLE
- adder_result_int[32..0] : WIRE;
- adder_cin : WIRE;
- adder_dataa[31..0] : WIRE;
- adder_datab[31..0] : WIRE;
- adder_result[31..0] : WIRE;
- gnd_wire : WIRE;
- result_tmp[31..0] : WIRE;
-
-BEGIN
- adder_result_int[] = (adder_dataa[], adder_cin) + (adder_datab[], adder_cin);
- adder_result[] = adder_result_int[32..1];
- adder_cin = data[31..31];
- adder_dataa[] = (data[] $ data[31..31]);
- adder_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire);
- gnd_wire = B"0";
- overflow = (result_tmp[31..31] & data[31..31]);
- result[] = result_tmp[];
- result_tmp[] = adder_result[];
-END;
---VALID FILE
diff --git a/db/lpm_abs_jn9.tdf b/db/lpm_abs_jn9.tdf
deleted file mode 100644
index 61379eb..0000000
--- a/db/lpm_abs_jn9.tdf
+++ /dev/null
@@ -1,37 +0,0 @@
---lpm_abs CARRY_CHAIN="MANUAL" DEVICE_FAMILY="Cyclone V" IGNORE_CARRY_BUFFERS="OFF" LPM_WIDTH=4 data result
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-
---synthesis_resources = lut 3
-SUBDESIGN lpm_abs_jn9
-(
- data[3..0] : input;
- overflow : output;
- result[3..0] : output;
-)
-VARIABLE
- result_tmp[3..0] : WIRE;
-
-BEGIN
- overflow = (result_tmp[3..3] & data[3..3]);
- result[] = result_tmp[];
- result_tmp[] = ( (data[3..3] & (! ((data[2..2] # data[1..1]) # data[0..0]))), (((data[2..2] $ (data[1..1] # data[0..0])) & data[3..3]) # (data[2..2] & (! data[3..3]))), (((data[1..1] $ data[0..0]) & data[3..3]) # (data[1..1] & (! data[3..3]))), data[0..0]);
-END;
---VALID FILE
diff --git a/db/lpm_abs_ln9.tdf b/db/lpm_abs_ln9.tdf
deleted file mode 100644
index 1539806..0000000
--- a/db/lpm_abs_ln9.tdf
+++ /dev/null
@@ -1,49 +0,0 @@
---lpm_abs CARRY_CHAIN="MANUAL" DEVICE_FAMILY="Cyclone V" IGNORE_CARRY_BUFFERS="OFF" LPM_WIDTH=6 data result
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-
---synthesis_resources = lut 6
-SUBDESIGN lpm_abs_ln9
-(
- data[5..0] : input;
- overflow : output;
- result[5..0] : output;
-)
-VARIABLE
- adder_result_int[6..0] : WIRE;
- adder_cin : WIRE;
- adder_dataa[5..0] : WIRE;
- adder_datab[5..0] : WIRE;
- adder_result[5..0] : WIRE;
- gnd_wire : WIRE;
- result_tmp[5..0] : WIRE;
-
-BEGIN
- adder_result_int[] = (adder_dataa[], adder_cin) + (adder_datab[], adder_cin);
- adder_result[] = adder_result_int[6..1];
- adder_cin = data[5..5];
- adder_dataa[] = (data[] $ data[5..5]);
- adder_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire);
- gnd_wire = B"0";
- overflow = (result_tmp[5..5] & data[5..5]);
- result[] = result_tmp[];
- result_tmp[] = adder_result[];
-END;
---VALID FILE
diff --git a/db/lpm_divide_5am.tdf b/db/lpm_divide_5am.tdf
deleted file mode 100644
index 3a8d28c..0000000
--- a/db/lpm_divide_5am.tdf
+++ /dev/null
@@ -1,43 +0,0 @@
---lpm_divide DEVICE_FAMILY="Cyclone V" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=4 LPM_WIDTHN=8 OPTIMIZE_FOR_SPEED=5 denom numer quotient CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION sign_div_unsign_bkh (denominator[3..0], numerator[7..0])
-RETURNS ( quotient[7..0], remainder[3..0]);
-
---synthesis_resources =
-SUBDESIGN lpm_divide_5am
-(
- denom[3..0] : input;
- numer[7..0] : input;
- quotient[7..0] : output;
- remain[3..0] : output;
-)
-VARIABLE
- divider : sign_div_unsign_bkh;
- numer_tmp[7..0] : WIRE;
-
-BEGIN
- divider.denominator[] = denom[];
- divider.numerator[] = numer_tmp[];
- numer_tmp[] = numer[];
- quotient[] = divider.quotient[];
- remain[] = divider.remainder[];
-END;
---VALID FILE
diff --git a/db/lpm_divide_82m.tdf b/db/lpm_divide_82m.tdf
deleted file mode 100644
index fdc612b..0000000
--- a/db/lpm_divide_82m.tdf
+++ /dev/null
@@ -1,43 +0,0 @@
---lpm_divide DEVICE_FAMILY="Cyclone V" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=4 LPM_WIDTHN=8 OPTIMIZE_FOR_SPEED=5 denom numer remain CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION sign_div_unsign_bkh (denominator[3..0], numerator[7..0])
-RETURNS ( quotient[7..0], remainder[3..0]);
-
---synthesis_resources = lut 38
-SUBDESIGN lpm_divide_82m
-(
- denom[3..0] : input;
- numer[7..0] : input;
- quotient[7..0] : output;
- remain[3..0] : output;
-)
-VARIABLE
- divider : sign_div_unsign_bkh;
- numer_tmp[7..0] : WIRE;
-
-BEGIN
- divider.denominator[] = denom[];
- divider.numerator[] = numer_tmp[];
- numer_tmp[] = numer[];
- quotient[] = divider.quotient[];
- remain[] = divider.remainder[];
-END;
---VALID FILE
diff --git a/db/lpm_divide_dho.tdf b/db/lpm_divide_dho.tdf
deleted file mode 100644
index 6617029..0000000
--- a/db/lpm_divide_dho.tdf
+++ /dev/null
@@ -1,43 +0,0 @@
---lpm_divide DEVICE_FAMILY="Cyclone V" LPM_DREPRESENTATION="SIGNED" LPM_NREPRESENTATION="SIGNED" LPM_REMAINDERPOSITIVE="FALSE" LPM_WIDTHD=4 LPM_WIDTHN=32 OPTIMIZE_FOR_SPEED=5 denom numer remain CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION abs_divider_jbg (denominator[3..0], numerator[31..0])
-RETURNS ( quotient[31..0], remainder[3..0]);
-
---synthesis_resources = lut 221
-SUBDESIGN lpm_divide_dho
-(
- denom[3..0] : input;
- numer[31..0] : input;
- quotient[31..0] : output;
- remain[3..0] : output;
-)
-VARIABLE
- divider : abs_divider_jbg;
- numer_tmp[31..0] : WIRE;
-
-BEGIN
- divider.denominator[] = denom[];
- divider.numerator[] = numer_tmp[];
- numer_tmp[] = numer[];
- quotient[] = divider.quotient[];
- remain[] = divider.remainder[];
-END;
---VALID FILE
diff --git a/db/lpm_divide_fho.tdf b/db/lpm_divide_fho.tdf
deleted file mode 100644
index 420ec02..0000000
--- a/db/lpm_divide_fho.tdf
+++ /dev/null
@@ -1,43 +0,0 @@
---lpm_divide DEVICE_FAMILY="Cyclone V" LPM_DREPRESENTATION="SIGNED" LPM_NREPRESENTATION="SIGNED" LPM_REMAINDERPOSITIVE="FALSE" LPM_WIDTHD=6 LPM_WIDTHN=32 OPTIMIZE_FOR_SPEED=5 denom numer remain CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION abs_divider_lbg (denominator[5..0], numerator[31..0])
-RETURNS ( quotient[31..0], remainder[5..0]);
-
---synthesis_resources = lut 311
-SUBDESIGN lpm_divide_fho
-(
- denom[5..0] : input;
- numer[31..0] : input;
- quotient[31..0] : output;
- remain[5..0] : output;
-)
-VARIABLE
- divider : abs_divider_lbg;
- numer_tmp[31..0] : WIRE;
-
-BEGIN
- divider.denominator[] = denom[];
- divider.numerator[] = numer_tmp[];
- numer_tmp[] = numer[];
- quotient[] = divider.quotient[];
- remain[] = divider.remainder[];
-END;
---VALID FILE
diff --git a/db/prev_cmp_chip8.qmsg b/db/prev_cmp_chip8.qmsg
deleted file mode 100644
index ec533fb..0000000
--- a/db/prev_cmp_chip8.qmsg
+++ /dev/null
@@ -1,85 +0,0 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1712524771801 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition " "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1712524771802 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 7 16:19:31 2024 " "Processing started: Sun Apr 7 16:19:31 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1712524771802 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712524771802 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off chip8 -c chip8 " "Command: quartus_map --read_settings_files=on --write_settings_files=off chip8 -c chip8" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712524771802 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1712524771959 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1712524771959 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "the-bomb/st7920_serial_driver.sv 3 3 " "Found 3 design units, including 3 entities, in source file the-bomb/st7920_serial_driver.sv" { { "Info" "ISGN_ENTITY_NAME" "1 st7920_serial_driver " "Found entity 1: st7920_serial_driver" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777280 ""} { "Info" "ISGN_ENTITY_NAME" "2 d_flip_flop " "Found entity 2: d_flip_flop" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 138 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777280 ""} { "Info" "ISGN_ENTITY_NAME" "3 commander " "Found entity 3: commander" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 148 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777280 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712524777280 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "chip8.sv 2 2 " "Found 2 design units, including 2 entities, in source file chip8.sv" { { "Info" "ISGN_ENTITY_NAME" "1 chip8 " "Found entity 1: chip8" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777281 ""} { "Info" "ISGN_ENTITY_NAME" "2 dc " "Found entity 2: dc" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 65 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777281 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712524777281 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu.sv 1 1 " "Found 1 design units, including 1 entities, in source file cpu.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cpu " "Found entity 1: cpu" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777281 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712524777281 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "rng.sv 1 1 " "Found 1 design units, including 1 entities, in source file rng.sv" { { "Info" "ISGN_ENTITY_NAME" "1 rng " "Found entity 1: rng" { } { { "rng.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/rng.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712524777282 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712524777282 ""}
-{ "Info" "ISGN_START_ELABORATION_TOP" "chip8 " "Elaborating entity \"chip8\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1712524777314 ""}
-{ "Warning" "WVRFX_VERI_2106_UNCONVERTED" "keyboard chip8.sv(9) " "Verilog HDL warning at chip8.sv(9): object keyboard used but never assigned" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 9 0 0 } } } 0 10858 "Verilog HDL warning at %2!s!: object %1!s! used but never assigned" 0 0 "Analysis & Synthesis" 0 -1 1712524777315 "|chip8"}
-{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "keyboard 0 chip8.sv(9) " "Net \"keyboard\" at chip8.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1712524777316 "|chip8"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "dc dc:dc " "Elaborating entity \"dc\" for hierarchy \"dc:dc\"" { } { { "chip8.sv" "dc" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 24 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712524777325 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 21 chip8.sv(77) " "Verilog HDL assignment warning at chip8.sv(77): truncated value with size 32 to match size of target (21)" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 77 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777325 "|chip8|dc:dc"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu cpu:cpu " "Elaborating entity \"cpu\" for hierarchy \"cpu:cpu\"" { } { { "chip8.sv" "cpu" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 39 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712524777328 ""}
-{ "Warning" "WVRFX_L2_HDL_INDEX_EXPR_NOT_WIDE_ENOUGH" "cpu.sv(16) " "Verilog HDL or VHDL warning at the cpu.sv(16): index expression is not wide enough to address all of the elements in the array" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 16 0 0 } } } 0 10027 "Verilog HDL or VHDL warning at the %1!s!: index expression is not wide enough to address all of the elements in the array" 0 0 "Analysis & Synthesis" 0 -1 1712524777339 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "80 0 4095 cpu.sv(44) " "Verilog HDL warning at cpu.sv(44): number of words (80) in memory file does not match the number of elements in the address range \[0:4095\]" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 44 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1712524777340 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "697 512 4095 cpu.sv(45) " "Verilog HDL warning at cpu.sv(45): number of words (697) in memory file does not match the number of elements in the address range \[512:4095\]" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 45 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1712524777341 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_VERI_2116_UNCONVERTED" "memory cpu.sv(43) " "Verilog HDL warning at cpu.sv(43): initial value for variable memory should be constant" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 43 0 0 } } } 0 10855 "Verilog HDL warning at %2!s!: initial value for variable %1!s! should be constant" 0 0 "Analysis & Synthesis" 0 -1 1712524777342 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(80) " "Verilog HDL assignment warning at cpu.sv(80): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 80 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777795 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(85) " "Verilog HDL assignment warning at cpu.sv(85): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 85 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777803 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(88) " "Verilog HDL assignment warning at cpu.sv(88): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 88 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777811 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(90) " "Verilog HDL assignment warning at cpu.sv(90): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 90 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777819 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(94) " "Verilog HDL assignment warning at cpu.sv(94): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 94 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777827 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(96) " "Verilog HDL assignment warning at cpu.sv(96): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 96 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777835 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(101) " "Verilog HDL assignment warning at cpu.sv(101): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 101 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777849 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(105) " "Verilog HDL assignment warning at cpu.sv(105): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 105 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777857 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(109) " "Verilog HDL assignment warning at cpu.sv(109): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 109 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524777873 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(156) " "Verilog HDL assignment warning at cpu.sv(156): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 156 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524778155 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(160) " "Verilog HDL assignment warning at cpu.sv(160): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 160 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524778161 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(163) " "Verilog HDL assignment warning at cpu.sv(163): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 163 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524778168 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(168) " "Verilog HDL assignment warning at cpu.sv(168): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 168 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524778174 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(180) " "Verilog HDL assignment warning at cpu.sv(180): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 180 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524778200 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 cpu.sv(188) " "Verilog HDL assignment warning at cpu.sv(188): truncated value with size 32 to match size of target (8)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 188 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524778206 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(203) " "Verilog HDL assignment warning at cpu.sv(203): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 203 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524825848 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(209) " "Verilog HDL assignment warning at cpu.sv(209): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 209 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524825855 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(246) " "Verilog HDL assignment warning at cpu.sv(246): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 246 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524825922 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(251) " "Verilog HDL assignment warning at cpu.sv(251): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 251 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524825929 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(254) " "Verilog HDL assignment warning at cpu.sv(254): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 254 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524826017 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(257) " "Verilog HDL assignment warning at cpu.sv(257): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 257 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524826069 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(262) " "Verilog HDL assignment warning at cpu.sv(262): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 262 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524826130 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(271) " "Verilog HDL assignment warning at cpu.sv(271): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 271 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524827860 "|chip8|cpu:cpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 cpu.sv(280) " "Verilog HDL assignment warning at cpu.sv(280): truncated value with size 32 to match size of target (16)" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 280 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712524828187 "|chip8|cpu:cpu"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "st7920_serial_driver st7920_serial_driver:gpu " "Elaborating entity \"st7920_serial_driver\" for hierarchy \"st7920_serial_driver:gpu\"" { } { { "chip8.sv" "gpu" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 49 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525046026 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "line_idx st7920_serial_driver.sv(25) " "Verilog HDL or VHDL warning at st7920_serial_driver.sv(25): object \"line_idx\" assigned a value but never read" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 25 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1712525046026 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 st7920_serial_driver.sv(73) " "Verilog HDL assignment warning at st7920_serial_driver.sv(73): truncated value with size 32 to match size of target (7)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 73 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712525046027 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 st7920_serial_driver.sv(86) " "Verilog HDL assignment warning at st7920_serial_driver.sv(86): truncated value with size 32 to match size of target (7)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 86 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712525046027 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 st7920_serial_driver.sv(98) " "Verilog HDL assignment warning at st7920_serial_driver.sv(98): truncated value with size 32 to match size of target (10)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 98 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712525046027 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 st7920_serial_driver.sv(100) " "Verilog HDL assignment warning at st7920_serial_driver.sv(100): truncated value with size 32 to match size of target (10)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 100 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712525046028 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 st7920_serial_driver.sv(104) " "Verilog HDL assignment warning at st7920_serial_driver.sv(104): truncated value with size 32 to match size of target (6)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 104 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712525046028 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 9 st7920_serial_driver.sv(132) " "Verilog HDL assignment warning at st7920_serial_driver.sv(132): truncated value with size 32 to match size of target (9)" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 132 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1712525046029 "|chip8|st7920_serial_driver:gpu"}
-{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "commands\[6..10\] 0 st7920_serial_driver.sv(28) " "Net \"commands\[6..10\]\" at st7920_serial_driver.sv(28) has no driver or initial value, using a default initial value '0'" { } { { "the-bomb/st7920_serial_driver.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 28 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1712525046030 "|chip8|st7920_serial_driver:gpu"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "commander st7920_serial_driver:gpu\|commander:com " "Elaborating entity \"commander\" for hierarchy \"st7920_serial_driver:gpu\|commander:com\"" { } { { "the-bomb/st7920_serial_driver.sv" "com" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 44 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525046041 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "d_flip_flop st7920_serial_driver:gpu\|d_flip_flop:dff " "Elaborating entity \"d_flip_flop\" for hierarchy \"st7920_serial_driver:gpu\|d_flip_flop:dff\"" { } { { "the-bomb/st7920_serial_driver.sv" "dff" { Text "/home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv" 52 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525046045 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rng rng:randy " "Elaborating entity \"rng\" for hierarchy \"rng:randy\"" { } { { "chip8.sv" "randy" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 57 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525046046 ""}
-{ "Info" "IINFER_UNINFERRED_RAM_SUMMARY" "1 " "Found 1 instances of uninferred RAM logic" { { "Info" "IINFER_READ_LOGIC_IS_ASYNCHRONOUS" "cpu:cpu\|stack " "RAM logic \"cpu:cpu\|stack\" is uninferred due to asynchronous read logic" { } { { "cpu.sv" "stack" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 24 -1 0 } } } 0 276007 "RAM logic \"%1!s!\" is uninferred due to asynchronous read logic" 0 0 "Design Software" 0 -1 1712525143856 ""} } { } 0 276014 "Found %1!d! instances of uninferred RAM logic" 0 0 "Analysis & Synthesis" 0 -1 1712525143856 ""}
-{ "Info" "ILPMS_INFERENCING_SUMMARY" "7 " "Inferred 7 megafunctions from design logic" { { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "cpu:cpu\|Mod0 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"cpu:cpu\|Mod0\"" { } { { "cpu.sv" "Mod0" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 64 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "cpu:cpu\|Mod1 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"cpu:cpu\|Mod1\"" { } { { "cpu.sv" "Mod1" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 251 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "cpu:cpu\|Div0 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"cpu:cpu\|Div0\"" { } { { "cpu.sv" "Div0" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 253 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "cpu:cpu\|Mod2 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"cpu:cpu\|Mod2\"" { } { { "cpu.sv" "Mod2" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 254 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "cpu:cpu\|Div1 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"cpu:cpu\|Div1\"" { } { { "cpu.sv" "Div1" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 256 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "cpu:cpu\|Mod3 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"cpu:cpu\|Mod3\"" { } { { "cpu.sv" "Mod3" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 257 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "rng:randy\|Mod0 lpm_divide " "Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"rng:randy\|Mod0\"" { } { { "rng.sv" "Mod0" { Text "/home/nickorlow/programming/school/warminster/yayacemu/rng.sv" 14 -1 0 } } } 0 278004 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "Design Software" 0 -1 1712525681962 ""} } { } 0 278001 "Inferred %1!llu! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1712525681962 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "cpu:cpu\|lpm_divide:Mod0 " "Elaborated megafunction instantiation \"cpu:cpu\|lpm_divide:Mod0\"" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 64 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525682315 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "cpu:cpu\|lpm_divide:Mod0 " "Instantiated megafunction \"cpu:cpu\|lpm_divide:Mod0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 32 " "Parameter \"LPM_WIDTHN\" = \"32\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682315 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 6 " "Parameter \"LPM_WIDTHD\" = \"6\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682315 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION SIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"SIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682315 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION SIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"SIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682315 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT LPM_REMAINDERPOSITIVE=FALSE " "Parameter \"LPM_HINT\" = \"LPM_REMAINDERPOSITIVE=FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682315 ""} } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 64 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1712525682315 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_fho.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_fho.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_fho " "Found entity 1: lpm_divide_fho" { } { { "db/lpm_divide_fho.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_divide_fho.tdf" 25 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682358 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682358 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/abs_divider_lbg.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/abs_divider_lbg.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 abs_divider_lbg " "Found entity 1: abs_divider_lbg" { } { { "db/abs_divider_lbg.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/abs_divider_lbg.tdf" 29 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682362 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682362 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_qve.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/alt_u_div_qve.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_qve " "Found entity 1: alt_u_div_qve" { } { { "db/alt_u_div_qve.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/alt_u_div_qve.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682376 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682376 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_abs_ln9.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_abs_ln9.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_abs_ln9 " "Found entity 1: lpm_abs_ln9" { } { { "db/lpm_abs_ln9.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_abs_ln9.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682406 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682406 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_abs_4p9.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_abs_4p9.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_abs_4p9 " "Found entity 1: lpm_abs_4p9" { } { { "db/lpm_abs_4p9.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_abs_4p9.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682409 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682409 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "cpu:cpu\|lpm_divide:Mod1 " "Elaborated megafunction instantiation \"cpu:cpu\|lpm_divide:Mod1\"" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 251 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525682420 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "cpu:cpu\|lpm_divide:Mod1 " "Instantiated megafunction \"cpu:cpu\|lpm_divide:Mod1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 8 " "Parameter \"LPM_WIDTHN\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682420 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 4 " "Parameter \"LPM_WIDTHD\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682420 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION UNSIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682420 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION UNSIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682420 ""} } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 251 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1712525682420 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_82m.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_82m.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_82m " "Found entity 1: lpm_divide_82m" { } { { "db/lpm_divide_82m.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_divide_82m.tdf" 25 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682439 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682439 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/sign_div_unsign_bkh.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/sign_div_unsign_bkh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign_bkh " "Found entity 1: sign_div_unsign_bkh" { } { { "db/sign_div_unsign_bkh.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/sign_div_unsign_bkh.tdf" 25 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682441 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682441 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_sse.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/alt_u_div_sse.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_sse " "Found entity 1: alt_u_div_sse" { } { { "db/alt_u_div_sse.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/alt_u_div_sse.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682445 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682445 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "cpu:cpu\|lpm_divide:Div0 " "Elaborated megafunction instantiation \"cpu:cpu\|lpm_divide:Div0\"" { } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 253 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525682452 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "cpu:cpu\|lpm_divide:Div0 " "Instantiated megafunction \"cpu:cpu\|lpm_divide:Div0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 8 " "Parameter \"LPM_WIDTHN\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682452 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 4 " "Parameter \"LPM_WIDTHD\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682452 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION UNSIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682452 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION UNSIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"UNSIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682452 ""} } { { "cpu.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/cpu.sv" 253 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1712525682452 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_5am.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_5am.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_5am " "Found entity 1: lpm_divide_5am" { } { { "db/lpm_divide_5am.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_divide_5am.tdf" 25 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682471 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682471 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "rng:randy\|lpm_divide:Mod0 " "Elaborated megafunction instantiation \"rng:randy\|lpm_divide:Mod0\"" { } { { "rng.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/rng.sv" 14 -1 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712525682655 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "rng:randy\|lpm_divide:Mod0 " "Instantiated megafunction \"rng:randy\|lpm_divide:Mod0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 32 " "Parameter \"LPM_WIDTHN\" = \"32\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682655 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 4 " "Parameter \"LPM_WIDTHD\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682655 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION SIGNED " "Parameter \"LPM_NREPRESENTATION\" = \"SIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682655 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION SIGNED " "Parameter \"LPM_DREPRESENTATION\" = \"SIGNED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682655 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT LPM_REMAINDERPOSITIVE=FALSE " "Parameter \"LPM_HINT\" = \"LPM_REMAINDERPOSITIVE=FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1712525682655 ""} } { { "rng.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/rng.sv" 14 -1 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1712525682655 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_dho.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_divide_dho.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_dho " "Found entity 1: lpm_divide_dho" { } { { "db/lpm_divide_dho.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_divide_dho.tdf" 25 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682674 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682674 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/abs_divider_jbg.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/abs_divider_jbg.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 abs_divider_jbg " "Found entity 1: abs_divider_jbg" { } { { "db/abs_divider_jbg.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/abs_divider_jbg.tdf" 29 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682677 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682677 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_mve.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/alt_u_div_mve.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_mve " "Found entity 1: alt_u_div_mve" { } { { "db/alt_u_div_mve.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/alt_u_div_mve.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682692 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682692 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_abs_jn9.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_abs_jn9.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_abs_jn9 " "Found entity 1: lpm_abs_jn9" { } { { "db/lpm_abs_jn9.tdf" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/db/lpm_abs_jn9.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1712525682724 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1712525682724 ""}
-{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "led\[5\] VCC " "Pin \"led\[5\]\" is stuck at VCC" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 7 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1712527323052 "|chip8|led[5]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1712527323052 ""}
-{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1712527352880 ""}
-{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "68 " "68 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1712528930026 ""}
-{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1712528973164 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1712528973164 ""}
-{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "rst_in " "No output dependent on input pin \"rst_in\"" { } { { "chip8.sv" "" { Text "/home/nickorlow/programming/school/warminster/yayacemu/chip8.sv" 3 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1712528998444 "|chip8|rst_in"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1712528998444 ""}
-{ "Info" "ICUT_CUT_TM_SUMMARY" "782597 " "Implemented 782597 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Implemented 2 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1712529000632 ""} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Implemented 8 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1712529000632 ""} { "Info" "ICUT_CUT_TM_LCELLS" "782587 " "Implemented 782587 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1712529000632 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1712529000632 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 44 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 44 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "5759 " "Peak virtual memory: 5759 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1712529001428 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 7 17:30:01 2024 " "Processing ended: Sun Apr 7 17:30:01 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1712529001428 ""} { "Info" "IQEXE_ELAPSED_TIME" "01:10:30 " "Elapsed time: 01:10:30" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1712529001428 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "01:37:11 " "Total CPU time (on all processors): 01:37:11" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1712529001428 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1712529001428 ""}
diff --git a/db/sign_div_unsign_bkh.tdf b/db/sign_div_unsign_bkh.tdf
deleted file mode 100644
index 94b3095..0000000
--- a/db/sign_div_unsign_bkh.tdf
+++ /dev/null
@@ -1,47 +0,0 @@
---sign_div_unsign DEN_REPRESENTATION="UNSIGNED" DEN_WIDTH=4 LPM_PIPELINE=0 MAXIMIZE_SPEED=5 NUM_REPRESENTATION="UNSIGNED" NUM_WIDTH=8 SKIP_BITS=0 denominator numerator quotient remainder
---VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_lpm_divide 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC VERSION_END
-
-
--- Copyright (C) 2023 Intel Corporation. All rights reserved.
--- Your use of Intel Corporation's design tools, logic functions
--- and other software and tools, and any partner logic
--- functions, and any output files from any of the foregoing
--- (including device programming or simulation files), and any
--- associated documentation or information are expressly subject
--- to the terms and conditions of the Intel Program License
--- Subscription Agreement, the Intel Quartus Prime License Agreement,
--- the Intel FPGA IP License Agreement, or other applicable license
--- agreement, including, without limitation, that your use is for
--- the sole purpose of programming logic devices manufactured by
--- Intel and sold by Intel or its authorized distributors. Please
--- refer to the applicable agreement for further details, at
--- https://fpgasoftware.intel.com/eula.
-
-
-FUNCTION alt_u_div_sse (denominator[3..0], numerator[7..0])
-RETURNS ( quotient[7..0], remainder[3..0]);
-
---synthesis_resources = lut 38
-SUBDESIGN sign_div_unsign_bkh
-(
- denominator[3..0] : input;
- numerator[7..0] : input;
- quotient[7..0] : output;
- remainder[3..0] : output;
-)
-VARIABLE
- divider : alt_u_div_sse;
- norm_num[7..0] : WIRE;
- protect_quotient[7..0] : WIRE;
- protect_remainder[3..0] : WIRE;
-
-BEGIN
- divider.denominator[] = denominator[];
- divider.numerator[] = norm_num[];
- norm_num[] = numerator[];
- protect_quotient[] = divider.quotient[];
- protect_remainder[] = divider.remainder[];
- quotient[] = protect_quotient[];
- remainder[] = protect_remainder[];
-END;
---VALID FILE
diff --git a/incremental_db/README b/incremental_db/README
deleted file mode 100644
index 9f62dcd..0000000
--- a/incremental_db/README
+++ /dev/null
@@ -1,11 +0,0 @@
-This folder contains data for incremental compilation.
-
-The compiled_partitions sub-folder contains previous compilation results for each partition.
-As long as this folder is preserved, incremental compilation results from earlier compiles
-can be re-used. To perform a clean compilation from source files for all partitions, both
-the db and incremental_db folder should be removed.
-
-The imported_partitions sub-folder contains the last imported QXP for each imported partition.
-As long as this folder is preserved, imported partitions will be automatically re-imported
-when the db or incremental_db/compiled_partitions folders are removed.
-
diff --git a/incremental_db/compiled_partitions/chip8.db_info b/incremental_db/compiled_partitions/chip8.db_info
deleted file mode 100644
index 2b1ee76..0000000
--- a/incremental_db/compiled_partitions/chip8.db_info
+++ /dev/null
@@ -1,3 +0,0 @@
-Quartus_Version = Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-Version_Index = 570679040
-Creation_Time = Sun Apr 7 15:28:43 2024
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.ammdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.ammdb
deleted file mode 100644
index 5d6f893..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.ammdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.cdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.cdb
deleted file mode 100644
index bb206ac..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.cdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.dfp b/incremental_db/compiled_partitions/chip8.root_partition.cmp.dfp
deleted file mode 100644
index b1c67d6..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.dfp and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.cdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.cdb
deleted file mode 100644
index 866259f..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.cdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.hdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.hdb
deleted file mode 100644
index 0c34fcb..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.hdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.sig b/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.sig
deleted file mode 100644
index af9b8e9..0000000
--- a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hbdb.sig
+++ /dev/null
@@ -1 +0,0 @@
-7aee213afbf8301ed5eefc8c827f49a3
\ No newline at end of file
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.hdb
deleted file mode 100644
index d2780cf..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.hdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.logdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.logdb
deleted file mode 100644
index 626799f..0000000
--- a/incremental_db/compiled_partitions/chip8.root_partition.cmp.logdb
+++ /dev/null
@@ -1 +0,0 @@
-v1
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.cmp.rcfdb b/incremental_db/compiled_partitions/chip8.root_partition.cmp.rcfdb
deleted file mode 100644
index edcf7e3..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.cmp.rcfdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.cdb b/incremental_db/compiled_partitions/chip8.root_partition.map.cdb
deleted file mode 100644
index ecf5488..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.cdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.dpi b/incremental_db/compiled_partitions/chip8.root_partition.map.dpi
deleted file mode 100644
index 4306b9e..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.dpi and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.cdb b/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.cdb
deleted file mode 100644
index 2ef0ac4..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.cdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.hb_info b/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.hb_info
deleted file mode 100644
index 8210c55..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.hb_info and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.hdb b/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.hdb
deleted file mode 100644
index 98d4ff8..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.hdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.sig b/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.sig
deleted file mode 100644
index af9b8e9..0000000
--- a/incremental_db/compiled_partitions/chip8.root_partition.map.hbdb.sig
+++ /dev/null
@@ -1 +0,0 @@
-7aee213afbf8301ed5eefc8c827f49a3
\ No newline at end of file
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.hdb b/incremental_db/compiled_partitions/chip8.root_partition.map.hdb
deleted file mode 100644
index 6937d3b..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.hdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.root_partition.map.kpt b/incremental_db/compiled_partitions/chip8.root_partition.map.kpt
deleted file mode 100644
index f9f2c66..0000000
Binary files a/incremental_db/compiled_partitions/chip8.root_partition.map.kpt and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.rrp.hdb b/incremental_db/compiled_partitions/chip8.rrp.hdb
deleted file mode 100644
index bb88b10..0000000
Binary files a/incremental_db/compiled_partitions/chip8.rrp.hdb and /dev/null differ
diff --git a/incremental_db/compiled_partitions/chip8.rrs.cdb b/incremental_db/compiled_partitions/chip8.rrs.cdb
deleted file mode 100644
index 1627c2c..0000000
Binary files a/incremental_db/compiled_partitions/chip8.rrs.cdb and /dev/null differ
diff --git a/output_files/chip8.asm.rpt b/output_files/chip8.asm.rpt
deleted file mode 100644
index f9cdbd8..0000000
--- a/output_files/chip8.asm.rpt
+++ /dev/null
@@ -1,91 +0,0 @@
-Assembler report for chip8
-Mon Apr 8 08:52:25 2024
-Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Assembler Summary
- 3. Assembler Settings
- 4. Assembler Generated Files
- 5. Assembler Device Options: chip8.sof
- 6. Assembler Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 2023 Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and any partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Intel Program License
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details, at
-https://fpgasoftware.intel.com/eula.
-
-
-
-+---------------------------------------------------------------+
-; Assembler Summary ;
-+-----------------------+---------------------------------------+
-; Assembler Status ; Successful - Mon Apr 8 08:52:25 2024 ;
-; Revision Name ; chip8 ;
-; Top-level Entity Name ; chip8 ;
-; Family ; Cyclone V ;
-; Device ; 5CSEBA6U23I7 ;
-+-----------------------+---------------------------------------+
-
-
-+----------------------------------+
-; Assembler Settings ;
-+--------+---------+---------------+
-; Option ; Setting ; Default Value ;
-+--------+---------+---------------+
-
-
-+-------------------------------------------------------------------------------+
-; Assembler Generated Files ;
-+-------------------------------------------------------------------------------+
-; File Name ;
-+-------------------------------------------------------------------------------+
-; /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.sof ;
-+-------------------------------------------------------------------------------+
-
-
-+-------------------------------------+
-; Assembler Device Options: chip8.sof ;
-+----------------+--------------------+
-; Option ; Setting ;
-+----------------+--------------------+
-; JTAG usercode ; 0x0223939A ;
-; Checksum ; 0x0223939A ;
-+----------------+--------------------+
-
-
-+--------------------+
-; Assembler Messages ;
-+--------------------+
-Info: *******************************************************************
-Info: Running Quartus Prime Assembler
- Info: Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
- Info: Processing started: Mon Apr 8 08:52:19 2024
-Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off chip8 -c chip8
-Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
-Info (115030): Assembler is generating device programming files
-Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
- Info: Peak virtual memory: 628 megabytes
- Info: Processing ended: Mon Apr 8 08:52:25 2024
- Info: Elapsed time: 00:00:06
- Info: Total CPU time (on all processors): 00:00:07
-
-
diff --git a/output_files/chip8.cdf b/output_files/chip8.cdf
deleted file mode 100644
index 0b007b1..0000000
--- a/output_files/chip8.cdf
+++ /dev/null
@@ -1,15 +0,0 @@
- /* Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition */
- JedecChain;
- FileRevision(JESD32A);
- DefaultMfr(6E);
-
- P ActionCode(Ign)
- Device PartName(SOCVHPS) MfrSpec(OpMask(0));
- P ActionCode(Cfg)
- Device PartName(5CSEBA6U23) Path("/home/nickorlow/programming/school/warminster/yayacemu/output_files/") File("chip8.sof") MfrSpec(OpMask(1));
-
- ChainEnd;
-
- AlteraBegin;
- ChainType(JTAG);
- AlteraEnd;
diff --git a/output_files/chip8.done b/output_files/chip8.done
deleted file mode 100644
index 6b5e839..0000000
--- a/output_files/chip8.done
+++ /dev/null
@@ -1 +0,0 @@
-Mon Apr 8 08:52:46 2024
diff --git a/output_files/chip8.fit.rpt b/output_files/chip8.fit.rpt
deleted file mode 100644
index 4343fc1..0000000
--- a/output_files/chip8.fit.rpt
+++ /dev/null
@@ -1,3044 +0,0 @@
-Fitter report for chip8
-Mon Apr 8 08:52:14 2024
-Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Fitter Summary
- 3. Fitter Settings
- 4. Parallel Compilation
- 5. Fitter Netlist Optimizations
- 6. Ignored Assignments
- 7. Incremental Compilation Preservation Summary
- 8. Incremental Compilation Partition Settings
- 9. Incremental Compilation Placement Preservation
- 10. Pin-Out File
- 11. Fitter Resource Usage Summary
- 12. Fitter Partition Statistics
- 13. Input Pins
- 14. Output Pins
- 15. I/O Bank Usage
- 16. All Package Pins
- 17. I/O Assignment Warnings
- 18. Fitter Resource Utilization by Entity
- 19. Delay Chain Summary
- 20. Pad To Core Delay Chain Fanout
- 21. Control Signals
- 22. Global & Other Fast Signals
- 23. Non-Global High Fan-Out Signals
- 24. Fitter RAM Summary
- 25. Routing Usage Summary
- 26. I/O Rules Summary
- 27. I/O Rules Details
- 28. I/O Rules Matrix
- 29. Fitter Device Options
- 30. Operating Settings and Conditions
- 31. Estimated Delay Added for Hold Timing Summary
- 32. Estimated Delay Added for Hold Timing Details
- 33. Fitter Messages
- 34. Fitter Suppressed Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 2023 Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and any partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Intel Program License
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details, at
-https://fpgasoftware.intel.com/eula.
-
-
-
-+----------------------------------------------------------------------------------+
-; Fitter Summary ;
-+---------------------------------+------------------------------------------------+
-; Fitter Status ; Successful - Mon Apr 8 08:52:14 2024 ;
-; Quartus Prime Version ; 23.1std.0 Build 991 11/28/2023 SC Lite Edition ;
-; Revision Name ; chip8 ;
-; Top-level Entity Name ; chip8 ;
-; Family ; Cyclone V ;
-; Device ; 5CSEBA6U23I7 ;
-; Timing Models ; Final ;
-; Logic utilization (in ALMs) ; 10,693 / 41,910 ( 26 % ) ;
-; Total registers ; 10165 ;
-; Total pins ; 10 / 314 ( 3 % ) ;
-; Total virtual pins ; 0 ;
-; Total block memory bits ; 32,768 / 5,662,720 ( < 1 % ) ;
-; Total RAM Blocks ; 4 / 553 ( < 1 % ) ;
-; Total DSP Blocks ; 0 / 112 ( 0 % ) ;
-; Total HSSI RX PCSs ; 0 ;
-; Total HSSI PMA RX Deserializers ; 0 ;
-; Total HSSI TX PCSs ; 0 ;
-; Total HSSI PMA TX Serializers ; 0 ;
-; Total PLLs ; 0 / 6 ( 0 % ) ;
-; Total DLLs ; 0 / 4 ( 0 % ) ;
-+---------------------------------+------------------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Settings ;
-+--------------------------------------------------------------------+---------------------------------------+---------------------------------------+
-; Option ; Setting ; Default Value ;
-+--------------------------------------------------------------------+---------------------------------------+---------------------------------------+
-; Device ; 5CSEBA6U23I7 ; ;
-; Minimum Core Junction Temperature ; -40 ; ;
-; Maximum Core Junction Temperature ; 100 ; ;
-; Use smart compilation ; Off ; Off ;
-; Enable parallel Assembler and Timing Analyzer during compilation ; On ; On ;
-; Enable compact report table ; Off ; Off ;
-; Router Timing Optimization Level ; Normal ; Normal ;
-; Perform Clocking Topology Analysis During Routing ; Off ; Off ;
-; Placement Effort Multiplier ; 1.0 ; 1.0 ;
-; Device initialization clock source ; INIT_INTOSC ; INIT_INTOSC ;
-; Optimize Hold Timing ; All Paths ; All Paths ;
-; Optimize Multi-Corner Timing ; On ; On ;
-; Auto RAM to MLAB Conversion ; On ; On ;
-; Equivalent RAM and MLAB Power Up ; Auto ; Auto ;
-; Equivalent RAM and MLAB Paused Read Capabilities ; Care ; Care ;
-; Power Optimization During Fitting ; Normal compilation ; Normal compilation ;
-; SSN Optimization ; Off ; Off ;
-; Optimize Timing ; Normal compilation ; Normal compilation ;
-; Optimize Timing for ECOs ; Off ; Off ;
-; Regenerate Full Fit Report During ECO Compiles ; Off ; Off ;
-; Optimize IOC Register Placement for Timing ; Normal ; Normal ;
-; Final Placement Optimizations ; Automatically ; Automatically ;
-; Fitter Aggressive Routability Optimizations ; Automatically ; Automatically ;
-; Fitter Initial Placement Seed ; 1 ; 1 ;
-; Periphery to Core Placement and Routing Optimization ; Off ; Off ;
-; Weak Pull-Up Resistor ; Off ; Off ;
-; Enable Bus-Hold Circuitry ; Off ; Off ;
-; Auto Packed Registers ; Auto ; Auto ;
-; Auto Delay Chains ; On ; On ;
-; Auto Delay Chains for High Fanout Input Pins ; Off ; Off ;
-; Treat Bidirectional Pin as Output Pin ; Off ; Off ;
-; Perform Physical Synthesis for Combinational Logic for Fitting ; Off ; Off ;
-; Perform Physical Synthesis for Combinational Logic for Performance ; Off ; Off ;
-; Perform Register Duplication for Performance ; Off ; Off ;
-; Perform Register Retiming for Performance ; Off ; Off ;
-; Perform Asynchronous Signal Pipelining ; Off ; Off ;
-; Fitter Effort ; Auto Fit ; Auto Fit ;
-; Physical Synthesis Effort Level ; Normal ; Normal ;
-; Logic Cell Insertion - Logic Duplication ; Auto ; Auto ;
-; Auto Register Duplication ; Auto ; Auto ;
-; Auto Global Clock ; On ; On ;
-; Auto Global Register Control Signals ; On ; On ;
-; Reserve all unused pins ; As input tri-stated with weak pull-up ; As input tri-stated with weak pull-up ;
-; Synchronizer Identification ; Auto ; Auto ;
-; Enable Beneficial Skew Optimization ; On ; On ;
-; Optimize Design for Metastability ; On ; On ;
-; Active Serial clock source ; FREQ_100MHz ; FREQ_100MHz ;
-; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
-; Clamping Diode ; Off ; Off ;
-; Enable input tri-state on active configuration pins in user mode ; Off ; Off ;
-; Advanced Physical Optimization ; On ; On ;
-+--------------------------------------------------------------------+---------------------------------------+---------------------------------------+
-
-
-+------------------------------------------+
-; Parallel Compilation ;
-+----------------------------+-------------+
-; Processors ; Number ;
-+----------------------------+-------------+
-; Number detected on machine ; 12 ;
-; Maximum allowed ; 12 ;
-; ; ;
-; Average used ; 1.57 ;
-; Maximum used ; 12 ;
-; ; ;
-; Usage by Processor ; % Time Used ;
-; Processor 1 ; 100.0% ;
-; Processor 2 ; 8.6% ;
-; Processor 3 ; 8.2% ;
-; Processor 4 ; 7.6% ;
-; Processor 5 ; 4.4% ;
-; Processor 6 ; 4.4% ;
-; Processor 7 ; 4.3% ;
-; Processor 8 ; 4.3% ;
-; Processor 9 ; 3.9% ;
-; Processor 10 ; 3.9% ;
-; Processor 11 ; 3.9% ;
-; Processor 12 ; 3.9% ;
-+----------------------------+-------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Netlist Optimizations ;
-+---------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+-------------------------------------------------------------------+------------------+-----------------------+
-; Node ; Action ; Operation ; Reason ; Node Port ; Node Port Name ; Destination Node ; Destination Port ; Destination Port Name ;
-+---------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+-------------------------------------------------------------------+------------------+-----------------------+
-; downclocker:dc|clk_out~CLKENA0 ; Created ; Placement ; Fitter Periphery Placement ; ; ; ; ; ;
-; fpga_clk~inputCLKENA0 ; Created ; Placement ; Fitter Periphery Placement ; ; ; ; ; ;
-; cpu:cpu|alu:alu|cnt[23] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|alu:alu|cnt[23]~DUPLICATE ; ; ;
-; cpu:cpu|alu:alu|cnt[28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|alu:alu|cnt[28]~DUPLICATE ; ; ;
-; cpu:cpu|alu:alu|cnt[30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|alu:alu|cnt[30]~DUPLICATE ; ; ;
-; cpu:cpu|draw_state.c[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|draw_state.c[1]~DUPLICATE ; ; ;
-; cpu:cpu|draw_state.c[4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|draw_state.c[4]~DUPLICATE ; ; ;
-; cpu:cpu|draw_state.r[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|draw_state.r[0]~DUPLICATE ; ; ;
-; cpu:cpu|draw_state.r[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|draw_state.r[1]~DUPLICATE ; ; ;
-; cpu:cpu|draw_state.r[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|draw_state.r[3]~DUPLICATE ; ; ;
-; cpu:cpu|instr.dst_reg[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.dst_reg[3]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_idx[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_idx[0]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_idx[2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_idx[2]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_idx[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_idx[3]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_idx[4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_idx[4]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_sz[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_sz[3]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_vx[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_vx[3]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_vy[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_vy[1]~DUPLICATE ; ; ;
-; cpu:cpu|instr.src_sprite_vy[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|instr.src_sprite_vy[3]~DUPLICATE ; ; ;
-; cpu:cpu|opcode[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|opcode[3]~DUPLICATE ; ; ;
-; cpu:cpu|opcode[4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|opcode[4]~DUPLICATE ; ; ;
-; cpu:cpu|opcode[7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|opcode[7]~DUPLICATE ; ; ;
-; cpu:cpu|opcode[13] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|opcode[13]~DUPLICATE ; ; ;
-; cpu:cpu|program_counter[2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|program_counter[2]~DUPLICATE ; ; ;
-; cpu:cpu|program_counter[6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|program_counter[6]~DUPLICATE ; ; ;
-; cpu:cpu|program_counter[7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|program_counter[7]~DUPLICATE ; ; ;
-; cpu:cpu|program_counter[8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|program_counter[8]~DUPLICATE ; ; ;
-; cpu:cpu|registers[0][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[0][0]~DUPLICATE ; ; ;
-; cpu:cpu|registers[1][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[1][0]~DUPLICATE ; ; ;
-; cpu:cpu|registers[2][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[2][5]~DUPLICATE ; ; ;
-; cpu:cpu|registers[8][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[8][0]~DUPLICATE ; ; ;
-; cpu:cpu|registers[10][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[10][0]~DUPLICATE ; ; ;
-; cpu:cpu|registers[10][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[10][1]~DUPLICATE ; ; ;
-; cpu:cpu|registers[11][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[11][0]~DUPLICATE ; ; ;
-; cpu:cpu|registers[11][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[11][2]~DUPLICATE ; ; ;
-; cpu:cpu|registers[14][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[14][1]~DUPLICATE ; ; ;
-; cpu:cpu|registers[14][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|registers[14][2]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|c[22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|c[22]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|c[26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|c[26]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|c[29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|c[29]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|c[30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|c[30]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[6]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[7]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[10]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[21]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[22]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|i[29]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|lcd_data ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|lcd_data~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|i[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|i[0]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|i[4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|i[4]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|i[18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|i[18]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[6]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[7]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[8]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[10]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[14]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[15]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[17]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[18]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[21]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[23] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[23]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[25] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[25]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[29]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[30]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[31] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|line_cnt[31]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|x[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|x[0]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|x[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|x[1]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|x[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|x[3]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|x[4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|x[4]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|y[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|y[0]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|y[5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|y[5]~DUPLICATE ; ; ;
-; cpu:cpu|st7920_serial_driver:gpu|y[6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|st7920_serial_driver:gpu|y[6]~DUPLICATE ; ; ;
-; cpu:cpu|state[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|state[0]~DUPLICATE ; ; ;
-; cpu:cpu|state[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|state[1]~DUPLICATE ; ; ;
-; cpu:cpu|state[2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|state[2]~DUPLICATE ; ; ;
-; cpu:cpu|state[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|state[3]~DUPLICATE ; ; ;
-; cpu:cpu|vram[0][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[0][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[0][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[0][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[4][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[4][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[4][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[4][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[5][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[5][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[7][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[7][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[8][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[8][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[9][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[9][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[10][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[10][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[11][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[11][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[11][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[11][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[12][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[12][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[16][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[16][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[18][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[18][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[18][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[18][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[19][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[19][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[19][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[19][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[22][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[22][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[22][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[22][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[22][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[22][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[22][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[22][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[23][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[23][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[24][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[24][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[25][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[25][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[25][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[25][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[25][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[25][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[27][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[27][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[28][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[28][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[29][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[29][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[31][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[31][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[32][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[32][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[34][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[34][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[36][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[36][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[39][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[39][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[40][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[40][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[41][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[41][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[44][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[44][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[45][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[45][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[46][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[46][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[47][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[47][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[47][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[47][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[47][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[47][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[48][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[48][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[49][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[49][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[49][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[49][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[50][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[50][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[51][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[51][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[52][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[52][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[52][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[52][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[53][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[53][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[53][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[53][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[54][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[54][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[54][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[54][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[55][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[55][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[55][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[55][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[56][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[56][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[57][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[57][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[57][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[57][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[58][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[58][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[60][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[60][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[61][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[61][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[63][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[63][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[64][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[64][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[64][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[64][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[65][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[65][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[66][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[66][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[67][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[67][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[68][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[68][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[70][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[70][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[70][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[70][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[71][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[71][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[72][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[72][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[72][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[72][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[72][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[72][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[72][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[72][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[73][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[73][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[73][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[73][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[74][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[74][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[75][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[75][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[76][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[76][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[76][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[76][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[78][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[78][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[79][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[79][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[80][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[80][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[83][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[83][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[85][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[85][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[86][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[86][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[87][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[87][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[87][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[87][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[88][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[88][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[90][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[90][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[92][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[92][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[92][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[92][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[95][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[95][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[95][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[95][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[98][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[98][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[99][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[99][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[100][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[100][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[101][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[101][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[102][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[102][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[102][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[102][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[103][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[103][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[104][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[104][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[105][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[105][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[106][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[106][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[108][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[108][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[108][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[108][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[109][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[109][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[109][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[109][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[112][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[112][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[115][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[115][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[116][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[116][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[117][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[117][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[118][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[118][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[119][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[119][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[119][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[119][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[121][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[121][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[121][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[121][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[122][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[122][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[122][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[122][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[123][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[123][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[123][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[123][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[125][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[125][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[125][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[125][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[126][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[126][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[126][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[126][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[127][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[127][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[128][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[128][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[129][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[129][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[132][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[132][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[133][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[133][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[133][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[133][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[134][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[134][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[135][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[135][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[135][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[135][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[136][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[136][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[137][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[137][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[138][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[138][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[140][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[140][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[140][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[140][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[142][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[142][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[143][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[143][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[143][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[143][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[145][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[145][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[145][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[145][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[145][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[145][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[146][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[146][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[146][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[146][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[147][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[147][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[148][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[148][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[149][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[149][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[149][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[149][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[150][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[150][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[150][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[150][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[151][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[151][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[151][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[151][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[151][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[151][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[152][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[152][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[152][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[152][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[154][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[154][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[155][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[155][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[156][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[156][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[159][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[159][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[160][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[160][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[161][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[161][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[161][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[161][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[161][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[161][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[162][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[162][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[165][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[165][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[166][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[166][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[166][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[166][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[167][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[167][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[169][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[169][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[169][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[169][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[170][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[170][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[170][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[170][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[171][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[171][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[172][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[172][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[174][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[174][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[174][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[174][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[174][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[174][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[175][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[175][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[175][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[175][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[176][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[176][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[177][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[177][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[178][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[178][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[178][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[178][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[179][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[179][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[180][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[180][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[180][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[180][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[182][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[182][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[183][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[183][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[184][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[184][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[184][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[184][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[184][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[184][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[184][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[184][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[185][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[185][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[185][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[185][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[186][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[186][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[186][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[186][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[188][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[188][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[188][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[188][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[189][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[189][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[190][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[190][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[190][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[190][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[190][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[190][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[192][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[192][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[193][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[193][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[193][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[193][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[195][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[195][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[195][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[195][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[196][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[196][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[196][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[196][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[197][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[197][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[198][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[198][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[199][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[199][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[201][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[201][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[202][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[202][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[202][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[202][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[202][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[202][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[203][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[203][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[204][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[204][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[205][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[205][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[206][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[206][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[209][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[209][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[210][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[210][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[211][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[211][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[212][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[212][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[214][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[214][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[214][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[214][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[216][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[216][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[216][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[216][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[216][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[216][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[217][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[217][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[217][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[217][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[217][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[217][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[219][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[219][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[221][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[221][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[224][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[224][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[225][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[225][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[225][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[225][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[226][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[226][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[228][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[228][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[229][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[229][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[229][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[229][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[230][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[230][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[231][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[231][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[233][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[233][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[236][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[236][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[237][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[237][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[238][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[238][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[238][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[238][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[238][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[238][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[239][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[239][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[240][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[240][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[240][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[240][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[241][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[241][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[242][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[242][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[242][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[242][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[248][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[248][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[248][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[248][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[250][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[250][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[254][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[254][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[256][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[256][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[256][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[256][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[257][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[257][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[258][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[258][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[258][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[258][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[259][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[259][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[259][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[259][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[260][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[260][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[260][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[260][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[263][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[263][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[263][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[263][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[263][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[263][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[264][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[264][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[264][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[264][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[265][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[265][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[266][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[266][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[266][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[266][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[267][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[267][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[267][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[267][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[268][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[268][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[269][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[269][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[271][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[271][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[272][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[272][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[273][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[273][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[274][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[274][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[274][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[274][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[275][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[275][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[276][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[276][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[276][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[276][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[277][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[277][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[278][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[278][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[279][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[279][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[281][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[281][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[283][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[283][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[284][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[284][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[286][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[286][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[286][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[286][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[286][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[286][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[286][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[286][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[287][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[287][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[287][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[287][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[287][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[287][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[289][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[289][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[292][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[292][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[294][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[294][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[296][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[296][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[296][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[296][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[296][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[296][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[298][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[298][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[298][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[298][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[298][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[298][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[298][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[298][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[299][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[299][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[300][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[300][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[301][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[301][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[302][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[302][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[302][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[302][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[302][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[302][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[304][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[304][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[304][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[304][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[304][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[304][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[305][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[305][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[305][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[305][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[306][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[306][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[306][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[306][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[307][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[307][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[308][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[308][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[309][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[309][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[309][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[309][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[310][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[310][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[310][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[310][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[312][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[312][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[312][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[312][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[312][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[312][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[313][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[313][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[313][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[313][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[315][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[315][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[317][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[317][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[317][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[317][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[318][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[318][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[319][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[319][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[321][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[321][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[322][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[322][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[323][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[323][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[323][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[323][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[324][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[324][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[325][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[325][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[326][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[326][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[327][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[327][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[327][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[327][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[329][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[329][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[332][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[332][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[332][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[332][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[333][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[333][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[336][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[336][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[338][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[338][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[339][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[339][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[339][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[339][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[339][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[339][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[340][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[340][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[340][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[340][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[341][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[341][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[341][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[341][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[341][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[341][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[342][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[342][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[343][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[343][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[344][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[344][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[347][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[347][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[347][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[347][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[348][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[348][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[349][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[349][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[349][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[349][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[350][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[350][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[350][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[350][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[352][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[352][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[353][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[353][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[354][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[354][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[355][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[355][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[357][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[357][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[359][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[359][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[360][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[360][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[361][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[361][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[362][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[362][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[363][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[363][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[363][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[363][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[365][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[365][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[365][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[365][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[367][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[367][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[368][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[368][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[371][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[371][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[371][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[371][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[371][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[371][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[372][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[372][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[373][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[373][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[373][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[373][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[373][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[373][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[374][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[374][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[374][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[374][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[376][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[376][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[376][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[376][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[377][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[377][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[378][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[378][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[379][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[379][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[379][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[379][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[380][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[380][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[381][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[381][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[381][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[381][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[382][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[382][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[383][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[383][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[383][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[383][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[384][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[384][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[384][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[384][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[385][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[385][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[385][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[385][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[386][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[386][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[388][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[388][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[389][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[389][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[389][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[389][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[391][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[391][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[392][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[392][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[392][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[392][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[393][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[393][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[396][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[396][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[396][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[396][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[397][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[397][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[400][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[400][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[400][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[400][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[400][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[400][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[401][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[401][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[401][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[401][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[402][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[402][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[403][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[403][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[403][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[403][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[404][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[404][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[405][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[405][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[405][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[405][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[405][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[405][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[407][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[407][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[408][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[408][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[409][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[409][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[409][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[409][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[413][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[413][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[413][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[413][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[415][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[415][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[417][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[417][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[418][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[418][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[418][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[418][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[420][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[420][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[420][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[420][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[421][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[421][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[422][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[422][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[423][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[423][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[423][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[423][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[423][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[423][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[424][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[424][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[426][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[426][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[427][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[427][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[427][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[427][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[428][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[428][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[428][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[428][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[429][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[429][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[429][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[429][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[430][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[430][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[430][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[430][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[431][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[431][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[433][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[433][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[435][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[435][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[438][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[438][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[440][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[440][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[441][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[441][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[442][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[442][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[443][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[443][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[444][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[444][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[445][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[445][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[445][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[445][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[445][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[445][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[447][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[447][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[448][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[448][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[448][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[448][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[449][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[449][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[454][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[454][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[456][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[456][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[456][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[456][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[457][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[457][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[459][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[459][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[460][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[460][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[460][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[460][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[460][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[460][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[460][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[460][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[461][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[461][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[463][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[463][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[464][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[464][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[466][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[466][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[466][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[466][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[467][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[467][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[468][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[468][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[469][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[469][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[469][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[469][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[470][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[470][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[470][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[470][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[471][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[471][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[472][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[472][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[474][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[474][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[475][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[475][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[475][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[475][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[478][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[478][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[480][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[480][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[481][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[481][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[482][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[482][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[484][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[484][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[485][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[485][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[486][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[486][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[488][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[488][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[488][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[488][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[489][7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[489][7]~DUPLICATE ; ; ;
-; cpu:cpu|vram[490][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[490][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[491][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[491][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[494][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[494][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[494][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[494][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[496][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[496][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[498][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[498][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[499][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[499][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[500][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[500][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[500][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[500][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[501][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[501][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[502][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[502][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[504][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[504][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[507][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[507][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[509][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[509][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[509][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[509][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[510][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[510][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[510][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[510][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[510][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[510][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[513][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[513][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[513][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[513][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[514][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[514][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[514][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[514][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[516][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[516][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[519][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[519][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[519][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[519][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[520][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[520][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[520][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[520][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[521][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[521][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[522][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[522][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[522][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[522][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[522][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[522][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[523][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[523][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[525][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[525][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[526][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[526][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[526][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[526][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[527][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[527][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[528][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[528][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[528][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[528][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[529][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[529][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[531][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[531][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[532][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[532][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[533][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[533][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[534][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[534][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[540][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[540][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[540][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[540][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[542][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[542][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[543][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[543][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[543][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[543][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[543][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[543][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[544][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[544][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[545][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[545][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[546][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[546][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[546][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[546][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[547][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[547][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[547][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[547][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[548][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[548][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[549][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[549][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[550][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[550][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[551][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[551][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[553][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[553][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[554][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[554][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[554][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[554][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[555][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[555][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[555][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[555][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[556][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[556][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[558][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[558][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[560][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[560][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[563][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[563][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[564][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[564][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[565][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[565][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[566][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[566][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[566][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[566][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[566][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[566][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[566][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[566][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[568][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[568][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[568][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[568][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[569][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[569][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[569][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[569][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[569][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[569][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[571][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[571][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[571][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[571][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[572][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[572][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[573][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[573][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[575][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[575][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[576][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[576][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[577][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[577][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[577][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[577][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[578][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[578][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[579][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[579][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[580][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[580][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[580][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[580][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[582][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[582][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[583][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[583][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[583][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[583][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[586][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[586][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[587][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[587][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[588][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[588][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[589][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[589][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[589][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[589][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[590][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[590][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[591][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[591][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[592][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[592][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[593][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[593][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[594][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[594][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[595][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[595][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[596][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[596][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[597][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[597][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[597][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[597][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[598][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[598][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[598][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[598][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[599][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[599][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[599][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[599][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[600][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[600][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[601][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[601][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[604][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[604][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[604][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[604][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[604][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[604][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[605][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[605][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[606][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[606][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[606][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[606][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[607][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[607][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[608][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[608][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[608][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[608][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[611][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[611][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[611][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[611][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[612][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[612][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[613][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[613][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[613][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[613][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[613][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[613][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[614][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[614][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[614][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[614][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[615][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[615][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[616][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[616][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[616][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[616][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[617][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[617][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[618][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[618][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[618][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[618][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[619][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[619][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[619][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[619][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[621][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[621][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[621][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[621][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[627][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[627][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[628][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[628][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[628][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[628][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[630][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[630][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[632][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[632][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[634][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[634][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[634][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[634][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[634][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[634][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[635][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[635][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[635][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[635][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[636][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[636][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[636][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[636][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[636][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[636][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[637][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[637][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[637][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[637][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[638][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[638][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[639][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[639][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[639][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[639][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[639][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[639][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[640][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[640][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[640][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[640][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[642][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[642][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[643][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[643][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[644][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[644][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[645][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[645][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[647][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[647][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[647][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[647][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[648][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[648][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[649][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[649][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[650][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[650][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[652][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[652][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[655][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[655][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[656][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[656][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[658][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[658][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[659][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[659][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[659][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[659][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[660][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[660][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[661][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[661][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[661][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[661][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[661][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[661][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[663][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[663][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[664][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[664][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[664][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[664][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[665][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[665][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[665][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[665][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[666][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[666][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[667][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[667][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[667][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[667][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[668][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[668][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[669][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[669][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[671][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[671][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[672][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[672][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[672][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[672][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[674][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[674][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[674][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[674][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[675][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[675][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[677][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[677][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[677][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[677][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[681][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[681][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[681][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[681][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[682][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[682][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[682][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[682][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[683][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[683][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[684][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[684][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[687][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[687][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[687][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[687][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[687][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[687][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[689][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[689][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[690][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[690][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[696][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[696][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[697][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[697][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[698][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[698][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[700][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[700][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[702][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[702][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[703][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[703][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[704][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[704][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[705][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[705][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[705][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[705][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[707][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[707][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[709][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[709][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[711][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[711][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[712][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[712][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[713][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[713][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[714][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[714][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[718][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[718][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[718][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[718][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[719][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[719][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[720][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[720][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[720][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[720][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[721][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[721][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[721][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[721][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[722][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[722][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[723][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[723][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[724][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[724][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[724][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[724][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[724][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[724][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[725][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[725][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[725][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[725][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[725][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[725][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[727][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[727][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[727][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[727][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[727][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[727][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[728][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[728][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[728][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[728][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[729][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[729][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[729][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[729][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[729][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[729][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[730][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[730][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[731][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[731][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[732][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[732][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[732][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[732][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[733][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[733][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[733][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[733][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[734][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[734][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[735][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[735][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[736][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[736][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[736][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[736][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[736][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[736][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[736][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[736][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[737][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[737][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[737][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[737][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[738][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[738][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[739][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[739][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[739][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[739][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[739][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[739][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[740][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[740][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[740][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[740][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[741][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[741][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[742][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[742][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[742][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[742][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[743][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[743][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[743][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[743][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[743][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[743][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[744][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[744][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[744][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[744][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[744][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[744][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[745][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[745][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[745][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[745][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[746][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[746][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[747][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[747][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[747][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[747][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[748][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[748][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[748][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[748][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[749][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[749][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[749][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[749][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[750][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[750][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[751][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[751][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[752][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[752][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[752][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[752][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[753][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[753][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[753][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[753][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[754][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[754][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[754][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[754][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[755][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[755][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[757][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[757][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[758][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[758][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[759][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[759][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[760][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[760][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[761][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[761][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[762][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[762][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[762][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[762][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[762][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[762][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[762][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[762][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[763][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[763][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[763][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[763][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[763][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[763][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[764][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[764][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[764][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[764][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[765][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[765][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[765][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[765][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[767][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[767][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[767][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[767][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[768][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[768][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[768][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[768][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[769][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[769][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[770][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[770][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[772][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[772][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[772][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[772][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[773][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[773][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[773][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[773][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[773][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[773][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[776][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[776][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[776][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[776][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[777][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[777][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[777][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[777][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[779][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[779][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[780][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[780][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[780][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[780][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[781][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[781][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[782][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[782][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[783][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[783][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[783][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[783][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[784][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[784][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[784][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[784][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[785][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[785][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[785][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[785][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[786][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[786][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[786][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[786][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[787][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[787][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[788][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[788][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[788][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[788][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[791][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[791][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[792][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[792][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[792][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[792][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[793][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[793][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[793][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[793][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[794][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[794][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[795][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[795][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[796][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[796][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[797][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[797][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[797][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[797][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[800][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[800][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[800][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[800][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[801][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[801][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[801][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[801][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[802][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[802][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[802][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[802][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[803][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[803][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[803][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[803][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[804][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[804][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[804][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[804][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[805][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[805][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[805][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[805][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[806][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[806][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[806][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[806][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[807][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[807][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[808][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[808][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[808][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[808][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[809][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[809][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[809][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[809][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[810][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[810][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[811][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[811][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[811][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[811][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[811][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[811][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[812][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[812][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[813][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[813][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[813][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[813][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[816][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[816][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[817][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[817][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[817][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[817][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[817][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[817][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[819][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[819][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[819][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[819][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[819][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[819][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[820][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[820][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[820][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[820][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[822][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[822][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[822][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[822][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[823][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[823][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[823][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[823][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[824][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[824][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[824][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[824][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[825][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[825][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[825][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[825][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[825][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[825][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[826][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[826][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[827][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[827][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[827][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[827][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[828][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[828][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[828][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[828][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[829][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[829][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[829][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[829][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[830][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[830][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[830][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[830][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[832][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[832][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[833][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[833][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[833][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[833][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[834][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[834][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[835][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[835][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[836][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[836][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[838][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[838][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[838][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[838][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[839][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[839][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[841][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[841][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[841][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[841][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[843][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[843][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[843][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[843][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[844][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[844][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[845][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[845][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[846][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[846][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[847][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[847][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[848][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[848][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[848][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[848][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[849][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[849][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[849][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[849][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[850][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[850][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[850][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[850][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[851][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[851][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[851][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[851][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[852][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[852][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[852][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[852][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[852][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[852][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[853][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[853][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[853][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[853][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[853][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[853][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[854][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[854][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[855][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[855][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[855][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[855][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[855][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[855][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[856][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[856][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[856][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[856][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[857][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[857][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[857][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[857][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[858][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[858][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[861][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[861][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[862][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[862][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[864][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[864][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[865][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[865][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[865][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[865][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[866][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[866][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[866][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[866][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[867][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[867][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[867][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[867][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[868][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[868][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[868][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[868][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[869][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[869][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[869][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[869][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[869][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[869][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[870][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[870][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[870][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[870][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[871][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[871][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[872][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[872][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[873][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[873][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[873][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[873][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[874][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[874][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[875][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[875][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[875][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[875][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[876][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[876][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[877][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[877][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[880][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[880][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[880][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[880][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[881][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[881][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[883][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[883][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[883][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[883][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[883][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[883][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[884][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[884][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[885][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[885][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[885][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[885][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[886][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[886][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[888][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[888][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[890][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[890][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[890][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[890][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[891][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[891][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[892][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[892][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[892][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[892][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[892][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[892][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[893][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[893][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[894][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[894][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[895][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[895][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[897][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[897][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[897][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[897][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[897][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[897][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[898][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[898][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[898][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[898][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[898][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[898][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[899][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[899][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[899][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[899][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[900][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[900][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[900][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[900][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[901][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[901][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[901][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[901][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[901][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[901][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[902][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[902][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[902][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[902][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[903][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[903][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[904][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[904][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[904][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[904][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[904][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[904][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[905][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[905][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[905][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[905][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[906][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[906][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[906][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[906][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[907][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[907][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[907][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[907][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[908][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[908][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[909][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[909][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[910][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[910][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[911][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[911][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[913][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[913][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[915][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[915][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[916][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[916][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[916][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[916][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[917][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[917][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[917][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[917][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[918][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[918][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[918][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[918][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[919][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[919][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[920][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[920][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[921][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[921][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[922][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[922][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[923][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[923][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[923][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[923][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[924][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[924][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[925][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[925][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[925][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[925][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[926][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[926][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[926][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[926][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[926][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[926][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[926][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[926][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[927][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[927][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[927][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[927][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[928][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[928][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[928][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[928][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[929][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[929][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[929][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[929][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[930][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[930][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[930][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[930][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[931][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[931][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[932][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[932][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[933][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[933][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[933][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[933][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[933][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[933][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[934][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[934][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[935][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[935][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[936][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[936][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[936][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[936][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[936][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[936][5]~DUPLICATE ; ; ;
-; cpu:cpu|vram[936][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[936][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[937][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[937][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[938][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[938][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[939][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[939][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[939][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[939][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[939][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[939][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[940][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[940][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[940][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[940][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[941][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[941][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[942][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[942][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[942][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[942][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[942][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[942][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[943][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[943][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[943][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[943][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[943][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[943][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[943][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[943][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[944][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[944][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[944][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[944][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[945][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[945][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[945][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[945][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[946][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[946][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[947][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[947][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[947][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[947][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[948][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[948][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[948][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[948][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[948][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[948][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[949][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[949][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[949][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[949][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[950][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[950][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[950][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[950][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[950][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[950][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[951][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[951][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[951][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[951][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[952][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[952][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[954][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[954][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[954][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[954][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[955][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[955][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[956][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[956][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[956][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[956][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[956][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[956][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[957][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[957][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[957][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[957][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[958][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[958][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[958][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[958][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[958][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[958][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[959][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[959][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[959][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[959][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[960][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[960][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[960][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[960][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[961][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[961][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[961][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[961][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[962][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[962][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[962][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[962][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[963][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[963][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[963][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[963][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[964][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[964][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[964][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[964][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[965][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[965][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[965][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[965][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[965][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[965][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[966][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[966][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[966][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[966][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[967][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[967][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[968][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[968][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[968][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[968][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[969][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[969][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[969][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[969][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[970][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[970][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[970][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[970][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[971][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[971][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[971][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[971][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[971][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[971][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[971][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[971][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[972][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[972][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[972][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[972][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[973][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[973][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[973][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[973][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[974][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[974][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[974][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[974][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[974][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[974][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[975][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[975][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[975][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[975][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[975][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[975][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[976][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[976][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[976][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[976][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[977][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[977][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[977][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[977][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[977][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[977][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[978][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[978][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[978][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[978][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[978][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[978][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[979][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[979][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[979][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[979][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[979][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[979][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[980][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[980][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[980][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[980][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[980][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[980][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[981][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[981][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[982][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[982][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[982][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[982][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[983][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[983][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[983][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[983][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[984][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[984][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[984][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[984][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[985][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[985][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[986][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[986][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[987][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[987][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[988][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[988][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[988][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[988][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[988][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[988][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[988][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[988][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[989][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[989][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[990][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[990][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[991][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[991][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[992][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[992][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[993][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[993][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[994][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[994][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[994][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[994][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[995][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[995][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[995][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[995][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[995][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[995][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[996][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[996][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[996][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[996][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[997][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[997][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[997][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[997][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[997][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[997][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[998][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[998][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[998][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[998][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[998][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[998][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[998][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[998][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[999][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[999][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[999][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[999][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1000][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1000][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1000][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1000][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1001][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1001][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1002][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1002][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1002][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1002][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1002][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1002][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1003][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1003][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1003][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1003][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1004][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1004][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1004][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1004][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1004][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1004][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1005][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1005][1]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1005][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1005][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1005][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1005][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1005][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1005][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1006][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1006][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1006][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1006][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1007][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1007][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1008][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1008][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1008][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1008][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1009][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1009][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1009][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1009][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1010][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1010][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1010][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1010][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1010][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1010][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1010][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1010][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1011][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1011][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1011][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1011][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1012][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1012][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1012][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1012][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1012][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1012][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1013][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1013][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1013][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1013][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1013][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1013][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1013][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1013][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1014][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1014][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1014][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1014][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1014][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1014][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1015][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1015][4]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1016][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1016][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1016][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1016][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1017][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1017][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1017][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1017][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1017][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1017][6]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1018][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1018][2]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1021][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1021][0]~DUPLICATE ; ; ;
-; cpu:cpu|vram[1022][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; cpu:cpu|vram[1022][6]~DUPLICATE ; ; ;
-+---------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+-------------------------------------------------------------------+------------------+-----------------------+
-
-
-+--------------------------------------------------------------------------------------------+
-; Ignored Assignments ;
-+--------------+----------------+--------------+------------+---------------+----------------+
-; Name ; Ignored Entity ; Ignored From ; Ignored To ; Ignored Value ; Ignored Source ;
-+--------------+----------------+--------------+------------+---------------+----------------+
-; Location ; ; ; lcd_cs ; PIN_V12 ; QSF Assignment ;
-; I/O Standard ; chip8 ; ; lcd_clock ; 3.3-V LVTTL ; QSF Assignment ;
-; I/O Standard ; chip8 ; ; lcd_cs ; 3.3-V LVTTL ; QSF Assignment ;
-; I/O Standard ; chip8 ; ; led ; 3.3-V LVTTL ; QSF Assignment ;
-+--------------+----------------+--------------+------------+---------------+----------------+
-
-
-+----------------------------------------------------------------------------------------------------+
-; Incremental Compilation Preservation Summary ;
-+---------------------+----------------------+----------------------------+--------------------------+
-; Type ; Total [A + B] ; From Design Partitions [A] ; From Rapid Recompile [B] ;
-+---------------------+----------------------+----------------------------+--------------------------+
-; Placement (by node) ; ; ; ;
-; -- Requested ; 0.00 % ( 0 / 26073 ) ; 0.00 % ( 0 / 26073 ) ; 0.00 % ( 0 / 26073 ) ;
-; -- Achieved ; 0.00 % ( 0 / 26073 ) ; 0.00 % ( 0 / 26073 ) ; 0.00 % ( 0 / 26073 ) ;
-; ; ; ; ;
-; Routing (by net) ; ; ; ;
-; -- Requested ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ;
-; -- Achieved ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ;
-+---------------------+----------------------+----------------------------+--------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Incremental Compilation Partition Settings ;
-+--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
-; Partition Name ; Partition Type ; Netlist Type Used ; Preservation Level Used ; Netlist Type Requested ; Preservation Level Requested ; Contents ;
-+--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
-; Top ; User-created ; Source File ; N/A ; Source File ; N/A ; ;
-; hard_block:auto_generated_inst ; Auto-generated ; Source File ; N/A ; Source File ; N/A ; hard_block:auto_generated_inst ;
-+--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------+
-; Incremental Compilation Placement Preservation ;
-+--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
-; Partition Name ; Preservation Achieved ; Preservation Level Used ; Netlist Type Used ; Preservation Method ; Notes ;
-+--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
-; Top ; 0.00 % ( 0 / 26073 ) ; N/A ; Source File ; N/A ; ;
-; hard_block:auto_generated_inst ; 0.00 % ( 0 / 0 ) ; N/A ; Source File ; N/A ; ;
-+--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
-
-
-+--------------+
-; Pin-Out File ;
-+--------------+
-The pin-out file can be found in /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.pin.
-
-
-+---------------------------------------------------------------------------------------------+
-; Fitter Resource Usage Summary ;
-+-------------------------------------------------------------+-----------------------+-------+
-; Resource ; Usage ; % ;
-+-------------------------------------------------------------+-----------------------+-------+
-; Logic utilization (ALMs needed / total ALMs on device) ; 10,693 / 41,910 ; 26 % ;
-; ALMs needed [=A-B+C] ; 10,693 ; ;
-; [A] ALMs used in final placement [=a+b+c+d] ; 11,707 / 41,910 ; 28 % ;
-; [a] ALMs used for LUT logic and registers ; 4,258 ; ;
-; [b] ALMs used for LUT logic ; 7,290 ; ;
-; [c] ALMs used for registers ; 159 ; ;
-; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; ;
-; [B] Estimate of ALMs recoverable by dense packing ; 1,199 / 41,910 ; 3 % ;
-; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 185 / 41,910 ; < 1 % ;
-; [a] Due to location constrained logic ; 0 ; ;
-; [b] Due to LAB-wide signal conflicts ; 0 ; ;
-; [c] Due to LAB input limits ; 185 ; ;
-; [d] Due to virtual I/Os ; 0 ; ;
-; ; ; ;
-; Difficulty packing design ; Low ; ;
-; ; ; ;
-; Total LABs: partially or completely used ; 1,438 / 4,191 ; 34 % ;
-; -- Logic LABs ; 1,438 ; ;
-; -- Memory LABs (up to half of total LABs) ; 0 ; ;
-; ; ; ;
-; Combinational ALUT usage for logic ; 17,207 ; ;
-; -- 7 input functions ; 56 ; ;
-; -- 6 input functions ; 3,707 ; ;
-; -- 5 input functions ; 5,934 ; ;
-; -- 4 input functions ; 2,008 ; ;
-; -- <=3 input functions ; 5,502 ; ;
-; Combinational ALUT usage for route-throughs ; 95 ; ;
-; ; ; ;
-; Dedicated logic registers ; 10,165 ; ;
-; -- By type: ; ; ;
-; -- Primary logic registers ; 8,832 / 83,820 ; 11 % ;
-; -- Secondary logic registers ; 1,333 / 83,820 ; 2 % ;
-; -- By function: ; ; ;
-; -- Design implementation registers ; 8,836 ; ;
-; -- Routing optimization registers ; 1,329 ; ;
-; ; ; ;
-; Virtual pins ; 0 ; ;
-; I/O pins ; 10 / 314 ; 3 % ;
-; -- Clock pins ; 3 / 8 ; 38 % ;
-; -- Dedicated input pins ; 0 / 21 ; 0 % ;
-; ; ; ;
-; Hard processor system peripheral utilization ; ; ;
-; -- Boot from FPGA ; 0 / 1 ( 0 % ) ; ;
-; -- Clock resets ; 0 / 1 ( 0 % ) ; ;
-; -- Cross trigger ; 0 / 1 ( 0 % ) ; ;
-; -- S2F AXI ; 0 / 1 ( 0 % ) ; ;
-; -- F2S AXI ; 0 / 1 ( 0 % ) ; ;
-; -- AXI Lightweight ; 0 / 1 ( 0 % ) ; ;
-; -- SDRAM ; 0 / 1 ( 0 % ) ; ;
-; -- Interrupts ; 0 / 1 ( 0 % ) ; ;
-; -- JTAG ; 0 / 1 ( 0 % ) ; ;
-; -- Loan I/O ; 0 / 1 ( 0 % ) ; ;
-; -- MPU event standby ; 0 / 1 ( 0 % ) ; ;
-; -- MPU general purpose ; 0 / 1 ( 0 % ) ; ;
-; -- STM event ; 0 / 1 ( 0 % ) ; ;
-; -- TPIU trace ; 0 / 1 ( 0 % ) ; ;
-; -- DMA ; 0 / 1 ( 0 % ) ; ;
-; -- CAN ; 0 / 2 ( 0 % ) ; ;
-; -- EMAC ; 0 / 2 ( 0 % ) ; ;
-; -- I2C ; 0 / 4 ( 0 % ) ; ;
-; -- NAND Flash ; 0 / 1 ( 0 % ) ; ;
-; -- QSPI ; 0 / 1 ( 0 % ) ; ;
-; -- SDMMC ; 0 / 1 ( 0 % ) ; ;
-; -- SPI Master ; 0 / 2 ( 0 % ) ; ;
-; -- SPI Slave ; 0 / 2 ( 0 % ) ; ;
-; -- UART ; 0 / 2 ( 0 % ) ; ;
-; -- USB ; 0 / 2 ( 0 % ) ; ;
-; ; ; ;
-; M10K blocks ; 4 / 553 ; < 1 % ;
-; Total MLAB memory bits ; 0 ; ;
-; Total block memory bits ; 32,768 / 5,662,720 ; < 1 % ;
-; Total block memory implementation bits ; 40,960 / 5,662,720 ; < 1 % ;
-; ; ; ;
-; Total DSP Blocks ; 0 / 112 ; 0 % ;
-; ; ; ;
-; Fractional PLLs ; 0 / 6 ; 0 % ;
-; Global signals ; 2 ; ;
-; -- Global clocks ; 2 / 16 ; 13 % ;
-; -- Quadrant clocks ; 0 / 66 ; 0 % ;
-; -- Horizontal periphery clocks ; 0 / 18 ; 0 % ;
-; SERDES Transmitters ; 0 / 100 ; 0 % ;
-; SERDES Receivers ; 0 / 100 ; 0 % ;
-; JTAGs ; 0 / 1 ; 0 % ;
-; ASMI blocks ; 0 / 1 ; 0 % ;
-; CRC blocks ; 0 / 1 ; 0 % ;
-; Remote update blocks ; 0 / 1 ; 0 % ;
-; Oscillator blocks ; 0 / 1 ; 0 % ;
-; Impedance control blocks ; 0 / 4 ; 0 % ;
-; Hard Memory Controllers ; 0 / 1 ; 0 % ;
-; Average interconnect usage (total/H/V) ; 14.1% / 14.1% / 14.2% ; ;
-; Peak interconnect usage (total/H/V) ; 63.8% / 64.3% / 65.7% ; ;
-; Maximum fan-out ; 9941 ; ;
-; Highest non-global fan-out ; 9160 ; ;
-; Total fan-out ; 107054 ; ;
-; Average fan-out ; 3.89 ; ;
-+-------------------------------------------------------------+-----------------------+-------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------+
-; Fitter Partition Statistics ;
-+-------------------------------------------------------------+------------------------+--------------------------------+
-; Statistic ; Top ; hard_block:auto_generated_inst ;
-+-------------------------------------------------------------+------------------------+--------------------------------+
-; Logic utilization (ALMs needed / total ALMs on device) ; 10693 / 41910 ( 26 % ) ; 0 / 41910 ( 0 % ) ;
-; ALMs needed [=A-B+C] ; 10693 ; 0 ;
-; [A] ALMs used in final placement [=a+b+c+d] ; 11707 / 41910 ( 28 % ) ; 0 / 41910 ( 0 % ) ;
-; [a] ALMs used for LUT logic and registers ; 4258 ; 0 ;
-; [b] ALMs used for LUT logic ; 7290 ; 0 ;
-; [c] ALMs used for registers ; 159 ; 0 ;
-; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; 0 ;
-; [B] Estimate of ALMs recoverable by dense packing ; 1199 / 41910 ( 3 % ) ; 0 / 41910 ( 0 % ) ;
-; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 185 / 41910 ( < 1 % ) ; 0 / 41910 ( 0 % ) ;
-; [a] Due to location constrained logic ; 0 ; 0 ;
-; [b] Due to LAB-wide signal conflicts ; 0 ; 0 ;
-; [c] Due to LAB input limits ; 185 ; 0 ;
-; [d] Due to virtual I/Os ; 0 ; 0 ;
-; ; ; ;
-; Difficulty packing design ; Low ; Low ;
-; ; ; ;
-; Total LABs: partially or completely used ; 1438 / 4191 ( 34 % ) ; 0 / 4191 ( 0 % ) ;
-; -- Logic LABs ; 1438 ; 0 ;
-; -- Memory LABs (up to half of total LABs) ; 0 ; 0 ;
-; ; ; ;
-; Combinational ALUT usage for logic ; 17207 ; 0 ;
-; -- 7 input functions ; 56 ; 0 ;
-; -- 6 input functions ; 3707 ; 0 ;
-; -- 5 input functions ; 5934 ; 0 ;
-; -- 4 input functions ; 2008 ; 0 ;
-; -- <=3 input functions ; 5502 ; 0 ;
-; Combinational ALUT usage for route-throughs ; 95 ; 0 ;
-; Memory ALUT usage ; 0 ; 0 ;
-; -- 64-address deep ; 0 ; 0 ;
-; -- 32-address deep ; 0 ; 0 ;
-; ; ; ;
-; Dedicated logic registers ; 0 ; 0 ;
-; -- By type: ; ; ;
-; -- Primary logic registers ; 8832 / 83820 ( 11 % ) ; 0 / 83820 ( 0 % ) ;
-; -- Secondary logic registers ; 1333 / 83820 ( 2 % ) ; 0 / 83820 ( 0 % ) ;
-; -- By function: ; ; ;
-; -- Design implementation registers ; 8836 ; 0 ;
-; -- Routing optimization registers ; 1329 ; 0 ;
-; ; ; ;
-; ; ; ;
-; Virtual pins ; 0 ; 0 ;
-; I/O pins ; 10 ; 0 ;
-; I/O registers ; 0 ; 0 ;
-; Total block memory bits ; 32768 ; 0 ;
-; Total block memory implementation bits ; 40960 ; 0 ;
-; M10K block ; 4 / 553 ( < 1 % ) ; 0 / 553 ( 0 % ) ;
-; Clock enable block ; 2 / 116 ( 1 % ) ; 0 / 116 ( 0 % ) ;
-; ; ; ;
-; Connections ; ; ;
-; -- Input Connections ; 0 ; 0 ;
-; -- Registered Input Connections ; 0 ; 0 ;
-; -- Output Connections ; 0 ; 0 ;
-; -- Registered Output Connections ; 0 ; 0 ;
-; ; ; ;
-; Internal Connections ; ; ;
-; -- Total Connections ; 107167 ; 0 ;
-; -- Registered Connections ; 24776 ; 0 ;
-; ; ; ;
-; External Connections ; ; ;
-; -- Top ; 0 ; 0 ;
-; -- hard_block:auto_generated_inst ; 0 ; 0 ;
-; ; ; ;
-; Partition Interface ; ; ;
-; -- Input Ports ; 2 ; 0 ;
-; -- Output Ports ; 8 ; 0 ;
-; -- Bidir Ports ; 0 ; 0 ;
-; ; ; ;
-; Registered Ports ; ; ;
-; -- Registered Input Ports ; 0 ; 0 ;
-; -- Registered Output Ports ; 0 ; 0 ;
-; ; ; ;
-; Port Connectivity ; ; ;
-; -- Input Ports driven by GND ; 0 ; 0 ;
-; -- Output Ports driven by GND ; 0 ; 0 ;
-; -- Input Ports driven by VCC ; 0 ; 0 ;
-; -- Output Ports driven by VCC ; 0 ; 0 ;
-; -- Input Ports with no Source ; 0 ; 0 ;
-; -- Output Ports with no Source ; 0 ; 0 ;
-; -- Input Ports with no Fanout ; 0 ; 0 ;
-; -- Output Ports with no Fanout ; 0 ; 0 ;
-+-------------------------------------------------------------+------------------------+--------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Input Pins ;
-+----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
-; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Termination Control Block ; Location assigned by ; Slew Rate ;
-+----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
-; fpga_clk ; V11 ; 3B ; 32 ; 0 ; 0 ; 21 ; 0 ; yes ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; User ; no ;
-; rst_in ; W20 ; 5B ; 89 ; 23 ; 20 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; User ; no ;
-+----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Output Pins ;
-+----------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
-; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Output Register ; Output Enable Register ; Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Termination Control Block ; Output Buffer Pre-emphasis ; Voltage Output Differential ; Output Buffer Delay ; Output Buffer Delay Control ; Location assigned by ; Output Enable Source ; Output Enable Group ;
-+----------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
-; lcd_clk ; D8 ; 8A ; 38 ; 81 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; lcd_data ; W12 ; 3B ; 40 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; led[0] ; W15 ; 5A ; 89 ; 8 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; led[1] ; AA24 ; 5A ; 89 ; 9 ; 37 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; led[2] ; V16 ; 5A ; 89 ; 9 ; 3 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; led[3] ; V15 ; 5A ; 89 ; 9 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; led[4] ; AF26 ; 5A ; 89 ; 4 ; 77 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-; led[5] ; AE26 ; 5A ; 89 ; 4 ; 94 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 3.3-V LVTTL ; 16mA ; Off ; -- ; no ; no ; 0 ; Off ; User ; - ; - ;
-+----------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
-
-
-+---------------------------------------------------------------------------+
-; I/O Bank Usage ;
-+----------+-----------------+---------------+--------------+---------------+
-; I/O Bank ; Usage ; VCCIO Voltage ; VREF Voltage ; VCCPD Voltage ;
-+----------+-----------------+---------------+--------------+---------------+
-; B2L ; 0 / 0 ( -- ) ; -- ; -- ; -- ;
-; B1L ; 0 / 0 ( -- ) ; -- ; -- ; -- ;
-; 3A ; 0 / 16 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 3B ; 2 / 32 ( 6 % ) ; 3.3V ; -- ; 3.3V ;
-; 4A ; 0 / 68 ( 0 % ) ; 3.3V ; -- ; 3.3V ;
-; 5A ; 6 / 16 ( 38 % ) ; 3.3V ; -- ; 3.3V ;
-; 5B ; 1 / 7 ( 14 % ) ; 2.5V ; -- ; 2.5V ;
-; 6B ; 0 / 44 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 6A ; 0 / 56 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 7A ; 0 / 19 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 7B ; 0 / 22 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 7C ; 0 / 12 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 7D ; 0 / 14 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
-; 8A ; 1 / 6 ( 17 % ) ; 2.5V ; -- ; 2.5V ;
-+----------+-----------------+---------------+--------------+---------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; All Package Pins ;
-+----------+------------+----------------+---------------------------------+--------+--------------+---------------------+--------------+-----------------+----------+--------------+
-; Location ; Pad Number ; I/O Bank ; Pin Name/Usage ; Dir. ; I/O Standard ; Voltage ; I/O Type ; User Assignment ; Bus Hold ; Weak Pull Up ;
-+----------+------------+----------------+---------------------------------+--------+--------------+---------------------+--------------+-----------------+----------+--------------+
-; A2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; A3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; A4 ; 435 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A5 ; 431 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A6 ; 425 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A7 ; 423 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A8 ; 421 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A9 ; 419 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; A11 ; 417 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A12 ; 415 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A13 ; 413 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A14 ; 411 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A15 ; 409 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A16 ; 407 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A17 ; 399 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A18 ; 395 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A19 ; 393 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A20 ; 391 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A21 ; 389 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A22 ; 387 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; A23 ; 374 ; 7A ; ^HPS_nRST ; ; ; ; -- ; ; -- ; -- ;
-; A24 ; 361 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; A25 ; 359 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; A26 ; 357 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; A27 ; 353 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AA1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AA2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AA3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AA4 ; 59 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AA5 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AA6 ; 43 ; 3A ; ^nCSO, DATA4 ; ; ; ; Weak Pull Up ; ; -- ; On ;
-; AA8 ; 50 ; 3A ; ^DCLK ; ; ; ; Weak Pull Up ; ; -- ; On ;
-; AA9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AA10 ; ; 3A ; VCCPD3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AA11 ; 64 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AA12 ; ; 3B ; VCCIO3B ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AA13 ; 144 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AA14 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AA15 ; 160 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AA16 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AA17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AA18 ; 168 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AA19 ; 170 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AA20 ; 213 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AA21 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AA23 ; 226 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AA24 ; 224 ; 5A ; led[1] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; AA25 ; ; 5B ; VREFB5BN0 ; power ; ; ; -- ; ; -- ; -- ;
-; AA26 ; 255 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AA27 ; 279 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AA28 ; 289 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AB1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB4 ; 57 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AB5 ; 46 ; 3A ; #TCK ; input ; ; ; -- ; ; -- ; -- ;
-; AB6 ; 45 ; 3A ; ^AS_DATA3, DATA3 ; ; ; ; Weak Pull Up ; ; -- ; On ;
-; AB23 ; 222 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AB24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB25 ; 259 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AB26 ; 253 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AB27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AB28 ; 277 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AC1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AC2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AC3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AC4 ; 63 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AC5 ; 47 ; 3A ; ^AS_DATA2, DATA2 ; ; ; ; Weak Pull Up ; ; -- ; On ;
-; AC6 ; 49 ; 3A ; ^AS_DATA1, DATA1 ; ; ; ; Weak Pull Up ; ; -- ; On ;
-; AC7 ; 44 ; 3A ; #TMS ; input ; ; ; -- ; ; -- ; -- ;
-; AC8 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AC21 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AC22 ; 202 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AC23 ; 200 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AC24 ; 220 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AC25 ; ; 5A ; VCCIO5A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AC26 ; ; 5A ; VREFB5AN0 ; power ; ; ; -- ; ; -- ; -- ;
-; AC27 ; 275 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AC28 ; 273 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AD1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; AD2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; AD3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AD4 ; 61 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD5 ; 67 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AD7 ; 51 ; 3A ; ^AS_DATA0, ASDO, DATA0 ; ; ; ; Weak Pull Up ; ; -- ; On ;
-; AD8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AD9 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AD10 ; 103 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD11 ; 111 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD12 ; 125 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD13 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AD14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AD15 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AD16 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AD17 ; 159 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD18 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AD19 ; 165 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD20 ; 173 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD21 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AD22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AD23 ; 186 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AD24 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
-; AD25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AD26 ; 218 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AD27 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; AD28 ; 263 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AE1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AE2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AE3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AE4 ; 102 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE5 ; ; 3A ; VREFB3AN0 ; power ; ; ; -- ; ; -- ; -- ;
-; AE6 ; 65 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE7 ; 107 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE8 ; 110 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE9 ; 101 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE10 ; ; 3B ; VCCIO3B ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AE11 ; 109 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE12 ; 127 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE13 ; ; 3B ; VCCIO3B ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AE14 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; AE15 ; 141 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AE17 ; 157 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AE19 ; 167 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE20 ; 175 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE21 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AE22 ; 184 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE23 ; 197 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE24 ; 199 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AE25 ; 216 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AE26 ; 214 ; 5A ; led[5] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; AE27 ; 265 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AE28 ; 261 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; AF1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AF2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AF3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AF4 ; 100 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF5 ; 115 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF6 ; 113 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF7 ; 118 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF8 ; 105 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF9 ; 108 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF10 ; 117 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF11 ; 119 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF12 ; ; 3B ; VREFB3BN0 ; power ; ; ; -- ; ; -- ; -- ;
-; AF13 ; 133 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF14 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AF15 ; 143 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF16 ; ; 4A ; VREFB4AN0 ; power ; ; ; -- ; ; -- ; -- ;
-; AF17 ; 151 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF18 ; 166 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF19 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AF20 ; 179 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF21 ; 181 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF22 ; 183 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF23 ; 189 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AF25 ; 207 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF26 ; 212 ; 5A ; led[4] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; AF27 ; 211 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AF28 ; 209 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AG2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AG3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AG4 ; ; 3B ; VCCIO3B ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AG5 ; 126 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG6 ; 116 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AG8 ; 134 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG9 ; 139 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG10 ; 142 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG11 ; 147 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG12 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AG13 ; 135 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG14 ; 155 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG15 ; 158 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG16 ; 149 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AG18 ; 171 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG19 ; 174 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG20 ; 177 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG21 ; 182 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG22 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AG23 ; 191 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG24 ; 195 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG25 ; 205 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG26 ; 198 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AG27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AG28 ; 206 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH2 ; 121 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH3 ; 123 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH4 ; 124 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH5 ; 129 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH6 ; 131 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH7 ; 132 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH8 ; 137 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH9 ; 140 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AH11 ; 145 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH12 ; 150 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH13 ; 153 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH14 ; 156 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH15 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AH16 ; 161 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH17 ; 163 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH18 ; 169 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH19 ; 172 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; AH21 ; 185 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH22 ; 188 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH23 ; 190 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH24 ; 193 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH25 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; AH26 ; 201 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; AH27 ; 204 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B1 ; ; ; GND ; ; ; ; -- ; ; -- ; -- ;
-; B2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; B3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B4 ; 437 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B6 ; 433 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B8 ; 439 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B9 ; 441 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B10 ; ; 7C ; VCCIO7C_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; B11 ; 440 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B12 ; 438 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B13 ; ; 7B ; VCCIO7B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; B14 ; 427 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B16 ; 402 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B18 ; 397 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B19 ; 403 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B21 ; 388 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; B22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B23 ; 376 ; 7A ; ^HPS_TDO ; ; ; ; -- ; ; -- ; -- ;
-; B24 ; 363 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; B25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B26 ; 351 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; B27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; B28 ; 343 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; C1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C4 ; 446 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C5 ; 453 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C6 ; 451 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C7 ; 449 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C8 ; 447 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C9 ; 445 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C10 ; 443 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; C12 ; 460 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C13 ; 432 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C14 ; 426 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C15 ; 418 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C16 ; 404 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C17 ; 396 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C18 ; 394 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C19 ; 401 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C20 ; ; 7A ; VCCIO7A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; C21 ; 386 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; C22 ; 380 ; 7A ; ^HPS_TRST ; ; ; ; -- ; ; -- ; -- ;
-; C23 ; 378 ; 7A ; ^HPS_TMS ; ; ; ; -- ; ; -- ; -- ;
-; C24 ; 367 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; C25 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; C26 ; 349 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; C27 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; C28 ; 341 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; D1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; D2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; D3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; D4 ; 448 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D5 ; 455 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D6 ; ; 7D ; VCCIO7D_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; D7 ; ; -- ; VCCBAT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
-; D8 ; 465 ; 8A ; lcd_clk ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; D9 ; ; 8A ; VREFB8AN0 ; power ; ; ; -- ; ; -- ; -- ;
-; D10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; D11 ; 476 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D12 ; 458 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; D14 ; 430 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D15 ; 420 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; D17 ; 410 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; D18 ; ; 7A ; VCCIO7A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; D19 ; ; 7A, 7B, 7C, 7D ; VREFB7A7B7C7DN0_HPS ; power ; ; ; -- ; ; -- ; -- ;
-; D20 ; 385 ; 7A ; ^HPS_CLK2 ; ; ; ; -- ; ; -- ; -- ;
-; D21 ; 382 ; 7A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
-; D22 ; 381 ; 7A ; ^HPS_TDI ; ; ; ; -- ; ; -- ; -- ;
-; D23 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; D24 ; 365 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; D25 ; 371 ; 6A ; HPS_RZQ_0 ; ; ; ; -- ; ; no ; On ;
-; D26 ; 347 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; D27 ; 335 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; D28 ; 333 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; E1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E4 ; 442 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; E5 ; 454 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; E6 ; 542 ; 9A ; ^nCE ; ; ; ; -- ; ; -- ; -- ;
-; E7 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E8 ; 463 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; E9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E10 ; ; 8A ; VCCPD8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E11 ; 474 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; E12 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; E13 ; ; 7D ; VCCPD7D_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E14 ; ; 7C ; VCCPD7C_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E15 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E16 ; 412 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; E17 ; ; 7B ; VCCPD7B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E18 ; 383 ; 7A ; ^HPS_PORSEL ; ; ; ; -- ; ; -- ; -- ;
-; E19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E20 ; 384 ; 7A ; ^HPS_CLK1 ; ; ; ; -- ; ; -- ; -- ;
-; E21 ; ; 7A ; VCCPD7A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; E22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E23 ; 373 ; 7A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
-; E24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E25 ; 369 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; E26 ; 345 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; E27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; E28 ; 337 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; F1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; F2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; F3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; F4 ; 450 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; F5 ; 444 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; F6 ; 547 ; 9A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
-; F7 ; 545 ; 9A ; ^nCONFIG ; ; ; ; -- ; ; -- ; -- ;
-; F8 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; F21 ; ; -- ; VCC_AUX_SHARED ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; F22 ; ; -- ; VCCRSTCLK_HPS ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
-; F23 ; 372 ; 7A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
-; F24 ; 370 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; F25 ; 362 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; F26 ; 360 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; F27 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; F28 ; 327 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; G1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; G2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; G3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; G4 ; 452 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; G5 ; ; 7D ; VCCIO7D_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; G6 ; 543 ; 9A ; ^MSEL2 ; ; ; ; -- ; ; -- ; -- ;
-; G23 ; 368 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; G24 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; G25 ; 354 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; G26 ; 331 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; G27 ; 329 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; G28 ; 325 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; H1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; H2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; H3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H8 ; 541 ; 9A ; ^nSTATUS ; ; ; ; -- ; ; -- ; -- ;
-; H9 ; 540 ; 9A ; ^MSEL1 ; ; ; ; -- ; ; -- ; -- ;
-; H10 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
-; H11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H12 ; 436 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; H13 ; 434 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; H14 ; ; 7B ; VCCIO7B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; H15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H16 ; 422 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; H17 ; 400 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; H18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H19 ; 375 ; 7A ; ^HPS_nPOR ; ; ; ; -- ; ; -- ; -- ;
-; H20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H21 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; H23 ; ; -- ; VCCPLL_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; H24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H25 ; 352 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; H26 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; H27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; H28 ; 339 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; -- ; -- ;
-; J1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J4 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; J5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J8 ; 539 ; 9A ; ^CONF_DONE ; ; ; ; -- ; ; -- ; -- ;
-; J9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; J10 ; 538 ; 9A ; ^MSEL0 ; ; ; ; -- ; ; -- ; -- ;
-; J11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; J12 ; 416 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J13 ; 414 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J14 ; 408 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J15 ; 406 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J16 ; 424 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J17 ; 398 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J18 ; 392 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; J19 ; 377 ; 7A ; ^VCCRSTCLK_HPS ; ; ; ; -- ; ; -- ; -- ;
-; J20 ; 346 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J21 ; 344 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J24 ; 336 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J25 ; 338 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J26 ; 330 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J27 ; 321 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; J28 ; 319 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; K1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K5 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; K8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K9 ; 546 ; 9A ; ^MSEL4 ; ; ; ; -- ; ; -- ; -- ;
-; K10 ; 544 ; 9A ; ^MSEL3 ; ; ; ; -- ; ; -- ; -- ;
-; K11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; K14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K15 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; K16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K17 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; K18 ; 390 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; K19 ; 379 ; 7A ; ^HPS_TCK ; ; ; ; -- ; ; -- ; -- ;
-; K20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; K21 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; K24 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; K25 ; 322 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; K26 ; 328 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; K27 ; 323 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; K28 ; 317 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; L1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L4 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; L5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; L12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; L13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; L15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L16 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; L17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L18 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; L19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L20 ; 366 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; L21 ; 364 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; L24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L25 ; 320 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; L26 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; L27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; L28 ; 315 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; M1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; M2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; M3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M4 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; M5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M9 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M15 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M17 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M18 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M19 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; M20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; M21 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; M24 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; M25 ; 324 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; M26 ; 312 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; M27 ; 314 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; M28 ; 313 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N9 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N10 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N16 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N18 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; N19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; N20 ; 350 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N21 ; 348 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N24 ; 306 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N25 ; 304 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N26 ; 298 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N27 ; 296 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; N28 ; 311 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; P1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P4 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; P5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; P12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; P14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; P15 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; P16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P17 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; P18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P19 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; P20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P21 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; P24 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; P25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; P26 ; 299 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; P27 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; P28 ; 309 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R4 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; R5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; R8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R9 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; R10 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; R11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; R13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; R15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; R16 ; 334 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R17 ; 332 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R18 ; 318 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R19 ; 316 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R20 ; 310 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R21 ; 308 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R24 ; 282 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R25 ; 288 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R26 ; 290 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R27 ; 297 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; R28 ; 307 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; T2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; T3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; T4 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; T5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; T8 ; 56 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T9 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; T10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; T11 ; 106 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T12 ; 120 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T13 ; 122 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; T14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; T15 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; T16 ; 292 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T17 ; 294 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T18 ; 302 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T19 ; 300 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T20 ; 286 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T21 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; T24 ; 280 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T25 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; T26 ; 274 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; T27 ; 283 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; -- ; -- ;
-; T28 ; 305 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; U1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U4 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; U5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U8 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; U9 ; 58 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U10 ; 62 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U11 ; 104 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U13 ; 136 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U14 ; 138 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; U15 ; 278 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; U16 ; 276 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; U17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U18 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; U19 ; 284 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; U20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U21 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; U24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U25 ; 272 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; U26 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
-; U27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; U28 ; 303 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V10 ; 60 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; V11 ; 114 ; 3B ; fpga_clk ; input ; 2.5 V ; ; Column I/O ; Y ; no ; Off ;
-; V12 ; 130 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; V13 ; 152 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; V14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V15 ; 227 ; 5A ; led[3] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; V16 ; 225 ; 5A ; led[2] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; V17 ; 270 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V18 ; 268 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V19 ; 266 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V20 ; 264 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V21 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V24 ; 269 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V25 ; 271 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V26 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; V27 ; 295 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; V28 ; 301 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; W1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W5 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W8 ; 54 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; W9 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W10 ; 48 ; 3A ; #TDI ; input ; ; ; -- ; ; -- ; -- ;
-; W11 ; 112 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; W12 ; 128 ; 3B ; lcd_data ; output ; 3.3-V LVTTL ; ; Column I/O ; Y ; no ; Off ;
-; W13 ; ; 4A ; VCCIO4A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; W14 ; 154 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; W15 ; 223 ; 5A ; led[0] ; output ; 3.3-V LVTTL ; ; Row I/O ; Y ; no ; Off ;
-; W16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W17 ; ; 5A ; VCCIO5A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; W18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; W19 ; ; 5B ; VCCPD5B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W20 ; 254 ; 5B ; rst_in ; input ; 2.5 V ; ; Row I/O ; Y ; no ; Off ;
-; W21 ; 252 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; W24 ; 258 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; W25 ; ; 5B ; VCCIO5B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W26 ; 287 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; W27 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
-; W28 ; 293 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; Y2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
-; Y3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y4 ; 53 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; Y5 ; 55 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; Y8 ; 52 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; Y9 ; 42 ; 3A ; #TDO ; output ; ; ; -- ; ; -- ; -- ;
-; Y10 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
-; Y11 ; 66 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; Y12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y13 ; 146 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; Y14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y15 ; 162 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
-; Y16 ; 221 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y17 ; 217 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y18 ; 219 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y19 ; 215 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y21 ; ; 5A ; VCCPD5A ; power ; ; 3.3V ; -- ; ; -- ; -- ;
-; Y24 ; 256 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
-; Y26 ; 285 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y27 ; 281 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-; Y28 ; 291 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
-+----------+------------+----------------+---------------------------------+--------+--------------+---------------------+--------------+-----------------+----------+--------------+
-Note: Pin directions (input, output or bidir) are based on device operating in user mode.
-
-
-+-------------------------------------------------+
-; I/O Assignment Warnings ;
-+----------+--------------------------------------+
-; Pin Name ; Reason ;
-+----------+--------------------------------------+
-; lcd_clk ; Incomplete set of assignments ;
-; lcd_data ; Missing drive strength and slew rate ;
-; led[0] ; Missing drive strength and slew rate ;
-; led[1] ; Missing drive strength and slew rate ;
-; led[2] ; Missing drive strength and slew rate ;
-; led[3] ; Missing drive strength and slew rate ;
-; led[4] ; Missing drive strength and slew rate ;
-; led[5] ; Missing drive strength and slew rate ;
-; rst_in ; Incomplete set of assignments ;
-; fpga_clk ; Incomplete set of assignments ;
-+----------+--------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Resource Utilization by Entity ;
-+-------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------+----------------------+--------------+
-; Compilation Hierarchy Node ; ALMs needed [=A-B+C] ; [A] ALMs used in final placement ; [B] Estimate of ALMs recoverable by dense packing ; [C] Estimate of ALMs unavailable ; ALMs used for memory ; Combinational ALUTs ; Dedicated Logic Registers ; I/O Registers ; Block Memory Bits ; M10Ks ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ;
-+-------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------+----------------------+--------------+
-; |chip8 ; 10693.1 (0.5) ; 11706.5 (0.5) ; 1198.4 (0.0) ; 185.0 (0.0) ; 0.0 (0.0) ; 17207 (1) ; 10165 (0) ; 0 (0) ; 32768 ; 4 ; 0 ; 10 ; 0 ; |chip8 ; chip8 ; work ;
-; |cpu:cpu| ; 10687.0 (6736.9) ; 11699.5 (7691.4) ; 1197.4 (1037.4) ; 185.0 (82.9) ; 0.0 (0.0) ; 17195 (11517) ; 10154 (9885) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu ; cpu ; work ;
-; |alu:alu| ; 26.3 (26.3) ; 29.6 (29.6) ; 3.3 (3.3) ; 0.1 (0.1) ; 0.0 (0.0) ; 47 (47) ; 52 (52) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu|alu:alu ; alu ; work ;
-; |st7920_serial_driver:gpu| ; 3923.8 (3893.6) ; 3978.5 (3944.8) ; 156.7 (153.2) ; 102.0 (102.0) ; 0.0 (0.0) ; 5631 (5585) ; 217 (157) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu|st7920_serial_driver:gpu ; st7920_serial_driver ; work ;
-; |commander:com| ; 30.2 (30.2) ; 33.7 (33.7) ; 3.5 (3.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 46 (46) ; 60 (60) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu|st7920_serial_driver:gpu|commander:com ; commander ; work ;
-; |downclocker:dc| ; 5.5 (5.5) ; 6.5 (6.5) ; 1.0 (1.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 11 (11) ; 11 (11) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |chip8|downclocker:dc ; downclocker ; work ;
-; |memory:mem| ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0 (0) ; 0 (0) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; |chip8|memory:mem ; memory ; work ;
-; |altsyncram:mem_rtl_0| ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0 (0) ; 0 (0) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; |chip8|memory:mem|altsyncram:mem_rtl_0 ; altsyncram ; work ;
-; |altsyncram_dsq1:auto_generated| ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0 (0) ; 0 (0) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; |chip8|memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated ; altsyncram_dsq1 ; work ;
-+-------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------+----------------------+--------------+
-Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
-
-
-+-------------------------------------------------------------------------------------------------------------------------+
-; Delay Chain Summary ;
-+----------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
-; Name ; Pin Type ; D1 ; D3_0 ; D3_1 ; D4 ; D5 ; D5 OE ; D5 OCT ; T11 (Postamble Gating) ; T11 (Postamble Ungating) ;
-+----------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
-; lcd_clk ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; lcd_data ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; led[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; led[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; led[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; led[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; led[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; led[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
-; rst_in ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
-; fpga_clk ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
-+----------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
-
-
-+-------------------------------------------------------------------------------+
-; Pad To Core Delay Chain Fanout ;
-+-------------------------------------------------+-------------------+---------+
-; Source Pin / Fanout ; Pad To Core Index ; Setting ;
-+-------------------------------------------------+-------------------+---------+
-; rst_in ; ; ;
-; fpga_clk ; ; ;
-; - cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0 ; 0 ;
-; - downclocker:dc|clk_out ; 0 ; 0 ;
-+-------------------------------------------------+-------------------+---------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Control Signals ;
-+------------------------------------------------------------------------+----------------------+---------+---------------------------+--------+----------------------+------------------+---------------------------+
-; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
-+------------------------------------------------------------------------+----------------------+---------+---------------------------+--------+----------------------+------------------+---------------------------+
-; cpu:cpu|Decoder0~11 ; LABCELL_X53_Y18_N21 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~12 ; LABCELL_X53_Y18_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~13 ; LABCELL_X53_Y18_N48 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~14 ; LABCELL_X53_Y18_N51 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~15 ; LABCELL_X53_Y18_N54 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~16 ; LABCELL_X53_Y18_N45 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~17 ; LABCELL_X53_Y18_N18 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~18 ; LABCELL_X53_Y18_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~19 ; LABCELL_X53_Y18_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~2 ; LABCELL_X53_Y18_N36 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~20 ; LABCELL_X53_Y18_N9 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~3 ; LABCELL_X53_Y18_N57 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~5 ; LABCELL_X53_Y18_N27 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~6 ; LABCELL_X53_Y18_N42 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~8 ; LABCELL_X48_Y18_N15 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Decoder0~9 ; LABCELL_X48_Y18_N45 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Equal17~0 ; LABCELL_X51_Y13_N30 ; 16 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Equal17~1 ; LABCELL_X51_Y13_N39 ; 24 ; Sync. load ; no ; -- ; -- ; -- ;
-; cpu:cpu|Equal17~5 ; LABCELL_X51_Y13_N3 ; 14 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|Selector163~1 ; LABCELL_X51_Y15_N51 ; 11 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|alu_rst ; FF_X52_Y12_N50 ; 37 ; Sync. clear ; no ; -- ; -- ; -- ;
-; cpu:cpu|draw_state.r[4]~0 ; LABCELL_X46_Y20_N33 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|index_reg[11]~0 ; MLABCELL_X52_Y14_N39 ; 12 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|instr.alu_i.operand_a[0]~0 ; LABCELL_X50_Y15_N15 ; 16 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|instr.dst_reg[0]~0 ; LABCELL_X50_Y15_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|instr.src_byte[11]~2 ; LABCELL_X51_Y16_N27 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|instr.src_byte[1]~4 ; LABCELL_X51_Y16_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|instr.src_sprite_sz[0]~0 ; LABCELL_X51_Y15_N33 ; 29 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|instr.src_sprite_x[5]~0 ; LABCELL_X50_Y16_N24 ; 11 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|program_counter[10]~4 ; LABCELL_X50_Y16_N54 ; 14 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|rd_memory_address[8]~1 ; LABCELL_X50_Y16_N3 ; 12 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[0][0]~1 ; LABCELL_X55_Y16_N15 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[10][0]~11 ; LABCELL_X55_Y16_N39 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[11][0]~12 ; LABCELL_X55_Y16_N6 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[12][0]~13 ; LABCELL_X55_Y16_N9 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[13][0]~14 ; LABCELL_X55_Y16_N21 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[14][0]~15 ; LABCELL_X55_Y16_N33 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[15][5]~16 ; LABCELL_X29_Y23_N12 ; 8 ; Sync. clear ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[15][5]~19 ; LABCELL_X29_Y23_N21 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[1][0]~2 ; LABCELL_X55_Y16_N0 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[2][0]~3 ; LABCELL_X55_Y16_N3 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[3][0]~4 ; LABCELL_X55_Y16_N54 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[4][0]~5 ; LABCELL_X55_Y16_N57 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[5][0]~6 ; LABCELL_X55_Y16_N24 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[6][0]~7 ; LABCELL_X55_Y16_N27 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[7][0]~8 ; LABCELL_X55_Y16_N30 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[8][0]~9 ; LABCELL_X55_Y16_N51 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|registers[9][0]~10 ; LABCELL_X55_Y16_N36 ; 8 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|always0~0 ; MLABCELL_X65_Y34_N21 ; 48 ; Clock enable, Sync. clear ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[21]~1 ; LABCELL_X68_Y34_N33 ; 57 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|counter[8] ; FF_X50_Y34_N56 ; 11 ; Sync. clear ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|i[16]~1 ; MLABCELL_X65_Y34_N6 ; 33 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; FF_X63_Y34_N50 ; 209 ; Clock ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[15]~0 ; MLABCELL_X39_Y36_N48 ; 53 ; Sync. clear ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[15]~1 ; MLABCELL_X65_Y34_N48 ; 46 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|start ; FF_X63_Y34_N47 ; 60 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|y[0]~8 ; MLABCELL_X65_Y34_N24 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|st7920_serial_driver:gpu|y[6]~0 ; LABCELL_X61_Y34_N54 ; 11 ; Sync. clear ; no ; -- ; -- ; -- ;
-; cpu:cpu|vram[181][7]~3 ; LABCELL_X46_Y20_N36 ; 9160 ; Clock enable ; no ; -- ; -- ; -- ;
-; cpu:cpu|vram[890][6]~1184 ; LABCELL_X46_Y20_N54 ; 287 ; Clock enable ; no ; -- ; -- ; -- ;
-; downclocker:dc|clk_out ; FF_X37_Y1_N29 ; 9941 ; Clock ; yes ; Global Clock ; GCLK6 ; -- ;
-; downclocker:dc|counter[9] ; FF_X37_Y1_N59 ; 12 ; Sync. clear ; no ; -- ; -- ; -- ;
-; fpga_clk ; PIN_V11 ; 3 ; Clock ; no ; -- ; -- ; -- ;
-; fpga_clk ; PIN_V11 ; 19 ; Clock ; yes ; Global Clock ; GCLK5 ; -- ;
-+------------------------------------------------------------------------+----------------------+---------+---------------------------+--------+----------------------+------------------+---------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Global & Other Fast Signals ;
-+------------------------+---------------+---------+----------------------+------------------+---------------------------+
-; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
-+------------------------+---------------+---------+----------------------+------------------+---------------------------+
-; downclocker:dc|clk_out ; FF_X37_Y1_N29 ; 9941 ; Global Clock ; GCLK6 ; -- ;
-; fpga_clk ; PIN_V11 ; 19 ; Global Clock ; GCLK5 ; -- ;
-+------------------------+---------------+---------+----------------------+------------------+---------------------------+
-
-
-+-----------------------------------------------------------+
-; Non-Global High Fan-Out Signals ;
-+-------------------------------------------------+---------+
-; Name ; Fan-Out ;
-+-------------------------------------------------+---------+
-; cpu:cpu|vram[181][7]~3 ; 9160 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[0]~DUPLICATE ; 1104 ;
-; cpu:cpu|Decoder11~0 ; 1024 ;
-; cpu:cpu|Decoder11~1 ; 1024 ;
-; cpu:cpu|Decoder11~2 ; 1024 ;
-; cpu:cpu|Decoder11~3 ; 1024 ;
-; cpu:cpu|Add11~9 ; 570 ;
-; cpu:cpu|Add11~13 ; 570 ;
-+-------------------------------------------------+---------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter RAM Summary ;
-+---------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+-------+---------------------------------------+--------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
-; Name ; Type ; Mode ; Clock Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M10K blocks ; MLABs ; MIF ; Location ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs ;
-+---------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+-------+---------------------------------------+--------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
-; memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 4096 ; 8 ; 4096 ; 8 ; yes ; no ; yes ; no ; 32768 ; 4096 ; 8 ; 4096 ; 8 ; 32768 ; 4 ; 0 ; db/chip8.ram0_memory_e9e85012.hdl.mif ; M10K_X49_Y18_N0, M10K_X49_Y19_N0, M10K_X49_Y16_N0, M10K_X49_Y17_N0 ; Old data ; New data ; New data ; Off ; No ; No - Address Too Wide ;
-+---------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+-------+---------------------------------------+--------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
-Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.
-
-
-+-------------------------------------------------------------------------+
-; Routing Usage Summary ;
-+---------------------------------------------+---------------------------+
-; Routing Resource Type ; Usage ;
-+---------------------------------------------+---------------------------+
-; Block interconnects ; 38,143 / 289,320 ( 13 % ) ;
-; C12 interconnects ; 1,796 / 13,420 ( 13 % ) ;
-; C2 interconnects ; 14,170 / 119,108 ( 12 % ) ;
-; C4 interconnects ; 7,967 / 56,300 ( 14 % ) ;
-; DQS bus muxes ; 0 / 25 ( 0 % ) ;
-; DQS-18 I/O buses ; 0 / 25 ( 0 % ) ;
-; DQS-9 I/O buses ; 0 / 25 ( 0 % ) ;
-; Direct links ; 2,035 / 289,320 ( < 1 % ) ;
-; Global clocks ; 2 / 16 ( 13 % ) ;
-; HPS SDRAM PLL inputs ; 0 / 1 ( 0 % ) ;
-; HPS SDRAM PLL outputs ; 0 / 1 ( 0 % ) ;
-; HPS_INTERFACE_BOOT_FROM_FPGA_INPUTs ; 0 / 9 ( 0 % ) ;
-; HPS_INTERFACE_CLOCKS_RESETS_INPUTs ; 0 / 7 ( 0 % ) ;
-; HPS_INTERFACE_CLOCKS_RESETS_OUTPUTs ; 0 / 6 ( 0 % ) ;
-; HPS_INTERFACE_CROSS_TRIGGER_INPUTs ; 0 / 18 ( 0 % ) ;
-; HPS_INTERFACE_CROSS_TRIGGER_OUTPUTs ; 0 / 24 ( 0 % ) ;
-; HPS_INTERFACE_DBG_APB_INPUTs ; 0 / 37 ( 0 % ) ;
-; HPS_INTERFACE_DBG_APB_OUTPUTs ; 0 / 55 ( 0 % ) ;
-; HPS_INTERFACE_DMA_INPUTs ; 0 / 16 ( 0 % ) ;
-; HPS_INTERFACE_DMA_OUTPUTs ; 0 / 8 ( 0 % ) ;
-; HPS_INTERFACE_FPGA2HPS_INPUTs ; 0 / 287 ( 0 % ) ;
-; HPS_INTERFACE_FPGA2HPS_OUTPUTs ; 0 / 154 ( 0 % ) ;
-; HPS_INTERFACE_FPGA2SDRAM_INPUTs ; 0 / 852 ( 0 % ) ;
-; HPS_INTERFACE_FPGA2SDRAM_OUTPUTs ; 0 / 408 ( 0 % ) ;
-; HPS_INTERFACE_HPS2FPGA_INPUTs ; 0 / 165 ( 0 % ) ;
-; HPS_INTERFACE_HPS2FPGA_LIGHT_WEIGHT_INPUTs ; 0 / 67 ( 0 % ) ;
-; HPS_INTERFACE_HPS2FPGA_LIGHT_WEIGHT_OUTPUTs ; 0 / 156 ( 0 % ) ;
-; HPS_INTERFACE_HPS2FPGA_OUTPUTs ; 0 / 282 ( 0 % ) ;
-; HPS_INTERFACE_INTERRUPTS_INPUTs ; 0 / 64 ( 0 % ) ;
-; HPS_INTERFACE_INTERRUPTS_OUTPUTs ; 0 / 42 ( 0 % ) ;
-; HPS_INTERFACE_JTAG_OUTPUTs ; 0 / 5 ( 0 % ) ;
-; HPS_INTERFACE_LOAN_IO_INPUTs ; 0 / 142 ( 0 % ) ;
-; HPS_INTERFACE_LOAN_IO_OUTPUTs ; 0 / 85 ( 0 % ) ;
-; HPS_INTERFACE_MPU_EVENT_STANDBY_INPUTs ; 0 / 1 ( 0 % ) ;
-; HPS_INTERFACE_MPU_EVENT_STANDBY_OUTPUTs ; 0 / 5 ( 0 % ) ;
-; HPS_INTERFACE_MPU_GENERAL_PURPOSE_INPUTs ; 0 / 32 ( 0 % ) ;
-; HPS_INTERFACE_MPU_GENERAL_PURPOSE_OUTPUTs ; 0 / 32 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_CAN_INPUTs ; 0 / 2 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_CAN_OUTPUTs ; 0 / 2 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_EMAC_INPUTs ; 0 / 32 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_EMAC_OUTPUTs ; 0 / 34 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_I2C_INPUTs ; 0 / 8 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_I2C_OUTPUTs ; 0 / 8 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_NAND_INPUTs ; 0 / 12 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_NAND_OUTPUTs ; 0 / 18 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_QSPI_INPUTs ; 0 / 4 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_QSPI_OUTPUTs ; 0 / 13 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_SDMMC_INPUTs ; 0 / 13 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_SDMMC_OUTPUTs ; 0 / 22 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_SPI_MASTER_INPUTs ; 0 / 4 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_SPI_MASTER_OUTPUTs ; 0 / 14 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_SPI_SLAVE_INPUTs ; 0 / 6 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_SPI_SLAVE_OUTPUTs ; 0 / 4 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_UART_INPUTs ; 0 / 10 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_UART_OUTPUTs ; 0 / 10 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_USB_INPUTs ; 0 / 22 ( 0 % ) ;
-; HPS_INTERFACE_PERIPHERAL_USB_OUTPUTs ; 0 / 34 ( 0 % ) ;
-; HPS_INTERFACE_STM_EVENT_INPUTs ; 0 / 28 ( 0 % ) ;
-; HPS_INTERFACE_TEST_INPUTs ; 0 / 610 ( 0 % ) ;
-; HPS_INTERFACE_TEST_OUTPUTs ; 0 / 513 ( 0 % ) ;
-; HPS_INTERFACE_TPIU_TRACE_INPUTs ; 0 / 2 ( 0 % ) ;
-; HPS_INTERFACE_TPIU_TRACE_OUTPUTs ; 0 / 33 ( 0 % ) ;
-; Horizontal periphery clocks ; 0 / 72 ( 0 % ) ;
-; Local interconnects ; 9,017 / 84,580 ( 11 % ) ;
-; Quadrant clocks ; 0 / 66 ( 0 % ) ;
-; R14 interconnects ; 2,518 / 12,676 ( 20 % ) ;
-; R14/C12 interconnect drivers ; 3,774 / 20,720 ( 18 % ) ;
-; R3 interconnects ; 17,751 / 130,992 ( 14 % ) ;
-; R6 interconnects ; 30,710 / 266,960 ( 12 % ) ;
-; Spine clocks ; 12 / 360 ( 3 % ) ;
-; Wire stub REs ; 0 / 15,858 ( 0 % ) ;
-+---------------------------------------------+---------------------------+
-
-
-+------------------------------------------+
-; I/O Rules Summary ;
-+----------------------------------+-------+
-; I/O Rules Statistic ; Total ;
-+----------------------------------+-------+
-; Total I/O Rules ; 28 ;
-; Number of I/O Rules Passed ; 9 ;
-; Number of I/O Rules Failed ; 0 ;
-; Number of I/O Rules Unchecked ; 0 ;
-; Number of I/O Rules Inapplicable ; 19 ;
-+----------------------------------+-------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; I/O Rules Details ;
-+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
-; Status ; ID ; Category ; Rule Description ; Severity ; Information ; Area ; Extra Information ;
-+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
-; Inapplicable ; IO_000002 ; Capacity Checks ; Number of clocks in an I/O bank should not exceed the number of clocks available. ; Critical ; No Global Signal assignments found. ; I/O ; ;
-; Pass ; IO_000001 ; Capacity Checks ; Number of pins in an I/O bank should not exceed the number of locations available. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000003 ; Capacity Checks ; Number of pins in a Vrefgroup should not exceed the number of locations available. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000004 ; Voltage Compatibility Checks ; The I/O bank should support the requested VCCIO. ; Critical ; No IOBANK_VCCIO assignments found. ; I/O ; ;
-; Inapplicable ; IO_000005 ; Voltage Compatibility Checks ; The I/O bank should not have competing VREF values. ; Critical ; No VREF I/O Standard assignments found. ; I/O ; ;
-; Pass ; IO_000006 ; Voltage Compatibility Checks ; The I/O bank should not have competing VCCIO values. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000007 ; Valid Location Checks ; Checks for unavailable locations. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000008 ; Valid Location Checks ; Checks for reserved locations. ; Critical ; No reserved LogicLock region found. ; I/O ; ;
-; Inapplicable ; IO_000047 ; I/O Properties Checks for One I/O ; On Chip Termination and Slew Rate should not be used at the same time. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
-; Inapplicable ; IO_000046 ; I/O Properties Checks for One I/O ; The location should support the requested Slew Rate value. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
-; Inapplicable ; IO_000045 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Slew Rate value. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
-; Inapplicable ; IO_000027 ; I/O Properties Checks for One I/O ; Weak Pull Up and Bus Hold should not be used at the same time. ; Critical ; No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found. ; I/O ; ;
-; Inapplicable ; IO_000026 ; I/O Properties Checks for One I/O ; On Chip Termination and Current Strength should not be used at the same time. ; Critical ; No Current Strength assignments found. ; I/O ; ;
-; Pass ; IO_000024 ; I/O Properties Checks for One I/O ; The I/O direction should support the On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000023 ; I/O Properties Checks for One I/O ; The I/O standard should support the Open Drain value. ; Critical ; No open drain assignments found. ; I/O ; ;
-; Inapplicable ; IO_000022 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Bus Hold value. ; Critical ; No Enable Bus-Hold Circuitry assignments found. ; I/O ; ;
-; Inapplicable ; IO_000021 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Weak Pull Up value. ; Critical ; No Weak Pull-Up Resistor assignments found. ; I/O ; ;
-; Inapplicable ; IO_000020 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested PCI Clamp Diode. ; Critical ; No Clamping Diode assignments found. ; I/O ; ;
-; Pass ; IO_000019 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000018 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Current Strength. ; Critical ; No Current Strength assignments found. ; I/O ; ;
-; Inapplicable ; IO_000015 ; I/O Properties Checks for One I/O ; The location should support the requested PCI Clamp Diode. ; Critical ; No Clamping Diode assignments found. ; I/O ; ;
-; Inapplicable ; IO_000014 ; I/O Properties Checks for One I/O ; The location should support the requested Weak Pull Up value. ; Critical ; No Weak Pull-Up Resistor assignments found. ; I/O ; ;
-; Inapplicable ; IO_000013 ; I/O Properties Checks for One I/O ; The location should support the requested Bus Hold value. ; Critical ; No Enable Bus-Hold Circuitry assignments found. ; I/O ; ;
-; Pass ; IO_000012 ; I/O Properties Checks for One I/O ; The location should support the requested On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000011 ; I/O Properties Checks for One I/O ; The location should support the requested Current Strength. ; Critical ; No Current Strength assignments found. ; I/O ; ;
-; Pass ; IO_000010 ; I/O Properties Checks for One I/O ; The location should support the requested I/O direction. ; Critical ; 0 such failures found. ; I/O ; ;
-; Pass ; IO_000009 ; I/O Properties Checks for One I/O ; The location should support the requested I/O standard. ; Critical ; 0 such failures found. ; I/O ; ;
-; Inapplicable ; IO_000034 ; SI Related Distance Checks ; Single-ended outputs should be 0 LAB row(s) away from a differential I/O. ; High ; No Differential I/O Standard assignments found. ; I/O ; ;
-; ---- ; ---- ; Disclaimer ; OCT rules are checked but not reported. ; None ; ---- ; On Chip Termination ; ;
-+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; I/O Rules Matrix ;
-+--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
-; Pin/Rules ; IO_000002 ; IO_000001 ; IO_000003 ; IO_000004 ; IO_000005 ; IO_000006 ; IO_000007 ; IO_000008 ; IO_000047 ; IO_000046 ; IO_000045 ; IO_000027 ; IO_000026 ; IO_000024 ; IO_000023 ; IO_000022 ; IO_000021 ; IO_000020 ; IO_000019 ; IO_000018 ; IO_000015 ; IO_000014 ; IO_000013 ; IO_000012 ; IO_000011 ; IO_000010 ; IO_000009 ; IO_000034 ;
-+--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
-; Total Pass ; 0 ; 10 ; 10 ; 0 ; 0 ; 10 ; 10 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 10 ; 10 ; 0 ;
-; Total Unchecked ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; Total Inapplicable ; 10 ; 0 ; 0 ; 10 ; 10 ; 0 ; 0 ; 10 ; 10 ; 10 ; 10 ; 10 ; 10 ; 9 ; 10 ; 10 ; 10 ; 10 ; 9 ; 10 ; 10 ; 10 ; 10 ; 9 ; 10 ; 0 ; 0 ; 10 ;
-; Total Fail ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
-; lcd_clk ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; lcd_data ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; led[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; led[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; led[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; led[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; led[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; led[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; rst_in ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-; fpga_clk ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
-+--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
-
-
-+------------------------------------------------------------------------------------------------+
-; Fitter Device Options ;
-+------------------------------------------------------------------+-----------------------------+
-; Option ; Setting ;
-+------------------------------------------------------------------+-----------------------------+
-; Enable user-supplied start-up clock (CLKUSR) ; Off ;
-; Enable device-wide reset (DEV_CLRn) ; Off ;
-; Enable device-wide output enable (DEV_OE) ; Off ;
-; Enable INIT_DONE output ; Off ;
-; Configuration scheme ; Passive Serial ;
-; Enable Error Detection CRC_ERROR pin ; Off ;
-; Enable CvP_CONFDONE pin ; Off ;
-; Enable open drain on CRC_ERROR pin ; On ;
-; Enable open drain on CvP_CONFDONE pin ; On ;
-; Enable open drain on INIT_DONE pin ; On ;
-; Enable open drain on Partial Reconfiguration pins ; Off ;
-; Enable open drain on nCEO pin ; On ;
-; Enable Partial Reconfiguration pins ; Off ;
-; Enable input tri-state on active configuration pins in user mode ; Off ;
-; Enable internal scrubbing ; Off ;
-; Active Serial clock source ; 100 MHz Internal Oscillator ;
-; Device initialization clock source ; Internal Oscillator ;
-; Configuration via Protocol ; Off ;
-; Configuration Voltage Level ; Auto ;
-; Force Configuration Voltage Level ; Off ;
-; Enable nCEO output ; Off ;
-; Data[15..8] ; Unreserved ;
-; Data[7..5] ; Unreserved ;
-; Base pin-out file on sameframe device ; Off ;
-+------------------------------------------------------------------+-----------------------------+
-
-
-+------------------------------------+
-; Operating Settings and Conditions ;
-+---------------------------+--------+
-; Setting ; Value ;
-+---------------------------+--------+
-; Nominal Core Voltage ; 1.10 V ;
-; Low Junction Temperature ; -40 °C ;
-; High Junction Temperature ; 100 °C ;
-+---------------------------+--------+
-
-
-+---------------------------------------------------------------------------------------------------------+
-; Estimated Delay Added for Hold Timing Summary ;
-+------------------------------------------+------------------------------------------+-------------------+
-; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ;
-+------------------------------------------+------------------------------------------+-------------------+
-; downclocker:dc|clk_out ; downclocker:dc|clk_out ; 288.4 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 106.5 ;
-; downclocker:dc|clk_out ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 62.6 ;
-; fpga_clk ; fpga_clk ; 13.8 ;
-+------------------------------------------+------------------------------------------+-------------------+
-Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off.
-This will disable optimization of problematic paths and expose them for further analysis using the Timing Analyzer.
-
-
-+--------------------------------------------------------------------------------------------------------------+
-; Estimated Delay Added for Hold Timing Details ;
-+-----------------------------------------------+------------------------------------------+-------------------+
-; Source Register ; Destination Register ; Delay Added in ns ;
-+-----------------------------------------------+------------------------------------------+-------------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 7.550 ;
-; downclocker:dc|clk_out ; downclocker:dc|clk_out ; 6.220 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[31] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.886 ;
-; cpu:cpu|st7920_serial_driver:gpu|counter[8] ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 2.498 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[31] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.491 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[16] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.460 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[17] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.460 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[18] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.460 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[19] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.460 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[20] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.460 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[15] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.460 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[23] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.383 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[24] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.383 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[25] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.383 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[26] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.383 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[22] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.383 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[21] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.383 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[30] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[29] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[28] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[27] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[26] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[25] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[23] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[22] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[21] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[20] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[19] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[24] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[17] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[16] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[15] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[14] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[13] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[12] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[11] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[10] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[9] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[8] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[7] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[6] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[5] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[4] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[3] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|c[18] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.344 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[26] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.165 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[25] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.165 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[24] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.165 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[19] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.165 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[18] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.165 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[17] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.165 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[30] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.149 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[4] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.149 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[27] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.131 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[15] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.131 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[14] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.131 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[13] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.131 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[12] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.131 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[11] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.131 ;
-; downclocker:dc|counter[9] ; downclocker:dc|clk_out ; 2.114 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[29] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.100 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[28] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.100 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[23] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.100 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[22] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.100 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[21] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.100 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[20] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.100 ;
-; cpu:cpu|st7920_serial_driver:gpu|x[3] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.045 ;
-; cpu:cpu|st7920_serial_driver:gpu|x[2] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.043 ;
-; cpu:cpu|st7920_serial_driver:gpu|x[0] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 2.008 ;
-; cpu:cpu|st7920_serial_driver:gpu|x[4] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.998 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[5] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.976 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[16] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[10] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[9] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[8] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[7] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[6] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[31] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[3] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[2] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[1] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[0] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|line_cnt[5] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.957 ;
-; cpu:cpu|st7920_serial_driver:gpu|x[1] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.937 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[4] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.918 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[3] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.918 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[6] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.918 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[1] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.918 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[0] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.918 ;
-; cpu:cpu|st7920_serial_driver:gpu|y[2] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.918 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[9] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.782 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[12] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.782 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[13] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.782 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[14] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.782 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[11] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.782 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[10] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.782 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[1] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.770 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[2] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.770 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[3] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.770 ;
-; cpu:cpu|st7920_serial_driver:gpu|i[4] ; cpu:cpu|st7920_serial_driver:gpu|x[3] ; 1.770 ;
-+-----------------------------------------------+------------------------------------------+-------------------+
-Note: This table only shows the top 100 path(s) that have the largest delay added for hold.
-
-
-+-----------------+
-; Fitter Messages ;
-+-----------------+
-Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
-Info (20030): Parallel compilation is enabled and will use 12 of the 12 processors detected
-Info (119006): Selected device 5CSEBA6U23I7 for design "chip8"
-Info (21077): Low junction temperature is -40 degrees C
-Info (21077): High junction temperature is 100 degrees C
-Warning (18550): Found RAM instances implemented as ROM because the write logic is disabled. One instance is listed below as an example.
- Info (119043): Atom "memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated|ram_block1a4" is instantiated as RAM, but it is actually implemented as ROM function because the write logic is always disabled
-Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
-Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature.
-Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
-Info (176045): Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.
-Info (184020): Starting Fitter periphery placement operations
-Info (11191): Automatically promoted 2 clocks (2 global)
- Info (11162): downclocker:dc|clk_out~CLKENA0 with 8651 fanout uses global clock CLKCTRL_G2
- Info (12525): This signal is driven by core routing -- it may be moved during placement to reduce routing delays
- Info (11162): fpga_clk~inputCLKENA0 with 19 fanout uses global clock CLKCTRL_G5
-Info (184021): Fitter periphery placement operations ending: elapsed time is 00:00:00
-Info (176233): Starting register packing
-Critical Warning (332012): Synopsys Design Constraints File file not found: 'chip8.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
-Info (332144): No user constrained base clocks found in the design
-Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty"
-Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
-Info (332130): Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time.
-Info (176235): Finished register packing
- Extra Info (176219): No registers were packed into other blocks
-Warning (15705): Ignored locations or region assignments to the following nodes
- Warning (15706): Node "lcd_cs" is assigned to location or region, but does not exist in design
-Info (11798): Fitter preparation operations ending: elapsed time is 00:00:10
-Info (170189): Fitter placement preparation operations beginning
-Info (14951): The Fitter is using Advanced Physical Optimization.
-Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:39
-Info (170191): Fitter placement operations beginning
-Info (170137): Fitter placement was successful
-Info (170192): Fitter placement operations ending: elapsed time is 00:00:19
-Info (170193): Fitter routing operations beginning
-Info (170195): Router estimated average interconnect usage is 12% of the available device resources
- Info (170196): Router estimated peak interconnect usage is 58% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22
-Info (170199): The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time.
- Info (170201): Optimizations that may affect the design's routability were skipped
-Info (170194): Fitter routing operations ending: elapsed time is 00:02:05
-Info (11888): Total time spent on timing analysis during the Fitter is 36.34 seconds.
-Info (334003): Started post-fitting delay annotation
-Info (334004): Delay annotation completed successfully
-Info (334003): Started post-fitting delay annotation
-Info (334004): Delay annotation completed successfully
-Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:23
-Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
-Info (144001): Generated suppressed messages file /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.fit.smsg
-Info: Quartus Prime Fitter was successful. 0 errors, 8 warnings
- Info: Peak virtual memory: 2824 megabytes
- Info: Processing ended: Mon Apr 8 08:52:18 2024
- Info: Elapsed time: 00:04:30
- Info: Total CPU time (on all processors): 00:11:39
-
-
-+----------------------------+
-; Fitter Suppressed Messages ;
-+----------------------------+
-The suppressed messages can be found in /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.fit.smsg.
-
-
diff --git a/output_files/chip8.fit.smsg b/output_files/chip8.fit.smsg
deleted file mode 100644
index 9302919..0000000
--- a/output_files/chip8.fit.smsg
+++ /dev/null
@@ -1,6 +0,0 @@
-Extra Info (176236): Started Fast Input/Output/OE register processing
-Extra Info (176237): Finished Fast Input/Output/OE register processing
-Extra Info (176238): Start inferring scan chains for DSP blocks
-Extra Info (176239): Inferring scan chains for DSP blocks is complete
-Extra Info (176246): Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density
-Extra Info (176247): Finished moving registers into I/O cells, DSP blocks, and RAM blocks
diff --git a/output_files/chip8.fit.summary b/output_files/chip8.fit.summary
deleted file mode 100644
index b749e3d..0000000
--- a/output_files/chip8.fit.summary
+++ /dev/null
@@ -1,20 +0,0 @@
-Fitter Status : Successful - Mon Apr 8 08:52:14 2024
-Quartus Prime Version : 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-Revision Name : chip8
-Top-level Entity Name : chip8
-Family : Cyclone V
-Device : 5CSEBA6U23I7
-Timing Models : Final
-Logic utilization (in ALMs) : 10,693 / 41,910 ( 26 % )
-Total registers : 10165
-Total pins : 10 / 314 ( 3 % )
-Total virtual pins : 0
-Total block memory bits : 32,768 / 5,662,720 ( < 1 % )
-Total RAM Blocks : 4 / 553 ( < 1 % )
-Total DSP Blocks : 0 / 112 ( 0 % )
-Total HSSI RX PCSs : 0
-Total HSSI PMA RX Deserializers : 0
-Total HSSI TX PCSs : 0
-Total HSSI PMA TX Serializers : 0
-Total PLLs : 0 / 6 ( 0 % )
-Total DLLs : 0 / 4 ( 0 % )
diff --git a/output_files/chip8.flow.rpt b/output_files/chip8.flow.rpt
deleted file mode 100644
index afc2408..0000000
--- a/output_files/chip8.flow.rpt
+++ /dev/null
@@ -1,129 +0,0 @@
-Flow report for chip8
-Mon Apr 8 08:52:45 2024
-Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Flow Summary
- 3. Flow Settings
- 4. Flow Non-Default Global Settings
- 5. Flow Elapsed Time
- 6. Flow OS Summary
- 7. Flow Log
- 8. Flow Messages
- 9. Flow Suppressed Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 2023 Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and any partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Intel Program License
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details, at
-https://fpgasoftware.intel.com/eula.
-
-
-
-+----------------------------------------------------------------------------------+
-; Flow Summary ;
-+---------------------------------+------------------------------------------------+
-; Flow Status ; Successful - Mon Apr 8 08:52:25 2024 ;
-; Quartus Prime Version ; 23.1std.0 Build 991 11/28/2023 SC Lite Edition ;
-; Revision Name ; chip8 ;
-; Top-level Entity Name ; chip8 ;
-; Family ; Cyclone V ;
-; Device ; 5CSEBA6U23I7 ;
-; Timing Models ; Final ;
-; Logic utilization (in ALMs) ; 10,693 / 41,910 ( 26 % ) ;
-; Total registers ; 10165 ;
-; Total pins ; 10 / 314 ( 3 % ) ;
-; Total virtual pins ; 0 ;
-; Total block memory bits ; 32,768 / 5,662,720 ( < 1 % ) ;
-; Total DSP Blocks ; 0 / 112 ( 0 % ) ;
-; Total HSSI RX PCSs ; 0 ;
-; Total HSSI PMA RX Deserializers ; 0 ;
-; Total HSSI TX PCSs ; 0 ;
-; Total HSSI PMA TX Serializers ; 0 ;
-; Total PLLs ; 0 / 6 ( 0 % ) ;
-; Total DLLs ; 0 / 4 ( 0 % ) ;
-+---------------------------------+------------------------------------------------+
-
-
-+-----------------------------------------+
-; Flow Settings ;
-+-------------------+---------------------+
-; Option ; Setting ;
-+-------------------+---------------------+
-; Start date & time ; 04/08/2024 08:46:51 ;
-; Main task ; Compilation ;
-; Revision Name ; chip8 ;
-+-------------------+---------------------+
-
-
-+-----------------------------------------------------------------------------------------------------------------------------+
-; Flow Non-Default Global Settings ;
-+-------------------------------------+----------------------------------------+---------------+-------------+----------------+
-; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
-+-------------------------------------+----------------------------------------+---------------+-------------+----------------+
-; COMPILER_SIGNATURE_ID ; 346662554261.171258401122441 ; -- ; -- ; -- ;
-; EDA_OUTPUT_DATA_FORMAT ; None ; -- ; -- ; eda_simulation ;
-; MAX_CORE_JUNCTION_TEMP ; 100 ; -- ; -- ; -- ;
-; MIN_CORE_JUNCTION_TEMP ; -40 ; -- ; -- ; -- ;
-; PARTITION_COLOR ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
-; PARTITION_FITTER_PRESERVATION_LEVEL ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
-; PARTITION_NETLIST_TYPE ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
-; POWER_BOARD_THERMAL_MODEL ; None (CONSERVATIVE) ; -- ; -- ; -- ;
-; POWER_PRESET_COOLING_SOLUTION ; 23 MM HEAT SINK WITH 200 LFPM AIRFLOW ; -- ; -- ; -- ;
-; PROJECT_OUTPUT_DIRECTORY ; output_files ; -- ; -- ; -- ;
-+-------------------------------------+----------------------------------------+---------------+-------------+----------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------+
-; Flow Elapsed Time ;
-+----------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
-+----------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis ; 00:00:54 ; 3.7 ; 775 MB ; 00:01:32 ;
-; Fitter ; 00:04:26 ; 1.6 ; 2824 MB ; 00:11:35 ;
-; Assembler ; 00:00:06 ; 1.0 ; 628 MB ; 00:00:06 ;
-; Timing Analyzer ; 00:00:19 ; 5.5 ; 1312 MB ; 00:01:25 ;
-; Total ; 00:05:45 ; -- ; -- ; 00:14:38 ;
-+----------------------+--------------+-------------------------+---------------------+------------------------------------+
-
-
-+--------------------------------------------------------------------------------------------------+
-; Flow OS Summary ;
-+----------------------+------------------+-------------------+-------------------+----------------+
-; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
-+----------------------+------------------+-------------------+-------------------+----------------+
-; Analysis & Synthesis ; broad-street ; EndeavourOS Linux ; EndeavourOS Linux ; x86_64 ;
-; Fitter ; broad-street ; EndeavourOS Linux ; EndeavourOS Linux ; x86_64 ;
-; Assembler ; broad-street ; EndeavourOS Linux ; EndeavourOS Linux ; x86_64 ;
-; Timing Analyzer ; broad-street ; EndeavourOS Linux ; EndeavourOS Linux ; x86_64 ;
-+----------------------+------------------+-------------------+-------------------+----------------+
-
-
-------------
-; Flow Log ;
-------------
-quartus_map --read_settings_files=on --write_settings_files=off chip8 -c chip8
-quartus_fit --read_settings_files=off --write_settings_files=off chip8 -c chip8
-quartus_asm --read_settings_files=off --write_settings_files=off chip8 -c chip8
-quartus_sta chip8 -c chip8
-
-
-
diff --git a/output_files/chip8.jdi b/output_files/chip8.jdi
deleted file mode 100644
index afc91b2..0000000
--- a/output_files/chip8.jdi
+++ /dev/null
@@ -1,8 +0,0 @@
-
-
-
-
-
-
-
-
diff --git a/output_files/chip8.map.rpt b/output_files/chip8.map.rpt
deleted file mode 100644
index 5675988..0000000
--- a/output_files/chip8.map.rpt
+++ /dev/null
@@ -1,695 +0,0 @@
-Analysis & Synthesis report for chip8
-Mon Apr 8 08:47:47 2024
-Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Analysis & Synthesis Summary
- 3. Analysis & Synthesis Settings
- 4. Parallel Compilation
- 5. Analysis & Synthesis Source Files Read
- 6. Analysis & Synthesis Resource Usage Summary
- 7. Analysis & Synthesis Resource Utilization by Entity
- 8. Analysis & Synthesis RAM Summary
- 9. Registers Removed During Synthesis
- 10. Removed Registers Triggering Further Register Optimizations
- 11. General Register Statistics
- 12. Inverted Register Statistics
- 13. Registers Packed Into Inferred Megafunctions
- 14. Multiplexer Restructuring Statistics (Restructuring Performed)
- 15. Source assignments for memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated
- 16. Parameter Settings for User Entity Instance: downclocker:dc
- 17. Parameter Settings for User Entity Instance: memory:mem
- 18. Parameter Settings for Inferred Entity Instance: memory:mem|altsyncram:mem_rtl_0
- 19. altsyncram Parameter Settings by Entity Instance
- 20. Port Connectivity Checks: "cpu:cpu|st7920_serial_driver:gpu"
- 21. Port Connectivity Checks: "cpu:cpu"
- 22. Post-Synthesis Netlist Statistics for Top Partition
- 23. Elapsed Time Per Partition
- 24. Analysis & Synthesis Messages
- 25. Analysis & Synthesis Suppressed Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 2023 Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and any partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Intel Program License
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details, at
-https://fpgasoftware.intel.com/eula.
-
-
-
-+----------------------------------------------------------------------------------+
-; Analysis & Synthesis Summary ;
-+---------------------------------+------------------------------------------------+
-; Analysis & Synthesis Status ; Successful - Mon Apr 8 08:47:47 2024 ;
-; Quartus Prime Version ; 23.1std.0 Build 991 11/28/2023 SC Lite Edition ;
-; Revision Name ; chip8 ;
-; Top-level Entity Name ; chip8 ;
-; Family ; Cyclone V ;
-; Logic utilization (in ALMs) ; N/A ;
-; Total registers ; 8836 ;
-; Total pins ; 10 ;
-; Total virtual pins ; 0 ;
-; Total block memory bits ; 32,768 ;
-; Total DSP Blocks ; 0 ;
-; Total HSSI RX PCSs ; 0 ;
-; Total HSSI PMA RX Deserializers ; 0 ;
-; Total HSSI TX PCSs ; 0 ;
-; Total HSSI PMA TX Serializers ; 0 ;
-; Total PLLs ; 0 ;
-; Total DLLs ; 0 ;
-+---------------------------------+------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis Settings ;
-+---------------------------------------------------------------------------------+--------------------+--------------------+
-; Option ; Setting ; Default Value ;
-+---------------------------------------------------------------------------------+--------------------+--------------------+
-; Device ; 5CSEBA6U23I7 ; ;
-; Top-level entity name ; chip8 ; chip8 ;
-; Family name ; Cyclone V ; Cyclone V ;
-; Use smart compilation ; Off ; Off ;
-; Enable parallel Assembler and Timing Analyzer during compilation ; On ; On ;
-; Enable compact report table ; Off ; Off ;
-; Restructure Multiplexers ; Auto ; Auto ;
-; MLAB Add Timing Constraints For Mixed-Port Feed-Through Mode Setting Don't Care ; Off ; Off ;
-; Create Debugging Nodes for IP Cores ; Off ; Off ;
-; Preserve fewer node names ; On ; On ;
-; Intel FPGA IP Evaluation Mode ; Enable ; Enable ;
-; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
-; VHDL Version ; VHDL_1993 ; VHDL_1993 ;
-; State Machine Processing ; Auto ; Auto ;
-; Safe State Machine ; Off ; Off ;
-; Extract Verilog State Machines ; On ; On ;
-; Extract VHDL State Machines ; On ; On ;
-; Ignore Verilog initial constructs ; Off ; Off ;
-; Iteration limit for constant Verilog loops ; 5000 ; 5000 ;
-; Iteration limit for non-constant Verilog loops ; 250 ; 250 ;
-; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
-; Infer RAMs from Raw Logic ; On ; On ;
-; Parallel Synthesis ; On ; On ;
-; DSP Block Balancing ; Auto ; Auto ;
-; NOT Gate Push-Back ; On ; On ;
-; Power-Up Don't Care ; On ; On ;
-; Remove Redundant Logic Cells ; Off ; Off ;
-; Remove Duplicate Registers ; On ; On ;
-; Ignore CARRY Buffers ; Off ; Off ;
-; Ignore CASCADE Buffers ; Off ; Off ;
-; Ignore GLOBAL Buffers ; Off ; Off ;
-; Ignore ROW GLOBAL Buffers ; Off ; Off ;
-; Ignore LCELL Buffers ; Off ; Off ;
-; Ignore SOFT Buffers ; On ; On ;
-; Limit AHDL Integers to 32 Bits ; Off ; Off ;
-; Optimization Technique ; Balanced ; Balanced ;
-; Carry Chain Length ; 70 ; 70 ;
-; Auto Carry Chains ; On ; On ;
-; Auto Open-Drain Pins ; On ; On ;
-; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
-; Auto ROM Replacement ; On ; On ;
-; Auto RAM Replacement ; On ; On ;
-; Auto DSP Block Replacement ; On ; On ;
-; Auto Shift Register Replacement ; Auto ; Auto ;
-; Allow Shift Register Merging across Hierarchies ; Auto ; Auto ;
-; Auto Clock Enable Replacement ; On ; On ;
-; Strict RAM Replacement ; Off ; Off ;
-; Allow Synchronous Control Signals ; On ; On ;
-; Force Use of Synchronous Clear Signals ; Off ; Off ;
-; Auto Resource Sharing ; Off ; Off ;
-; Allow Any RAM Size For Recognition ; Off ; Off ;
-; Allow Any ROM Size For Recognition ; Off ; Off ;
-; Allow Any Shift Register Size For Recognition ; Off ; Off ;
-; Use LogicLock Constraints during Resource Balancing ; On ; On ;
-; Ignore translate_off and synthesis_off directives ; Off ; Off ;
-; Timing-Driven Synthesis ; On ; On ;
-; Report Parameter Settings ; On ; On ;
-; Report Source Assignments ; On ; On ;
-; Report Connectivity Checks ; On ; On ;
-; Ignore Maximum Fan-Out Assignments ; Off ; Off ;
-; Synchronization Register Chain Length ; 3 ; 3 ;
-; Power Optimization During Synthesis ; Normal compilation ; Normal compilation ;
-; HDL message level ; Level2 ; Level2 ;
-; Suppress Register Optimization Related Messages ; Off ; Off ;
-; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ;
-; Number of Swept Nodes Reported in Synthesis Report ; 5000 ; 5000 ;
-; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ;
-; Clock MUX Protection ; On ; On ;
-; Auto Gated Clock Conversion ; Off ; Off ;
-; Block Design Naming ; Auto ; Auto ;
-; SDC constraint protection ; Off ; Off ;
-; Synthesis Effort ; Auto ; Auto ;
-; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ;
-; Pre-Mapping Resynthesis Optimization ; Off ; Off ;
-; Analysis & Synthesis Message Level ; Medium ; Medium ;
-; Disable Register Merging Across Hierarchies ; Auto ; Auto ;
-; Resource Aware Inference For Block RAM ; On ; On ;
-; Automatic Parallel Synthesis ; On ; On ;
-; Partial Reconfiguration Bitstream ID ; Off ; Off ;
-+---------------------------------------------------------------------------------+--------------------+--------------------+
-
-
-+------------------------------------------+
-; Parallel Compilation ;
-+----------------------------+-------------+
-; Processors ; Number ;
-+----------------------------+-------------+
-; Number detected on machine ; 12 ;
-; Maximum allowed ; 12 ;
-; ; ;
-; Average used ; 3.67 ;
-; Maximum used ; 12 ;
-; ; ;
-; Usage by Processor ; % Time Used ;
-; Processor 1 ; 100.0% ;
-; Processor 2 ; 40.2% ;
-; Processor 3 ; 40.2% ;
-; Processor 4 ; 35.9% ;
-; Processor 5 ; 35.8% ;
-; Processor 6 ; 35.8% ;
-; Processor 7 ; 25.7% ;
-; Processor 8 ; 25.7% ;
-; Processor 9 ; 6.9% ;
-; Processor 10 ; 6.9% ;
-; Processor 11 ; 6.9% ;
-; Processor 12 ; 6.8% ;
-+----------------------------+-------------+
-
-
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis Source Files Read ;
-+---------------------------------------+-----------------+-------------------------------------------------------+----------------------------------------------------------------------------------------------+---------+
-; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ;
-+---------------------------------------+-----------------+-------------------------------------------------------+----------------------------------------------------------------------------------------------+---------+
-; the-bomb/st7920_serial_driver.sv ; yes ; User SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv ; ;
-; chip8.sv ; yes ; User SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv ; ;
-; cpu.sv ; yes ; User SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv ; ;
-; alu.sv ; yes ; User SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/alu.sv ; ;
-; aastructs.sv ; yes ; User SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/aastructs.sv ; ;
-; downclocker.sv ; yes ; User SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/downclocker.sv ; ;
-; memory.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/nickorlow/programming/school/warminster/yayacemu/memory.sv ; ;
-; rom.bin ; yes ; Auto-Found Unspecified File ; /home/nickorlow/programming/school/warminster/yayacemu/rom.bin ; ;
-; fontset.bin ; yes ; Auto-Found Unspecified File ; /home/nickorlow/programming/school/warminster/yayacemu/fontset.bin ; ;
-; altsyncram.tdf ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/altsyncram.tdf ; ;
-; stratix_ram_block.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/stratix_ram_block.inc ; ;
-; lpm_mux.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/lpm_mux.inc ; ;
-; lpm_decode.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/lpm_decode.inc ; ;
-; aglobal231.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/aglobal231.inc ; ;
-; a_rdenreg.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/a_rdenreg.inc ; ;
-; altrom.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/altrom.inc ; ;
-; altram.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/altram.inc ; ;
-; altdpram.inc ; yes ; Megafunction ; /opt/intelFPGA/23.1/quartus/libraries/megafunctions/altdpram.inc ; ;
-; db/altsyncram_dsq1.tdf ; yes ; Auto-Generated Megafunction ; /home/nickorlow/programming/school/warminster/yayacemu/db/altsyncram_dsq1.tdf ; ;
-; db/chip8.ram0_memory_e9e85012.hdl.mif ; yes ; Auto-Generated Auto-Found Memory Initialization File ; /home/nickorlow/programming/school/warminster/yayacemu/db/chip8.ram0_memory_e9e85012.hdl.mif ; ;
-+---------------------------------------+-----------------+-------------------------------------------------------+----------------------------------------------------------------------------------------------+---------+
-
-
-+----------------------------------------------------------------------+
-; Analysis & Synthesis Resource Usage Summary ;
-+---------------------------------------------+------------------------+
-; Resource ; Usage ;
-+---------------------------------------------+------------------------+
-; Estimate of Logic utilization (ALMs needed) ; 10507 ;
-; ; ;
-; Combinational ALUT usage for logic ; 17207 ;
-; -- 7 input functions ; 56 ;
-; -- 6 input functions ; 3707 ;
-; -- 5 input functions ; 5934 ;
-; -- 4 input functions ; 2008 ;
-; -- <=3 input functions ; 5502 ;
-; ; ;
-; Dedicated logic registers ; 8836 ;
-; ; ;
-; I/O pins ; 10 ;
-; Total MLAB memory bits ; 0 ;
-; Total block memory bits ; 32768 ;
-; ; ;
-; Total DSP Blocks ; 0 ;
-; ; ;
-; Maximum fan-out node ; downclocker:dc|clk_out ;
-; Maximum fan-out ; 8652 ;
-; Total fan-out ; 103021 ;
-; Average fan-out ; 3.95 ;
-+---------------------------------------------+------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis Resource Utilization by Entity ;
-+-------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------+----------------------+--------------+
-; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ;
-+-------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------+----------------------+--------------+
-; |chip8 ; 17207 (1) ; 8836 (0) ; 32768 ; 0 ; 10 ; 0 ; |chip8 ; chip8 ; work ;
-; |cpu:cpu| ; 17195 (11517) ; 8825 (8594) ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu ; cpu ; work ;
-; |alu:alu| ; 47 (47) ; 49 (49) ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu|alu:alu ; alu ; work ;
-; |st7920_serial_driver:gpu| ; 5631 (5585) ; 182 (129) ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu|st7920_serial_driver:gpu ; st7920_serial_driver ; work ;
-; |commander:com| ; 46 (46) ; 53 (53) ; 0 ; 0 ; 0 ; 0 ; |chip8|cpu:cpu|st7920_serial_driver:gpu|commander:com ; commander ; work ;
-; |downclocker:dc| ; 11 (11) ; 11 (11) ; 0 ; 0 ; 0 ; 0 ; |chip8|downclocker:dc ; downclocker ; work ;
-; |memory:mem| ; 0 (0) ; 0 (0) ; 32768 ; 0 ; 0 ; 0 ; |chip8|memory:mem ; memory ; work ;
-; |altsyncram:mem_rtl_0| ; 0 (0) ; 0 (0) ; 32768 ; 0 ; 0 ; 0 ; |chip8|memory:mem|altsyncram:mem_rtl_0 ; altsyncram ; work ;
-; |altsyncram_dsq1:auto_generated| ; 0 (0) ; 0 (0) ; 32768 ; 0 ; 0 ; 0 ; |chip8|memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated ; altsyncram_dsq1 ; work ;
-+-------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------+----------------------+--------------+
-Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
-
-
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Analysis & Synthesis RAM Summary ;
-+---------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+---------------------------------------+
-; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
-+---------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+---------------------------------------+
-; memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 4096 ; 8 ; 4096 ; 8 ; 32768 ; db/chip8.ram0_memory_e9e85012.hdl.mif ;
-+---------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+---------------------------------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------+
-; Registers Removed During Synthesis ;
-+------------------------------------------------------------------------+---------------------------------------------+
-; Register name ; Reason for Removal ;
-+------------------------------------------------------------------------+---------------------------------------------+
-; cpu:cpu|st7920_serial_driver:gpu|d_flip_flop:dff|data_out ; Stuck at VCC due to stuck port data_in ;
-; cpu:cpu|wr_memory_address[0..11] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|compute_of ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|instr.src_sprite_sz[4] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|instr.src_sprite_y[5..7] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|instr.src_sprite_x[6,7] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|instr.dst[1..31] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|instr.op[3..31] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|alu:alu|overflow ; Lost fanout ;
-; cpu:cpu|alu:alu|result_int[8] ; Lost fanout ;
-; cpu:cpu|wr_memory_data[0..7] ; Stuck at GND due to stuck port clock_enable ;
-; cpu:cpu|state[4..9,11..31] ; Merged with cpu:cpu|state[10] ;
-; cpu:cpu|instr.src[3..31] ; Merged with cpu:cpu|instr.src[0] ;
-; cpu:cpu|draw_state.stage[1..9,11..31] ; Merged with cpu:cpu|draw_state.stage[10] ;
-; cpu:cpu|st7920_serial_driver:gpu|command[8] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[0..3] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|wr_go ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|draw_state.stage[10] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|state[10] ; Stuck at GND due to stuck port data_in ;
-; cpu:cpu|program_counter[12..15] ; Lost fanout ;
-; cpu:cpu|instr.src[0] ; Stuck at GND due to stuck port data_in ;
-; Total Number of Removed Registers = 189 ; ;
-+------------------------------------------------------------------------+---------------------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Removed Registers Triggering Further Register Optimizations ;
-+---------------------------------------------------------------------+---------------------------+----------------------------------------------------------------------------------+
-; Register name ; Reason for Removal ; Registers Removed due to This Register ;
-+---------------------------------------------------------------------+---------------------------+----------------------------------------------------------------------------------+
-; cpu:cpu|instr.dst[1] ; Stuck at GND ; cpu:cpu|wr_memory_data[7], cpu:cpu|wr_memory_data[6], cpu:cpu|wr_memory_data[5], ;
-; ; due to stuck port data_in ; cpu:cpu|wr_memory_data[4], cpu:cpu|wr_memory_data[3], cpu:cpu|wr_memory_data[2], ;
-; ; ; cpu:cpu|wr_memory_data[1], cpu:cpu|wr_memory_data[0], cpu:cpu|wr_go ;
-; cpu:cpu|instr.src_sprite_sz[4] ; Stuck at GND ; cpu:cpu|instr.src_sprite_y[5], cpu:cpu|instr.src_sprite_y[6], ;
-; ; due to stuck port data_in ; cpu:cpu|instr.src_sprite_y[7], cpu:cpu|instr.src_sprite_x[6], ;
-; ; ; cpu:cpu|instr.src_sprite_x[7], cpu:cpu|draw_state.stage[10], cpu:cpu|state[10] ;
-; cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[0] ; Stuck at GND ; cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[1], ;
-; ; due to stuck port data_in ; cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[2], ;
-; ; ; cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[3] ;
-; cpu:cpu|compute_of ; Stuck at GND ; cpu:cpu|alu:alu|overflow, cpu:cpu|alu:alu|result_int[8] ;
-; ; due to stuck port data_in ; ;
-; cpu:cpu|st7920_serial_driver:gpu|d_flip_flop:dff|data_out ; Stuck at VCC ; cpu:cpu|st7920_serial_driver:gpu|command[8] ;
-; ; due to stuck port data_in ; ;
-; cpu:cpu|instr.op[3] ; Stuck at GND ; cpu:cpu|instr.src[0] ;
-; ; due to stuck port data_in ; ;
-+---------------------------------------------------------------------+---------------------------+----------------------------------------------------------------------------------+
-
-
-+------------------------------------------------------+
-; General Register Statistics ;
-+----------------------------------------------+-------+
-; Statistic ; Value ;
-+----------------------------------------------+-------+
-; Total registers ; 8836 ;
-; Number of registers using Synchronous Clear ; 169 ;
-; Number of registers using Synchronous Load ; 21 ;
-; Number of registers using Asynchronous Clear ; 0 ;
-; Number of registers using Asynchronous Load ; 0 ;
-; Number of registers using Clock Enable ; 8673 ;
-; Number of registers using Preset ; 0 ;
-+----------------------------------------------+-------+
-
-
-+--------------------------------------------------+
-; Inverted Register Statistics ;
-+----------------------------------------+---------+
-; Inverted Register ; Fan out ;
-+----------------------------------------+---------+
-; cpu:cpu|alu_rst ; 34 ;
-; cpu:cpu|program_counter[9] ; 5 ;
-; Total number of inverted registers = 2 ; ;
-+----------------------------------------+---------+
-
-
-+---------------------------------------------------------+
-; Registers Packed Into Inferred Megafunctions ;
-+---------------------------+----------------------+------+
-; Register Name ; Megafunction ; Type ;
-+---------------------------+----------------------+------+
-; memory:mem|data_out[0..7] ; memory:mem|mem_rtl_0 ; RAM ;
-+---------------------------+----------------------+------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Multiplexer Restructuring Statistics (Restructuring Performed) ;
-+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------+
-; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
-+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------+
-; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[21] ;
-; 3:1 ; 8 bits ; 16 LEs ; 0 LEs ; 16 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|commander:com|full_command_bits[5] ;
-; 3:1 ; 38 bits ; 76 LEs ; 0 LEs ; 76 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|commander:com|i[15] ;
-; 4:1 ; 32 bits ; 64 LEs ; 0 LEs ; 64 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|line_cnt[15] ;
-; 4:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|x[4] ;
-; 4:1 ; 7 bits ; 14 LEs ; 7 LEs ; 7 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|y[6] ;
-; 5:1 ; 32 bits ; 96 LEs ; 32 LEs ; 64 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|i[16] ;
-; 1029:1 ; 2 bits ; 1372 LEs ; 1368 LEs ; 4 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|command[6] ;
-; 1059:1 ; 5 bits ; 3530 LEs ; 3445 LEs ; 85 LEs ; Yes ; |chip8|cpu:cpu|st7920_serial_driver:gpu|command[5] ;
-; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |chip8|cpu:cpu|draw_state.r[0] ;
-; 4:1 ; 5 bits ; 10 LEs ; 10 LEs ; 0 LEs ; Yes ; |chip8|cpu:cpu|draw_state.c[3] ;
-; 16:1 ; 8 bits ; 80 LEs ; 80 LEs ; 0 LEs ; Yes ; |chip8|cpu:cpu|instr.alu_i.operand_b[0] ;
-; 16:1 ; 5 bits ; 50 LEs ; 50 LEs ; 0 LEs ; Yes ; |chip8|cpu:cpu|instr.src_sprite_y[0] ;
-; 16:1 ; 6 bits ; 60 LEs ; 60 LEs ; 0 LEs ; Yes ; |chip8|cpu:cpu|instr.src_sprite_x[1] ;
-; 4:1 ; 12 bits ; 24 LEs ; 0 LEs ; 24 LEs ; Yes ; |chip8|cpu:cpu|rd_memory_address[8] ;
-; 5:1 ; 5 bits ; 15 LEs ; 5 LEs ; 10 LEs ; Yes ; |chip8|cpu:cpu|instr.src_sprite_idx[3] ;
-; 5:1 ; 2 bits ; 6 LEs ; 2 LEs ; 4 LEs ; Yes ; |chip8|cpu:cpu|draw_state.stage[0] ;
-; 7:1 ; 8 bits ; 32 LEs ; 8 LEs ; 24 LEs ; Yes ; |chip8|cpu:cpu|registers[15][5] ;
-; 8:1 ; 6 bits ; 30 LEs ; 6 LEs ; 24 LEs ; Yes ; |chip8|cpu:cpu|instr.src_byte[11] ;
-; 9:1 ; 4 bits ; 24 LEs ; 8 LEs ; 16 LEs ; Yes ; |chip8|cpu:cpu|program_counter[15] ;
-; 9:1 ; 8 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |chip8|cpu:cpu|instr.src_byte[1] ;
-; 12:1 ; 10 bits ; 80 LEs ; 20 LEs ; 60 LEs ; Yes ; |chip8|cpu:cpu|program_counter[10] ;
-+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------+
-
-
-+---------------------------------------------------------------------------------------+
-; Source assignments for memory:mem|altsyncram:mem_rtl_0|altsyncram_dsq1:auto_generated ;
-+---------------------------------+--------------------+------+-------------------------+
-; Assignment ; Value ; From ; To ;
-+---------------------------------+--------------------+------+-------------------------+
-; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
-+---------------------------------+--------------------+------+-------------------------+
-
-
-+-------------------------------------------------------------+
-; Parameter Settings for User Entity Instance: downclocker:dc ;
-+----------------+-------+------------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+------------------------------------+
-; DC_BITS ; 10 ; Signed Integer ;
-+----------------+-------+------------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------+
-; Parameter Settings for User Entity Instance: memory:mem ;
-+----------------+-------+--------------------------------+
-; Parameter Name ; Value ; Type ;
-+----------------+-------+--------------------------------+
-; RAM_SIZE_BYTES ; 4096 ; Signed Integer ;
-+----------------+-------+--------------------------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+---------------------------------------------------------------------------------------------+
-; Parameter Settings for Inferred Entity Instance: memory:mem|altsyncram:mem_rtl_0 ;
-+------------------------------------+---------------------------------------+----------------+
-; Parameter Name ; Value ; Type ;
-+------------------------------------+---------------------------------------+----------------+
-; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
-; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
-; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
-; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
-; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
-; WIDTH_BYTEENA ; 1 ; Untyped ;
-; OPERATION_MODE ; DUAL_PORT ; Untyped ;
-; WIDTH_A ; 8 ; Untyped ;
-; WIDTHAD_A ; 12 ; Untyped ;
-; NUMWORDS_A ; 4096 ; Untyped ;
-; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
-; ADDRESS_ACLR_A ; NONE ; Untyped ;
-; OUTDATA_ACLR_A ; NONE ; Untyped ;
-; WRCONTROL_ACLR_A ; NONE ; Untyped ;
-; INDATA_ACLR_A ; NONE ; Untyped ;
-; BYTEENA_ACLR_A ; NONE ; Untyped ;
-; WIDTH_B ; 8 ; Untyped ;
-; WIDTHAD_B ; 12 ; Untyped ;
-; NUMWORDS_B ; 4096 ; Untyped ;
-; INDATA_REG_B ; CLOCK1 ; Untyped ;
-; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
-; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
-; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
-; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
-; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
-; INDATA_ACLR_B ; NONE ; Untyped ;
-; WRCONTROL_ACLR_B ; NONE ; Untyped ;
-; ADDRESS_ACLR_B ; NONE ; Untyped ;
-; OUTDATA_ACLR_B ; NONE ; Untyped ;
-; RDCONTROL_ACLR_B ; NONE ; Untyped ;
-; BYTEENA_ACLR_B ; NONE ; Untyped ;
-; WIDTH_BYTEENA_A ; 1 ; Untyped ;
-; WIDTH_BYTEENA_B ; 1 ; Untyped ;
-; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
-; BYTE_SIZE ; 8 ; Untyped ;
-; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
-; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
-; INIT_FILE ; db/chip8.ram0_memory_e9e85012.hdl.mif ; Untyped ;
-; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
-; MAXIMUM_DEPTH ; 0 ; Untyped ;
-; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
-; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
-; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
-; ENABLE_ECC ; FALSE ; Untyped ;
-; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
-; WIDTH_ECCSTATUS ; 3 ; Untyped ;
-; DEVICE_FAMILY ; Cyclone V ; Untyped ;
-; CBXI_PARAMETER ; altsyncram_dsq1 ; Untyped ;
-+------------------------------------+---------------------------------------+----------------+
-Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
-
-
-+-----------------------------------------------------------------------------+
-; altsyncram Parameter Settings by Entity Instance ;
-+-------------------------------------------+---------------------------------+
-; Name ; Value ;
-+-------------------------------------------+---------------------------------+
-; Number of entity instances ; 1 ;
-; Entity Instance ; memory:mem|altsyncram:mem_rtl_0 ;
-; -- OPERATION_MODE ; DUAL_PORT ;
-; -- WIDTH_A ; 8 ;
-; -- NUMWORDS_A ; 4096 ;
-; -- OUTDATA_REG_A ; UNREGISTERED ;
-; -- WIDTH_B ; 8 ;
-; -- NUMWORDS_B ; 4096 ;
-; -- ADDRESS_REG_B ; CLOCK0 ;
-; -- OUTDATA_REG_B ; UNREGISTERED ;
-; -- RAM_BLOCK_TYPE ; AUTO ;
-; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ;
-+-------------------------------------------+---------------------------------+
-
-
-+------------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "cpu:cpu|st7920_serial_driver:gpu" ;
-+--------------+--------+----------+-------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+--------------+--------+----------+-------------------------------------------------------------------------------------+
-; sys_rst_n_ms ; Input ; Info ; Stuck at VCC ;
-; led ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+--------------+--------+----------+-------------------------------------------------------------------------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------+
-; Port Connectivity Checks: "cpu:cpu" ;
-+---------------+--------+----------+-------------------------------------------------------------------------------------+
-; Port ; Type ; Severity ; Details ;
-+---------------+--------+----------+-------------------------------------------------------------------------------------+
-; cycle_counter ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
-+---------------+--------+----------+-------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------+
-; Post-Synthesis Netlist Statistics for Top Partition ;
-+-----------------------+-----------------------------+
-; Type ; Count ;
-+-----------------------+-----------------------------+
-; arriav_ff ; 8836 ;
-; ENA ; 8568 ;
-; ENA SCLR ; 85 ;
-; ENA SLD ; 20 ;
-; SCLR ; 84 ;
-; SLD ; 1 ;
-; plain ; 78 ;
-; arriav_lcell_comb ; 17207 ;
-; arith ; 307 ;
-; 0 data inputs ; 7 ;
-; 1 data inputs ; 271 ;
-; 2 data inputs ; 25 ;
-; 3 data inputs ; 1 ;
-; 4 data inputs ; 1 ;
-; 5 data inputs ; 2 ;
-; extend ; 56 ;
-; 7 data inputs ; 56 ;
-; normal ; 16838 ;
-; 0 data inputs ; 1 ;
-; 1 data inputs ; 1 ;
-; 2 data inputs ; 198 ;
-; 3 data inputs ; 4992 ;
-; 4 data inputs ; 2007 ;
-; 5 data inputs ; 5932 ;
-; 6 data inputs ; 3707 ;
-; shared ; 6 ;
-; 2 data inputs ; 6 ;
-; boundary_port ; 10 ;
-; stratixv_ram_block ; 8 ;
-; ; ;
-; Max LUT depth ; 55.00 ;
-; Average LUT depth ; 17.74 ;
-+-----------------------+-----------------------------+
-
-
-+-------------------------------+
-; Elapsed Time Per Partition ;
-+----------------+--------------+
-; Partition Name ; Elapsed Time ;
-+----------------+--------------+
-; Top ; 00:00:44 ;
-+----------------+--------------+
-
-
-+-------------------------------+
-; Analysis & Synthesis Messages ;
-+-------------------------------+
-Info: *******************************************************************
-Info: Running Quartus Prime Analysis & Synthesis
- Info: Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
- Info: Processing started: Mon Apr 8 08:46:51 2024
-Info: Command: quartus_map --read_settings_files=on --write_settings_files=off chip8 -c chip8
-Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
-Info (20030): Parallel compilation is enabled and will use 12 of the 12 processors detected
-Info (12021): Found 3 design units, including 3 entities, in source file the-bomb/st7920_serial_driver.sv
- Info (12023): Found entity 1: st7920_serial_driver File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 4
- Info (12023): Found entity 2: d_flip_flop File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 137
- Info (12023): Found entity 3: commander File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 147
-Info (12021): Found 1 design units, including 1 entities, in source file chip8.sv
- Info (12023): Found entity 1: chip8 File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 1
-Info (12021): Found 1 design units, including 1 entities, in source file cpu.sv
- Info (12023): Found entity 1: cpu File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 3
-Info (12021): Found 1 design units, including 1 entities, in source file alu.sv
- Info (12023): Found entity 1: alu File: /home/nickorlow/programming/school/warminster/yayacemu/alu.sv Line: 3
-Info (12021): Found 1 design units, including 0 entities, in source file aastructs.sv
- Info (12022): Found design unit 1: structs (SystemVerilog) File: /home/nickorlow/programming/school/warminster/yayacemu/aastructs.sv Line: 1
-Info (12021): Found 1 design units, including 1 entities, in source file downclocker.sv
- Info (12023): Found entity 1: downclocker File: /home/nickorlow/programming/school/warminster/yayacemu/downclocker.sv Line: 1
-Info (12127): Elaborating entity "chip8" for the top level hierarchy
-Info (12128): Elaborating entity "downclocker" for hierarchy "downclocker:dc" File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 14
-Warning (10230): Verilog HDL assignment warning at downclocker.sv(18): truncated value with size 32 to match size of target (10) File: /home/nickorlow/programming/school/warminster/yayacemu/downclocker.sv Line: 18
-Warning (12125): Using design file memory.sv, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
- Info (12023): Found entity 1: memory File: /home/nickorlow/programming/school/warminster/yayacemu/memory.sv Line: 1
-Info (12128): Elaborating entity "memory" for hierarchy "memory:mem" File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 29
-Warning (10850): Verilog HDL warning at memory.sv(14): number of words (80) in memory file does not match the number of elements in the address range [0:4095] File: /home/nickorlow/programming/school/warminster/yayacemu/memory.sv Line: 14
-Warning (10850): Verilog HDL warning at memory.sv(15): number of words (132) in memory file does not match the number of elements in the address range [512:4095] File: /home/nickorlow/programming/school/warminster/yayacemu/memory.sv Line: 15
-Info (12128): Elaborating entity "cpu" for hierarchy "cpu:cpu" File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 44
-Warning (10230): Verilog HDL assignment warning at cpu.sv(148): truncated value with size 32 to match size of target (16) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 148
-Warning (10230): Verilog HDL assignment warning at cpu.sv(154): truncated value with size 32 to match size of target (16) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 154
-Warning (10230): Verilog HDL assignment warning at cpu.sv(171): truncated value with size 32 to match size of target (16) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 171
-Warning (10230): Verilog HDL assignment warning at cpu.sv(249): truncated value with size 32 to match size of target (5) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 249
-Warning (10230): Verilog HDL assignment warning at cpu.sv(252): truncated value with size 32 to match size of target (5) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 252
-Warning (10230): Verilog HDL assignment warning at cpu.sv(281): truncated value with size 32 to match size of target (16) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 281
-Warning (10230): Verilog HDL assignment warning at cpu.sv(285): truncated value with size 32 to match size of target (5) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 285
-Warning (10230): Verilog HDL assignment warning at cpu.sv(296): truncated value with size 32 to match size of target (5) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 296
-Warning (10230): Verilog HDL assignment warning at cpu.sv(323): truncated value with size 32 to match size of target (16) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 323
-Warning (10230): Verilog HDL assignment warning at cpu.sv(333): truncated value with size 32 to match size of target (16) File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 333
-Warning (10030): Net "instr.src_reg" at cpu.sv(131) has no driver or initial value, using a default initial value '0' File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 131
-Warning (10030): Net "instr.src_addr" at cpu.sv(131) has no driver or initial value, using a default initial value '0' File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 131
-Warning (10030): Net "instr.dst_addr" at cpu.sv(131) has no driver or initial value, using a default initial value '0' File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 131
-Info (12128): Elaborating entity "alu" for hierarchy "cpu:cpu|alu:alu" File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 33
-Info (12128): Elaborating entity "st7920_serial_driver" for hierarchy "cpu:cpu|st7920_serial_driver:gpu" File: /home/nickorlow/programming/school/warminster/yayacemu/cpu.sv Line: 49
-Warning (10036): Verilog HDL or VHDL warning at st7920_serial_driver.sv(23): object "line_idx" assigned a value but never read File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 23
-Warning (10230): Verilog HDL assignment warning at st7920_serial_driver.sv(71): truncated value with size 32 to match size of target (7) File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 71
-Warning (10230): Verilog HDL assignment warning at st7920_serial_driver.sv(84): truncated value with size 32 to match size of target (7) File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 84
-Warning (10230): Verilog HDL assignment warning at st7920_serial_driver.sv(103): truncated value with size 32 to match size of target (6) File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 103
-Warning (10230): Verilog HDL assignment warning at st7920_serial_driver.sv(131): truncated value with size 32 to match size of target (9) File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 131
-Warning (10030): Net "commands[6..10]" at st7920_serial_driver.sv(26) has no driver or initial value, using a default initial value '0' File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 26
-Info (12128): Elaborating entity "commander" for hierarchy "cpu:cpu|st7920_serial_driver:gpu|commander:com" File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 42
-Info (12128): Elaborating entity "d_flip_flop" for hierarchy "cpu:cpu|st7920_serial_driver:gpu|d_flip_flop:dff" File: /home/nickorlow/programming/school/warminster/yayacemu/the-bomb/st7920_serial_driver.sv Line: 50
-Info (19000): Inferred 1 megafunctions from design logic
- Info (276029): Inferred altsyncram megafunction from the following design logic: "memory:mem|mem_rtl_0"
- Info (286033): Parameter OPERATION_MODE set to DUAL_PORT
- Info (286033): Parameter WIDTH_A set to 8
- Info (286033): Parameter WIDTHAD_A set to 12
- Info (286033): Parameter NUMWORDS_A set to 4096
- Info (286033): Parameter WIDTH_B set to 8
- Info (286033): Parameter WIDTHAD_B set to 12
- Info (286033): Parameter NUMWORDS_B set to 4096
- Info (286033): Parameter ADDRESS_ACLR_A set to NONE
- Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED
- Info (286033): Parameter ADDRESS_ACLR_B set to NONE
- Info (286033): Parameter OUTDATA_ACLR_B set to NONE
- Info (286033): Parameter ADDRESS_REG_B set to CLOCK0
- Info (286033): Parameter INDATA_ACLR_A set to NONE
- Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
- Info (286033): Parameter INIT_FILE set to db/chip8.ram0_memory_e9e85012.hdl.mif
- Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
-Info (12130): Elaborated megafunction instantiation "memory:mem|altsyncram:mem_rtl_0"
-Info (12133): Instantiated megafunction "memory:mem|altsyncram:mem_rtl_0" with the following parameter:
- Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT"
- Info (12134): Parameter "WIDTH_A" = "8"
- Info (12134): Parameter "WIDTHAD_A" = "12"
- Info (12134): Parameter "NUMWORDS_A" = "4096"
- Info (12134): Parameter "WIDTH_B" = "8"
- Info (12134): Parameter "WIDTHAD_B" = "12"
- Info (12134): Parameter "NUMWORDS_B" = "4096"
- Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
- Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED"
- Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE"
- Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE"
- Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0"
- Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
- Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
- Info (12134): Parameter "INIT_FILE" = "db/chip8.ram0_memory_e9e85012.hdl.mif"
- Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
-Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_dsq1.tdf
- Info (12023): Found entity 1: altsyncram_dsq1 File: /home/nickorlow/programming/school/warminster/yayacemu/db/altsyncram_dsq1.tdf Line: 28
-Warning (13024): Output pins are stuck at VCC or GND
- Warning (13410): Pin "led[4]" is stuck at GND File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 7
- Warning (13410): Pin "led[5]" is stuck at GND File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 7
-Info (286030): Timing-Driven Synthesis is running
-Info (17049): 6 registers lost all their fanouts during netlist optimizations.
-Info (144001): Generated suppressed messages file /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.map.smsg
-Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
- Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL
-Warning (21074): Design contains 1 input pin(s) that do not drive logic
- Warning (15610): No output dependent on input pin "rst_in" File: /home/nickorlow/programming/school/warminster/yayacemu/chip8.sv Line: 3
-Info (21057): Implemented 17552 device resources after synthesis - the final resource count might be different
- Info (21058): Implemented 2 input pins
- Info (21059): Implemented 8 output pins
- Info (21061): Implemented 17534 logic cells
- Info (21064): Implemented 8 RAM segments
-Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 29 warnings
- Info: Peak virtual memory: 775 megabytes
- Info: Processing ended: Mon Apr 8 08:47:47 2024
- Info: Elapsed time: 00:00:56
- Info: Total CPU time (on all processors): 00:01:34
-
-
-+------------------------------------------+
-; Analysis & Synthesis Suppressed Messages ;
-+------------------------------------------+
-The suppressed messages can be found in /home/nickorlow/programming/school/warminster/yayacemu/output_files/chip8.map.smsg.
-
-
diff --git a/output_files/chip8.map.summary b/output_files/chip8.map.summary
deleted file mode 100644
index 0772e8e..0000000
--- a/output_files/chip8.map.summary
+++ /dev/null
@@ -1,17 +0,0 @@
-Analysis & Synthesis Status : Successful - Mon Apr 8 08:47:47 2024
-Quartus Prime Version : 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-Revision Name : chip8
-Top-level Entity Name : chip8
-Family : Cyclone V
-Logic utilization (in ALMs) : N/A
-Total registers : 8836
-Total pins : 10
-Total virtual pins : 0
-Total block memory bits : 32,768
-Total DSP Blocks : 0
-Total HSSI RX PCSs : 0
-Total HSSI PMA RX Deserializers : 0
-Total HSSI TX PCSs : 0
-Total HSSI PMA TX Serializers : 0
-Total PLLs : 0
-Total DLLs : 0
diff --git a/output_files/chip8.pin b/output_files/chip8.pin
deleted file mode 100644
index 7104ee7..0000000
--- a/output_files/chip8.pin
+++ /dev/null
@@ -1,753 +0,0 @@
- -- Copyright (C) 2023 Intel Corporation. All rights reserved.
- -- Your use of Intel Corporation's design tools, logic functions
- -- and other software and tools, and any partner logic
- -- functions, and any output files from any of the foregoing
- -- (including device programming or simulation files), and any
- -- associated documentation or information are expressly subject
- -- to the terms and conditions of the Intel Program License
- -- Subscription Agreement, the Intel Quartus Prime License Agreement,
- -- the Intel FPGA IP License Agreement, or other applicable license
- -- agreement, including, without limitation, that your use is for
- -- the sole purpose of programming logic devices manufactured by
- -- Intel and sold by Intel or its authorized distributors. Please
- -- refer to the applicable agreement for further details, at
- -- https://fpgasoftware.intel.com/eula.
- --
- -- This is a Quartus Prime output file. It is for reporting purposes only, and is
- -- not intended for use as a Quartus Prime input file. This file cannot be used
- -- to make Quartus Prime pin assignments - for instructions on how to make pin
- -- assignments, please see Quartus Prime help.
- ---------------------------------------------------------------------------------
-
-
-
- ---------------------------------------------------------------------------------
- -- NC : No Connect. This pin has no internal connection to the device.
- -- DNU : Do Not Use. This pin MUST NOT be connected.
- -- VCCPGM : Dedicated power pin for configuration, which MUST be connected to 1.8V, 2.5V, 3.0V or 3.3V depending on the requirements of the configuration device.
- -- VCCINT : Dedicated power pin, which MUST be connected to VCC (1.1V).
- -- VCCIO : Dedicated power pin, which MUST be connected to VCC
- -- of its bank.
- -- Bank 3A: 2.5V
- -- Bank 3B: 3.3V
- -- Bank 4A: 3.3V
- -- Bank 5A: 3.3V
- -- Bank 5B: 2.5V
- -- Bank 6B: 2.5V
- -- Bank 6A: 2.5V
- -- Bank 7A: 2.5V
- -- Bank 7B: 2.5V
- -- Bank 7C: 2.5V
- -- Bank 7D: 2.5V
- -- Bank 8A: 2.5V
- -- Bank 9A: Dedicated configuration pins only, no VCCIO required.
- -- RREF : External reference resistor for the quad, MUST be connected to
- -- GND via a 2k Ohm resistor.
- -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
- -- It can also be used to report unused dedicated pins. The connection
- -- on the board for unused dedicated pins depends on whether this will
- -- be used in a future design. One example is device migration. When
- -- using device migration, refer to the device pin-tables. If it is a
- -- GND pin in the pin table or if it will not be used in a future design
- -- for another purpose the it MUST be connected to GND. If it is an unused
- -- dedicated pin, then it can be connected to a valid signal on the board
- -- (low, high, or toggling) if that signal is required for a different
- -- revision of the design.
- -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins.
- -- This pin should be connected to GND. It may also be connected to a
- -- valid signal on the board (low, high, or toggling) if that signal
- -- is required for a different revision of the design.
- -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND
- -- or leave it unconnected.
- -- RESERVED : Unused I/O pin, which MUST be left unconnected.
- -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
- -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor.
- -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry.
- -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high.
- -- GXB_NC : Unused GXB Transmitter or dedicated clock output pin. This pin
- -- must not be connected.
- ---------------------------------------------------------------------------------
-
-
-
- ---------------------------------------------------------------------------------
- -- Pin directions (input, output or bidir) are based on device operating in user mode.
- ---------------------------------------------------------------------------------
-
-Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-CHIP "chip8" ASSIGNED TO AN: 5CSEBA6U23I7
-
-Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
--------------------------------------------------------------------------------------------------------------
-DNU : A2 : : : : :
-GND : A3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A4 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A5 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A6 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A7 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A8 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A9 : : : : 7B :
-GND : A10 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A11 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A12 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A13 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A14 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A15 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A16 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A17 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A18 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A19 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A20 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A21 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A22 : : : : 7A :
-HPS_nRST : A23 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A24 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A26 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : A27 : : : : 6A :
-GND : AA1 : gnd : : : :
-GND : AA2 : gnd : : : :
-GND : AA3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA4 : : : : 3A :
-VCCIO3A : AA5 : power : : 2.5V : 3A :
-nCSO, DATA4 : AA6 : : : : 3A :
-DCLK : AA8 : : : : 3A :
-GND : AA9 : gnd : : : :
-VCCPD3A : AA10 : power : : 2.5V : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA11 : : : : 3A :
-VCCIO3B : AA12 : power : : 3.3V : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA13 : : : : 4A :
-VCCPD3B4A : AA14 : power : : 3.3V : 3B, 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA15 : : : : 4A :
-VCCIO4A : AA16 : power : : 3.3V : 4A :
-GND : AA17 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA18 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA19 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA20 : : : : 5A :
-VCCA_FPLL : AA21 : power : : 2.5V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA23 : : : : 5A :
-led[1] : AA24 : output : 3.3-V LVTTL : : 5A : Y
-VREFB5BN0 : AA25 : power : : : 5B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA26 : : : : 5B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA28 : : : : 6B :
-GND : AB1 : gnd : : : :
-GND : AB2 : gnd : : : :
-GND : AB3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB4 : : : : 3A :
-TCK : AB5 : input : : : 3A :
-AS_DATA3, DATA3 : AB6 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB23 : : : : 5A :
-GND : AB24 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB25 : : : : 5B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB26 : : : : 5B :
-GND : AB27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB28 : : : : 6B :
-GND : AC1 : gnd : : : :
-GND : AC2 : gnd : : : :
-GND : AC3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC4 : : : : 3A :
-AS_DATA2, DATA2 : AC5 : : : : 3A :
-AS_DATA1, DATA1 : AC6 : : : : 3A :
-TMS : AC7 : input : : : 3A :
-VCC_AUX : AC8 : power : : 2.5V : :
-VCC_AUX : AC21 : power : : 2.5V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC22 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC23 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC24 : : : : 5A :
-VCCIO5A : AC25 : power : : 3.3V : 5A :
-VREFB5AN0 : AC26 : power : : : 5A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC28 : : : : 6B :
-DNU : AD1 : : : : :
-DNU : AD2 : : : : :
-GND : AD3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD4 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD5 : : : : 3A :
-GND : AD6 : gnd : : : :
-AS_DATA0, ASDO, DATA0 : AD7 : : : : 3A :
-GND : AD8 : gnd : : : :
-VCCPD3B4A : AD9 : power : : 3.3V : 3B, 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD10 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD11 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD12 : : : : 3B :
-VCCPD3B4A : AD13 : power : : 3.3V : 3B, 4A :
-GND : AD14 : gnd : : : :
-VCC_AUX : AD15 : power : : 2.5V : :
-VCCPD3B4A : AD16 : power : : 3.3V : 3B, 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD17 : : : : 4A :
-VCCPD3B4A : AD18 : power : : 3.3V : 3B, 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD19 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD20 : : : : 4A :
-VCCPD3B4A : AD21 : power : : 3.3V : 3B, 4A :
-GND : AD22 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD23 : : : : 4A :
-VCCPGM : AD24 : power : : 1.8V/2.5V/3.0V/3.3V : :
-GND : AD25 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD26 : : : : 5A :
-VCCIO6B_HPS : AD27 : power : : 2.5V : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD28 : : : : 6B :
-GND : AE1 : gnd : : : :
-GND : AE2 : gnd : : : :
-GND : AE3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE4 : : : : 3B :
-VREFB3AN0 : AE5 : power : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE6 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE7 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE8 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE9 : : : : 3B :
-VCCIO3B : AE10 : power : : 3.3V : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE11 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE12 : : : : 3B :
-VCCIO3B : AE13 : power : : 3.3V : 3B :
-DNU : AE14 : : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE15 : : : : 4A :
-GND : AE16 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE17 : : : : 4A :
-GND : AE18 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE19 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE20 : : : : 4A :
-VCCIO4A : AE21 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE22 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE23 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE24 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE25 : : : : 5A :
-led[5] : AE26 : output : 3.3-V LVTTL : : 5A : Y
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE28 : : : : 6B :
-GND : AF1 : gnd : : : :
-GND : AF2 : gnd : : : :
-GND : AF3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF4 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF5 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF6 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF7 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF8 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF9 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF10 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF11 : : : : 3B :
-VREFB3BN0 : AF12 : power : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF13 : : : : 4A :
-VCCIO4A : AF14 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF15 : : : : 4A :
-VREFB4AN0 : AF16 : power : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF17 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF18 : : : : 4A :
-VCCIO4A : AF19 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF20 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF21 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF22 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF23 : : : : 4A :
-GND : AF24 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF25 : : : : 4A :
-led[4] : AF26 : output : 3.3-V LVTTL : : 5A : Y
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF27 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF28 : : : : 4A :
-GND : AG1 : gnd : : : :
-GND : AG2 : gnd : : : :
-GND : AG3 : gnd : : : :
-VCCIO3B : AG4 : power : : 3.3V : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG5 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG6 : : : : 3B :
-GND : AG7 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG8 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG9 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG10 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG11 : : : : 4A :
-VCCIO4A : AG12 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG13 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG14 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG15 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG16 : : : : 4A :
-GND : AG17 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG18 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG19 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG20 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG21 : : : : 4A :
-VCCIO4A : AG22 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG23 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG24 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG25 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG26 : : : : 4A :
-GND : AG27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG28 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH2 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH3 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH4 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH5 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH6 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH7 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH8 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH9 : : : : 4A :
-GND : AH10 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH11 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH12 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH13 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH14 : : : : 4A :
-VCCIO4A : AH15 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH16 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH17 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH18 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH19 : : : : 4A :
-GND : AH20 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH21 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH22 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH23 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH24 : : : : 4A :
-VCCIO4A : AH25 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH26 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH27 : : : : 4A :
-GND : B1 : : : : :
-DNU : B2 : : : : :
-GND : B3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B4 : : : : 7C :
-GND : B5 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B6 : : : : 7C :
-GND : B7 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B8 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B9 : : : : 7C :
-VCCIO7C_HPS : B10 : power : : 2.5V : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B11 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B12 : : : : 7C :
-VCCIO7B_HPS : B13 : power : : 2.5V : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B14 : : : : 7B :
-GND : B15 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B16 : : : : 7A :
-GND : B17 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B18 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B19 : : : : 7A :
-GND : B20 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B21 : : : : 7A :
-GND : B22 : gnd : : : :
-HPS_TDO : B23 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B24 : : : : 6A :
-GND : B25 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B26 : : : : 6A :
-GND : B27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : B28 : : : : 6A :
-GND : C1 : gnd : : : :
-GND : C2 : gnd : : : :
-GND : C3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C4 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C5 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C6 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C7 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C8 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C9 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C10 : : : : 7D :
-GND : C11 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C12 : : : : 8A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C13 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C14 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C15 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C16 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C17 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C18 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C19 : : : : 7A :
-VCCIO7A_HPS : C20 : power : : 2.5V : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C21 : : : : 7A :
-HPS_TRST : C22 : : : : 7A :
-HPS_TMS : C23 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C24 : : : : 6A :
-VCCIO6A_HPS : C25 : power : : 2.5V : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C26 : : : : 6A :
-VCCIO6A_HPS : C27 : power : : 2.5V : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : C28 : : : : 6A :
-DNU : D1 : : : : :
-DNU : D2 : : : : :
-GND : D3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D4 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D5 : : : : 7D :
-VCCIO7D_HPS : D6 : power : : 2.5V : 7D :
-VCCBAT : D7 : power : : 1.2V : :
-lcd_clk : D8 : output : 2.5 V : : 8A : Y
-VREFB8AN0 : D9 : power : : : 8A :
-GND : D10 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D11 : : : : 8A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D12 : : : : 8A :
-GND : D13 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D14 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D15 : : : : 7B :
-GND : D16 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D17 : : : : 7B :
-VCCIO7A_HPS : D18 : power : : 2.5V : 7A :
-VREFB7A7B7C7DN0_HPS : D19 : power : : : 7A, 7B, 7C, 7D :
-HPS_CLK2 : D20 : : : : 7A :
-GND : D21 : : : : 7A :
-HPS_TDI : D22 : : : : 7A :
-DNU : D23 : : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D24 : : : : 6A :
-HPS_RZQ_0 : D25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D26 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D27 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : D28 : : : : 6A :
-GND : E1 : gnd : : : :
-GND : E2 : gnd : : : :
-GND : E3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E4 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E5 : : : : 7D :
-nCE : E6 : : : : 9A :
-VCCIO8A : E7 : power : : 2.5V : 8A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E8 : : : : 8A :
-GND : E9 : gnd : : : :
-VCCPD8A : E10 : power : : 2.5V : 8A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E11 : : : : 8A :
-DNU : E12 : : : : :
-VCCPD7D_HPS : E13 : power : : 2.5V : 7D :
-VCCPD7C_HPS : E14 : power : : 2.5V : 7C :
-VCC_AUX : E15 : power : : 2.5V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E16 : : : : 7B :
-VCCPD7B_HPS : E17 : power : : 2.5V : 7B :
-HPS_PORSEL : E18 : : : : 7A :
-GND : E19 : gnd : : : :
-HPS_CLK1 : E20 : : : : 7A :
-VCCPD7A_HPS : E21 : power : : 2.5V : 7A :
-GND : E22 : gnd : : : :
-GND : E23 : : : : 7A :
-GND : E24 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E26 : : : : 6A :
-GND : E27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : E28 : : : : 6A :
-GND : F1 : gnd : : : :
-GND : F2 : gnd : : : :
-GND : F3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : F4 : : : : 7D :
-RESERVED_INPUT_WITH_WEAK_PULLUP : F5 : : : : 7D :
-GND : F6 : : : : 9A :
-nCONFIG : F7 : : : : 9A :
-VCC_AUX : F8 : power : : 2.5V : :
-VCC_AUX_SHARED : F21 : power : : 2.5V : :
-VCCRSTCLK_HPS : F22 : power : : 1.8V/2.5V/3.0V/3.3V : :
-GND : F23 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : F24 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : F25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : F26 : : : : 6A :
-VCCIO6A_HPS : F27 : power : : 2.5V : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : F28 : : : : 6A :
-GND : G1 : gnd : : : :
-GND : G2 : gnd : : : :
-GND : G3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : G4 : : : : 7D :
-VCCIO7D_HPS : G5 : power : : 2.5V : 7D :
-MSEL2 : G6 : : : : 9A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : G23 : : : : 6A :
-VCCIO6A_HPS : G24 : power : : 2.5V : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : G25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : G26 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : G27 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : G28 : : : : 6A :
-DNU : H1 : : : : :
-DNU : H2 : : : : :
-GND : H3 : gnd : : : :
-GND : H4 : gnd : : : :
-GND : H5 : gnd : : : :
-GND : H6 : gnd : : : :
-nSTATUS : H8 : : : : 9A :
-MSEL1 : H9 : : : : 9A :
-VCCPGM : H10 : power : : 1.8V/2.5V/3.0V/3.3V : :
-GND : H11 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : H12 : : : : 7C :
-RESERVED_INPUT_WITH_WEAK_PULLUP : H13 : : : : 7C :
-VCCIO7B_HPS : H14 : power : : 2.5V : 7B :
-GND : H15 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : H16 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : H17 : : : : 7A :
-GND : H18 : gnd : : : :
-HPS_nPOR : H19 : : : : 7A :
-GND : H20 : gnd : : : :
-VCCIO6A_HPS : H21 : power : : 2.5V : 6A :
-VCCPLL_HPS : H23 : power : : 2.5V : :
-GND : H24 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : H25 : : : : 6A :
-VCCIO6A_HPS : H26 : power : : 2.5V : 6A :
-GND : H27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : H28 : : : : 6A :
-GND : J1 : gnd : : : :
-GND : J2 : gnd : : : :
-GND : J3 : gnd : : : :
-VCCA_FPLL : J4 : power : : 2.5V : :
-GND : J5 : gnd : : : :
-CONF_DONE : J8 : : : : 9A :
-GND : J9 : gnd : : : :
-MSEL0 : J10 : : : : 9A :
-VCC : J11 : power : : 1.1V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J12 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J13 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J14 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J15 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J16 : : : : 7B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J17 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J18 : : : : 7A :
-VCCRSTCLK_HPS : J19 : : : : 7A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J20 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J21 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J24 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J26 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J27 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : J28 : : : : 6A :
-GND : K1 : gnd : : : :
-GND : K2 : gnd : : : :
-GND : K3 : gnd : : : :
-GND : K4 : gnd : : : :
-VCCA_FPLL : K5 : power : : 2.5V : :
-GND : K8 : gnd : : : :
-MSEL4 : K9 : : : : 9A :
-MSEL3 : K10 : : : : 9A :
-GND : K11 : gnd : : : :
-GND : K12 : gnd : : : :
-VCC : K13 : power : : 1.1V : :
-GND : K14 : gnd : : : :
-VCC : K15 : power : : 1.1V : :
-GND : K16 : gnd : : : :
-VCC_HPS : K17 : power : : 1.1V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : K18 : : : : 7A :
-HPS_TCK : K19 : : : : 7A :
-GND : K20 : gnd : : : :
-VCCPD6A6B_HPS : K21 : power : : 2.5V : 6A, 6B :
-VCCPD6A6B_HPS : K24 : power : : 2.5V : 6A, 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : K25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : K26 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : K27 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : K28 : : : : 6A :
-GND : L1 : gnd : : : :
-GND : L2 : gnd : : : :
-GND : L3 : gnd : : : :
-VCC : L4 : power : : 1.1V : :
-GND : L5 : gnd : : : :
-GND : L8 : gnd : : : :
-GND : L9 : gnd : : : :
-GND : L10 : gnd : : : :
-VCC : L11 : power : : 1.1V : :
-VCC : L12 : power : : 1.1V : :
-GND : L13 : gnd : : : :
-VCC : L14 : power : : 1.1V : :
-GND : L15 : gnd : : : :
-VCC_HPS : L16 : power : : 1.1V : :
-GND : L17 : gnd : : : :
-VCC_HPS : L18 : power : : 1.1V : :
-GND : L19 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : L20 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : L21 : : : : 6A :
-GND : L24 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : L25 : : : : 6A :
-VCCIO6A_HPS : L26 : power : : 2.5V : 6A :
-GND : L27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : L28 : : : : 6A :
-DNU : M1 : : : : :
-DNU : M2 : : : : :
-GND : M3 : gnd : : : :
-VCCA_FPLL : M4 : power : : 2.5V : :
-VCC : M5 : power : : 1.1V : :
-GND : M8 : gnd : : : :
-VCC : M9 : power : : 1.1V : :
-GND : M10 : gnd : : : :
-GND : M11 : gnd : : : :
-VCC : M12 : power : : 1.1V : :
-VCC : M13 : power : : 1.1V : :
-GND : M14 : gnd : : : :
-VCC : M15 : power : : 1.1V : :
-GND : M16 : gnd : : : :
-VCC_HPS : M17 : power : : 1.1V : :
-VCC_HPS : M18 : power : : 1.1V : :
-VCC_HPS : M19 : power : : 1.1V : :
-GND : M20 : gnd : : : :
-VCCIO6A_HPS : M21 : power : : 2.5V : 6A :
-VCCPD6A6B_HPS : M24 : power : : 2.5V : 6A, 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : M25 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : M26 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : M27 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : M28 : : : : 6A :
-GND : N1 : gnd : : : :
-GND : N2 : gnd : : : :
-GND : N3 : gnd : : : :
-GND : N4 : gnd : : : :
-VCC : N5 : power : : 1.1V : :
-GND : N8 : gnd : : : :
-VCC : N9 : power : : 1.1V : :
-VCC : N10 : power : : 1.1V : :
-VCC : N11 : power : : 1.1V : :
-VCC : N12 : power : : 1.1V : :
-GND : N13 : gnd : : : :
-VCC : N14 : power : : 1.1V : :
-GND : N15 : gnd : : : :
-VCC_HPS : N16 : power : : 1.1V : :
-GND : N17 : gnd : : : :
-VCC_HPS : N18 : power : : 1.1V : :
-GND : N19 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N20 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N21 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N24 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N25 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N26 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : N28 : : : : 6A :
-GND : P1 : gnd : : : :
-GND : P2 : gnd : : : :
-GND : P3 : gnd : : : :
-VCCA_FPLL : P4 : power : : 2.5V : :
-GND : P5 : gnd : : : :
-GND : P8 : gnd : : : :
-GND : P9 : gnd : : : :
-GND : P10 : gnd : : : :
-VCC : P11 : power : : 1.1V : :
-GND : P12 : gnd : : : :
-VCC : P13 : power : : 1.1V : :
-VCC : P14 : power : : 1.1V : :
-VCC : P15 : power : : 1.1V : :
-GND : P16 : gnd : : : :
-VCC_HPS : P17 : power : : 1.1V : :
-GND : P18 : gnd : : : :
-VCC_HPS : P19 : power : : 1.1V : :
-GND : P20 : gnd : : : :
-VCCPD6A6B_HPS : P21 : power : : 2.5V : 6A, 6B :
-VCCPD6A6B_HPS : P24 : power : : 2.5V : 6A, 6B :
-GND : P25 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : P26 : : : : 6B :
-VCCIO6B_HPS : P27 : power : : 2.5V : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : P28 : : : : 6A :
-GND : R1 : gnd : : : :
-GND : R2 : gnd : : : :
-GND : R3 : gnd : : : :
-VCCA_FPLL : R4 : power : : 2.5V : :
-VCC : R5 : power : : 1.1V : :
-GND : R8 : gnd : : : :
-VCC : R9 : power : : 1.1V : :
-VCC : R10 : power : : 1.1V : :
-GND : R11 : gnd : : : :
-VCC : R12 : power : : 1.1V : :
-GND : R13 : gnd : : : :
-VCC : R14 : power : : 1.1V : :
-GND : R15 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R16 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R17 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R18 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R19 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R20 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R21 : : : : 6A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R24 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R25 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R26 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : R28 : : : : 6B :
-DNU : T1 : : : : :
-DNU : T2 : : : : :
-GND : T3 : gnd : : : :
-VCC : T4 : power : : 1.1V : :
-VCC : T5 : power : : 1.1V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T8 : : : : 3A :
-VCC : T9 : power : : 1.1V : :
-GND : T10 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T11 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T12 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T13 : : : : 3B :
-GND : T14 : gnd : : : :
-VCC : T15 : power : : 1.1V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T16 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T17 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T18 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T19 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T20 : : : : 6B :
-VCCIO6B_HPS : T21 : power : : 2.5V : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T24 : : : : 6B :
-VCCIO6B_HPS : T25 : power : : 2.5V : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T26 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : T28 : : : : 6B :
-GND : U1 : gnd : : : :
-GND : U2 : gnd : : : :
-GND : U3 : gnd : : : :
-VCCA_FPLL : U4 : power : : 2.5V : :
-GND : U5 : gnd : : : :
-DNU : U8 : : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U9 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U10 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U11 : : : : 3B :
-GND : U12 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U13 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U14 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U15 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U16 : : : : 6B :
-GND : U17 : gnd : : : :
-VCCIO6B_HPS : U18 : power : : 2.5V : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U19 : : : : 6B :
-GND : U20 : gnd : : : :
-VCC_HPS : U21 : power : : 1.1V : :
-GND : U24 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U25 : : : : 6B :
-VCC : U26 : power : : 1.1V : :
-GND : U27 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : U28 : : : : 6B :
-GND : V1 : gnd : : : :
-GND : V2 : gnd : : : :
-GND : V3 : gnd : : : :
-GND : V4 : gnd : : : :
-GND : V5 : gnd : : : :
-GND : V8 : gnd : : : :
-GND : V9 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V10 : : : : 3A :
-fpga_clk : V11 : input : 2.5 V : : 3B : Y
-RESERVED_INPUT_WITH_WEAK_PULLUP : V12 : : : : 3B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V13 : : : : 4A :
-GND : V14 : gnd : : : :
-led[3] : V15 : output : 3.3-V LVTTL : : 5A : Y
-led[2] : V16 : output : 3.3-V LVTTL : : 5A : Y
-RESERVED_INPUT_WITH_WEAK_PULLUP : V17 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V18 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V19 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V20 : : : : 6B :
-GND : V21 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V24 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V25 : : : : 6B :
-GND : V26 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : V28 : : : : 6B :
-GND : W1 : gnd : : : :
-GND : W2 : gnd : : : :
-GND : W3 : gnd : : : :
-GND : W4 : gnd : : : :
-VCCA_FPLL : W5 : power : : 2.5V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : W8 : : : : 3A :
-VCCIO3A : W9 : power : : 2.5V : 3A :
-TDI : W10 : input : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : W11 : : : : 3B :
-lcd_data : W12 : output : 3.3-V LVTTL : : 3B : Y
-VCCIO4A : W13 : power : : 3.3V : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : W14 : : : : 4A :
-led[0] : W15 : output : 3.3-V LVTTL : : 5A : Y
-GND : W16 : gnd : : : :
-VCCIO5A : W17 : power : : 3.3V : 5A :
-GND : W18 : gnd : : : :
-VCCPD5B : W19 : power : : 2.5V : 5B :
-rst_in : W20 : input : 2.5 V : : 5B : Y
-RESERVED_INPUT_WITH_WEAK_PULLUP : W21 : : : : 5B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : W24 : : : : 5B :
-VCCIO5B : W25 : power : : 2.5V : 5B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : W26 : : : : 6B :
-VCCIO6B_HPS : W27 : power : : 2.5V : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : W28 : : : : 6B :
-DNU : Y1 : : : : :
-DNU : Y2 : : : : :
-GND : Y3 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y4 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y5 : : : : 3A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y8 : : : : 3A :
-TDO : Y9 : output : : : 3A :
-VCCPGM : Y10 : power : : 1.8V/2.5V/3.0V/3.3V : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y11 : : : : 3A :
-GND : Y12 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y13 : : : : 4A :
-GND : Y14 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y15 : : : : 4A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y16 : : : : 5A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y17 : : : : 5A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y18 : : : : 5A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y19 : : : : 5A :
-GND : Y20 : gnd : : : :
-VCCPD5A : Y21 : power : : 3.3V : 5A :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y24 : : : : 5B :
-GND : Y25 : gnd : : : :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y26 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y27 : : : : 6B :
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y28 : : : : 6B :
diff --git a/output_files/chip8.sld b/output_files/chip8.sld
deleted file mode 100644
index f7d3ed7..0000000
--- a/output_files/chip8.sld
+++ /dev/null
@@ -1 +0,0 @@
-
diff --git a/output_files/chip8.sof b/output_files/chip8.sof
deleted file mode 100644
index 4847956..0000000
Binary files a/output_files/chip8.sof and /dev/null differ
diff --git a/output_files/chip8.sta.rpt b/output_files/chip8.sta.rpt
deleted file mode 100644
index 4bf8605..0000000
--- a/output_files/chip8.sta.rpt
+++ /dev/null
@@ -1,707 +0,0 @@
-Timing Analyzer report for chip8
-Mon Apr 8 08:52:45 2024
-Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
-
-
----------------------
-; Table of Contents ;
----------------------
- 1. Legal Notice
- 2. Timing Analyzer Summary
- 3. Parallel Compilation
- 4. Clocks
- 5. Slow 1100mV 100C Model Fmax Summary
- 6. Timing Closure Recommendations
- 7. Slow 1100mV 100C Model Setup Summary
- 8. Slow 1100mV 100C Model Hold Summary
- 9. Slow 1100mV 100C Model Recovery Summary
- 10. Slow 1100mV 100C Model Removal Summary
- 11. Slow 1100mV 100C Model Minimum Pulse Width Summary
- 12. Slow 1100mV 100C Model Metastability Summary
- 13. Slow 1100mV -40C Model Fmax Summary
- 14. Slow 1100mV -40C Model Setup Summary
- 15. Slow 1100mV -40C Model Hold Summary
- 16. Slow 1100mV -40C Model Recovery Summary
- 17. Slow 1100mV -40C Model Removal Summary
- 18. Slow 1100mV -40C Model Minimum Pulse Width Summary
- 19. Slow 1100mV -40C Model Metastability Summary
- 20. Fast 1100mV 100C Model Setup Summary
- 21. Fast 1100mV 100C Model Hold Summary
- 22. Fast 1100mV 100C Model Recovery Summary
- 23. Fast 1100mV 100C Model Removal Summary
- 24. Fast 1100mV 100C Model Minimum Pulse Width Summary
- 25. Fast 1100mV 100C Model Metastability Summary
- 26. Fast 1100mV -40C Model Setup Summary
- 27. Fast 1100mV -40C Model Hold Summary
- 28. Fast 1100mV -40C Model Recovery Summary
- 29. Fast 1100mV -40C Model Removal Summary
- 30. Fast 1100mV -40C Model Minimum Pulse Width Summary
- 31. Fast 1100mV -40C Model Metastability Summary
- 32. Multicorner Timing Analysis Summary
- 33. Board Trace Model Assignments
- 34. Input Transition Times
- 35. Signal Integrity Metrics (Slow 1100mv n40c Model)
- 36. Signal Integrity Metrics (Slow 1100mv 100c Model)
- 37. Signal Integrity Metrics (Fast 1100mv n40c Model)
- 38. Signal Integrity Metrics (Fast 1100mv 100c Model)
- 39. Setup Transfers
- 40. Hold Transfers
- 41. Report TCCS
- 42. Report RSKM
- 43. Unconstrained Paths Summary
- 44. Clock Status Summary
- 45. Unconstrained Output Ports
- 46. Unconstrained Output Ports
- 47. Timing Analyzer Messages
-
-
-
-----------------
-; Legal Notice ;
-----------------
-Copyright (C) 2023 Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and any partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Intel Program License
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details, at
-https://fpgasoftware.intel.com/eula.
-
-
-
-+--------------------------------------------------------------------------------+
-; Timing Analyzer Summary ;
-+-----------------------+--------------------------------------------------------+
-; Quartus Prime Version ; Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition ;
-; Timing Analyzer ; Legacy Timing Analyzer ;
-; Revision Name ; chip8 ;
-; Device Family ; Cyclone V ;
-; Device Name ; 5CSEBA6U23I7 ;
-; Timing Models ; Final ;
-; Delay Model ; Combined ;
-; Rise/Fall Delays ; Enabled ;
-+-----------------------+--------------------------------------------------------+
-
-
-+------------------------------------------+
-; Parallel Compilation ;
-+----------------------------+-------------+
-; Processors ; Number ;
-+----------------------------+-------------+
-; Number detected on machine ; 12 ;
-; Maximum allowed ; 12 ;
-; ; ;
-; Average used ; 5.48 ;
-; Maximum used ; 12 ;
-; ; ;
-; Usage by Processor ; % Time Used ;
-; Processor 1 ; 100.0% ;
-; Processor 2 ; 56.2% ;
-; Processor 3 ; 54.6% ;
-; Processor 4 ; 54.0% ;
-; Processor 5 ; 35.4% ;
-; Processor 6 ; 35.4% ;
-; Processor 7 ; 35.4% ;
-; Processor 8 ; 35.4% ;
-; Processor 9 ; 35.4% ;
-; Processor 10 ; 35.4% ;
-; Processor 11 ; 35.4% ;
-; Processor 12 ; 35.4% ;
-+----------------------------+-------------+
-
-
-+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Clocks ;
-+------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+----------------------------------------------+
-; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ;
-+------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+----------------------------------------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { cpu:cpu|st7920_serial_driver:gpu|lcd_clk } ;
-; downclocker:dc|clk_out ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { downclocker:dc|clk_out } ;
-; fpga_clk ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { fpga_clk } ;
-+------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+----------------------------------------------+
-
-
-+--------------------------------------------------------------------------------+
-; Slow 1100mV 100C Model Fmax Summary ;
-+------------+-----------------+------------------------------------------+------+
-; Fmax ; Restricted Fmax ; Clock Name ; Note ;
-+------------+-----------------+------------------------------------------+------+
-; 31.39 MHz ; 31.39 MHz ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; ;
-; 82.93 MHz ; 82.93 MHz ; downclocker:dc|clk_out ; ;
-; 189.18 MHz ; 189.18 MHz ; fpga_clk ; ;
-+------------+-----------------+------------------------------------------+------+
-This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
-
-
-----------------------------------
-; Timing Closure Recommendations ;
-----------------------------------
-HTML report is unavailable in plain text report export.
-
-
-+--------------------------------------------------------------------+
-; Slow 1100mV 100C Model Setup Summary ;
-+------------------------------------------+---------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+---------+---------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -31.412 ; -1884.356 ;
-; downclocker:dc|clk_out ; -11.058 ; -87363.415 ;
-; fpga_clk ; -4.953 ; -27.713 ;
-+------------------------------------------+---------+---------------+
-
-
-+------------------------------------------------------------------+
-; Slow 1100mV 100C Model Hold Summary ;
-+------------------------------------------+-------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+-------+---------------+
-; downclocker:dc|clk_out ; 0.429 ; 0.000 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0.501 ; 0.000 ;
-; fpga_clk ; 0.814 ; 0.000 ;
-+------------------------------------------+-------+---------------+
-
-
--------------------------------------------
-; Slow 1100mV 100C Model Recovery Summary ;
--------------------------------------------
-No paths to report.
-
-
-------------------------------------------
-; Slow 1100mV 100C Model Removal Summary ;
-------------------------------------------
-No paths to report.
-
-
-+-------------------------------------------------------------------+
-; Slow 1100mV 100C Model Minimum Pulse Width Summary ;
-+------------------------------------------+--------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+--------+---------------+
-; downclocker:dc|clk_out ; -2.636 ; -8430.055 ;
-; fpga_clk ; -0.622 ; -17.105 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -0.538 ; -172.550 ;
-+------------------------------------------+--------+---------------+
-
-
-------------------------------------------------
-; Slow 1100mV 100C Model Metastability Summary ;
-------------------------------------------------
-Design MTBF is not calculated because the design doesn't meet its timing requirements.
-
-
-
-+--------------------------------------------------------------------------------+
-; Slow 1100mV -40C Model Fmax Summary ;
-+------------+-----------------+------------------------------------------+------+
-; Fmax ; Restricted Fmax ; Clock Name ; Note ;
-+------------+-----------------+------------------------------------------+------+
-; 33.23 MHz ; 33.23 MHz ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; ;
-; 82.94 MHz ; 82.94 MHz ; downclocker:dc|clk_out ; ;
-; 185.36 MHz ; 185.36 MHz ; fpga_clk ; ;
-+------------+-----------------+------------------------------------------+------+
-This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
-
-
-+--------------------------------------------------------------------+
-; Slow 1100mV -40C Model Setup Summary ;
-+------------------------------------------+---------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+---------+---------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -29.494 ; -1798.010 ;
-; downclocker:dc|clk_out ; -11.057 ; -87142.095 ;
-; fpga_clk ; -4.658 ; -29.299 ;
-+------------------------------------------+---------+---------------+
-
-
-+------------------------------------------------------------------+
-; Slow 1100mV -40C Model Hold Summary ;
-+------------------------------------------+-------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+-------+---------------+
-; downclocker:dc|clk_out ; 0.483 ; 0.000 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0.546 ; 0.000 ;
-; fpga_clk ; 0.786 ; 0.000 ;
-+------------------------------------------+-------+---------------+
-
-
--------------------------------------------
-; Slow 1100mV -40C Model Recovery Summary ;
--------------------------------------------
-No paths to report.
-
-
-------------------------------------------
-; Slow 1100mV -40C Model Removal Summary ;
-------------------------------------------
-No paths to report.
-
-
-+-------------------------------------------------------------------+
-; Slow 1100mV -40C Model Minimum Pulse Width Summary ;
-+------------------------------------------+--------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+--------+---------------+
-; downclocker:dc|clk_out ; -2.636 ; -8301.987 ;
-; fpga_clk ; -0.627 ; -18.184 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -0.538 ; -170.070 ;
-+------------------------------------------+--------+---------------+
-
-
-------------------------------------------------
-; Slow 1100mV -40C Model Metastability Summary ;
-------------------------------------------------
-Design MTBF is not calculated because the design doesn't meet its timing requirements.
-
-
-
-+--------------------------------------------------------------------+
-; Fast 1100mV 100C Model Setup Summary ;
-+------------------------------------------+---------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+---------+---------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -16.301 ; -1018.017 ;
-; downclocker:dc|clk_out ; -5.608 ; -44394.911 ;
-; fpga_clk ; -3.718 ; -8.178 ;
-+------------------------------------------+---------+---------------+
-
-
-+------------------------------------------------------------------+
-; Fast 1100mV 100C Model Hold Summary ;
-+------------------------------------------+-------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+-------+---------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0.160 ; 0.000 ;
-; downclocker:dc|clk_out ; 0.177 ; 0.000 ;
-; fpga_clk ; 0.303 ; 0.000 ;
-+------------------------------------------+-------+---------------+
-
-
--------------------------------------------
-; Fast 1100mV 100C Model Recovery Summary ;
--------------------------------------------
-No paths to report.
-
-
-------------------------------------------
-; Fast 1100mV 100C Model Removal Summary ;
-------------------------------------------
-No paths to report.
-
-
-+-------------------------------------------------------------------+
-; Fast 1100mV 100C Model Minimum Pulse Width Summary ;
-+------------------------------------------+--------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+--------+---------------+
-; downclocker:dc|clk_out ; -2.174 ; -537.344 ;
-; fpga_clk ; -0.517 ; -2.901 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -0.144 ; -6.507 ;
-+------------------------------------------+--------+---------------+
-
-
-------------------------------------------------
-; Fast 1100mV 100C Model Metastability Summary ;
-------------------------------------------------
-Design MTBF is not calculated because the design doesn't meet its timing requirements.
-
-
-
-+--------------------------------------------------------------------+
-; Fast 1100mV -40C Model Setup Summary ;
-+------------------------------------------+---------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+---------+---------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -14.004 ; -820.600 ;
-; downclocker:dc|clk_out ; -4.541 ; -36337.093 ;
-; fpga_clk ; -2.859 ; -5.427 ;
-+------------------------------------------+---------+---------------+
-
-
-+------------------------------------------------------------------+
-; Fast 1100mV -40C Model Hold Summary ;
-+------------------------------------------+-------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+-------+---------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0.138 ; 0.000 ;
-; downclocker:dc|clk_out ; 0.164 ; 0.000 ;
-; fpga_clk ; 0.289 ; 0.000 ;
-+------------------------------------------+-------+---------------+
-
-
--------------------------------------------
-; Fast 1100mV -40C Model Recovery Summary ;
--------------------------------------------
-No paths to report.
-
-
-------------------------------------------
-; Fast 1100mV -40C Model Removal Summary ;
-------------------------------------------
-No paths to report.
-
-
-+-------------------------------------------------------------------+
-; Fast 1100mV -40C Model Minimum Pulse Width Summary ;
-+------------------------------------------+--------+---------------+
-; Clock ; Slack ; End Point TNS ;
-+------------------------------------------+--------+---------------+
-; downclocker:dc|clk_out ; -2.174 ; -534.258 ;
-; fpga_clk ; -0.533 ; -2.899 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -0.057 ; -2.411 ;
-+------------------------------------------+--------+---------------+
-
-
-------------------------------------------------
-; Fast 1100mV -40C Model Metastability Summary ;
-------------------------------------------------
-Design MTBF is not calculated because the design doesn't meet its timing requirements.
-
-
-
-+-----------------------------------------------------------------------------------------------------------+
-; Multicorner Timing Analysis Summary ;
-+-------------------------------------------+------------+-------+----------+---------+---------------------+
-; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ;
-+-------------------------------------------+------------+-------+----------+---------+---------------------+
-; Worst-case Slack ; -31.412 ; 0.138 ; N/A ; N/A ; -2.636 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -31.412 ; 0.138 ; N/A ; N/A ; -0.538 ;
-; downclocker:dc|clk_out ; -11.058 ; 0.164 ; N/A ; N/A ; -2.636 ;
-; fpga_clk ; -4.953 ; 0.289 ; N/A ; N/A ; -0.627 ;
-; Design-wide TNS ; -89275.484 ; 0.0 ; 0.0 ; 0.0 ; -8619.71 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; -1884.356 ; 0.000 ; N/A ; N/A ; -172.550 ;
-; downclocker:dc|clk_out ; -87363.415 ; 0.000 ; N/A ; N/A ; -8430.055 ;
-; fpga_clk ; -29.299 ; 0.000 ; N/A ; N/A ; -18.184 ;
-+-------------------------------------------+------------+-------+----------+---------+---------------------+
-
-
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Board Trace Model Assignments ;
-+----------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
-; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
-+----------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
-; lcd_clk ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; lcd_data ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; led[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; led[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; led[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; led[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; led[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-; led[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
-+----------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
-
-
-+-------------------------------------------------------------+
-; Input Transition Times ;
-+----------+--------------+-----------------+-----------------+
-; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
-+----------+--------------+-----------------+-----------------+
-; rst_in ; 2.5 V ; 2000 ps ; 2000 ps ;
-; fpga_clk ; 2.5 V ; 2000 ps ; 2000 ps ;
-+----------+--------------+-----------------+-----------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Signal Integrity Metrics (Slow 1100mv n40c Model) ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; lcd_clk ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.56e-08 V ; 2.43 V ; -0.0607 V ; 0.35 V ; 0.108 V ; 3.1e-10 s ; 4.28e-10 s ; No ; No ; 2.32 V ; 1.56e-08 V ; 2.43 V ; -0.0607 V ; 0.35 V ; 0.108 V ; 3.1e-10 s ; 4.28e-10 s ; No ; No ;
-; lcd_data ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.47e-08 V ; 3.11 V ; -0.195 V ; 0.108 V ; 0.32 V ; 4.03e-10 s ; 1.44e-10 s ; Yes ; No ; 3.08 V ; 1.47e-08 V ; 3.11 V ; -0.195 V ; 0.108 V ; 0.32 V ; 4.03e-10 s ; 1.44e-10 s ; Yes ; No ;
-; led[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.47e-08 V ; 3.11 V ; -0.195 V ; 0.108 V ; 0.32 V ; 4.03e-10 s ; 1.44e-10 s ; Yes ; No ; 3.08 V ; 1.47e-08 V ; 3.11 V ; -0.195 V ; 0.108 V ; 0.32 V ; 4.03e-10 s ; 1.44e-10 s ; Yes ; No ;
-; led[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.91e-08 V ; 3.17 V ; -0.306 V ; 0.142 V ; 0.425 V ; 4.17e-10 s ; 1.36e-10 s ; Yes ; No ; 3.08 V ; 1.91e-08 V ; 3.17 V ; -0.306 V ; 0.142 V ; 0.425 V ; 4.17e-10 s ; 1.36e-10 s ; Yes ; No ;
-; led[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 2e-08 V ; 3.17 V ; -0.245 V ; 0.166 V ; 0.398 V ; 4.33e-10 s ; 1.46e-10 s ; Yes ; No ; 3.08 V ; 2e-08 V ; 3.17 V ; -0.245 V ; 0.166 V ; 0.398 V ; 4.33e-10 s ; 1.46e-10 s ; Yes ; No ;
-; led[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.47e-08 V ; 3.11 V ; -0.195 V ; 0.108 V ; 0.32 V ; 4.03e-10 s ; 1.44e-10 s ; Yes ; No ; 3.08 V ; 1.47e-08 V ; 3.11 V ; -0.195 V ; 0.108 V ; 0.32 V ; 4.03e-10 s ; 1.44e-10 s ; Yes ; No ;
-; led[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.91e-08 V ; 3.17 V ; -0.306 V ; 0.142 V ; 0.425 V ; 4.17e-10 s ; 1.36e-10 s ; Yes ; No ; 3.08 V ; 1.91e-08 V ; 3.17 V ; -0.306 V ; 0.142 V ; 0.425 V ; 4.17e-10 s ; 1.36e-10 s ; Yes ; No ;
-; led[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.91e-08 V ; 3.17 V ; -0.311 V ; 0.143 V ; 0.424 V ; 4.17e-10 s ; 1.36e-10 s ; Yes ; No ; 3.08 V ; 1.91e-08 V ; 3.17 V ; -0.311 V ; 0.143 V ; 0.424 V ; 4.17e-10 s ; 1.36e-10 s ; Yes ; No ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Signal Integrity Metrics (Slow 1100mv 100c Model) ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; lcd_clk ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.73e-05 V ; 2.38 V ; -0.0297 V ; 0.21 V ; 0.199 V ; 4.77e-10 s ; 4.97e-10 s ; No ; Yes ; 2.32 V ; 4.73e-05 V ; 2.38 V ; -0.0297 V ; 0.21 V ; 0.199 V ; 4.77e-10 s ; 4.97e-10 s ; No ; Yes ;
-; lcd_data ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.09e-05 V ; 3.09 V ; -0.0462 V ; 0.045 V ; 0.085 V ; 5.49e-10 s ; 3.06e-10 s ; Yes ; Yes ; 3.08 V ; 3.09e-05 V ; 3.09 V ; -0.0462 V ; 0.045 V ; 0.085 V ; 5.49e-10 s ; 3.06e-10 s ; Yes ; Yes ;
-; led[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.09e-05 V ; 3.09 V ; -0.0462 V ; 0.045 V ; 0.085 V ; 5.49e-10 s ; 3.06e-10 s ; Yes ; Yes ; 3.08 V ; 3.09e-05 V ; 3.09 V ; -0.0462 V ; 0.045 V ; 0.085 V ; 5.49e-10 s ; 3.06e-10 s ; Yes ; Yes ;
-; led[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.73e-05 V ; 3.11 V ; -0.104 V ; 0.101 V ; 0.139 V ; 5.54e-10 s ; 3.16e-10 s ; Yes ; Yes ; 3.08 V ; 3.73e-05 V ; 3.11 V ; -0.104 V ; 0.101 V ; 0.139 V ; 5.54e-10 s ; 3.16e-10 s ; Yes ; Yes ;
-; led[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.87e-05 V ; 3.11 V ; -0.0814 V ; 0.131 V ; 0.136 V ; 5.88e-10 s ; 3.2e-10 s ; Yes ; Yes ; 3.08 V ; 3.87e-05 V ; 3.11 V ; -0.0814 V ; 0.131 V ; 0.136 V ; 5.88e-10 s ; 3.2e-10 s ; Yes ; Yes ;
-; led[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.09e-05 V ; 3.09 V ; -0.0462 V ; 0.045 V ; 0.085 V ; 5.49e-10 s ; 3.06e-10 s ; Yes ; Yes ; 3.08 V ; 3.09e-05 V ; 3.09 V ; -0.0462 V ; 0.045 V ; 0.085 V ; 5.49e-10 s ; 3.06e-10 s ; Yes ; Yes ;
-; led[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.73e-05 V ; 3.11 V ; -0.104 V ; 0.101 V ; 0.139 V ; 5.54e-10 s ; 3.16e-10 s ; Yes ; Yes ; 3.08 V ; 3.73e-05 V ; 3.11 V ; -0.104 V ; 0.101 V ; 0.139 V ; 5.54e-10 s ; 3.16e-10 s ; Yes ; Yes ;
-; led[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 3.73e-05 V ; 3.11 V ; -0.105 V ; 0.101 V ; 0.142 V ; 5.54e-10 s ; 3.16e-10 s ; Yes ; Yes ; 3.08 V ; 3.73e-05 V ; 3.11 V ; -0.105 V ; 0.101 V ; 0.142 V ; 5.54e-10 s ; 3.16e-10 s ; Yes ; Yes ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Signal Integrity Metrics (Fast 1100mv n40c Model) ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; lcd_clk ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 2.38e-07 V ; 2.94 V ; -0.139 V ; 0.31 V ; 0.268 V ; 2.65e-10 s ; 2.63e-10 s ; No ; Yes ; 2.75 V ; 2.38e-07 V ; 2.94 V ; -0.139 V ; 0.31 V ; 0.268 V ; 2.65e-10 s ; 2.63e-10 s ; No ; Yes ;
-; lcd_data ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 3.38e-07 V ; 3.67 V ; -0.403 V ; 0.084 V ; 0.542 V ; 3.5e-10 s ; 1.32e-10 s ; Yes ; No ; 3.63 V ; 3.38e-07 V ; 3.67 V ; -0.403 V ; 0.084 V ; 0.542 V ; 3.5e-10 s ; 1.32e-10 s ; Yes ; No ;
-; led[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 3.38e-07 V ; 3.67 V ; -0.403 V ; 0.084 V ; 0.542 V ; 3.5e-10 s ; 1.32e-10 s ; Yes ; No ; 3.63 V ; 3.38e-07 V ; 3.67 V ; -0.403 V ; 0.084 V ; 0.542 V ; 3.5e-10 s ; 1.32e-10 s ; Yes ; No ;
-; led[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 4.42e-07 V ; 3.75 V ; -0.588 V ; 0.329 V ; 0.704 V ; 2.77e-10 s ; 1.3e-10 s ; Yes ; No ; 3.63 V ; 4.42e-07 V ; 3.75 V ; -0.588 V ; 0.329 V ; 0.704 V ; 2.77e-10 s ; 1.3e-10 s ; Yes ; No ;
-; led[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 4.64e-07 V ; 3.74 V ; -0.508 V ; 0.391 V ; 0.647 V ; 3.08e-10 s ; 1.34e-10 s ; No ; No ; 3.63 V ; 4.64e-07 V ; 3.74 V ; -0.508 V ; 0.391 V ; 0.647 V ; 3.08e-10 s ; 1.34e-10 s ; No ; No ;
-; led[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 3.38e-07 V ; 3.67 V ; -0.403 V ; 0.084 V ; 0.542 V ; 3.5e-10 s ; 1.32e-10 s ; Yes ; No ; 3.63 V ; 3.38e-07 V ; 3.67 V ; -0.403 V ; 0.084 V ; 0.542 V ; 3.5e-10 s ; 1.32e-10 s ; Yes ; No ;
-; led[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 4.42e-07 V ; 3.75 V ; -0.588 V ; 0.329 V ; 0.704 V ; 2.77e-10 s ; 1.3e-10 s ; Yes ; No ; 3.63 V ; 4.42e-07 V ; 3.75 V ; -0.588 V ; 0.329 V ; 0.704 V ; 2.77e-10 s ; 1.3e-10 s ; Yes ; No ;
-; led[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 4.42e-07 V ; 3.75 V ; -0.589 V ; 0.329 V ; 0.706 V ; 2.77e-10 s ; 1.3e-10 s ; Yes ; No ; 3.63 V ; 4.42e-07 V ; 3.75 V ; -0.589 V ; 0.329 V ; 0.706 V ; 2.77e-10 s ; 1.3e-10 s ; Yes ; No ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Signal Integrity Metrics (Fast 1100mv 100c Model) ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-; lcd_clk ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.00041 V ; 2.85 V ; -0.0763 V ; 0.365 V ; 0.161 V ; 3.08e-10 s ; 4.37e-10 s ; No ; No ; 2.75 V ; 0.00041 V ; 2.85 V ; -0.0763 V ; 0.365 V ; 0.161 V ; 3.08e-10 s ; 4.37e-10 s ; No ; No ;
-; lcd_data ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000307 V ; 3.64 V ; -0.165 V ; 0.022 V ; 0.425 V ; 4.58e-10 s ; 2e-10 s ; Yes ; No ; 3.63 V ; 0.000307 V ; 3.64 V ; -0.165 V ; 0.022 V ; 0.425 V ; 4.58e-10 s ; 2e-10 s ; Yes ; No ;
-; led[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000307 V ; 3.64 V ; -0.165 V ; 0.022 V ; 0.425 V ; 4.58e-10 s ; 2e-10 s ; Yes ; No ; 3.63 V ; 0.000307 V ; 3.64 V ; -0.165 V ; 0.022 V ; 0.425 V ; 4.58e-10 s ; 2e-10 s ; Yes ; No ;
-; led[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000379 V ; 3.65 V ; -0.289 V ; 0.051 V ; 0.523 V ; 4.36e-10 s ; 1.95e-10 s ; Yes ; No ; 3.63 V ; 0.000379 V ; 3.65 V ; -0.289 V ; 0.051 V ; 0.523 V ; 4.36e-10 s ; 1.95e-10 s ; Yes ; No ;
-; led[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000395 V ; 3.65 V ; -0.232 V ; 0.065 V ; 0.547 V ; 4.68e-10 s ; 2.07e-10 s ; Yes ; No ; 3.63 V ; 0.000395 V ; 3.65 V ; -0.232 V ; 0.065 V ; 0.547 V ; 4.68e-10 s ; 2.07e-10 s ; Yes ; No ;
-; led[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000307 V ; 3.64 V ; -0.165 V ; 0.022 V ; 0.425 V ; 4.58e-10 s ; 2e-10 s ; Yes ; No ; 3.63 V ; 0.000307 V ; 3.64 V ; -0.165 V ; 0.022 V ; 0.425 V ; 4.58e-10 s ; 2e-10 s ; Yes ; No ;
-; led[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000379 V ; 3.65 V ; -0.289 V ; 0.051 V ; 0.523 V ; 4.36e-10 s ; 1.95e-10 s ; Yes ; No ; 3.63 V ; 0.000379 V ; 3.65 V ; -0.289 V ; 0.051 V ; 0.523 V ; 4.36e-10 s ; 1.95e-10 s ; Yes ; No ;
-; led[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.63 V ; 0.000379 V ; 3.65 V ; -0.292 V ; 0.053 V ; 0.524 V ; 4.36e-10 s ; 1.95e-10 s ; Yes ; No ; 3.63 V ; 0.000379 V ; 3.65 V ; -0.292 V ; 0.053 V ; 0.524 V ; 4.36e-10 s ; 1.95e-10 s ; Yes ; No ;
-+----------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
-
-
-+---------------------------------------------------------------------------------------------------------------------------------+
-; Setup Transfers ;
-+------------------------------------------+------------------------------------------+----------+----------+----------+----------+
-; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
-+------------------------------------------+------------------------------------------+----------+----------+----------+----------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 2393 ; 126 ; 0 ; 1681819 ;
-; downclocker:dc|clk_out ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0 ; 0 ; 9878 ; 0 ;
-; downclocker:dc|clk_out ; downclocker:dc|clk_out ; 13182899 ; 148 ; 48 ; 0 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; fpga_clk ; 1 ; 1 ; 0 ; 0 ;
-; downclocker:dc|clk_out ; fpga_clk ; 1 ; 1 ; 0 ; 0 ;
-; fpga_clk ; fpga_clk ; 121 ; 0 ; 0 ; 0 ;
-+------------------------------------------+------------------------------------------+----------+----------+----------+----------+
-Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
-
-
-+---------------------------------------------------------------------------------------------------------------------------------+
-; Hold Transfers ;
-+------------------------------------------+------------------------------------------+----------+----------+----------+----------+
-; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
-+------------------------------------------+------------------------------------------+----------+----------+----------+----------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 2393 ; 126 ; 0 ; 1681819 ;
-; downclocker:dc|clk_out ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; 0 ; 0 ; 9878 ; 0 ;
-; downclocker:dc|clk_out ; downclocker:dc|clk_out ; 13182899 ; 148 ; 48 ; 0 ;
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; fpga_clk ; 1 ; 1 ; 0 ; 0 ;
-; downclocker:dc|clk_out ; fpga_clk ; 1 ; 1 ; 0 ; 0 ;
-; fpga_clk ; fpga_clk ; 121 ; 0 ; 0 ; 0 ;
-+------------------------------------------+------------------------------------------+----------+----------+----------+----------+
-Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
-
-
----------------
-; Report TCCS ;
----------------
-No dedicated SERDES Transmitter circuitry present in device or used in design
-
-
----------------
-; Report RSKM ;
----------------
-No non-DPA dedicated SERDES Receiver circuitry present in device or used in design
-
-
-+------------------------------------------------+
-; Unconstrained Paths Summary ;
-+---------------------------------+-------+------+
-; Property ; Setup ; Hold ;
-+---------------------------------+-------+------+
-; Illegal Clocks ; 0 ; 0 ;
-; Unconstrained Clocks ; 0 ; 0 ;
-; Unconstrained Input Ports ; 0 ; 0 ;
-; Unconstrained Input Port Paths ; 0 ; 0 ;
-; Unconstrained Output Ports ; 6 ; 6 ;
-; Unconstrained Output Port Paths ; 6 ; 6 ;
-+---------------------------------+-------+------+
-
-
-+----------------------------------------------------------------------------------------------------------+
-; Clock Status Summary ;
-+------------------------------------------+------------------------------------------+------+-------------+
-; Target ; Clock ; Type ; Status ;
-+------------------------------------------+------------------------------------------+------+-------------+
-; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; cpu:cpu|st7920_serial_driver:gpu|lcd_clk ; Base ; Constrained ;
-; downclocker:dc|clk_out ; downclocker:dc|clk_out ; Base ; Constrained ;
-; fpga_clk ; fpga_clk ; Base ; Constrained ;
-+------------------------------------------+------------------------------------------+------+-------------+
-
-
-+-----------------------------------------------------------------------------------------------------+
-; Unconstrained Output Ports ;
-+-------------+---------------------------------------------------------------------------------------+
-; Output Port ; Comment ;
-+-------------+---------------------------------------------------------------------------------------+
-; lcd_clk ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; lcd_data ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-+-------------+---------------------------------------------------------------------------------------+
-
-
-+-----------------------------------------------------------------------------------------------------+
-; Unconstrained Output Ports ;
-+-------------+---------------------------------------------------------------------------------------+
-; Output Port ; Comment ;
-+-------------+---------------------------------------------------------------------------------------+
-; lcd_clk ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; lcd_data ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-; led[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
-+-------------+---------------------------------------------------------------------------------------+
-
-
-+--------------------------+
-; Timing Analyzer Messages ;
-+--------------------------+
-Info: *******************************************************************
-Info: Running Quartus Prime Timing Analyzer
- Info: Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
- Info: Processing started: Mon Apr 8 08:52:26 2024
-Info: Command: quartus_sta chip8 -c chip8
-Info: qsta_default_script.tcl version: #1
-Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
-Info (20030): Parallel compilation is enabled and will use 12 of the 12 processors detected
-Info (21077): Low junction temperature is -40 degrees C
-Info (21077): High junction temperature is 100 degrees C
-Critical Warning (332012): Synopsys Design Constraints File file not found: 'chip8.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
-Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
-Info (332105): Deriving Clocks
- Info (332105): create_clock -period 1.000 -name fpga_clk fpga_clk
- Info (332105): create_clock -period 1.000 -name cpu:cpu|st7920_serial_driver:gpu|lcd_clk cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332105): create_clock -period 1.000 -name downclocker:dc|clk_out downclocker:dc|clk_out
-Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty"
-Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
-Info: Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
-Info: Analyzing Slow 1100mV 100C Model
-Critical Warning (332148): Timing requirements not met
- Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer.
-Info (332146): Worst-case setup slack is -31.412
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -31.412 -1884.356 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): -11.058 -87363.415 downclocker:dc|clk_out
- Info (332119): -4.953 -27.713 fpga_clk
-Info (332146): Worst-case hold slack is 0.429
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): 0.429 0.000 downclocker:dc|clk_out
- Info (332119): 0.501 0.000 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): 0.814 0.000 fpga_clk
-Info (332140): No Recovery paths to report
-Info (332140): No Removal paths to report
-Info (332146): Worst-case minimum pulse width slack is -2.636
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -2.636 -8430.055 downclocker:dc|clk_out
- Info (332119): -0.622 -17.105 fpga_clk
- Info (332119): -0.538 -172.550 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
-Info (332114): Report Metastability: Found 8 synchronizer chains.
- Info (332114): Design MTBF is not calculated because the design doesn't meet its timing requirements.
-Info: Analyzing Slow 1100mV -40C Model
-Info (334003): Started post-fitting delay annotation
-Info (334004): Delay annotation completed successfully
-Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
-Critical Warning (332148): Timing requirements not met
- Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer.
-Info (332146): Worst-case setup slack is -29.494
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -29.494 -1798.010 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): -11.057 -87142.095 downclocker:dc|clk_out
- Info (332119): -4.658 -29.299 fpga_clk
-Info (332146): Worst-case hold slack is 0.483
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): 0.483 0.000 downclocker:dc|clk_out
- Info (332119): 0.546 0.000 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): 0.786 0.000 fpga_clk
-Info (332140): No Recovery paths to report
-Info (332140): No Removal paths to report
-Info (332146): Worst-case minimum pulse width slack is -2.636
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -2.636 -8301.987 downclocker:dc|clk_out
- Info (332119): -0.627 -18.184 fpga_clk
- Info (332119): -0.538 -170.070 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
-Info (332114): Report Metastability: Found 8 synchronizer chains.
- Info (332114): Design MTBF is not calculated because the design doesn't meet its timing requirements.
-Info: Analyzing Fast 1100mV 100C Model
-Info (334003): Started post-fitting delay annotation
-Info (334004): Delay annotation completed successfully
-Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
-Critical Warning (332148): Timing requirements not met
- Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer.
-Info (332146): Worst-case setup slack is -16.301
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -16.301 -1018.017 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): -5.608 -44394.911 downclocker:dc|clk_out
- Info (332119): -3.718 -8.178 fpga_clk
-Info (332146): Worst-case hold slack is 0.160
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): 0.160 0.000 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): 0.177 0.000 downclocker:dc|clk_out
- Info (332119): 0.303 0.000 fpga_clk
-Info (332140): No Recovery paths to report
-Info (332140): No Removal paths to report
-Info (332146): Worst-case minimum pulse width slack is -2.174
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -2.174 -537.344 downclocker:dc|clk_out
- Info (332119): -0.517 -2.901 fpga_clk
- Info (332119): -0.144 -6.507 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
-Info (332114): Report Metastability: Found 8 synchronizer chains.
- Info (332114): Design MTBF is not calculated because the design doesn't meet its timing requirements.
-Info: Analyzing Fast 1100mV -40C Model
-Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
-Critical Warning (332148): Timing requirements not met
- Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer.
-Info (332146): Worst-case setup slack is -14.004
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -14.004 -820.600 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): -4.541 -36337.093 downclocker:dc|clk_out
- Info (332119): -2.859 -5.427 fpga_clk
-Info (332146): Worst-case hold slack is 0.138
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): 0.138 0.000 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
- Info (332119): 0.164 0.000 downclocker:dc|clk_out
- Info (332119): 0.289 0.000 fpga_clk
-Info (332140): No Recovery paths to report
-Info (332140): No Removal paths to report
-Info (332146): Worst-case minimum pulse width slack is -2.174
- Info (332119): Slack End Point TNS Clock
- Info (332119): ========= =================== =====================
- Info (332119): -2.174 -534.258 downclocker:dc|clk_out
- Info (332119): -0.533 -2.899 fpga_clk
- Info (332119): -0.057 -2.411 cpu:cpu|st7920_serial_driver:gpu|lcd_clk
-Info (332114): Report Metastability: Found 8 synchronizer chains.
- Info (332114): Design MTBF is not calculated because the design doesn't meet its timing requirements.
-Info (332102): Design is not fully constrained for setup requirements
-Info (332102): Design is not fully constrained for hold requirements
-Info: Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings
- Info: Peak virtual memory: 1312 megabytes
- Info: Processing ended: Mon Apr 8 08:52:45 2024
- Info: Elapsed time: 00:00:19
- Info: Total CPU time (on all processors): 00:01:25
-
-
diff --git a/output_files/chip8.sta.summary b/output_files/chip8.sta.summary
deleted file mode 100644
index 2aeade8..0000000
--- a/output_files/chip8.sta.summary
+++ /dev/null
@@ -1,149 +0,0 @@
-------------------------------------------------------------
-Timing Analyzer Summary
-------------------------------------------------------------
-
-Type : Slow 1100mV 100C Model Setup 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -31.412
-TNS : -1884.356
-
-Type : Slow 1100mV 100C Model Setup 'downclocker:dc|clk_out'
-Slack : -11.058
-TNS : -87363.415
-
-Type : Slow 1100mV 100C Model Setup 'fpga_clk'
-Slack : -4.953
-TNS : -27.713
-
-Type : Slow 1100mV 100C Model Hold 'downclocker:dc|clk_out'
-Slack : 0.429
-TNS : 0.000
-
-Type : Slow 1100mV 100C Model Hold 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : 0.501
-TNS : 0.000
-
-Type : Slow 1100mV 100C Model Hold 'fpga_clk'
-Slack : 0.814
-TNS : 0.000
-
-Type : Slow 1100mV 100C Model Minimum Pulse Width 'downclocker:dc|clk_out'
-Slack : -2.636
-TNS : -8430.055
-
-Type : Slow 1100mV 100C Model Minimum Pulse Width 'fpga_clk'
-Slack : -0.622
-TNS : -17.105
-
-Type : Slow 1100mV 100C Model Minimum Pulse Width 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -0.538
-TNS : -172.550
-
-Type : Slow 1100mV -40C Model Setup 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -29.494
-TNS : -1798.010
-
-Type : Slow 1100mV -40C Model Setup 'downclocker:dc|clk_out'
-Slack : -11.057
-TNS : -87142.095
-
-Type : Slow 1100mV -40C Model Setup 'fpga_clk'
-Slack : -4.658
-TNS : -29.299
-
-Type : Slow 1100mV -40C Model Hold 'downclocker:dc|clk_out'
-Slack : 0.483
-TNS : 0.000
-
-Type : Slow 1100mV -40C Model Hold 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : 0.546
-TNS : 0.000
-
-Type : Slow 1100mV -40C Model Hold 'fpga_clk'
-Slack : 0.786
-TNS : 0.000
-
-Type : Slow 1100mV -40C Model Minimum Pulse Width 'downclocker:dc|clk_out'
-Slack : -2.636
-TNS : -8301.987
-
-Type : Slow 1100mV -40C Model Minimum Pulse Width 'fpga_clk'
-Slack : -0.627
-TNS : -18.184
-
-Type : Slow 1100mV -40C Model Minimum Pulse Width 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -0.538
-TNS : -170.070
-
-Type : Fast 1100mV 100C Model Setup 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -16.301
-TNS : -1018.017
-
-Type : Fast 1100mV 100C Model Setup 'downclocker:dc|clk_out'
-Slack : -5.608
-TNS : -44394.911
-
-Type : Fast 1100mV 100C Model Setup 'fpga_clk'
-Slack : -3.718
-TNS : -8.178
-
-Type : Fast 1100mV 100C Model Hold 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : 0.160
-TNS : 0.000
-
-Type : Fast 1100mV 100C Model Hold 'downclocker:dc|clk_out'
-Slack : 0.177
-TNS : 0.000
-
-Type : Fast 1100mV 100C Model Hold 'fpga_clk'
-Slack : 0.303
-TNS : 0.000
-
-Type : Fast 1100mV 100C Model Minimum Pulse Width 'downclocker:dc|clk_out'
-Slack : -2.174
-TNS : -537.344
-
-Type : Fast 1100mV 100C Model Minimum Pulse Width 'fpga_clk'
-Slack : -0.517
-TNS : -2.901
-
-Type : Fast 1100mV 100C Model Minimum Pulse Width 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -0.144
-TNS : -6.507
-
-Type : Fast 1100mV -40C Model Setup 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -14.004
-TNS : -820.600
-
-Type : Fast 1100mV -40C Model Setup 'downclocker:dc|clk_out'
-Slack : -4.541
-TNS : -36337.093
-
-Type : Fast 1100mV -40C Model Setup 'fpga_clk'
-Slack : -2.859
-TNS : -5.427
-
-Type : Fast 1100mV -40C Model Hold 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : 0.138
-TNS : 0.000
-
-Type : Fast 1100mV -40C Model Hold 'downclocker:dc|clk_out'
-Slack : 0.164
-TNS : 0.000
-
-Type : Fast 1100mV -40C Model Hold 'fpga_clk'
-Slack : 0.289
-TNS : 0.000
-
-Type : Fast 1100mV -40C Model Minimum Pulse Width 'downclocker:dc|clk_out'
-Slack : -2.174
-TNS : -534.258
-
-Type : Fast 1100mV -40C Model Minimum Pulse Width 'fpga_clk'
-Slack : -0.533
-TNS : -2.899
-
-Type : Fast 1100mV -40C Model Minimum Pulse Width 'cpu:cpu|st7920_serial_driver:gpu|lcd_clk'
-Slack : -0.057
-TNS : -2.411
-
-------------------------------------------------------------
diff --git a/rom.bin b/rom.bin
deleted file mode 100644
index 2709e3b..0000000
--- a/rom.bin
+++ /dev/null
@@ -1,132 +0,0 @@
-00000000
-11100000
-10100010
-00101010
-01100000
-00001100
-01100001
-00001000
-11010000
-00011111
-01110000
-00001001
-10100010
-00111001
-11010000
-00011111
-10100010
-01001000
-01110000
-00001000
-11010000
-00011111
-01110000
-00000100
-10100010
-01010111
-11010000
-00011111
-01110000
-00001000
-10100010
-01100110
-11010000
-00011111
-01110000
-00001000
-10100010
-01110101
-11010000
-00011111
-00010010
-00101000
-11111111
-00000000
-11111111
-00000000
-00111100
-00000000
-00111100
-00000000
-00111100
-00000000
-00111100
-00000000
-11111111
-00000000
-11111111
-11111111
-00000000
-11111111
-00000000
-00111000
-00000000
-00111111
-00000000
-00111111
-00000000
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-00000000
-11111111
-00000000
-11111111
-10000000
-00000000
-11100000
-00000000
-11100000
-00000000
-10000000
-00000000
-10000000
-00000000
-11100000
-00000000
-11100000
-00000000
-10000000
-11111000
-00000000
-11111100
-00000000
-00111110
-00000000
-00111111
-00000000
-00111011
-00000000
-00111001
-00000000
-11111000
-00000000
-11111000
-00000011
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-00000000
-00001111
-00000000
-10111111
-00000000
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-00000000
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-00000000
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-00000000
-01000011
-11100101
-00000101
-11100010
-00000000
-10000101
-00000111
-10000001
-00000001
-10000000
-00000010
-10000000
-00000010
-11100110
-00000010
-11100111