16 lines
315 B
Systemverilog
16 lines
315 B
Systemverilog
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module keyboard (
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input wire clk_in,
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output bit keyboard [15:0]
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);
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import "DPI-C" function bit [7:0] get_key();
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always_ff @(posedge clk_in) begin
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bit[7:0] keyval = get_key();
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if (&keyval != 1) begin
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keyboard[keyval[3:0]] = keyval[7];
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end
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end
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endmodule
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