2024-04-08 13:54:48 +00:00
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1712584346749 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition " "Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1712584346749 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 8 08:52:26 2024 " "Processing started: Mon Apr 8 08:52:26 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1712584346749 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1712584346749 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta chip8 -c chip8 " "Command: quartus_sta chip8 -c chip8" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1712584346749 ""}
{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1712584346775 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Timing Analyzer" 0 -1 1712584347519 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "12 12 " "Parallel compilation is enabled and will use 12 of the 12 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1712584347519 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature -40 degrees C " "Low junction temperature is -40 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584347540 ""}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 100 degrees C " "High junction temperature is 100 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584347540 ""}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "chip8.sdc " "Synopsys Design Constraints File file not found: 'chip8.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1712584348745 ""}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584348745 ""}
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name fpga_clk fpga_clk " "create_clock -period 1.000 -name fpga_clk fpga_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1712584348809 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " "create_clock -period 1.000 -name cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1712584348809 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name downclocker:dc\|clk_out downclocker:dc\|clk_out " "create_clock -period 1.000 -name downclocker:dc\|clk_out downclocker:dc\|clk_out" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1712584348809 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584348809 ""}
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1712584348957 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584349002 ""}
{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1712584349007 ""}
{ "Info" "0" "" "Analyzing Slow 1100mV 100C Model" { } { } 0 0 "Analyzing Slow 1100mV 100C Model" 0 0 "Timing Analyzer" 0 0 1712584349012 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584352097 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584352097 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -31.412 " "Worst-case setup slack is -31.412" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -31.412 -1884.356 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -31.412 -1884.356 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -11.058 -87363.415 downclocker:dc\|clk_out " " -11.058 -87363.415 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.953 -27.713 fpga_clk " " -4.953 -27.713 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352098 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584352098 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.429 " "Worst-case hold slack is 0.429" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.429 0.000 downclocker:dc\|clk_out " " 0.429 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.501 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.501 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.814 0.000 fpga_clk " " 0.814 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352292 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584352292 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584352293 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584352294 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -8430.055 downclocker:dc\|clk_out " " -2.636 -8430.055 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.622 -17.105 fpga_clk " " -0.622 -17.105 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -172.550 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.538 -172.550 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584352305 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584352305 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584352352 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584352352 ""}
{ "Info" "0" "" "Analyzing Slow 1100mV -40C Model" { } { } 0 0 "Analyzing Slow 1100mV -40C Model" 0 0 "Timing Analyzer" 0 0 1712584352354 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1712584352416 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1712584357006 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584357723 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584358182 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584358182 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -29.494 " "Worst-case setup slack is -29.494" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -29.494 -1798.010 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -29.494 -1798.010 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -11.057 -87142.095 downclocker:dc\|clk_out " " -11.057 -87142.095 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.658 -29.299 fpga_clk " " -4.658 -29.299 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358183 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584358183 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.483 " "Worst-case hold slack is 0.483" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.483 0.000 downclocker:dc\|clk_out " " 0.483 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.546 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.546 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.786 0.000 fpga_clk " " 0.786 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358364 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584358364 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584358365 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584358367 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -8301.987 downclocker:dc\|clk_out " " -2.636 -8301.987 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.627 -18.184 fpga_clk " " -0.627 -18.184 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -170.070 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.538 -170.070 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584358379 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584358379 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584358423 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584358423 ""}
{ "Info" "0" "" "Analyzing Fast 1100mV 100C Model" { } { } 0 0 "Analyzing Fast 1100mV 100C Model" 0 0 "Timing Analyzer" 0 0 1712584358424 ""}
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1712584358636 ""}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1712584362578 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584363407 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584363595 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584363595 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -16.301 " "Worst-case setup slack is -16.301" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -16.301 -1018.017 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -16.301 -1018.017 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -5.608 -44394.911 downclocker:dc\|clk_out " " -5.608 -44394.911 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.718 -8.178 fpga_clk " " -3.718 -8.178 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363596 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584363596 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.160 " "Worst-case hold slack is 0.160" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.160 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.160 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.177 0.000 downclocker:dc\|clk_out " " 0.177 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.303 0.000 fpga_clk " " 0.303 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363790 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584363790 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584363791 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584363791 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.174 " "Worst-case minimum pulse width slack is -2.174" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.174 -537.344 downclocker:dc\|clk_out " " -2.174 -537.344 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.517 -2.901 fpga_clk " " -0.517 -2.901 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.144 -6.507 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.144 -6.507 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584363803 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584363803 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584363846 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584363846 ""}
{ "Info" "0" "" "Analyzing Fast 1100mV -40C Model" { } { } 0 0 "Analyzing Fast 1100mV -40C Model" 0 0 "Timing Analyzer" 0 0 1712584363847 ""}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584364332 ""}
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1712584364514 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1712584364514 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -14.004 " "Worst-case setup slack is -14.004" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -14.004 -820.600 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -14.004 -820.600 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.541 -36337.093 downclocker:dc\|clk_out " " -4.541 -36337.093 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.859 -5.427 fpga_clk " " -2.859 -5.427 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364515 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584364515 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.138 " "Worst-case hold slack is 0.138" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.138 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " 0.138 0.000 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.164 0.000 downclocker:dc\|clk_out " " 0.164 0.000 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.289 0.000 fpga_clk " " 0.289 0.000 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364696 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584364696 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584364696 ""}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1712584364697 ""}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.174 " "Worst-case minimum pulse width slack is -2.174" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.174 -534.258 downclocker:dc\|clk_out " " -2.174 -534.258 downclocker:dc\|clk_out " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.533 -2.899 fpga_clk " " -0.533 -2.899 fpga_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.057 -2.411 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " " -0.057 -2.411 cpu:cpu\|st7920_serial_driver:gpu\|lcd_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1712584364710 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1712584364710 ""}
{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 8 synchronizer chains. " "Report Metastability: Found 8 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Design MTBF is not calculated because the design doesn't meet its timing requirements. " "Design MTBF is not calculated because the design doesn't meet its timing requirements." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1712584364752 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1712584364752 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1712584365431 ""}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1712584365432 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1312 " "Peak virtual memory: 1312 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1712584365561 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 8 08:52:45 2024 " "Processing ended: Mon Apr 8 08:52:45 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1712584365561 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:19 " "Elapsed time: 00:00:19" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1712584365561 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:01:25 " "Total CPU time (on all processors): 00:01:25" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1712584365561 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1712584365561 ""}
