--lpm_abs CARRY_CHAIN="MANUAL" DEVICE_FAMILY="Cyclone V" IGNORE_CARRY_BUFFERS="OFF" LPM_WIDTH=32 data result
--VERSION_BEGIN 23.1 cbx_cycloneii 2023:11:29:19:33:06:SC cbx_lpm_abs 2023:11:29:19:33:06:SC cbx_lpm_add_sub 2023:11:29:19:33:06:SC cbx_mgl 2023:11:29:19:43:53:SC cbx_nadder 2023:11:29:19:33:06:SC cbx_stratix 2023:11:29:19:33:06:SC cbx_stratixii 2023:11:29:19:33:05:SC cbx_util_mgl 2023:11:29:19:33:06:SC  VERSION_END


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--synthesis_resources = lut 32 
SUBDESIGN lpm_abs_4p9
( 
	data[31..0]	:	input;
	overflow	:	output;
	result[31..0]	:	output;
) 
VARIABLE
	adder_result_int[32..0]	:	WIRE;
	adder_cin	:	WIRE;
	adder_dataa[31..0]	:	WIRE;
	adder_datab[31..0]	:	WIRE;
	adder_result[31..0]	:	WIRE;
	gnd_wire	: WIRE;
	result_tmp[31..0]	: WIRE;

BEGIN 
	adder_result_int[] = (adder_dataa[], adder_cin) + (adder_datab[], adder_cin);
	adder_result[] = adder_result_int[32..1];
	adder_cin = data[31..31];
	adder_dataa[] = (data[] $ data[31..31]);
	adder_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire);
	gnd_wire = B"0";
	overflow = (result_tmp[31..31] & data[31..31]);
	result[] = result_tmp[];
	result_tmp[] = adder_result[];
END;
--VALID FILE
