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848 changed files with 3642008 additions and 0 deletions
43
hello_world_dma.srcs/constrs_1/new/early.xdc
Normal file
43
hello_world_dma.srcs/constrs_1/new/early.xdc
Normal file
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@ -0,0 +1,43 @@
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|||
# "Early" constraints file
|
||||
# Evaluated before integrated IP
|
||||
# PCIe lane 0
|
||||
set_property LOC GTPE2_CHANNEL_X0Y7 [get_cells {top_i/xdma_0/inst/top_xdma_0_0_pcie2_to_pcie3_wrapper_i/pcie2_ip_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[3].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]
|
||||
set_property PACKAGE_PIN A10 [get_ports {pcie_mgt_rxn[0]}]
|
||||
set_property PACKAGE_PIN B10 [get_ports {pcie_mgt_rxp[0]}]
|
||||
set_property PACKAGE_PIN A6 [get_ports {pcie_mgt_txn[0]}]
|
||||
set_property PACKAGE_PIN B6 [get_ports {pcie_mgt_txp[0]}]
|
||||
|
||||
# PCIe lane 1
|
||||
set_property LOC GTPE2_CHANNEL_X0Y6 [get_cells {top_i/xdma_0/inst/top_xdma_0_0_pcie2_to_pcie3_wrapper_i/pcie2_ip_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[0].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]
|
||||
set_property PACKAGE_PIN A8 [get_ports {pcie_mgt_rxn[1]}]
|
||||
set_property PACKAGE_PIN B8 [get_ports {pcie_mgt_rxp[1]}]
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||||
set_property PACKAGE_PIN A4 [get_ports {pcie_mgt_txn[1]}]
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set_property PACKAGE_PIN B4 [get_ports {pcie_mgt_txp[1]}]
|
||||
|
||||
# PCIe lane 2
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set_property LOC GTPE2_CHANNEL_X0Y5 [get_cells {top_i/xdma_0/inst/top_xdma_0_0_pcie2_to_pcie3_wrapper_i/pcie2_ip_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[2].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]
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||||
set_property PACKAGE_PIN C11 [get_ports {pcie_mgt_rxn[2]}]
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||||
set_property PACKAGE_PIN D11 [get_ports {pcie_mgt_rxp[2]}]
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||||
set_property PACKAGE_PIN C5 [get_ports {pcie_mgt_txn[2]}]
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||||
set_property PACKAGE_PIN D5 [get_ports {pcie_mgt_txp[2]}]
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||||
|
||||
# PCIe lane 3
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set_property LOC GTPE2_CHANNEL_X0Y4 [get_cells {top_i/xdma_0/inst/top_xdma_0_0_pcie2_to_pcie3_wrapper_i/pcie2_ip_i/inst/inst/gt_top_i/pipe_wrapper_i/pipe_lane[1].gt_wrapper_i/gtp_channel.gtpe2_channel_i}]
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set_property PACKAGE_PIN C9 [get_ports {pcie_mgt_rxn[3]}]
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||||
set_property PACKAGE_PIN D9 [get_ports {pcie_mgt_rxp[3]}]
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||||
set_property PACKAGE_PIN C7 [get_ports {pcie_mgt_txn[3]}]
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set_property PACKAGE_PIN D7 [get_ports {pcie_mgt_txp[3]}]
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||||
|
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# PCIe refclock
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set_property PACKAGE_PIN F6 [get_ports {diff_clock_rtl_0_clk_p[0]}]
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set_property PACKAGE_PIN E6 [get_ports {diff_clock_rtl_0_clk_n[0]}]
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||||
|
||||
# Other PCIe signals
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set_property PACKAGE_PIN G1 [get_ports {pcie_clkreq_l}]
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set_property IOSTANDARD LVCMOS33 [get_ports {pcie_clkreq_l}]
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set_property PACKAGE_PIN J1 [get_ports reset_rtl_0]
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set_property IOSTANDARD LVCMOS33 [get_ports reset_rtl_0]
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||||
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||||
|
||||
|
||||
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||||
19
hello_world_dma.srcs/constrs_1/new/normal.xdc
Normal file
19
hello_world_dma.srcs/constrs_1/new/normal.xdc
Normal file
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@ -0,0 +1,19 @@
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|||
set_property PACKAGE_PIN G4 [get_ports {leds_tri_o[1]}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {leds_tri_o[1]}]
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set_property PULLUP true [get_ports {leds_tri_o[1]}]
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||||
set_property DRIVE 8 [get_ports {leds_tri_o[1]}]
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||||
|
||||
set_property PACKAGE_PIN H4 [get_ports {leds_tri_o[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {leds_tri_o[0]}]
|
||||
set_property PULLUP true [get_ports {leds_tri_o[0]}]
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set_property DRIVE 8 [get_ports {leds_tri_o[0]}]
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||||
|
||||
set_property PACKAGE_PIN M1 [get_ports {LED_M2[0]}]
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||||
set_property IOSTANDARD LVCMOS33 [get_ports {LED_M2[0]}]
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||||
set_property PULLUP true [get_ports {LED_M2[0]}]
|
||||
set_property DRIVE 8 [get_ports {LED_M2[0]}]
|
||||
|
||||
|
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set_property BITSTREAM.CONFIG.CONFIGRATE 16 [current_design]
|
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set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
|
||||
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
|
||||
|
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@ -0,0 +1,423 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<spirit:vendor>xilinx.com</spirit:vendor>
|
||||
<spirit:library>xci</spirit:library>
|
||||
<spirit:name>unknown</spirit:name>
|
||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:componentInstances>
|
||||
<spirit:componentInstance>
|
||||
<spirit:instanceName>top_axi_bram_ctrl_0_0</spirit:instanceName>
|
||||
<spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="axi_bram_ctrl" spirit:version="4.1"/>
|
||||
<spirit:configurableElementValues>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_ECC">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_SIZE">65536</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.READ_LATENCY">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.READ_WRITE_MODE">WRITE_ONLY</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MEM_ECC">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MEM_SIZE">65536</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MEM_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.READ_LATENCY">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.READ_WRITE_MODE">READ_ONLY</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLKIF.ASSOCIATED_PORT"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLKIF.CLK_DOMAIN">top_xdma_0_0_axi_aclk</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLKIF.FREQ_HZ">125000000</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLKIF.FREQ_TOLERANCE_HZ">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLKIF.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLKIF.PHASE">0.0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.INTERRUPTIF.PortWidth">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.RSTIF.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ADDR_WIDTH">16</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ARUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.AWUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.BUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.CLK_DOMAIN">top_xdma_0_0_axi_aclk</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.FREQ_HZ">125000000</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_PROT">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_QOS">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_REGION">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ID_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING">16</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.PHASE">0.0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL">AXI4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.SUPPORTS_NARROW_BURST">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.ADDR_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.ARUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.AWUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.BUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.CLK_DOMAIN"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.FREQ_HZ">100000000</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_BRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_CACHE">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_LOCK">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_PROT">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_QOS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_REGION">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_RRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_WSTRB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.ID_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.NUM_READ_OUTSTANDING">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.NUM_READ_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.NUM_WRITE_OUTSTANDING">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.PHASE">0.0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.PROTOCOL">AXI4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.RUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.WUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_BRAM_ADDR_WIDTH">14</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_BRAM_INST_MODE">EXTERNAL</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ECC">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ECC_ONOFF_RESET_VALUE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ECC_TYPE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FAMILY">artix7</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FAULT_INJECT">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MEMORY_DEPTH">16384</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_CMD_OPTIMIZATION">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_LATENCY">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SINGLE_PORT_BRAM">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">16</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_CTRL_ADDR_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_CTRL_DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ID_WIDTH">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_PROTOCOL">AXI4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_SUPPORTS_NARROW_BURST">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BMG_INSTANCE">EXTERNAL</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">top_axi_bram_ctrl_0_0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ECC_ONOFF_RESET_VALUE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ECC_TYPE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FAULT_INJECT">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ID_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MEM_DEPTH">16384</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROTOCOL">AXI4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RD_CMD_OPTIMIZATION">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.READ_LATENCY">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SINGLE_PORT_BRAM">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SUPPORTS_NARROW_BURST">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_ECC">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">artix7</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7a100tl</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">fgg484</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2L</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE">E</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">6</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../hello_world_dma.gen/sources_1/bd/top/ip/top_axi_bram_ctrl_0_0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
|
||||
</spirit:configurableElementValues>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
|
||||
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|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
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||||
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.BMG_INSTANCE" xilinx:valuePermission="bd"/>
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||||
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||||
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||||
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|
||||
</xilinx:configElementInfos>
|
||||
<xilinx:boundaryDescriptionInfo>
|
||||
<xilinx:boundaryDescription xilinx:boundaryDescriptionJSON="{
|
||||
"schema": "xilinx.com:schema:json_boundary:1.0",
|
||||
"boundary": {
|
||||
"ports": {
|
||||
"s_axi_aclk": [ { "direction": "in" } ],
|
||||
"s_axi_aresetn": [ { "direction": "in" } ],
|
||||
"s_axi_awaddr": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"s_axi_awvalid": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_awready": [ { "direction": "out" } ],
|
||||
"s_axi_wdata": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
|
||||
"s_axi_wstrb": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
|
||||
"s_axi_wlast": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_wvalid": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_wready": [ { "direction": "out" } ],
|
||||
"s_axi_bresp": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
|
||||
"s_axi_bvalid": [ { "direction": "out" } ],
|
||||
"s_axi_bready": [ { "direction": "in", "driver_value": "0" } ],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"s_axi_rdata": [ { "direction": "out", "size_left": "31", "size_right": "0" } ],
|
||||
"s_axi_rresp": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
|
||||
"s_axi_rlast": [ { "direction": "out", "driver_value": "0" } ],
|
||||
"s_axi_rvalid": [ { "direction": "out" } ],
|
||||
"s_axi_rready": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"bram_rst_a": [ { "direction": "out" } ],
|
||||
"bram_clk_a": [ { "direction": "out" } ],
|
||||
"bram_en_a": [ { "direction": "out" } ],
|
||||
"bram_we_a": [ { "direction": "out", "size_left": "3", "size_right": "0" } ],
|
||||
"bram_addr_a": [ { "direction": "out", "size_left": "15", "size_right": "0" } ],
|
||||
"bram_wrdata_a": [ { "direction": "out", "size_left": "31", "size_right": "0" } ],
|
||||
"bram_rddata_a": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
|
||||
"bram_rst_b": [ { "direction": "out" } ],
|
||||
"bram_clk_b": [ { "direction": "out" } ],
|
||||
"bram_en_b": [ { "direction": "out" } ],
|
||||
"bram_we_b": [ { "direction": "out", "size_left": "3", "size_right": "0" } ],
|
||||
"bram_addr_b": [ { "direction": "out", "size_left": "15", "size_right": "0" } ],
|
||||
"bram_wrdata_b": [ { "direction": "out", "size_left": "31", "size_right": "0" } ],
|
||||
"bram_rddata_b": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ]
|
||||
},
|
||||
"interfaces": {
|
||||
"S_AXI": {
|
||||
"vlnv": "xilinx.com:interface:aximm:1.0",
|
||||
"abstraction_type": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"mode": "slave",
|
||||
"memory_map_ref": "S_AXI",
|
||||
"parameters": {
|
||||
"DATA_WIDTH": [ { "value": "32", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"PROTOCOL": [ { "value": "AXI4", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"FREQ_HZ": [ { "value": "125000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ID_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ADDR_WIDTH": [ { "value": "16", "value_src": "auto", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ARUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
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|
||||
"RUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"BUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_BURST": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_LOCK": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_PROT": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_CACHE": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_QOS": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_REGION": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_WSTRB": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_BRESP": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_RRESP": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"SUPPORTS_NARROW_BURST": [ { "value": "0", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_READ_OUTSTANDING": [ { "value": "32", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_WRITE_OUTSTANDING": [ { "value": "16", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"MAX_BURST_LENGTH": [ { "value": "256", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"PHASE": [ { "value": "0.0", "value_permission": "bd", "resolve_type": "generated", "format": "float", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"CLK_DOMAIN": [ { "value": "top_xdma_0_0_axi_aclk", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_READ_THREADS": [ { "value": "1", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_WRITE_THREADS": [ { "value": "1", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"RUSER_BITS_PER_BYTE": [ { "value": "0", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"WUSER_BITS_PER_BYTE": [ { "value": "0", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"ARADDR": [ { "physical_name": "s_axi_araddr" } ],
|
||||
"ARBURST": [ { "physical_name": "s_axi_arburst" } ],
|
||||
"ARCACHE": [ { "physical_name": "s_axi_arcache" } ],
|
||||
"ARLEN": [ { "physical_name": "s_axi_arlen" } ],
|
||||
"ARLOCK": [ { "physical_name": "s_axi_arlock" } ],
|
||||
"ARPROT": [ { "physical_name": "s_axi_arprot" } ],
|
||||
"ARREADY": [ { "physical_name": "s_axi_arready" } ],
|
||||
"ARSIZE": [ { "physical_name": "s_axi_arsize" } ],
|
||||
"ARVALID": [ { "physical_name": "s_axi_arvalid" } ],
|
||||
"AWADDR": [ { "physical_name": "s_axi_awaddr" } ],
|
||||
"AWBURST": [ { "physical_name": "s_axi_awburst" } ],
|
||||
"AWCACHE": [ { "physical_name": "s_axi_awcache" } ],
|
||||
"AWLEN": [ { "physical_name": "s_axi_awlen" } ],
|
||||
"AWLOCK": [ { "physical_name": "s_axi_awlock" } ],
|
||||
"AWPROT": [ { "physical_name": "s_axi_awprot" } ],
|
||||
"AWREADY": [ { "physical_name": "s_axi_awready" } ],
|
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"AWSIZE": [ { "physical_name": "s_axi_awsize" } ],
|
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"AWVALID": [ { "physical_name": "s_axi_awvalid" } ],
|
||||
"BREADY": [ { "physical_name": "s_axi_bready" } ],
|
||||
"BRESP": [ { "physical_name": "s_axi_bresp" } ],
|
||||
"BVALID": [ { "physical_name": "s_axi_bvalid" } ],
|
||||
"RDATA": [ { "physical_name": "s_axi_rdata" } ],
|
||||
"RLAST": [ { "physical_name": "s_axi_rlast" } ],
|
||||
"RREADY": [ { "physical_name": "s_axi_rready" } ],
|
||||
"RRESP": [ { "physical_name": "s_axi_rresp" } ],
|
||||
"RVALID": [ { "physical_name": "s_axi_rvalid" } ],
|
||||
"WDATA": [ { "physical_name": "s_axi_wdata" } ],
|
||||
"WLAST": [ { "physical_name": "s_axi_wlast" } ],
|
||||
"WREADY": [ { "physical_name": "s_axi_wready" } ],
|
||||
"WSTRB": [ { "physical_name": "s_axi_wstrb" } ],
|
||||
"WVALID": [ { "physical_name": "s_axi_wvalid" } ]
|
||||
}
|
||||
},
|
||||
"BRAM_PORTA": {
|
||||
"vlnv": "xilinx.com:interface:bram:1.0",
|
||||
"abstraction_type": "xilinx.com:interface:bram_rtl:1.0",
|
||||
"mode": "master",
|
||||
"parameters": {
|
||||
"MASTER_TYPE": [ { "value": "BRAM_CTRL", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"MEM_SIZE": [ { "value": "65536", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"MEM_WIDTH": [ { "value": "32", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"MEM_ECC": [ { "value": "NONE", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"READ_WRITE_MODE": [ { "value": "WRITE_ONLY", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"READ_LATENCY": [ { "value": "1", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"ADDR": [ { "physical_name": "bram_addr_a" } ],
|
||||
"CLK": [ { "physical_name": "bram_clk_a" } ],
|
||||
"DIN": [ { "physical_name": "bram_wrdata_a" } ],
|
||||
"DOUT": [ { "physical_name": "bram_rddata_a" } ],
|
||||
"EN": [ { "physical_name": "bram_en_a" } ],
|
||||
"RST": [ { "physical_name": "bram_rst_a" } ],
|
||||
"WE": [ { "physical_name": "bram_we_a" } ]
|
||||
}
|
||||
},
|
||||
"BRAM_PORTB": {
|
||||
"vlnv": "xilinx.com:interface:bram:1.0",
|
||||
"abstraction_type": "xilinx.com:interface:bram_rtl:1.0",
|
||||
"mode": "master",
|
||||
"parameters": {
|
||||
"MASTER_TYPE": [ { "value": "BRAM_CTRL", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"MEM_SIZE": [ { "value": "65536", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"MEM_WIDTH": [ { "value": "32", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"MEM_ECC": [ { "value": "NONE", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"READ_WRITE_MODE": [ { "value": "READ_ONLY", "value_src": "propagated", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"READ_LATENCY": [ { "value": "1", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"ADDR": [ { "physical_name": "bram_addr_b" } ],
|
||||
"CLK": [ { "physical_name": "bram_clk_b" } ],
|
||||
"DIN": [ { "physical_name": "bram_wrdata_b" } ],
|
||||
"DOUT": [ { "physical_name": "bram_rddata_b" } ],
|
||||
"EN": [ { "physical_name": "bram_en_b" } ],
|
||||
"RST": [ { "physical_name": "bram_rst_b" } ],
|
||||
"WE": [ { "physical_name": "bram_we_b" } ]
|
||||
}
|
||||
},
|
||||
"RSTIF": {
|
||||
"vlnv": "xilinx.com:signal:reset:1.0",
|
||||
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
|
||||
"mode": "slave",
|
||||
"parameters": {
|
||||
"POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"RST": [ { "physical_name": "s_axi_aresetn" } ]
|
||||
}
|
||||
},
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||||
"CLKIF": {
|
||||
"vlnv": "xilinx.com:signal:clock:1.0",
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||||
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
|
||||
"mode": "slave",
|
||||
"parameters": {
|
||||
"ASSOCIATED_BUSIF": [ { "value": "S_AXI:S_AXI_CTRL", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"ASSOCIATED_RESET": [ { "value": "s_axi_aresetn", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"FREQ_HZ": [ { "value": "125000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "user", "format": "long", "usage": "all" } ],
|
||||
"FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"PHASE": [ { "value": "0.0", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"CLK_DOMAIN": [ { "value": "top_xdma_0_0_axi_aclk", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ASSOCIATED_PORT": [ { "value": "", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
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||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"CLK": [ { "physical_name": "s_axi_aclk" } ]
|
||||
}
|
||||
}
|
||||
},
|
||||
"memory_maps": {
|
||||
"S_AXI": {
|
||||
"display_name": "S_AXI_MEM",
|
||||
"description": "Memory Map for S_AXI",
|
||||
"address_blocks": {
|
||||
"Mem0": {
|
||||
"base_address": "0",
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||||
"range": "4096",
|
||||
"display_name": "Mem0",
|
||||
"description": "Register Block",
|
||||
"usage": "memory",
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||||
"access": "read-write"
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}
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}
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}
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}
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}
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}"/>
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</xilinx:boundaryDescriptionInfo>
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</xilinx:componentInstanceExtensions>
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</spirit:vendorExtensions>
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</spirit:componentInstance>
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</spirit:componentInstances>
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||||
</spirit:design>
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||||
|
|
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|||
<?xml version="1.0" encoding="UTF-8"?>
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<spirit:componentInstance>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_GPIO_WIDTH">2</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_BOARD_FLOW">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7a100tl</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">fgg484</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
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|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ADDR_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ARUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.AWUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.BUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.DATA_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BURST" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_PROT" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_QOS" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_REGION" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ID_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.MAX_BURST_LENGTH" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING" xilinx:valueSource="constant_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_THREADS" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING" xilinx:valueSource="constant_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_THREADS" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PHASE" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.READ_WRITE_MODE" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.SUPPORTS_NARROW_BURST" xilinx:valueSource="constant_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_PORT" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_ACLK.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_ACLK.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_ACLK.FREQ_TOLERANCE_HZ" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_ACLK.PHASE" xilinx:valuePermission="bd"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_ALL_OUTPUTS" xilinx:valueSource="user"/>
|
||||
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_GPIO_WIDTH" xilinx:valueSource="user"/>
|
||||
</xilinx:configElementInfos>
|
||||
<xilinx:boundaryDescriptionInfo>
|
||||
<xilinx:boundaryDescription xilinx:boundaryDescriptionJSON="{
|
||||
"schema": "xilinx.com:schema:json_boundary:1.0",
|
||||
"boundary": {
|
||||
"ports": {
|
||||
"s_axi_aclk": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_aresetn": [ { "direction": "in", "driver_value": "1" } ],
|
||||
"s_axi_awaddr": [ { "direction": "in", "size_left": "8", "size_right": "0", "driver_value": "0" } ],
|
||||
"s_axi_awvalid": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_awready": [ { "direction": "out" } ],
|
||||
"s_axi_wdata": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
|
||||
"s_axi_wstrb": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
|
||||
"s_axi_wvalid": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_wready": [ { "direction": "out" } ],
|
||||
"s_axi_bresp": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
|
||||
"s_axi_bvalid": [ { "direction": "out" } ],
|
||||
"s_axi_bready": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_araddr": [ { "direction": "in", "size_left": "8", "size_right": "0", "driver_value": "0" } ],
|
||||
"s_axi_arvalid": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"s_axi_arready": [ { "direction": "out" } ],
|
||||
"s_axi_rdata": [ { "direction": "out", "size_left": "31", "size_right": "0" } ],
|
||||
"s_axi_rresp": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
|
||||
"s_axi_rvalid": [ { "direction": "out" } ],
|
||||
"s_axi_rready": [ { "direction": "in", "driver_value": "0" } ],
|
||||
"gpio_io_o": [ { "direction": "out", "size_left": "1", "size_right": "0" } ]
|
||||
},
|
||||
"interfaces": {
|
||||
"S_AXI": {
|
||||
"vlnv": "xilinx.com:interface:aximm:1.0",
|
||||
"abstraction_type": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"mode": "slave",
|
||||
"memory_map_ref": "S_AXI",
|
||||
"parameters": {
|
||||
"DATA_WIDTH": [ { "value": "32", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"PROTOCOL": [ { "value": "AXI4LITE", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"FREQ_HZ": [ { "value": "125000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ID_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ADDR_WIDTH": [ { "value": "9", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ARUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"WUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"RUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"BUSER_WIDTH": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_BURST": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_LOCK": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_PROT": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_CACHE": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_QOS": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_REGION": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_WSTRB": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_BRESP": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"HAS_RRESP": [ { "value": "1", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"SUPPORTS_NARROW_BURST": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_READ_OUTSTANDING": [ { "value": "1", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_WRITE_OUTSTANDING": [ { "value": "1", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"MAX_BURST_LENGTH": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"PHASE": [ { "value": "0.0", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"CLK_DOMAIN": [ { "value": "top_xdma_0_0_axi_aclk", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_READ_THREADS": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"NUM_WRITE_THREADS": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"RUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"WUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"ARADDR": [ { "physical_name": "s_axi_araddr" } ],
|
||||
"ARREADY": [ { "physical_name": "s_axi_arready" } ],
|
||||
"ARVALID": [ { "physical_name": "s_axi_arvalid" } ],
|
||||
"AWADDR": [ { "physical_name": "s_axi_awaddr" } ],
|
||||
"AWREADY": [ { "physical_name": "s_axi_awready" } ],
|
||||
"AWVALID": [ { "physical_name": "s_axi_awvalid" } ],
|
||||
"BREADY": [ { "physical_name": "s_axi_bready" } ],
|
||||
"BRESP": [ { "physical_name": "s_axi_bresp" } ],
|
||||
"BVALID": [ { "physical_name": "s_axi_bvalid" } ],
|
||||
"RDATA": [ { "physical_name": "s_axi_rdata" } ],
|
||||
"RREADY": [ { "physical_name": "s_axi_rready" } ],
|
||||
"RRESP": [ { "physical_name": "s_axi_rresp" } ],
|
||||
"RVALID": [ { "physical_name": "s_axi_rvalid" } ],
|
||||
"WDATA": [ { "physical_name": "s_axi_wdata" } ],
|
||||
"WREADY": [ { "physical_name": "s_axi_wready" } ],
|
||||
"WSTRB": [ { "physical_name": "s_axi_wstrb" } ],
|
||||
"WVALID": [ { "physical_name": "s_axi_wvalid" } ]
|
||||
}
|
||||
},
|
||||
"S_AXI_ACLK": {
|
||||
"vlnv": "xilinx.com:signal:clock:1.0",
|
||||
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
|
||||
"mode": "slave",
|
||||
"parameters": {
|
||||
"ASSOCIATED_BUSIF": [ { "value": "S_AXI", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"ASSOCIATED_RESET": [ { "value": "s_axi_aresetn", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"FREQ_HZ": [ { "value": "125000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"FREQ_TOLERANCE_HZ": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"PHASE": [ { "value": "0.0", "value_permission": "bd", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"CLK_DOMAIN": [ { "value": "top_xdma_0_0_axi_aclk", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"ASSOCIATED_PORT": [ { "value": "", "value_permission": "bd", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"CLK": [ { "physical_name": "s_axi_aclk" } ]
|
||||
}
|
||||
},
|
||||
"S_AXI_ARESETN": {
|
||||
"vlnv": "xilinx.com:signal:reset:1.0",
|
||||
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
|
||||
"mode": "slave",
|
||||
"parameters": {
|
||||
"POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "value_permission": "bd", "usage": "all" } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"RST": [ { "physical_name": "s_axi_aresetn" } ]
|
||||
}
|
||||
},
|
||||
"GPIO": {
|
||||
"vlnv": "xilinx.com:interface:gpio:1.0",
|
||||
"abstraction_type": "xilinx.com:interface:gpio_rtl:1.0",
|
||||
"mode": "master",
|
||||
"parameters": {
|
||||
"BOARD.ASSOCIATED_PARAM": [ { "value": "GPIO_BOARD_INTERFACE", "value_src": "constant", "value_permission": "bd", "usage": "all" } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"TRI_O": [ { "physical_name": "gpio_io_o" } ]
|
||||
}
|
||||
}
|
||||
},
|
||||
"memory_maps": {
|
||||
"S_AXI": {
|
||||
"display_name": "S_AXI_MEM",
|
||||
"description": "Memory Map for S_AXI",
|
||||
"address_blocks": {
|
||||
"Reg": {
|
||||
"base_address": "0",
|
||||
"range": "4096",
|
||||
"display_name": "Reg",
|
||||
"description": "Register Block",
|
||||
"usage": "register",
|
||||
"access": "read-write",
|
||||
"registers": {
|
||||
"GPIO_DATA": {
|
||||
"address_offset": "0x0",
|
||||
"size": 2,
|
||||
"display_name": "Channel_1_GPIO_DATA",
|
||||
"description": "Channel-1 AXI GPIO Data register",
|
||||
"is_volatile": true,
|
||||
"access": "read-write",
|
||||
"reset_value": "0x0",
|
||||
"fields": {
|
||||
"Channel_1_GPIO_DATA": {
|
||||
"bit_offset": 0,
|
||||
"bit_width": 2,
|
||||
"display_name": "Channel_1_GPIO_DATA",
|
||||
"description": "AXI GPIO Data Register.\nFor each I/O bit programmed as input\n R - Reads value on the input pin.\n W - No effect.\nFor each I/O bit programmed as output\n R - Reads value on GPIO_O pins\n W - Writes value to the corresponding AXI GPIO \n data register bit and output pin\n",
|
||||
"is_volatile": true,
|
||||
"access": "read-write"
|
||||
}
|
||||
}
|
||||
},
|
||||
"GPIO_TRI": {
|
||||
"address_offset": "0x4",
|
||||
"size": 2,
|
||||
"display_name": "Channel_1_GPIO_TRI",
|
||||
"description": "Channel-1 AXI GPIO 3-State Control register",
|
||||
"is_volatile": true,
|
||||
"access": "read-write",
|
||||
"reset_value": "0x0",
|
||||
"fields": {
|
||||
"Channel_1_GPIO_TRI": {
|
||||
"bit_offset": 0,
|
||||
"bit_width": 2,
|
||||
"display_name": "Channel_1_GPIO_DATA",
|
||||
"description": "AXI GPIO 3-State Control Register\nEach I/O pin of the AXI GPIO is individually programmable as an input or output For each of the bits 0 - I/O pin configured as output 1 - I/O pin configured as input\n",
|
||||
"is_volatile": true,
|
||||
"access": "read-write"
|
||||
}
|
||||
}
|
||||
},
|
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"GPIO2_DATA": {
|
||||
"address_offset": "0x8",
|
||||
"size": 32,
|
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"display_name": "Channel_2_GPIO_DATA",
|
||||
"description": "Channel-2 AXI GPIO Data register",
|
||||
"is_volatile": true,
|
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"access": "read-write",
|
||||
"reset_value": "0x0",
|
||||
"fields": {
|
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"Channel_2_GPIO_DATA": {
|
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"bit_offset": 0,
|
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|
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"display_name": "Channel_2_GPIO_DATA",
|
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|
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"is_volatile": true,
|
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"access": "read-write"
|
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}
|
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}
|
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},
|
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"GPIO2_TRI": {
|
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"address_offset": "0xC",
|
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"size": 32,
|
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"display_name": "Channel_2_GPIO_TRI",
|
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"description": "Channel-2 AXI GPIO 3-State Control register",
|
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"is_volatile": true,
|
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"access": "read-write",
|
||||
"reset_value": "0x0",
|
||||
"fields": {
|
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"Channel_2_GPIO_TRI": {
|
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|
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"bit_width": 32,
|
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|
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|
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|
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|
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"size": 32,
|
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|
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|
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"is_volatile": true,
|
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|
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"reset_value": "0x0",
|
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"fields": {
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"Global_Interrupt_Enable": {
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|
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|
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"display_name": "Global_Interrupt_Enable",
|
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|
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|
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|
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}
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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"display_name": "Channel_1_Interrupt_Enable",
|
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|
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|
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|
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|
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|
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|
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|
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"display_name": "Channel_2_Interrupt_Enable",
|
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|
||||
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|
||||
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|
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}
|
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|
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},
|
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|
||||
"address_offset": "0x120",
|
||||
"size": 32,
|
||||
"display_name": "IP Interrupt Status register",
|
||||
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|
||||
"is_volatile": true,
|
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"access": "read-write",
|
||||
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|
||||
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|
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|
||||
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|
||||
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|
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"display_name": "Channel_1_Interrupt_Status",
|
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|
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"access": "read-write"
|
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"Channel_2_Interrupt_Status": {
|
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"bit_offset": 1,
|
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"bit_width": 1,
|
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"display_name": "Channel_2_Interrupt_Status",
|
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"description": "Channel 2 Interrupt Status\n 0 - No Channel 2 input interrupt\n 1 - Channel 2 input interrupt\n",
|
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"is_volatile": true,
|
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"access": "read-write"
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</xilinx:boundaryDescriptionInfo>
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</xilinx:componentInstanceExtensions>
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</spirit:componentInstance>
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||||
</spirit:componentInstances>
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||||
</spirit:design>
|
||||
|
|
@ -0,0 +1,457 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
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||||
"ADDR_WIDTH": [ { "value": "64", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"AWUSER_WIDTH": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"ARUSER_WIDTH": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"WUSER_WIDTH": [ { "value": "0", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"RUSER_WIDTH": [ { "value": "0", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"BUSER_WIDTH": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_BURST": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_LOCK": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_PROT": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_CACHE": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_QOS": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_REGION": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_WSTRB": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_BRESP": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_RRESP": [ { "value": "1", "value_src": "auto_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"SUPPORTS_NARROW_BURST": [ { "value": "0", "value_src": "constant_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_READ_OUTSTANDING": [ { "value": "32", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_WRITE_OUTSTANDING": [ { "value": "16", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"MAX_BURST_LENGTH": [ { "value": "256", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"PHASE": [ { "value": "0.0", "value_permission": "bd", "resolve_type": "generated", "format": "float", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"CLK_DOMAIN": [ { "value": "top_xdma_0_0_axi_aclk", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_READ_THREADS": [ { "value": "2", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_WRITE_THREADS": [ { "value": "2", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"RUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"WUSER_BITS_PER_BYTE": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"AWID": [ { "physical_name": "S00_AXI_awid" } ],
|
||||
"AWADDR": [ { "physical_name": "S00_AXI_awaddr" } ],
|
||||
"AWLEN": [ { "physical_name": "S00_AXI_awlen" } ],
|
||||
"AWSIZE": [ { "physical_name": "S00_AXI_awsize" } ],
|
||||
"AWBURST": [ { "physical_name": "S00_AXI_awburst" } ],
|
||||
"AWLOCK": [ { "physical_name": "S00_AXI_awlock" } ],
|
||||
"AWCACHE": [ { "physical_name": "S00_AXI_awcache" } ],
|
||||
"AWPROT": [ { "physical_name": "S00_AXI_awprot" } ],
|
||||
"AWQOS": [ { "physical_name": "S00_AXI_awqos" } ],
|
||||
"AWVALID": [ { "physical_name": "S00_AXI_awvalid" } ],
|
||||
"AWREADY": [ { "physical_name": "S00_AXI_awready" } ],
|
||||
"WDATA": [ { "physical_name": "S00_AXI_wdata" } ],
|
||||
"WSTRB": [ { "physical_name": "S00_AXI_wstrb" } ],
|
||||
"WLAST": [ { "physical_name": "S00_AXI_wlast" } ],
|
||||
"WVALID": [ { "physical_name": "S00_AXI_wvalid" } ],
|
||||
"WREADY": [ { "physical_name": "S00_AXI_wready" } ],
|
||||
"BID": [ { "physical_name": "S00_AXI_bid" } ],
|
||||
"BRESP": [ { "physical_name": "S00_AXI_bresp" } ],
|
||||
"BVALID": [ { "physical_name": "S00_AXI_bvalid" } ],
|
||||
"BREADY": [ { "physical_name": "S00_AXI_bready" } ],
|
||||
"ARID": [ { "physical_name": "S00_AXI_arid" } ],
|
||||
"ARADDR": [ { "physical_name": "S00_AXI_araddr" } ],
|
||||
"ARLEN": [ { "physical_name": "S00_AXI_arlen" } ],
|
||||
"ARSIZE": [ { "physical_name": "S00_AXI_arsize" } ],
|
||||
"ARBURST": [ { "physical_name": "S00_AXI_arburst" } ],
|
||||
"ARLOCK": [ { "physical_name": "S00_AXI_arlock" } ],
|
||||
"ARCACHE": [ { "physical_name": "S00_AXI_arcache" } ],
|
||||
"ARPROT": [ { "physical_name": "S00_AXI_arprot" } ],
|
||||
"ARQOS": [ { "physical_name": "S00_AXI_arqos" } ],
|
||||
"ARVALID": [ { "physical_name": "S00_AXI_arvalid" } ],
|
||||
"ARREADY": [ { "physical_name": "S00_AXI_arready" } ],
|
||||
"RID": [ { "physical_name": "S00_AXI_rid" } ],
|
||||
"RDATA": [ { "physical_name": "S00_AXI_rdata" } ],
|
||||
"RRESP": [ { "physical_name": "S00_AXI_rresp" } ],
|
||||
"RLAST": [ { "physical_name": "S00_AXI_rlast" } ],
|
||||
"RVALID": [ { "physical_name": "S00_AXI_rvalid" } ],
|
||||
"RREADY": [ { "physical_name": "S00_AXI_rready" } ]
|
||||
}
|
||||
},
|
||||
"M00_AXI": {
|
||||
"vlnv": "xilinx.com:interface:aximm:1.0",
|
||||
"abstraction_type": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"mode": "master",
|
||||
"parameters": {
|
||||
"DATA_WIDTH": [ { "value": "32", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"PROTOCOL": [ { "value": "AXI4", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"FREQ_HZ": [ { "value": "125000000", "value_src": "user_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"ID_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"ADDR_WIDTH": [ { "value": "16", "value_src": "ip_propagated", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"AWUSER_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"ARUSER_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"WUSER_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"RUSER_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"BUSER_WIDTH": [ { "value": "0", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"READ_WRITE_MODE": [ { "value": "READ_WRITE", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_BURST": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_LOCK": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_PROT": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_CACHE": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_QOS": [ { "value": "1", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_REGION": [ { "value": "0", "value_src": "constant", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_WSTRB": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_BRESP": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"HAS_RRESP": [ { "value": "1", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"SUPPORTS_NARROW_BURST": [ { "value": "0", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_READ_OUTSTANDING": [ { "value": "32", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_WRITE_OUTSTANDING": [ { "value": "16", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"MAX_BURST_LENGTH": [ { "value": "256", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"PHASE": [ { "value": "0.0", "value_permission": "bd", "resolve_type": "generated", "format": "float", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"CLK_DOMAIN": [ { "value": "top_xdma_0_0_axi_aclk", "value_src": "default_prop", "value_permission": "bd", "resolve_type": "generated", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_READ_THREADS": [ { "value": "1", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"NUM_WRITE_THREADS": [ { "value": "1", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"RUSER_BITS_PER_BYTE": [ { "value": "0", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"WUSER_BITS_PER_BYTE": [ { "value": "0", "value_src": "user", "value_permission": "bd", "resolve_type": "generated", "format": "long", "usage": "simulation.tlm", "is_static_object": false } ],
|
||||
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
|
||||
},
|
||||
"port_maps": {
|
||||
"AWADDR": [ { "physical_name": "M00_AXI_awaddr" } ],
|
||||
"AWLEN": [ { "physical_name": "M00_AXI_awlen" } ],
|
||||
"AWSIZE": [ { "physical_name": "M00_AXI_awsize" } ],
|
||||
"AWBURST": [ { "physical_name": "M00_AXI_awburst" } ],
|
||||
"AWLOCK": [ { "physical_name": "M00_AXI_awlock" } ],
|
||||
"AWCACHE": [ { "physical_name": "M00_AXI_awcache" } ],
|
||||
"AWPROT": [ { "physical_name": "M00_AXI_awprot" } ],
|
||||
"AWQOS": [ { "physical_name": "M00_AXI_awqos" } ],
|
||||
"AWVALID": [ { "physical_name": "M00_AXI_awvalid" } ],
|
||||
"AWREADY": [ { "physical_name": "M00_AXI_awready" } ],
|
||||
"WDATA": [ { "physical_name": "M00_AXI_wdata" } ],
|
||||
"WSTRB": [ { "physical_name": "M00_AXI_wstrb" } ],
|
||||
"WLAST": [ { "physical_name": "M00_AXI_wlast" } ],
|
||||
"WVALID": [ { "physical_name": "M00_AXI_wvalid" } ],
|
||||
"WREADY": [ { "physical_name": "M00_AXI_wready" } ],
|
||||
"BRESP": [ { "physical_name": "M00_AXI_bresp" } ],
|
||||
"BVALID": [ { "physical_name": "M00_AXI_bvalid" } ],
|
||||
"BREADY": [ { "physical_name": "M00_AXI_bready" } ],
|
||||
"ARADDR": [ { "physical_name": "M00_AXI_araddr" } ],
|
||||
"ARLEN": [ { "physical_name": "M00_AXI_arlen" } ],
|
||||
"ARSIZE": [ { "physical_name": "M00_AXI_arsize" } ],
|
||||
"ARBURST": [ { "physical_name": "M00_AXI_arburst" } ],
|
||||
"ARLOCK": [ { "physical_name": "M00_AXI_arlock" } ],
|
||||
"ARCACHE": [ { "physical_name": "M00_AXI_arcache" } ],
|
||||
"ARPROT": [ { "physical_name": "M00_AXI_arprot" } ],
|
||||
"ARQOS": [ { "physical_name": "M00_AXI_arqos" } ],
|
||||
"ARVALID": [ { "physical_name": "M00_AXI_arvalid" } ],
|
||||
"ARREADY": [ { "physical_name": "M00_AXI_arready" } ],
|
||||
"RDATA": [ { "physical_name": "M00_AXI_rdata" } ],
|
||||
"RRESP": [ { "physical_name": "M00_AXI_rresp" } ],
|
||||
"RLAST": [ { "physical_name": "M00_AXI_rlast" } ],
|
||||
"RVALID": [ { "physical_name": "M00_AXI_rvalid" } ],
|
||||
"RREADY": [ { "physical_name": "M00_AXI_rready" } ]
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}"/>
|
||||
</xilinx:boundaryDescriptionInfo>
|
||||
</xilinx:componentInstanceExtensions>
|
||||
</spirit:vendorExtensions>
|
||||
</spirit:componentInstance>
|
||||
</spirit:componentInstances>
|
||||
</spirit:design>
|
||||
|
|
@ -0,0 +1,406 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<spirit:vendor>xilinx.com</spirit:vendor>
|
||||
<spirit:library>xci</spirit:library>
|
||||
<spirit:name>unknown</spirit:name>
|
||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:componentInstances>
|
||||
<spirit:componentInstance>
|
||||
<spirit:instanceName>top_blk_mem_gen_0_0</spirit:instanceName>
|
||||
<spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="blk_mem_gen" spirit:version="8.4"/>
|
||||
<spirit:configurableElementValues>
|
||||
<spirit:configurableElementValue spirit:referenceId="ADDRBLOCK_RANGE.S_1.Mem0">4096</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ADDR_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ARUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.AWUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.BUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.CLK_DOMAIN"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.FREQ_HZ">100000000</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_BRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_CACHE">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_LOCK">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_PROT">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_QOS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_REGION">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_RRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_WSTRB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ID_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_READ_OUTSTANDING">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_READ_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_WRITE_OUTSTANDING">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.PHASE">0.0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.PROTOCOL">AXI4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.RUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.WUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ADDR_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ARUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.AWUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.BUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.CLK_DOMAIN"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.DATA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.FREQ_HZ">100000000</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_BRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_CACHE">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_LOCK">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_PROT">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_QOS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_REGION">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_RRESP">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_WSTRB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ID_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_READ_OUTSTANDING">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_READ_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_WRITE_OUTSTANDING">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.PHASE">0.0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.PROTOCOL">AXI4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.RUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.WUSER_WIDTH">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MASTER_TYPE">BRAM_CTRL</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_ECC">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_SIZE">65536</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.READ_LATENCY">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTA.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MASTER_TYPE">BRAM_CTRL</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MEM_ECC">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MEM_SIZE">65536</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.MEM_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.READ_LATENCY">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BRAM_PORTB.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK.ACLK.ASSOCIATED_PORT"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK.ACLK.CLK_DOMAIN"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK.ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK.ACLK.FREQ_TOLERANCE_HZ">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK.ACLK.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK.ACLK.PHASE">0.0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.RST.ARESETN.INSERT_VIP">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ADDRA_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ADDRB_WIDTH">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ALGORITHM">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_AXI_ID_WIDTH">4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_AXI_SLAVE_TYPE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_AXI_TYPE">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_BYTE_SIZE">8</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_COMMON_CLK">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_COUNT_18K_BRAM">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_COUNT_36K_BRAM">16</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CTRL_ECC_ALGO">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DEFAULT_DATA">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DISABLE_WARN_BHV_COLL">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DISABLE_WARN_BHV_RANGE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ELABORATION_DIR">./</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ENABLE_32BIT_ADDRESS">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_DEEPSLEEP_PIN">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_ECC_PIPE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_RDADDRA_CHG">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_RDADDRB_CHG">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_SAFETY_CKT">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_SHUTDOWN_PIN">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_SLEEP_PIN">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EST_POWER_SUMMARY">Estimated Power for IP : 18.479678 mW</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FAMILY">artix7</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_AXI_ID">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_ENA">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_ENB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_INJECTERR">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_MEM_OUTPUT_REGS_A">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_MEM_OUTPUT_REGS_B">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_MUX_OUTPUT_REGS_A">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_MUX_OUTPUT_REGS_B">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_REGCEA">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_REGCEB">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_RSTA">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_RSTB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SOFTECC_INPUT_REGS_A">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SOFTECC_OUTPUT_REGS_B">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INITA_VAL">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INITB_VAL">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INIT_FILE">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INIT_FILE_NAME">no_coe_file_loaded</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INTERFACE_TYPE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_LOAD_INIT_FILE">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MEM_TYPE">2</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MUX_PIPELINE_STAGES">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_TYPE">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_DEPTH_A">16384</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_DEPTH_B">16384</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_LATENCY_A">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_LATENCY_B">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_WIDTH_A">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_READ_WIDTH_B">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RSTRAM_A">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RSTRAM_B">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RST_PRIORITY_A">CE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RST_PRIORITY_B">CE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SIM_COLLISION_CHECK">ALL</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_BRAM_BLOCK">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_BYTE_WEA">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_BYTE_WEB">1</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DEFAULT_DATA">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_ECC">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SOFTECC">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_URAM">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WEA_WIDTH">4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WEB_WIDTH">4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRITE_DEPTH_A">16384</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRITE_DEPTH_B">16384</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRITE_MODE_A">WRITE_FIRST</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRITE_MODE_B">WRITE_FIRST</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRITE_WIDTH_A">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRITE_WIDTH_B">32</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_XDEVICEFAMILY">artix7l</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXI_ID_Width">4</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXI_Slave_Type">Memory_Slave</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXI_Type">AXI4_Full</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Additional_Inputs_for_Power_Estimation">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Algorithm">Minimum_Area</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Assume_Synchronous_Clk">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Byte_Size">8</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CTRL_ECC_ALGO">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Coe_File">no_coe_file_loaded</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Collision_Warnings">ALL</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">top_blk_mem_gen_0_0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Disable_Collision_Warnings">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Disable_Out_of_Range_Warnings">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ECC">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EN_DEEPSLEEP_PIN">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EN_ECC_PIPE">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EN_SAFETY_CKT">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EN_SHUTDOWN_PIN">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EN_SLEEP_PIN">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_32bit_Address">true</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_A">Use_ENA_Pin</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_B">Use_ENB_Pin</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Error_Injection_Type">Single_Bit_Error_Injection</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Fill_Remaining_Memory_Locations">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Interface_Type">Native</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Load_Init_File">false</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MEM_FILE">NONE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Memory_Type">True_Dual_Port_RAM</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Operating_Mode_A">WRITE_FIRST</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Operating_Mode_B">WRITE_FIRST</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Reset_Value_A">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Reset_Value_B">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIM_type_to_Implement">BRAM</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Pipeline_Stages">0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Port_A_Clock">100</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Port_A_Enable_Rate">100</spirit:configurableElementValue>
|
||||
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||||
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|
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||||
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|
||||
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||||
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||||
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|
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|||
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_FABRIC_O.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_GT_I.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_GT_I.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_I.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_I.CLK_DOMAIN"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_O.ASSOCIATED_BUSIF"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_O.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_O.INSERT_VIP">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_O.PHASE">0.0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_I.ASSOCIATED_BUSIF"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_I.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_I.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_I.CLK_DOMAIN"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_I.INSERT_VIP">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_I.PHASE">0.0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_O.ASSOCIATED_BUSIF"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_O.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_O.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.BUFG_PS_O.CLK_DOMAIN"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTME5_O.ASSOCIATED_BUSIF"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTME5_O.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTME5_O.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTME5_ODIV2.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTME5_ODIV2.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTME5_ODIV2.CLK_DOMAIN"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUFDS_GTM_O.ASSOCIATED_BUSIF"/>
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|
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|
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUF_DS_ODIV2.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUF_DS_ODIV2.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUF_OUT.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUF_OUT.CLK_DOMAIN">top_util_ds_buf_0_IBUF_OUT</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IBUF_OUT.PHASE">0.0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IOBUF_IO_I.ASSOCIATED_BUSIF"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IOBUF_IO_I.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IOBUF_IO_I.ASSOCIATED_RESET"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IOBUF_IO_O.ASSOCIATED_BUSIF"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IOBUF_IO_O.ASSOCIATED_PORT"/>
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||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O3.ASSOCIATED_PORT"/>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O3.ASSOCIATED_RESET"/>
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||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O3.CLK_DOMAIN"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O3.FREQ_HZ">100000000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O3.INSERT_VIP">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O3.PHASE">0.0</spirit:configurableElementValue>
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||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O4.ASSOCIATED_BUSIF"/>
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||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O4.ASSOCIATED_PORT"/>
|
||||
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MBUFG_GT_O4.ASSOCIATED_RESET"/>
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File diff suppressed because it is too large
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">artix7</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
|
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7a100tl</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">fgg484</spirit:configurableElementValue>
|
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2L</spirit:configurableElementValue>
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||||
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||||
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|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../hello_world_dma.gen/sources_1/bd/top/ip/top_xdma_0_axi_periph_0</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
|
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
|
||||
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1</spirit:configurableElementValue>
|
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
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</spirit:configurableElementValues>
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<spirit:vendorExtensions>
|
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<xilinx:componentInstanceExtensions>
|
||||
<xilinx:configElementInfos>
|
||||
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.NUM_MI" xilinx:valueSource="user"/>
|
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<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.SYNCHRONIZATION_STAGES" xilinx:valuePermission="bd_and_user"/>
|
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<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.XBAR_DATA_WIDTH" xilinx:valuePermission="bd_and_user"/>
|
||||
</xilinx:configElementInfos>
|
||||
<xilinx:boundaryDescriptionInfo>
|
||||
<xilinx:boundaryDescription xilinx:boundaryDescriptionJSON="{
|
||||
"schema": "xilinx.com:schema:json_boundary:1.0"
|
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}"/>
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</xilinx:boundaryDescriptionInfo>
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</xilinx:componentInstanceExtensions>
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</spirit:vendorExtensions>
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</spirit:componentInstance>
|
||||
</spirit:componentInstances>
|
||||
</spirit:design>
|
||||
597
hello_world_dma.srcs/sources_1/bd/top/top.bd
Normal file
597
hello_world_dma.srcs/sources_1/bd/top/top.bd
Normal file
|
|
@ -0,0 +1,597 @@
|
|||
{
|
||||
"design": {
|
||||
"design_info": {
|
||||
"boundary_crc": "0xDCADD24011654157",
|
||||
"device": "xc7a100tlfgg484-2L",
|
||||
"gen_directory": "../../../../hello_world_dma.gen/sources_1/bd/top",
|
||||
"name": "top",
|
||||
"rev_ctrl_bd_flag": "RevCtrlBdOff",
|
||||
"synth_flow_mode": "Hierarchical",
|
||||
"tool_version": "2022.1",
|
||||
"validated": "true"
|
||||
},
|
||||
"design_tree": {
|
||||
"xdma_0": "",
|
||||
"axi_bram_ctrl_0": "",
|
||||
"blk_mem_gen_0": "",
|
||||
"util_vector_logic_0": "",
|
||||
"axi_gpio_0": "",
|
||||
"util_ds_buf": "",
|
||||
"axi_smc": "",
|
||||
"xdma_0_axi_periph": {
|
||||
"s00_couplers": {}
|
||||
}
|
||||
},
|
||||
"interface_ports": {
|
||||
"pcie_express_x4": {
|
||||
"mode": "Master",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:pcie_7x_mgt:1.0",
|
||||
"vlnv": "xilinx.com:interface:pcie_7x_mgt_rtl:1.0"
|
||||
},
|
||||
"diff_clock_rtl_0": {
|
||||
"mode": "Slave",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:diff_clock:1.0",
|
||||
"vlnv": "xilinx.com:interface:diff_clock_rtl:1.0",
|
||||
"parameters": {
|
||||
"CAN_DEBUG": {
|
||||
"value": "false",
|
||||
"value_src": "default"
|
||||
},
|
||||
"FREQ_HZ": {
|
||||
"value": "100000000"
|
||||
}
|
||||
}
|
||||
},
|
||||
"leds": {
|
||||
"mode": "Master",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:gpio:1.0",
|
||||
"vlnv": "xilinx.com:interface:gpio_rtl:1.0"
|
||||
}
|
||||
},
|
||||
"ports": {
|
||||
"reset_rtl_0": {
|
||||
"type": "rst",
|
||||
"direction": "I",
|
||||
"parameters": {
|
||||
"INSERT_VIP": {
|
||||
"value": "0",
|
||||
"value_src": "default"
|
||||
},
|
||||
"POLARITY": {
|
||||
"value": "ACTIVE_LOW"
|
||||
}
|
||||
}
|
||||
},
|
||||
"LED_M2": {
|
||||
"direction": "O",
|
||||
"left": "0",
|
||||
"right": "0",
|
||||
"parameters": {
|
||||
"PortType": {
|
||||
"value": "undef",
|
||||
"value_src": "ip_prop"
|
||||
},
|
||||
"PortType.PROP_SRC": {
|
||||
"value": "false",
|
||||
"value_src": "ip_prop"
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"components": {
|
||||
"xdma_0": {
|
||||
"vlnv": "xilinx.com:ip:xdma:4.1",
|
||||
"xci_name": "top_xdma_0_0",
|
||||
"xci_path": "ip/top_xdma_0_0/top_xdma_0_0.xci",
|
||||
"inst_hier_path": "xdma_0",
|
||||
"parameters": {
|
||||
"PF0_DEVICE_ID_mqdma": {
|
||||
"value": "9014"
|
||||
},
|
||||
"PF0_SRIOV_VF_DEVICE_ID": {
|
||||
"value": "A034"
|
||||
},
|
||||
"PF2_DEVICE_ID_mqdma": {
|
||||
"value": "9214"
|
||||
},
|
||||
"PF3_DEVICE_ID_mqdma": {
|
||||
"value": "9314"
|
||||
},
|
||||
"axilite_master_en": {
|
||||
"value": "true"
|
||||
},
|
||||
"axisten_freq": {
|
||||
"value": "125"
|
||||
},
|
||||
"cfg_mgmt_if": {
|
||||
"value": "false"
|
||||
},
|
||||
"pf0_device_id": {
|
||||
"value": "7014"
|
||||
},
|
||||
"pl_link_cap_max_link_width": {
|
||||
"value": "X4"
|
||||
},
|
||||
"xdma_axi_intf_mm": {
|
||||
"value": "AXI_Memory_Mapped"
|
||||
},
|
||||
"xdma_rnum_chnl": {
|
||||
"value": "2"
|
||||
},
|
||||
"xdma_wnum_chnl": {
|
||||
"value": "2"
|
||||
}
|
||||
},
|
||||
"interface_ports": {
|
||||
"M_AXI": {
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"mode": "Master",
|
||||
"address_space_ref": "M_AXI",
|
||||
"base_address": {
|
||||
"minimum": "0x00000000",
|
||||
"maximum": "0xFFFFFFFFFFFFFFFF",
|
||||
"width": "64"
|
||||
},
|
||||
"parameters": {
|
||||
"master_id": {
|
||||
"value": "1"
|
||||
}
|
||||
}
|
||||
},
|
||||
"M_AXI_LITE": {
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"mode": "Master",
|
||||
"address_space_ref": "M_AXI_LITE",
|
||||
"base_address": {
|
||||
"minimum": "0x00000000",
|
||||
"maximum": "0xFFFFFFFF",
|
||||
"width": "32"
|
||||
}
|
||||
}
|
||||
},
|
||||
"addressing": {
|
||||
"address_spaces": {
|
||||
"M_AXI": {
|
||||
"range": "16E",
|
||||
"width": "64"
|
||||
},
|
||||
"M_AXI_LITE": {
|
||||
"range": "4G",
|
||||
"width": "32"
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"axi_bram_ctrl_0": {
|
||||
"vlnv": "xilinx.com:ip:axi_bram_ctrl:4.1",
|
||||
"xci_name": "top_axi_bram_ctrl_0_0",
|
||||
"xci_path": "ip/top_axi_bram_ctrl_0_0/top_axi_bram_ctrl_0_0.xci",
|
||||
"inst_hier_path": "axi_bram_ctrl_0"
|
||||
},
|
||||
"blk_mem_gen_0": {
|
||||
"vlnv": "xilinx.com:ip:blk_mem_gen:8.4",
|
||||
"xci_name": "top_blk_mem_gen_0_0",
|
||||
"xci_path": "ip/top_blk_mem_gen_0_0/top_blk_mem_gen_0_0.xci",
|
||||
"inst_hier_path": "blk_mem_gen_0",
|
||||
"parameters": {
|
||||
"EN_SAFETY_CKT": {
|
||||
"value": "false"
|
||||
},
|
||||
"Enable_B": {
|
||||
"value": "Use_ENB_Pin"
|
||||
},
|
||||
"Memory_Type": {
|
||||
"value": "True_Dual_Port_RAM"
|
||||
},
|
||||
"Port_B_Clock": {
|
||||
"value": "100"
|
||||
},
|
||||
"Port_B_Enable_Rate": {
|
||||
"value": "100"
|
||||
},
|
||||
"Port_B_Write_Rate": {
|
||||
"value": "50"
|
||||
},
|
||||
"Use_RSTB_Pin": {
|
||||
"value": "true"
|
||||
}
|
||||
}
|
||||
},
|
||||
"util_vector_logic_0": {
|
||||
"vlnv": "xilinx.com:ip:util_vector_logic:2.0",
|
||||
"xci_name": "top_util_vector_logic_0_0",
|
||||
"xci_path": "ip/top_util_vector_logic_0_0/top_util_vector_logic_0_0.xci",
|
||||
"inst_hier_path": "util_vector_logic_0",
|
||||
"parameters": {
|
||||
"C_OPERATION": {
|
||||
"value": "not"
|
||||
},
|
||||
"C_SIZE": {
|
||||
"value": "1"
|
||||
}
|
||||
}
|
||||
},
|
||||
"axi_gpio_0": {
|
||||
"vlnv": "xilinx.com:ip:axi_gpio:2.0",
|
||||
"xci_name": "top_axi_gpio_0_0",
|
||||
"xci_path": "ip/top_axi_gpio_0_0/top_axi_gpio_0_0.xci",
|
||||
"inst_hier_path": "axi_gpio_0",
|
||||
"parameters": {
|
||||
"C_ALL_OUTPUTS": {
|
||||
"value": "1"
|
||||
},
|
||||
"C_GPIO_WIDTH": {
|
||||
"value": "2"
|
||||
}
|
||||
}
|
||||
},
|
||||
"util_ds_buf": {
|
||||
"vlnv": "xilinx.com:ip:util_ds_buf:2.2",
|
||||
"xci_name": "top_util_ds_buf_0",
|
||||
"xci_path": "ip/top_util_ds_buf_0/top_util_ds_buf_0.xci",
|
||||
"inst_hier_path": "util_ds_buf",
|
||||
"parameters": {
|
||||
"C_BUF_TYPE": {
|
||||
"value": "IBUFDSGTE"
|
||||
}
|
||||
}
|
||||
},
|
||||
"axi_smc": {
|
||||
"vlnv": "xilinx.com:ip:smartconnect:1.0",
|
||||
"xci_name": "top_axi_smc_0",
|
||||
"xci_path": "ip/top_axi_smc_0/top_axi_smc_0.xci",
|
||||
"inst_hier_path": "axi_smc",
|
||||
"parameters": {
|
||||
"NUM_SI": {
|
||||
"value": "1"
|
||||
}
|
||||
},
|
||||
"interface_ports": {
|
||||
"S00_AXI": {
|
||||
"mode": "Slave",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"parameters": {
|
||||
"NUM_READ_OUTSTANDING": {
|
||||
"value": "32"
|
||||
},
|
||||
"NUM_WRITE_OUTSTANDING": {
|
||||
"value": "16"
|
||||
}
|
||||
},
|
||||
"bridges": [
|
||||
"M00_AXI"
|
||||
]
|
||||
},
|
||||
"M00_AXI": {
|
||||
"mode": "Master",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0",
|
||||
"parameters": {
|
||||
"MAX_BURST_LENGTH": {
|
||||
"value": "256"
|
||||
},
|
||||
"NUM_READ_OUTSTANDING": {
|
||||
"value": "32"
|
||||
},
|
||||
"NUM_READ_THREADS": {
|
||||
"value": "1"
|
||||
},
|
||||
"NUM_WRITE_OUTSTANDING": {
|
||||
"value": "16"
|
||||
},
|
||||
"NUM_WRITE_THREADS": {
|
||||
"value": "1"
|
||||
},
|
||||
"RUSER_BITS_PER_BYTE": {
|
||||
"value": "0"
|
||||
},
|
||||
"SUPPORTS_NARROW_BURST": {
|
||||
"value": "0"
|
||||
},
|
||||
"WUSER_BITS_PER_BYTE": {
|
||||
"value": "0"
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"xdma_0_axi_periph": {
|
||||
"vlnv": "xilinx.com:ip:axi_interconnect:2.1",
|
||||
"xci_path": "ip/top_xdma_0_axi_periph_0/top_xdma_0_axi_periph_0.xci",
|
||||
"inst_hier_path": "xdma_0_axi_periph",
|
||||
"xci_name": "top_xdma_0_axi_periph_0",
|
||||
"parameters": {
|
||||
"NUM_MI": {
|
||||
"value": "1"
|
||||
}
|
||||
},
|
||||
"interface_ports": {
|
||||
"S00_AXI": {
|
||||
"mode": "Slave",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
|
||||
},
|
||||
"M00_AXI": {
|
||||
"mode": "Master",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
|
||||
}
|
||||
},
|
||||
"ports": {
|
||||
"ACLK": {
|
||||
"type": "clk",
|
||||
"direction": "I",
|
||||
"parameters": {
|
||||
"ASSOCIATED_RESET": {
|
||||
"value": "ARESETN"
|
||||
}
|
||||
}
|
||||
},
|
||||
"ARESETN": {
|
||||
"type": "rst",
|
||||
"direction": "I"
|
||||
},
|
||||
"S00_ACLK": {
|
||||
"type": "clk",
|
||||
"direction": "I",
|
||||
"parameters": {
|
||||
"ASSOCIATED_BUSIF": {
|
||||
"value": "S00_AXI"
|
||||
},
|
||||
"ASSOCIATED_RESET": {
|
||||
"value": "S00_ARESETN"
|
||||
}
|
||||
}
|
||||
},
|
||||
"S00_ARESETN": {
|
||||
"type": "rst",
|
||||
"direction": "I"
|
||||
},
|
||||
"M00_ACLK": {
|
||||
"type": "clk",
|
||||
"direction": "I",
|
||||
"parameters": {
|
||||
"ASSOCIATED_BUSIF": {
|
||||
"value": "M00_AXI"
|
||||
},
|
||||
"ASSOCIATED_RESET": {
|
||||
"value": "M00_ARESETN"
|
||||
}
|
||||
}
|
||||
},
|
||||
"M00_ARESETN": {
|
||||
"type": "rst",
|
||||
"direction": "I"
|
||||
}
|
||||
},
|
||||
"components": {
|
||||
"s00_couplers": {
|
||||
"interface_ports": {
|
||||
"M_AXI": {
|
||||
"mode": "Master",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
|
||||
},
|
||||
"S_AXI": {
|
||||
"mode": "Slave",
|
||||
"vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
|
||||
"vlnv": "xilinx.com:interface:aximm_rtl:1.0"
|
||||
}
|
||||
},
|
||||
"ports": {
|
||||
"M_ACLK": {
|
||||
"type": "clk",
|
||||
"direction": "I",
|
||||
"parameters": {
|
||||
"ASSOCIATED_BUSIF": {
|
||||
"value": "M_AXI"
|
||||
},
|
||||
"ASSOCIATED_RESET": {
|
||||
"value": "M_ARESETN"
|
||||
}
|
||||
}
|
||||
},
|
||||
"M_ARESETN": {
|
||||
"type": "rst",
|
||||
"direction": "I"
|
||||
},
|
||||
"S_ACLK": {
|
||||
"type": "clk",
|
||||
"direction": "I",
|
||||
"parameters": {
|
||||
"ASSOCIATED_BUSIF": {
|
||||
"value": "S_AXI"
|
||||
},
|
||||
"ASSOCIATED_RESET": {
|
||||
"value": "S_ARESETN"
|
||||
}
|
||||
}
|
||||
},
|
||||
"S_ARESETN": {
|
||||
"type": "rst",
|
||||
"direction": "I"
|
||||
}
|
||||
},
|
||||
"interface_nets": {
|
||||
"s00_couplers_to_s00_couplers": {
|
||||
"interface_ports": [
|
||||
"S_AXI",
|
||||
"M_AXI"
|
||||
]
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"interface_nets": {
|
||||
"s00_couplers_to_xdma_0_axi_periph": {
|
||||
"interface_ports": [
|
||||
"M00_AXI",
|
||||
"s00_couplers/M_AXI"
|
||||
]
|
||||
},
|
||||
"xdma_0_axi_periph_to_s00_couplers": {
|
||||
"interface_ports": [
|
||||
"S00_AXI",
|
||||
"s00_couplers/S_AXI"
|
||||
]
|
||||
}
|
||||
},
|
||||
"nets": {
|
||||
"S00_ACLK_1": {
|
||||
"ports": [
|
||||
"S00_ACLK",
|
||||
"s00_couplers/S_ACLK"
|
||||
]
|
||||
},
|
||||
"S00_ARESETN_1": {
|
||||
"ports": [
|
||||
"S00_ARESETN",
|
||||
"s00_couplers/S_ARESETN"
|
||||
]
|
||||
},
|
||||
"xdma_0_axi_periph_ACLK_net": {
|
||||
"ports": [
|
||||
"M00_ACLK",
|
||||
"s00_couplers/M_ACLK"
|
||||
]
|
||||
},
|
||||
"xdma_0_axi_periph_ARESETN_net": {
|
||||
"ports": [
|
||||
"M00_ARESETN",
|
||||
"s00_couplers/M_ARESETN"
|
||||
]
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"interface_nets": {
|
||||
"axi_bram_ctrl_0_BRAM_PORTA": {
|
||||
"interface_ports": [
|
||||
"blk_mem_gen_0/BRAM_PORTA",
|
||||
"axi_bram_ctrl_0/BRAM_PORTA"
|
||||
]
|
||||
},
|
||||
"axi_bram_ctrl_0_BRAM_PORTB": {
|
||||
"interface_ports": [
|
||||
"blk_mem_gen_0/BRAM_PORTB",
|
||||
"axi_bram_ctrl_0/BRAM_PORTB"
|
||||
]
|
||||
},
|
||||
"axi_gpio_0_GPIO": {
|
||||
"interface_ports": [
|
||||
"leds",
|
||||
"axi_gpio_0/GPIO"
|
||||
]
|
||||
},
|
||||
"axi_smc_M00_AXI": {
|
||||
"interface_ports": [
|
||||
"axi_smc/M00_AXI",
|
||||
"axi_bram_ctrl_0/S_AXI"
|
||||
]
|
||||
},
|
||||
"diff_clock_rtl_0_1": {
|
||||
"interface_ports": [
|
||||
"diff_clock_rtl_0",
|
||||
"util_ds_buf/CLK_IN_D"
|
||||
]
|
||||
},
|
||||
"xdma_0_M_AXI": {
|
||||
"interface_ports": [
|
||||
"xdma_0/M_AXI",
|
||||
"axi_smc/S00_AXI"
|
||||
]
|
||||
},
|
||||
"xdma_0_M_AXI_LITE": {
|
||||
"interface_ports": [
|
||||
"xdma_0/M_AXI_LITE",
|
||||
"xdma_0_axi_periph/S00_AXI"
|
||||
]
|
||||
},
|
||||
"xdma_0_axi_periph_M00_AXI": {
|
||||
"interface_ports": [
|
||||
"xdma_0_axi_periph/M00_AXI",
|
||||
"axi_gpio_0/S_AXI"
|
||||
]
|
||||
},
|
||||
"xdma_0_pcie_mgt": {
|
||||
"interface_ports": [
|
||||
"pcie_express_x4",
|
||||
"xdma_0/pcie_mgt"
|
||||
]
|
||||
}
|
||||
},
|
||||
"nets": {
|
||||
"reset_rtl_0_1": {
|
||||
"ports": [
|
||||
"reset_rtl_0",
|
||||
"xdma_0/sys_rst_n"
|
||||
]
|
||||
},
|
||||
"util_ds_buf_IBUF_OUT": {
|
||||
"ports": [
|
||||
"util_ds_buf/IBUF_OUT",
|
||||
"xdma_0/sys_clk"
|
||||
]
|
||||
},
|
||||
"util_vector_logic_0_Res": {
|
||||
"ports": [
|
||||
"util_vector_logic_0/Res",
|
||||
"LED_M2"
|
||||
]
|
||||
},
|
||||
"xdma_0_axi_aclk": {
|
||||
"ports": [
|
||||
"xdma_0/axi_aclk",
|
||||
"axi_smc/aclk",
|
||||
"axi_bram_ctrl_0/s_axi_aclk",
|
||||
"xdma_0_axi_periph/S00_ACLK",
|
||||
"axi_gpio_0/s_axi_aclk",
|
||||
"xdma_0_axi_periph/M00_ACLK",
|
||||
"xdma_0_axi_periph/ACLK"
|
||||
]
|
||||
},
|
||||
"xdma_0_axi_aresetn": {
|
||||
"ports": [
|
||||
"xdma_0/axi_aresetn",
|
||||
"axi_bram_ctrl_0/s_axi_aresetn",
|
||||
"axi_smc/aresetn",
|
||||
"xdma_0_axi_periph/S00_ARESETN",
|
||||
"axi_gpio_0/s_axi_aresetn",
|
||||
"xdma_0_axi_periph/M00_ARESETN",
|
||||
"xdma_0_axi_periph/ARESETN"
|
||||
]
|
||||
},
|
||||
"xdma_0_user_lnk_up": {
|
||||
"ports": [
|
||||
"xdma_0/user_lnk_up",
|
||||
"util_vector_logic_0/Op1"
|
||||
]
|
||||
}
|
||||
},
|
||||
"addressing": {
|
||||
"/xdma_0": {
|
||||
"address_spaces": {
|
||||
"M_AXI": {
|
||||
"segments": {
|
||||
"SEG_axi_bram_ctrl_0_Mem0": {
|
||||
"address_block": "/axi_bram_ctrl_0/S_AXI/Mem0",
|
||||
"offset": "0x0000000000000000",
|
||||
"range": "64K"
|
||||
}
|
||||
}
|
||||
},
|
||||
"M_AXI_LITE": {
|
||||
"segments": {
|
||||
"SEG_axi_gpio_0_Reg": {
|
||||
"address_block": "/axi_gpio_0/S_AXI/Reg",
|
||||
"offset": "0x40000000",
|
||||
"range": "32K"
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
82
hello_world_dma.srcs/sources_1/bd/top/top.bda
Normal file
82
hello_world_dma.srcs/sources_1/bd/top/top.bda
Normal file
|
|
@ -0,0 +1,82 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<graphml xmlns="http://graphml.graphdrawing.org/xmlns" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://graphml.graphdrawing.org/xmlns http://graphml.graphdrawing.org/xmlns/1.0/graphml.xsd">
|
||||
<key id="BA" for="node" attr.name="base_addr" attr.type="string"/>
|
||||
<key id="BP" for="node" attr.name="base_param" attr.type="string"/>
|
||||
<key id="EH" for="edge" attr.name="edge_hid" attr.type="int"/>
|
||||
<key id="HA" for="node" attr.name="high_addr" attr.type="string"/>
|
||||
<key id="HP" for="node" attr.name="high_param" attr.type="string"/>
|
||||
<key id="MA" for="node" attr.name="master_addrspace" attr.type="string"/>
|
||||
<key id="MX" for="node" attr.name="master_instance" attr.type="string"/>
|
||||
<key id="MI" for="node" attr.name="master_interface" attr.type="string"/>
|
||||
<key id="MS" for="node" attr.name="master_segment" attr.type="string"/>
|
||||
<key id="MV" for="node" attr.name="master_vlnv" attr.type="string"/>
|
||||
<key id="TM" for="node" attr.name="memory_type" attr.type="string"/>
|
||||
<key id="SX" for="node" attr.name="slave_instance" attr.type="string"/>
|
||||
<key id="SI" for="node" attr.name="slave_interface" attr.type="string"/>
|
||||
<key id="SS" for="node" attr.name="slave_segment" attr.type="string"/>
|
||||
<key id="SV" for="node" attr.name="slave_vlnv" attr.type="string"/>
|
||||
<key id="TU" for="node" attr.name="usage_type" attr.type="string"/>
|
||||
<key id="VH" for="node" attr.name="vert_hid" attr.type="int"/>
|
||||
<key id="VM" for="node" attr.name="vert_name" attr.type="string"/>
|
||||
<key id="VT" for="node" attr.name="vert_type" attr.type="string"/>
|
||||
<graph id="G" edgedefault="undirected" parse.nodeids="canonical" parse.edgeids="canonical" parse.order="nodesfirst">
|
||||
<node id="n0">
|
||||
<data key="BA">0x40000000</data>
|
||||
<data key="BP">C_BASEADDR</data>
|
||||
<data key="HA">0x40007FFF</data>
|
||||
<data key="HP">C_HIGHADDR</data>
|
||||
<data key="MA">M_AXI_LITE</data>
|
||||
<data key="MX">/xdma_0</data>
|
||||
<data key="MI">M_AXI_LITE</data>
|
||||
<data key="MS">SEG_axi_gpio_0_Reg</data>
|
||||
<data key="MV">xilinx.com:ip:xdma:4.1</data>
|
||||
<data key="TM">both</data>
|
||||
<data key="SX">/axi_gpio_0</data>
|
||||
<data key="SI">S_AXI</data>
|
||||
<data key="SS">Reg</data>
|
||||
<data key="SV">xilinx.com:ip:axi_gpio:2.0</data>
|
||||
<data key="TU">register</data>
|
||||
<data key="VT">AC</data>
|
||||
</node>
|
||||
<node id="n1">
|
||||
<data key="BA">0x0000000000000000</data>
|
||||
<data key="BP">C_S_AXI_BASEADDR</data>
|
||||
<data key="HA">0x000000000000FFFF</data>
|
||||
<data key="HP">C_S_AXI_HIGHADDR</data>
|
||||
<data key="MA">M_AXI</data>
|
||||
<data key="MX">/xdma_0</data>
|
||||
<data key="MI">M_AXI</data>
|
||||
<data key="MS">SEG_axi_bram_ctrl_0_Mem0</data>
|
||||
<data key="MV">xilinx.com:ip:xdma:4.1</data>
|
||||
<data key="TM">both</data>
|
||||
<data key="SX">/axi_bram_ctrl_0</data>
|
||||
<data key="SI">S_AXI</data>
|
||||
<data key="SS">Mem0</data>
|
||||
<data key="SV">xilinx.com:ip:axi_bram_ctrl:4.1</data>
|
||||
<data key="TU">memory</data>
|
||||
<data key="VT">AC</data>
|
||||
</node>
|
||||
<node id="n2">
|
||||
<data key="VM">top</data>
|
||||
<data key="VT">BC</data>
|
||||
</node>
|
||||
<node id="n3">
|
||||
<data key="VH">2</data>
|
||||
<data key="VM">top</data>
|
||||
<data key="VT">VR</data>
|
||||
</node>
|
||||
<node id="n4">
|
||||
<data key="TU">active</data>
|
||||
<data key="VH">2</data>
|
||||
<data key="VT">PM</data>
|
||||
</node>
|
||||
<edge id="e0" source="n2" target="n3"/>
|
||||
<edge id="e1" source="n3" target="n4"/>
|
||||
<edge id="e2" source="n1" target="n4">
|
||||
<data key="EH">2</data>
|
||||
</edge>
|
||||
<edge id="e3" source="n0" target="n4">
|
||||
<data key="EH">2</data>
|
||||
</edge>
|
||||
</graph>
|
||||
</graphml>
|
||||
45
hello_world_dma.srcs/sources_1/bd/top/ui/bd_2ae56375.ui
Normal file
45
hello_world_dma.srcs/sources_1/bd/top/ui/bd_2ae56375.ui
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
{
|
||||
"ActiveEmotionalView":"Default View",
|
||||
"Default View_ScaleFactor":"1.44304",
|
||||
"Default View_TopLeft":"-270,-580",
|
||||
"ExpandedHierarchyInLayout":"",
|
||||
"guistr":"# # String gsaved with Nlview 7.0r4 2019-12-20 bk=1.5203 VDI=41 GEI=36 GUI=JA:10.0 TLS
|
||||
# -string -flagsOSRD
|
||||
preplace port pcie_express_x4 -pg 1 -lvl 4 -x 1120 -y -30 -defaultsOSRD
|
||||
preplace port diff_clock_rtl_0 -pg 1 -lvl 0 -x -10 -y -140 -defaultsOSRD
|
||||
preplace port leds -pg 1 -lvl 4 -x 1120 -y -60 -defaultsOSRD
|
||||
preplace port port-id_reset_rtl_0 -pg 1 -lvl 0 -x -10 -y 50 -defaultsOSRD
|
||||
preplace portBus LED_M2 -pg 1 -lvl 4 -x 1120 -y 150 -defaultsOSRD
|
||||
preplace inst xdma_0 -pg 1 -lvl 1 -x 180 -y 50 -defaultsOSRD
|
||||
preplace inst axi_bram_ctrl_0 -pg 1 -lvl 3 -x 910 -y -140 -defaultsOSRD
|
||||
preplace inst blk_mem_gen_0 -pg 1 -lvl 3 -x 910 -y 40 -defaultsOSRD
|
||||
preplace inst util_vector_logic_0 -pg 1 -lvl 3 -x 910 -y 150 -defaultsOSRD
|
||||
preplace inst axi_gpio_0 -pg 1 -lvl 2 -x 550 -y -120 -defaultsOSRD
|
||||
preplace inst util_ds_buf -pg 1 -lvl 1 -x 180 -y -140 -defaultsOSRD
|
||||
preplace inst axi_smc -pg 1 -lvl 2 -x 550 -y -280 -defaultsOSRD
|
||||
preplace inst xdma_0_axi_periph -pg 1 -lvl 2 -x 550 -y -460 -defaultsOSRD
|
||||
preplace netloc reset_rtl_0_1 1 0 1 NJ 50
|
||||
preplace netloc util_ds_buf_IBUF_OUT 1 0 2 10 190 350J
|
||||
preplace netloc util_vector_logic_0_Res 1 3 1 N 150
|
||||
preplace netloc xdma_0_axi_aclk 1 1 2 380 -30 710
|
||||
preplace netloc xdma_0_axi_aresetn 1 1 2 390 -20 730
|
||||
preplace netloc xdma_0_user_lnk_up 1 1 2 NJ 30 720
|
||||
preplace netloc axi_bram_ctrl_0_BRAM_PORTA 1 2 2 760 -40 1070
|
||||
preplace netloc axi_bram_ctrl_0_BRAM_PORTB 1 2 2 750 -50 1060
|
||||
preplace netloc axi_gpio_0_GPIO 1 2 2 720J -60 NJ
|
||||
preplace netloc axi_smc_M00_AXI 1 2 1 710 -280n
|
||||
preplace netloc diff_clock_rtl_0_1 1 0 1 NJ -140
|
||||
preplace netloc xdma_0_M_AXI 1 1 1 360 -300n
|
||||
preplace netloc xdma_0_M_AXI_LITE 1 1 1 370 -520n
|
||||
preplace netloc xdma_0_axi_periph_M00_AXI 1 1 2 400 -40 700
|
||||
preplace netloc xdma_0_pcie_mgt 1 1 3 NJ 10 740J -30 NJ
|
||||
levelinfo -pg 1 -10 180 550 910 1120
|
||||
pagesize -pg 1 -db -bbox -sgen -170 -580 1290 260
|
||||
"
|
||||
}
|
||||
{
|
||||
"da_axi4_cnt":"2",
|
||||
"da_board_cnt":"4",
|
||||
"da_bram_cntlr_cnt":"2",
|
||||
"da_xdma_cnt":"1"
|
||||
}
|
||||
BIN
hello_world_dma.srcs/utils_1/imports/synth_1/top_wrapper.dcp
Executable file
BIN
hello_world_dma.srcs/utils_1/imports/synth_1/top_wrapper.dcp
Executable file
Binary file not shown.
Loading…
Add table
Add a link
Reference in a new issue